Assertions
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Assertions by Category
ASSERTPROPERTIESSEQUENCES
Total1028010
Category 01028010


Assertions by Severity
ASSERTPROPERTIESSEQUENCES
Total1028010
Severity 01028010


Summary for Assertions
NUMBERPERCENT
Total Number1028100.00
Uncovered60.58
Success102299.42
Failure00.00
Incomplete10.10
Without Attempts00.00


Summary for Cover Sequences
NUMBERPERCENT
Total Number10100.00
Uncovered00.00
All Matches10100.00
First Matches10100.00
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COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETE
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001214224016495949590
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001214224016254425440
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001214224016530953090
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 00121422401613126131260
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0012142240169849498494851

Cover Sequences First Matches:
COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETESRC
tb.dut.tlul_assert_device.gen_device_cov.aValidNotAccepted_C 0012142240166071516071510
tb.dut.tlul_assert_device.gen_device_cov.a_addressChangedNotAccepted_C 001214224016336633660
tb.dut.tlul_assert_device.gen_device_cov.a_dataChangedNotAccepted_C 001214224016839283920
tb.dut.tlul_assert_device.gen_device_cov.a_maskChangedNotAccepted_C 001214224016628962890
tb.dut.tlul_assert_device.gen_device_cov.a_opcodeChangedNotAccepted_C 001214224016794279420
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001214224016495949590
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001214224016254425440
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001214224016530953090
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 00121422401613126131260
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0012142240169849498494851