Assertions
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Assertions by Category
ASSERTPROPERTIESSEQUENCES
Total1028010
Category 01028010


Assertions by Severity
ASSERTPROPERTIESSEQUENCES
Total1028010
Severity 01028010


Summary for Assertions
NUMBERPERCENT
Total Number1028100.00
Uncovered80.78
Success102099.22
Failure00.00
Incomplete10.10
Without Attempts00.00


Summary for Cover Sequences
NUMBERPERCENT
Total Number10100.00
Uncovered00.00
All Matches10100.00
First Matches10100.00
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COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETE
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001004925484526852680
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001004925484375137510
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001004925484538753870
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 00100492548416397163970
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0010049254849521795217847

Cover Sequences First Matches:
COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETESRC
tb.dut.tlul_assert_device.gen_device_cov.aValidNotAccepted_C 001004925484132226613222660
tb.dut.tlul_assert_device.gen_device_cov.a_addressChangedNotAccepted_C 001004925484388338830
tb.dut.tlul_assert_device.gen_device_cov.a_dataChangedNotAccepted_C 001004925484884388430
tb.dut.tlul_assert_device.gen_device_cov.a_maskChangedNotAccepted_C 001004925484661366130
tb.dut.tlul_assert_device.gen_device_cov.a_opcodeChangedNotAccepted_C 001004925484797879780
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001004925484526852680
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001004925484375137510
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001004925484538753870
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 00100492548416397163970
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0010049254849521795217847