Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::rx_timeout_cg

Group : uart_env_pkg::uart_env_cov::rx_timeout_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::rx_timeout_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	0	3	100.00

Variables for Group uart_env_pkg::uart_env_cov::rx_timeout_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_timeout	3	0	3	100.00	100	1	1	0

Summary for Variable cp_timeout

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_timeout

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
large_timeout	750	1			T18	1		T43	1		T44	1
medium_timeout	450	1			T101	2		T90	1		T97	4
small_timeout	1150	1			T13	2		T14	2		T17	2