Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::rx_watermark_cg

Group : uart_env_pkg::uart_env_cov::rx_watermark_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
87.50	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::rx_watermark_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	8	1	7	87.50

Variables for Group uart_env_pkg::uart_env_cov::rx_watermark_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_watermark_lvl	8	1	7	87.50	100	1	1	0

Summary for Variable cp_watermark_lvl

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	8	1	7	87.50

User Defined Bins for cp_watermark_lvl

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
all_levels[7]	0	1	1

Covered bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
all_levels[0]	1600	1			T13	4		T14	4		T17	4
all_levels[1]	100	1			T102	2		T103	2		T104	2
all_levels[2]	400	1			T18	1		T43	1		T44	1
all_levels[3]	50	1			T97	1		T98	1		T99	1
all_levels[4]	100	1			T19	1		T50	1		T51	1
all_levels[5]	650	1			T49	11		T61	11		T97	1
all_levels[6]	250	1			T64	5		T105	5		T106	5