Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::rx_timeout_cg

Group : uart_env_pkg::uart_env_cov::rx_timeout_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
33.33	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::rx_timeout_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	3	2	1	33.33

Variables for Group uart_env_pkg::uart_env_cov::rx_timeout_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_timeout	3	2	1	33.33	100	1	1	0

Summary for Variable cp_timeout

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	2	1	33.33

User Defined Bins for cp_timeout

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
large_timeout	0	1	1
medium_timeout	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

small_timeout

138

1

T7

4

T8

3

T9

4