Unified Coverage Report :: Group :: uart_env_pkg::uart_env_cov::tx_watermark_cg

Group : uart_env_pkg::uart_env_cov::tx_watermark_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
14.29	1	100	1	64	64

Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_uart_env_0.1/uart_env_cov.sv

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Summary for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	7	6	1	14.29

Variables for Group uart_env_pkg::uart_env_cov::tx_watermark_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_watermark_lvl	7	6	1	14.29	100	1	1	0

Summary for Variable cp_watermark_lvl

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	6	1	14.29

User Defined Bins for cp_watermark_lvl

Uncovered bins

NAME	COUNT	AT LEAST	NUMBER	STATUS
all_levels[1]	0	1	1
all_levels[2]	0	1	1
all_levels[3]	0	1	1
all_levels[4]	0	1	1
all_levels[5]	0	1	1
all_levels[6]	0	1	1

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_levels[0]

116

1

T7

4

T8

3

T9

4