Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	56708947	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

19123165

1

T1

192

T2

692

T3

49

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	72571177	1			T1	2487		T2	3034		T3	40761
values[0x0]	1551684	1			T1	93		T2	315		T3	33
values[0x1]	1709251	1			T1	97		T2	299		T3	33

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	39786698	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

36045414

1

T1

938

T2

1495

T3

20576

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	452592	1			T1	8		T2	16		T4	172762
valid_sources[0x01]	284606	1			T1	9		T2	10		T4	3939
valid_sources[0x02]	250081	1			T1	3		T2	5		T4	4281
valid_sources[0x03]	276606	1			T1	8		T2	8		T4	3445
valid_sources[0x04]	268816	1			T1	21		T2	9		T4	4428
valid_sources[0x05]	259788	1			T1	7		T2	10		T4	3243
valid_sources[0x06]	285514	1			T1	16		T2	26		T4	4014
valid_sources[0x07]	273839	1			T1	7		T2	14		T4	3222
valid_sources[0x08]	253549	1			T1	7		T2	15		T4	3196
valid_sources[0x09]	278601	1			T1	11		T2	6		T4	3238
valid_sources[0x0a]	374491	1			T1	12		T2	2		T4	3290
valid_sources[0x0b]	261724	1			T1	13		T2	10		T4	2355
valid_sources[0x0c]	338914	1			T1	10		T2	18		T3	5973
valid_sources[0x0d]	259921	1			T1	9		T2	10		T4	3742
valid_sources[0x0e]	570177	1			T1	11		T2	24		T4	3550
valid_sources[0x0f]	265664	1			T1	4		T2	10		T4	4142
valid_sources[0x10]	266171	1			T1	8		T2	18		T4	3431
valid_sources[0x11]	252747	1			T1	15		T2	9		T4	4211
valid_sources[0x12]	270932	1			T1	6		T2	18		T4	4509
valid_sources[0x13]	277951	1			T1	5		T2	10		T4	4409
valid_sources[0x14]	267262	1			T1	13		T2	21		T4	3015
valid_sources[0x15]	253046	1			T1	13		T2	13		T4	3939
valid_sources[0x16]	288320	1			T1	10		T2	24		T4	3605
valid_sources[0x17]	275506	1			T1	11		T2	18		T4	4573
valid_sources[0x18]	311442	1			T1	1		T2	13		T4	55240
valid_sources[0x19]	268971	1			T1	19		T2	26		T4	4217
valid_sources[0x1a]	278295	1			T1	21		T2	18		T4	3572
valid_sources[0x1b]	265283	1			T1	4		T2	6		T3	1
valid_sources[0x1c]	283913	1			T1	3		T2	15		T4	3789
valid_sources[0x1d]	250211	1			T1	12		T2	22		T4	3207
valid_sources[0x1e]	320270	1			T1	24		T2	10		T3	1
valid_sources[0x1f]	294499	1			T1	11		T2	20		T4	3850
valid_sources[0x20]	282429	1			T1	6		T2	17		T4	3284
valid_sources[0x21]	288618	1			T1	13		T2	11		T4	4131
valid_sources[0x22]	291478	1			T1	19		T2	10		T4	3149
valid_sources[0x23]	309132	1			T1	6		T2	10		T4	3983
valid_sources[0x24]	290644	1			T1	24		T2	19		T4	3071
valid_sources[0x25]	299026	1			T1	5		T2	5		T4	3933
valid_sources[0x26]	305671	1			T1	12		T2	7		T4	3756
valid_sources[0x27]	286907	1			T1	2		T2	16		T4	3334
valid_sources[0x28]	255563	1			T1	10		T2	11		T4	3485
valid_sources[0x29]	343776	1			T1	9		T2	11		T4	63804
valid_sources[0x2a]	275219	1			T1	13		T2	17		T4	3216
valid_sources[0x2b]	272297	1			T1	5		T2	11		T4	3724
valid_sources[0x2c]	273758	1			T1	12		T2	13		T4	2318
valid_sources[0x2d]	287746	1			T1	14		T2	21		T4	3774
valid_sources[0x2e]	279582	1			T1	11		T2	20		T4	2794
valid_sources[0x2f]	282644	1			T1	11		T2	37		T3	1
valid_sources[0x30]	282525	1			T1	12		T2	13		T4	4529
valid_sources[0x31]	310161	1			T1	14		T2	18		T4	3808
valid_sources[0x32]	266416	1			T1	9		T2	9		T4	3191
valid_sources[0x33]	271251	1			T1	16		T2	6		T4	3768
valid_sources[0x34]	296507	1			T1	11		T2	14		T4	3075
valid_sources[0x35]	275771	1			T1	14		T2	7		T4	3255
valid_sources[0x36]	277270	1			T1	10		T2	13		T4	5873
valid_sources[0x37]	289450	1			T1	5		T2	20		T4	4185
valid_sources[0x38]	276631	1			T1	4		T2	20		T4	3819
valid_sources[0x39]	284184	1			T1	7		T2	8		T4	2786
valid_sources[0x3a]	297105	1			T1	20		T2	8		T4	3601
valid_sources[0x3b]	248535	1			T1	17		T2	19		T4	2872
valid_sources[0x3c]	244830	1			T1	13		T2	20		T4	4146
valid_sources[0x3d]	269675	1			T1	8		T2	11		T4	3305
valid_sources[0x3e]	331163	1			T1	5		T2	22		T4	3980
valid_sources[0x3f]	266165	1			T1	15		T2	10		T4	3055
valid_sources[0x40]	269172	1			T1	8		T2	13		T4	4334
valid_sources[0x41]	304909	1			T1	17		T2	13		T4	4457
valid_sources[0x42]	285926	1			T1	11		T2	12		T4	3686
valid_sources[0x43]	272588	1			T1	8		T2	9		T4	3192
valid_sources[0x44]	311219	1			T1	4		T2	15		T4	3454
valid_sources[0x45]	296454	1			T1	9		T2	41		T4	4110
valid_sources[0x46]	320789	1			T1	14		T2	7		T4	3187
valid_sources[0x47]	291811	1			T1	5		T2	13		T4	3581
valid_sources[0x48]	276796	1			T1	19		T2	21		T4	3323
valid_sources[0x49]	415706	1			T1	17		T2	13		T3	464
valid_sources[0x4a]	317130	1			T1	4		T2	14		T4	3342
valid_sources[0x4b]	258637	1			T1	5		T2	13		T4	3144
valid_sources[0x4c]	289025	1			T1	13		T2	16		T4	3604
valid_sources[0x4d]	335020	1			T1	6		T2	13		T3	1
valid_sources[0x4e]	263375	1			T1	24		T2	28		T4	3272
valid_sources[0x4f]	373137	1			T1	6		T2	4		T4	3422
valid_sources[0x50]	257469	1			T1	8		T2	1		T4	3840
valid_sources[0x51]	283762	1			T1	6		T2	28		T4	2816
valid_sources[0x52]	296739	1			T1	23		T2	15		T4	4604
valid_sources[0x53]	301202	1			T1	11		T2	21		T4	3127
valid_sources[0x54]	287671	1			T1	8		T2	16		T4	3177
valid_sources[0x55]	362440	1			T1	5		T2	10		T4	3200
valid_sources[0x56]	272745	1			T1	15		T2	29		T4	4076
valid_sources[0x57]	274171	1			T1	8		T2	16		T3	332
valid_sources[0x58]	285331	1			T1	17		T2	21		T4	4969
valid_sources[0x59]	265375	1			T1	4		T2	9		T4	3185
valid_sources[0x5a]	281163	1			T1	5		T2	13		T4	5244
valid_sources[0x5b]	263181	1			T1	7		T2	11		T4	3230
valid_sources[0x5c]	270656	1			T1	16		T2	19		T4	3410
valid_sources[0x5d]	277858	1			T1	5		T2	18		T4	3394
valid_sources[0x5e]	275502	1			T1	10		T2	22		T4	4097
valid_sources[0x5f]	265061	1			T1	14		T2	28		T4	3770
valid_sources[0x60]	267321	1			T1	8		T2	12		T4	4166
valid_sources[0x61]	279120	1			T1	4		T2	11		T4	3895
valid_sources[0x62]	317529	1			T1	7		T2	10		T3	1
valid_sources[0x63]	274212	1			T1	4		T2	12		T4	4160
valid_sources[0x64]	272550	1			T1	9		T2	16		T4	3508
valid_sources[0x65]	315480	1			T1	4		T2	17		T4	3539
valid_sources[0x66]	277647	1			T1	6		T2	16		T4	3035
valid_sources[0x67]	258161	1			T1	4		T2	9		T4	3373
valid_sources[0x68]	348184	1			T1	11		T2	13		T4	2922
valid_sources[0x69]	295494	1			T1	18		T2	18		T4	4801
valid_sources[0x6a]	257660	1			T1	16		T2	32		T4	3528
valid_sources[0x6b]	323324	1			T1	10		T2	14		T4	2791
valid_sources[0x6c]	266075	1			T1	5		T2	24		T4	3359
valid_sources[0x6d]	267997	1			T1	7		T2	14		T4	3544
valid_sources[0x6e]	261142	1			T1	17		T2	12		T4	3824
valid_sources[0x6f]	269277	1			T1	7		T2	18		T4	3343
valid_sources[0x70]	274997	1			T1	18		T2	6		T4	4354
valid_sources[0x71]	335294	1			T1	25		T2	8		T4	3927
valid_sources[0x72]	273365	1			T1	8		T2	16		T4	2543
valid_sources[0x73]	289252	1			T1	5		T2	18		T4	2629
valid_sources[0x74]	267268	1			T1	12		T2	13		T4	3660
valid_sources[0x75]	271585	1			T1	17		T2	27		T4	3951
valid_sources[0x76]	295366	1			T1	9		T2	15		T3	5544
valid_sources[0x77]	273471	1			T1	5		T2	15		T4	2578
valid_sources[0x78]	282383	1			T1	18		T2	10		T4	3170
valid_sources[0x79]	287747	1			T1	20		T2	16		T4	3765
valid_sources[0x7a]	291514	1			T1	9		T2	2		T4	3176
valid_sources[0x7b]	325841	1			T1	11		T2	17		T4	3204
valid_sources[0x7c]	256829	1			T1	11		T2	16		T4	2565
valid_sources[0x7d]	273547	1			T1	6		T2	13		T4	3319
valid_sources[0x7e]	373613	1			T1	2		T2	12		T4	3916
valid_sources[0x7f]	295464	1			T1	10		T2	2		T4	2927
valid_sources[0x80]	285992	1			T1	11		T2	6		T4	3560

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16461879

1

T1

126

T2

529

T3

1

values[0x0]

all_enables

biggest_size

1354533

1

T1

45

T2

122

T3

23

values[0x1]

all_enables

biggest_size

1306753

1

T1

21

T2

41

T3

25