Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.27 99.27 97.95 100.00 98.80 100.00 99.59


Total test records in report: 1319
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T1048 /workspace/coverage/default/243.uart_fifo_reset.564949525 Mar 28 01:49:37 PM PDT 24 Mar 28 01:50:46 PM PDT 24 48138516946 ps
T1049 /workspace/coverage/default/34.uart_stress_all_with_rand_reset.1820712251 Mar 28 01:47:04 PM PDT 24 Mar 28 01:50:07 PM PDT 24 55990770234 ps
T1050 /workspace/coverage/default/49.uart_fifo_full.1607064451 Mar 28 01:48:35 PM PDT 24 Mar 28 01:49:56 PM PDT 24 293280624892 ps
T1051 /workspace/coverage/default/9.uart_tx_rx.2541309871 Mar 28 01:45:22 PM PDT 24 Mar 28 01:47:36 PM PDT 24 80738601747 ps
T1052 /workspace/coverage/default/19.uart_tx_ovrd.878248443 Mar 28 01:46:20 PM PDT 24 Mar 28 01:46:25 PM PDT 24 9691332675 ps
T1053 /workspace/coverage/default/41.uart_perf.1531583972 Mar 28 01:47:43 PM PDT 24 Mar 28 01:54:17 PM PDT 24 30764181341 ps
T1054 /workspace/coverage/default/37.uart_rx_oversample.980459869 Mar 28 01:47:25 PM PDT 24 Mar 28 01:47:43 PM PDT 24 4855304907 ps
T228 /workspace/coverage/default/221.uart_fifo_reset.3397174528 Mar 28 01:49:32 PM PDT 24 Mar 28 01:51:23 PM PDT 24 190249280728 ps
T1055 /workspace/coverage/default/17.uart_rx_parity_err.1444898443 Mar 28 01:45:42 PM PDT 24 Mar 28 01:46:26 PM PDT 24 54741527172 ps
T1056 /workspace/coverage/default/55.uart_stress_all_with_rand_reset.4224657762 Mar 28 01:48:35 PM PDT 24 Mar 28 02:02:23 PM PDT 24 90529078345 ps
T1057 /workspace/coverage/default/36.uart_tx_rx.359972294 Mar 28 01:47:23 PM PDT 24 Mar 28 01:47:37 PM PDT 24 35377647077 ps
T1058 /workspace/coverage/default/8.uart_smoke.381681968 Mar 28 01:45:19 PM PDT 24 Mar 28 01:45:21 PM PDT 24 915902981 ps
T1059 /workspace/coverage/default/25.uart_tx_ovrd.3162153249 Mar 28 01:46:50 PM PDT 24 Mar 28 01:47:09 PM PDT 24 6223143801 ps
T1060 /workspace/coverage/default/30.uart_alert_test.4244598385 Mar 28 01:46:56 PM PDT 24 Mar 28 01:46:57 PM PDT 24 26680178 ps
T214 /workspace/coverage/default/4.uart_fifo_reset.3369425929 Mar 28 01:45:01 PM PDT 24 Mar 28 01:46:02 PM PDT 24 139889930661 ps
T1061 /workspace/coverage/default/37.uart_tx_ovrd.830265808 Mar 28 01:47:25 PM PDT 24 Mar 28 01:47:27 PM PDT 24 1583893359 ps
T1062 /workspace/coverage/default/7.uart_noise_filter.3058288238 Mar 28 01:45:19 PM PDT 24 Mar 28 01:46:36 PM PDT 24 49285259723 ps
T1063 /workspace/coverage/default/30.uart_long_xfer_wo_dly.4169017689 Mar 28 01:46:56 PM PDT 24 Mar 28 01:52:18 PM PDT 24 122082910162 ps
T1064 /workspace/coverage/default/202.uart_fifo_reset.1029849181 Mar 28 01:49:15 PM PDT 24 Mar 28 01:49:46 PM PDT 24 79065195322 ps
T1065 /workspace/coverage/default/4.uart_loopback.4047348931 Mar 28 01:45:09 PM PDT 24 Mar 28 01:45:21 PM PDT 24 6448085056 ps
T1066 /workspace/coverage/default/40.uart_stress_all.2932904797 Mar 28 01:47:42 PM PDT 24 Mar 28 01:52:05 PM PDT 24 145451201518 ps
T1067 /workspace/coverage/default/25.uart_intr.2721826437 Mar 28 01:46:50 PM PDT 24 Mar 28 01:47:04 PM PDT 24 9814168529 ps
T229 /workspace/coverage/default/108.uart_fifo_reset.1504898028 Mar 28 01:49:01 PM PDT 24 Mar 28 01:51:57 PM PDT 24 133190485074 ps
T169 /workspace/coverage/default/43.uart_rx_parity_err.3315688451 Mar 28 01:48:06 PM PDT 24 Mar 28 01:49:17 PM PDT 24 160031646744 ps
T1068 /workspace/coverage/default/39.uart_rx_oversample.1022554242 Mar 28 01:47:35 PM PDT 24 Mar 28 01:47:48 PM PDT 24 6347569000 ps
T1069 /workspace/coverage/default/1.uart_fifo_full.2714033208 Mar 28 01:44:46 PM PDT 24 Mar 28 01:45:04 PM PDT 24 40102713883 ps
T1070 /workspace/coverage/default/48.uart_perf.2414667017 Mar 28 01:48:32 PM PDT 24 Mar 28 01:58:48 PM PDT 24 21013505758 ps
T1071 /workspace/coverage/default/22.uart_intr.1824929931 Mar 28 01:46:22 PM PDT 24 Mar 28 01:46:33 PM PDT 24 49631320994 ps
T241 /workspace/coverage/default/231.uart_fifo_reset.1092413095 Mar 28 01:49:32 PM PDT 24 Mar 28 01:50:11 PM PDT 24 198477968564 ps
T1072 /workspace/coverage/default/1.uart_fifo_reset.818122454 Mar 28 01:44:47 PM PDT 24 Mar 28 01:45:53 PM PDT 24 35416483009 ps
T1073 /workspace/coverage/default/48.uart_tx_ovrd.2200518608 Mar 28 01:48:32 PM PDT 24 Mar 28 01:48:46 PM PDT 24 7227024125 ps
T1074 /workspace/coverage/default/25.uart_noise_filter.4225305246 Mar 28 01:46:52 PM PDT 24 Mar 28 01:47:41 PM PDT 24 27485839340 ps
T1075 /workspace/coverage/default/43.uart_stress_all.3256924098 Mar 28 01:48:05 PM PDT 24 Mar 28 01:52:03 PM PDT 24 155289233888 ps
T1076 /workspace/coverage/default/85.uart_fifo_reset.3424619846 Mar 28 01:48:50 PM PDT 24 Mar 28 01:49:09 PM PDT 24 25783940700 ps
T1077 /workspace/coverage/default/44.uart_fifo_full.3382796078 Mar 28 01:48:04 PM PDT 24 Mar 28 01:48:34 PM PDT 24 35986547509 ps
T1078 /workspace/coverage/default/32.uart_rx_start_bit_filter.103282791 Mar 28 01:47:05 PM PDT 24 Mar 28 01:48:08 PM PDT 24 41700039014 ps
T1079 /workspace/coverage/default/19.uart_fifo_overflow.889578931 Mar 28 01:46:21 PM PDT 24 Mar 28 01:47:40 PM PDT 24 47983681928 ps
T1080 /workspace/coverage/default/47.uart_stress_all_with_rand_reset.1787530231 Mar 28 01:48:28 PM PDT 24 Mar 28 01:55:15 PM PDT 24 20855434129 ps
T1081 /workspace/coverage/default/2.uart_fifo_reset.1350354731 Mar 28 01:45:00 PM PDT 24 Mar 28 01:46:19 PM PDT 24 42987779602 ps
T1082 /workspace/coverage/default/299.uart_fifo_reset.3593692226 Mar 28 01:50:08 PM PDT 24 Mar 28 01:50:52 PM PDT 24 25750373850 ps
T1083 /workspace/coverage/default/6.uart_alert_test.1699354465 Mar 28 01:45:17 PM PDT 24 Mar 28 01:45:18 PM PDT 24 39873338 ps
T1084 /workspace/coverage/default/45.uart_long_xfer_wo_dly.1792579121 Mar 28 01:48:03 PM PDT 24 Mar 28 01:56:34 PM PDT 24 156851821807 ps
T1085 /workspace/coverage/default/40.uart_intr.2347951444 Mar 28 01:47:43 PM PDT 24 Mar 28 01:47:49 PM PDT 24 10427612670 ps
T1086 /workspace/coverage/default/24.uart_alert_test.3297795290 Mar 28 01:46:49 PM PDT 24 Mar 28 01:46:50 PM PDT 24 13904500 ps
T1087 /workspace/coverage/default/33.uart_noise_filter.2032559762 Mar 28 01:47:10 PM PDT 24 Mar 28 01:48:29 PM PDT 24 299401169094 ps
T1088 /workspace/coverage/default/78.uart_fifo_reset.3162544802 Mar 28 01:48:48 PM PDT 24 Mar 28 01:50:07 PM PDT 24 71962314141 ps
T1089 /workspace/coverage/default/23.uart_rx_parity_err.604377144 Mar 28 01:46:47 PM PDT 24 Mar 28 01:51:09 PM PDT 24 117368619614 ps
T1090 /workspace/coverage/default/2.uart_rx_oversample.600337941 Mar 28 01:45:01 PM PDT 24 Mar 28 01:45:15 PM PDT 24 6091760225 ps
T1091 /workspace/coverage/default/42.uart_stress_all.1969817128 Mar 28 01:48:04 PM PDT 24 Mar 28 01:59:14 PM PDT 24 188298278095 ps
T1092 /workspace/coverage/default/47.uart_long_xfer_wo_dly.4134513972 Mar 28 01:48:30 PM PDT 24 Mar 28 02:03:24 PM PDT 24 127573572201 ps
T1093 /workspace/coverage/default/44.uart_noise_filter.2231347069 Mar 28 01:48:04 PM PDT 24 Mar 28 01:50:44 PM PDT 24 159170768277 ps
T1094 /workspace/coverage/default/15.uart_alert_test.2608648068 Mar 28 01:45:46 PM PDT 24 Mar 28 01:45:47 PM PDT 24 25971817 ps
T1095 /workspace/coverage/default/5.uart_tx_ovrd.2595761511 Mar 28 01:45:01 PM PDT 24 Mar 28 01:45:03 PM PDT 24 1327283821 ps
T1096 /workspace/coverage/default/0.uart_long_xfer_wo_dly.2605461232 Mar 28 01:44:42 PM PDT 24 Mar 28 01:51:11 PM PDT 24 136811283935 ps
T1097 /workspace/coverage/default/67.uart_stress_all_with_rand_reset.1190986806 Mar 28 01:48:45 PM PDT 24 Mar 28 01:50:49 PM PDT 24 63272020448 ps
T1098 /workspace/coverage/default/170.uart_fifo_reset.694613480 Mar 28 01:49:02 PM PDT 24 Mar 28 01:49:23 PM PDT 24 53741155238 ps
T1099 /workspace/coverage/default/183.uart_fifo_reset.1624989737 Mar 28 01:49:10 PM PDT 24 Mar 28 01:50:52 PM PDT 24 67178173809 ps
T1100 /workspace/coverage/default/29.uart_long_xfer_wo_dly.1928592680 Mar 28 01:46:57 PM PDT 24 Mar 28 01:54:03 PM PDT 24 74460737449 ps
T1101 /workspace/coverage/default/17.uart_noise_filter.1885998932 Mar 28 01:45:47 PM PDT 24 Mar 28 01:46:10 PM PDT 24 13869835370 ps
T1102 /workspace/coverage/default/17.uart_rx_start_bit_filter.3147641241 Mar 28 01:45:48 PM PDT 24 Mar 28 01:45:54 PM PDT 24 4472386083 ps
T1103 /workspace/coverage/default/219.uart_fifo_reset.2039121837 Mar 28 01:49:36 PM PDT 24 Mar 28 01:51:18 PM PDT 24 68380767146 ps
T1104 /workspace/coverage/default/3.uart_smoke.330621827 Mar 28 01:44:57 PM PDT 24 Mar 28 01:45:01 PM PDT 24 696059137 ps
T1105 /workspace/coverage/default/20.uart_alert_test.1147606817 Mar 28 01:46:22 PM PDT 24 Mar 28 01:46:22 PM PDT 24 13390491 ps
T1106 /workspace/coverage/default/18.uart_alert_test.3605700556 Mar 28 01:46:20 PM PDT 24 Mar 28 01:46:21 PM PDT 24 14652720 ps
T1107 /workspace/coverage/default/46.uart_alert_test.1340824352 Mar 28 01:48:06 PM PDT 24 Mar 28 01:48:06 PM PDT 24 20178747 ps
T1108 /workspace/coverage/default/44.uart_rx_start_bit_filter.1182338804 Mar 28 01:48:03 PM PDT 24 Mar 28 01:48:04 PM PDT 24 3130230089 ps
T1109 /workspace/coverage/default/7.uart_tx_ovrd.1581090386 Mar 28 01:45:21 PM PDT 24 Mar 28 01:45:23 PM PDT 24 692381369 ps
T1110 /workspace/coverage/default/44.uart_rx_parity_err.3266861574 Mar 28 01:48:06 PM PDT 24 Mar 28 01:48:31 PM PDT 24 80564634326 ps
T1111 /workspace/coverage/default/26.uart_stress_all_with_rand_reset.830610666 Mar 28 01:46:57 PM PDT 24 Mar 28 01:49:18 PM PDT 24 12391689301 ps
T1112 /workspace/coverage/default/48.uart_stress_all_with_rand_reset.4234331206 Mar 28 01:48:32 PM PDT 24 Mar 28 01:54:05 PM PDT 24 474407927026 ps
T1113 /workspace/coverage/default/288.uart_fifo_reset.527982625 Mar 28 01:49:55 PM PDT 24 Mar 28 01:50:55 PM PDT 24 37989600362 ps
T1114 /workspace/coverage/default/36.uart_tx_ovrd.928422620 Mar 28 01:47:37 PM PDT 24 Mar 28 01:47:40 PM PDT 24 847065122 ps
T1115 /workspace/coverage/default/16.uart_loopback.1381506364 Mar 28 01:45:42 PM PDT 24 Mar 28 01:45:50 PM PDT 24 3799058955 ps
T1116 /workspace/coverage/default/15.uart_rx_parity_err.1677870524 Mar 28 01:45:47 PM PDT 24 Mar 28 01:46:09 PM PDT 24 30346288071 ps
T1117 /workspace/coverage/default/4.uart_smoke.1815142891 Mar 28 01:45:02 PM PDT 24 Mar 28 01:45:20 PM PDT 24 5672809611 ps
T1118 /workspace/coverage/default/12.uart_intr.64522572 Mar 28 01:45:41 PM PDT 24 Mar 28 01:46:11 PM PDT 24 45124526572 ps
T1119 /workspace/coverage/default/259.uart_fifo_reset.3833406203 Mar 28 01:49:46 PM PDT 24 Mar 28 01:50:01 PM PDT 24 14881376690 ps
T1120 /workspace/coverage/default/28.uart_rx_oversample.4101885533 Mar 28 01:46:52 PM PDT 24 Mar 28 01:47:53 PM PDT 24 6792148470 ps
T1121 /workspace/coverage/default/150.uart_fifo_reset.191731323 Mar 28 01:49:04 PM PDT 24 Mar 28 01:50:04 PM PDT 24 145288602312 ps
T216 /workspace/coverage/default/172.uart_fifo_reset.2075194296 Mar 28 01:49:08 PM PDT 24 Mar 28 01:49:37 PM PDT 24 14619812146 ps
T1122 /workspace/coverage/default/12.uart_stress_all.3713383410 Mar 28 01:45:41 PM PDT 24 Mar 28 01:49:56 PM PDT 24 106685687879 ps
T1123 /workspace/coverage/default/11.uart_long_xfer_wo_dly.2998617352 Mar 28 01:45:40 PM PDT 24 Mar 28 01:49:03 PM PDT 24 77078660804 ps
T1124 /workspace/coverage/default/19.uart_loopback.3368001066 Mar 28 01:46:22 PM PDT 24 Mar 28 01:46:23 PM PDT 24 3645056891 ps
T1125 /workspace/coverage/default/198.uart_fifo_reset.3635955525 Mar 28 01:49:17 PM PDT 24 Mar 28 01:50:12 PM PDT 24 31125905373 ps
T1126 /workspace/coverage/default/48.uart_intr.1991548891 Mar 28 01:48:30 PM PDT 24 Mar 28 01:49:10 PM PDT 24 42930461228 ps
T1127 /workspace/coverage/default/13.uart_perf.2888553072 Mar 28 01:45:45 PM PDT 24 Mar 28 01:56:44 PM PDT 24 12426214976 ps
T1128 /workspace/coverage/default/177.uart_fifo_reset.3126167624 Mar 28 01:49:22 PM PDT 24 Mar 28 01:51:31 PM PDT 24 88630694303 ps
T1129 /workspace/coverage/default/9.uart_tx_ovrd.1271318608 Mar 28 01:45:24 PM PDT 24 Mar 28 01:45:33 PM PDT 24 6310972874 ps
T1130 /workspace/coverage/default/48.uart_fifo_reset.3898429408 Mar 28 01:48:32 PM PDT 24 Mar 28 01:49:09 PM PDT 24 18699747609 ps
T1131 /workspace/coverage/default/35.uart_stress_all_with_rand_reset.1150837310 Mar 28 01:47:24 PM PDT 24 Mar 28 01:54:49 PM PDT 24 39088283520 ps
T205 /workspace/coverage/default/14.uart_fifo_reset.1411603936 Mar 28 01:45:42 PM PDT 24 Mar 28 01:45:52 PM PDT 24 30779201495 ps
T1132 /workspace/coverage/default/91.uart_fifo_reset.1598110027 Mar 28 01:48:49 PM PDT 24 Mar 28 01:49:09 PM PDT 24 27667334361 ps
T1133 /workspace/coverage/default/44.uart_loopback.1969010796 Mar 28 01:48:07 PM PDT 24 Mar 28 01:48:10 PM PDT 24 4654293073 ps
T1134 /workspace/coverage/default/28.uart_tx_rx.2476045401 Mar 28 01:46:56 PM PDT 24 Mar 28 01:47:35 PM PDT 24 52718763124 ps
T1135 /workspace/coverage/default/29.uart_rx_start_bit_filter.1679361425 Mar 28 01:46:57 PM PDT 24 Mar 28 01:47:00 PM PDT 24 7185063258 ps
T1136 /workspace/coverage/default/77.uart_fifo_reset.4128846145 Mar 28 01:48:53 PM PDT 24 Mar 28 01:52:42 PM PDT 24 160252507234 ps
T1137 /workspace/coverage/default/266.uart_fifo_reset.1661742317 Mar 28 01:49:49 PM PDT 24 Mar 28 01:53:09 PM PDT 24 137781768035 ps
T235 /workspace/coverage/default/82.uart_fifo_reset.2445462918 Mar 28 01:48:51 PM PDT 24 Mar 28 01:49:28 PM PDT 24 79168187166 ps
T1138 /workspace/coverage/default/4.uart_intr.4198161495 Mar 28 01:44:59 PM PDT 24 Mar 28 01:45:52 PM PDT 24 36137742147 ps
T1139 /workspace/coverage/default/70.uart_fifo_reset.2745239239 Mar 28 01:48:52 PM PDT 24 Mar 28 01:53:49 PM PDT 24 273288646302 ps
T1140 /workspace/coverage/default/33.uart_intr.3308704318 Mar 28 01:47:11 PM PDT 24 Mar 28 01:47:23 PM PDT 24 26271854886 ps
T1141 /workspace/coverage/default/47.uart_perf.1366958653 Mar 28 01:48:30 PM PDT 24 Mar 28 02:14:09 PM PDT 24 25910556472 ps
T1142 /workspace/coverage/default/36.uart_smoke.2238254574 Mar 28 01:47:26 PM PDT 24 Mar 28 01:47:29 PM PDT 24 701389757 ps
T1143 /workspace/coverage/default/26.uart_fifo_overflow.3522901843 Mar 28 01:46:50 PM PDT 24 Mar 28 01:48:35 PM PDT 24 260150398758 ps
T1144 /workspace/coverage/default/14.uart_tx_rx.771212693 Mar 28 01:45:39 PM PDT 24 Mar 28 01:45:56 PM PDT 24 140679505657 ps
T1145 /workspace/coverage/default/9.uart_perf.2922944554 Mar 28 01:45:30 PM PDT 24 Mar 28 01:47:52 PM PDT 24 4944694435 ps
T1146 /workspace/coverage/default/27.uart_loopback.1769612530 Mar 28 01:46:57 PM PDT 24 Mar 28 01:47:00 PM PDT 24 1124271665 ps
T1147 /workspace/coverage/default/27.uart_smoke.1373855076 Mar 28 01:46:57 PM PDT 24 Mar 28 01:46:58 PM PDT 24 817413974 ps
T1148 /workspace/coverage/default/8.uart_fifo_full.1250118145 Mar 28 01:45:17 PM PDT 24 Mar 28 01:46:10 PM PDT 24 129431779776 ps
T173 /workspace/coverage/default/214.uart_fifo_reset.3479367046 Mar 28 01:49:15 PM PDT 24 Mar 28 01:49:51 PM PDT 24 20598642874 ps
T1149 /workspace/coverage/default/42.uart_fifo_overflow.1975617448 Mar 28 01:47:42 PM PDT 24 Mar 28 01:48:04 PM PDT 24 43146922373 ps
T1150 /workspace/coverage/default/24.uart_noise_filter.3129161928 Mar 28 01:46:47 PM PDT 24 Mar 28 01:47:30 PM PDT 24 49769243201 ps
T1151 /workspace/coverage/default/38.uart_tx_ovrd.3379743583 Mar 28 01:47:21 PM PDT 24 Mar 28 01:47:24 PM PDT 24 1239292507 ps
T1152 /workspace/coverage/default/22.uart_tx_rx.3715632530 Mar 28 01:46:20 PM PDT 24 Mar 28 01:49:28 PM PDT 24 123571582031 ps
T221 /workspace/coverage/default/21.uart_stress_all.1219471328 Mar 28 01:46:22 PM PDT 24 Mar 28 01:47:58 PM PDT 24 251078132372 ps
T1153 /workspace/coverage/default/25.uart_fifo_reset.234048372 Mar 28 01:46:53 PM PDT 24 Mar 28 01:47:24 PM PDT 24 18839078557 ps
T1154 /workspace/coverage/default/20.uart_tx_ovrd.1583041743 Mar 28 01:46:21 PM PDT 24 Mar 28 01:46:42 PM PDT 24 6572326005 ps
T1155 /workspace/coverage/default/27.uart_perf.410661999 Mar 28 01:46:58 PM PDT 24 Mar 28 01:50:07 PM PDT 24 17391298062 ps
T1156 /workspace/coverage/default/5.uart_rx_oversample.3798986214 Mar 28 01:44:59 PM PDT 24 Mar 28 01:45:47 PM PDT 24 5377722073 ps
T1157 /workspace/coverage/default/3.uart_fifo_reset.4131982843 Mar 28 01:45:03 PM PDT 24 Mar 28 01:45:21 PM PDT 24 74292846791 ps
T1158 /workspace/coverage/default/13.uart_noise_filter.2837876821 Mar 28 01:45:37 PM PDT 24 Mar 28 01:47:43 PM PDT 24 178339076266 ps
T1159 /workspace/coverage/default/3.uart_tx_rx.3831826553 Mar 28 01:44:56 PM PDT 24 Mar 28 01:46:21 PM PDT 24 241319423690 ps
T1160 /workspace/coverage/default/95.uart_fifo_reset.171146663 Mar 28 01:48:56 PM PDT 24 Mar 28 01:50:24 PM PDT 24 58437787816 ps
T1161 /workspace/coverage/default/169.uart_fifo_reset.2616617658 Mar 28 01:49:02 PM PDT 24 Mar 28 01:51:40 PM PDT 24 104203674317 ps
T1162 /workspace/coverage/default/9.uart_loopback.1421269525 Mar 28 01:45:30 PM PDT 24 Mar 28 01:45:40 PM PDT 24 5789352434 ps
T1163 /workspace/coverage/default/14.uart_rx_parity_err.2506494285 Mar 28 01:45:39 PM PDT 24 Mar 28 01:45:47 PM PDT 24 28610223842 ps
T1164 /workspace/coverage/default/74.uart_fifo_reset.1691787656 Mar 28 01:48:48 PM PDT 24 Mar 28 01:49:23 PM PDT 24 202780687161 ps
T1165 /workspace/coverage/default/16.uart_perf.3377039147 Mar 28 01:45:43 PM PDT 24 Mar 28 01:52:18 PM PDT 24 7632020074 ps
T1166 /workspace/coverage/default/21.uart_fifo_full.2155402887 Mar 28 01:46:20 PM PDT 24 Mar 28 01:47:50 PM PDT 24 61891194293 ps
T1167 /workspace/coverage/default/8.uart_tx_ovrd.1043836107 Mar 28 01:45:19 PM PDT 24 Mar 28 01:45:34 PM PDT 24 6044053534 ps
T1168 /workspace/coverage/default/28.uart_fifo_reset.4265519874 Mar 28 01:46:57 PM PDT 24 Mar 28 01:47:11 PM PDT 24 16769658972 ps
T1169 /workspace/coverage/default/235.uart_fifo_reset.3253553948 Mar 28 01:49:32 PM PDT 24 Mar 28 01:50:07 PM PDT 24 40469344721 ps
T1170 /workspace/coverage/default/21.uart_rx_oversample.980732858 Mar 28 01:46:22 PM PDT 24 Mar 28 01:46:25 PM PDT 24 2452869993 ps
T1171 /workspace/coverage/default/11.uart_stress_all.1603789401 Mar 28 01:45:40 PM PDT 24 Mar 28 01:46:57 PM PDT 24 167667574776 ps
T1172 /workspace/coverage/default/245.uart_fifo_reset.2423174099 Mar 28 01:49:31 PM PDT 24 Mar 28 01:50:06 PM PDT 24 88159570574 ps
T1173 /workspace/coverage/default/44.uart_smoke.3925839723 Mar 28 01:48:06 PM PDT 24 Mar 28 01:48:08 PM PDT 24 454593932 ps
T1174 /workspace/coverage/default/12.uart_rx_oversample.3114290065 Mar 28 01:45:41 PM PDT 24 Mar 28 01:46:04 PM PDT 24 3389510836 ps
T218 /workspace/coverage/default/60.uart_fifo_reset.109579971 Mar 28 01:48:46 PM PDT 24 Mar 28 02:01:34 PM PDT 24 87837887717 ps
T1175 /workspace/coverage/default/13.uart_stress_all.2840750707 Mar 28 01:45:41 PM PDT 24 Mar 28 02:03:48 PM PDT 24 33173309291 ps
T1176 /workspace/coverage/default/46.uart_tx_rx.898211389 Mar 28 01:48:04 PM PDT 24 Mar 28 01:48:47 PM PDT 24 55650589573 ps
T1177 /workspace/coverage/default/5.uart_fifo_full.1962419764 Mar 28 01:45:04 PM PDT 24 Mar 28 01:45:22 PM PDT 24 123850729507 ps
T1178 /workspace/coverage/default/25.uart_loopback.2330758246 Mar 28 01:46:53 PM PDT 24 Mar 28 01:47:12 PM PDT 24 8621454992 ps
T1179 /workspace/coverage/default/22.uart_fifo_full.2902786944 Mar 28 01:46:19 PM PDT 24 Mar 28 01:49:30 PM PDT 24 126336827696 ps
T1180 /workspace/coverage/default/43.uart_noise_filter.2758981883 Mar 28 01:48:04 PM PDT 24 Mar 28 01:49:12 PM PDT 24 39444045139 ps
T1181 /workspace/coverage/default/3.uart_noise_filter.41086561 Mar 28 01:45:08 PM PDT 24 Mar 28 01:45:24 PM PDT 24 9175334487 ps
T1182 /workspace/coverage/default/40.uart_fifo_reset.966302755 Mar 28 01:47:44 PM PDT 24 Mar 28 01:49:27 PM PDT 24 65230529936 ps
T1183 /workspace/coverage/default/30.uart_rx_oversample.1926483407 Mar 28 01:46:57 PM PDT 24 Mar 28 01:47:13 PM PDT 24 7729619760 ps
T1184 /workspace/coverage/default/24.uart_rx_start_bit_filter.262110317 Mar 28 01:46:51 PM PDT 24 Mar 28 01:47:48 PM PDT 24 40169263944 ps
T239 /workspace/coverage/default/39.uart_stress_all.4269777739 Mar 28 01:47:43 PM PDT 24 Mar 28 01:48:45 PM PDT 24 174005510840 ps
T1185 /workspace/coverage/default/7.uart_fifo_overflow.601727823 Mar 28 01:45:19 PM PDT 24 Mar 28 01:45:47 PM PDT 24 71540565984 ps
T1186 /workspace/coverage/default/26.uart_noise_filter.1111971683 Mar 28 01:46:57 PM PDT 24 Mar 28 01:47:12 PM PDT 24 9266264288 ps
T1187 /workspace/coverage/default/37.uart_stress_all_with_rand_reset.1888391833 Mar 28 01:47:37 PM PDT 24 Mar 28 02:00:59 PM PDT 24 178148465639 ps
T1188 /workspace/coverage/default/8.uart_noise_filter.3694427585 Mar 28 01:45:24 PM PDT 24 Mar 28 01:46:46 PM PDT 24 41518116948 ps
T240 /workspace/coverage/default/139.uart_fifo_reset.2185861464 Mar 28 01:49:02 PM PDT 24 Mar 28 01:49:36 PM PDT 24 49203922350 ps
T1189 /workspace/coverage/cover_reg_top/3.uart_tl_errors.3552695219 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:37 PM PDT 24 422973592 ps
T76 /workspace/coverage/cover_reg_top/12.uart_tl_intg_err.3219489470 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 155113928 ps
T77 /workspace/coverage/cover_reg_top/4.uart_tl_intg_err.839179604 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:35 PM PDT 24 373883194 ps
T1190 /workspace/coverage/cover_reg_top/37.uart_intr_test.3402770801 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:36 PM PDT 24 49554441 ps
T1191 /workspace/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.3549625940 Mar 28 12:31:38 PM PDT 24 Mar 28 12:31:40 PM PDT 24 58090764 ps
T66 /workspace/coverage/cover_reg_top/2.uart_same_csr_outstanding.317067487 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:28 PM PDT 24 13460886 ps
T1192 /workspace/coverage/cover_reg_top/9.uart_csr_mem_rw_with_rand_reset.1259286610 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:38 PM PDT 24 49658287 ps
T78 /workspace/coverage/cover_reg_top/9.uart_tl_intg_err.2819756964 Mar 28 12:31:31 PM PDT 24 Mar 28 12:31:38 PM PDT 24 136486646 ps
T1193 /workspace/coverage/cover_reg_top/43.uart_intr_test.4001187870 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:38 PM PDT 24 28523476 ps
T1194 /workspace/coverage/cover_reg_top/7.uart_tl_errors.985468756 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:37 PM PDT 24 357563299 ps
T67 /workspace/coverage/cover_reg_top/1.uart_same_csr_outstanding.12513137 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:42 PM PDT 24 14573857 ps
T1195 /workspace/coverage/cover_reg_top/12.uart_intr_test.3225778438 Mar 28 12:31:35 PM PDT 24 Mar 28 12:31:36 PM PDT 24 17652077 ps
T1196 /workspace/coverage/cover_reg_top/5.uart_tl_errors.4288137456 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:38 PM PDT 24 151009020 ps
T68 /workspace/coverage/cover_reg_top/19.uart_csr_rw.431540952 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:37 PM PDT 24 15507598 ps
T1197 /workspace/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.524619123 Mar 28 12:31:51 PM PDT 24 Mar 28 12:31:52 PM PDT 24 73196833 ps
T1198 /workspace/coverage/cover_reg_top/3.uart_csr_hw_reset.2031277783 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:29 PM PDT 24 50639863 ps
T106 /workspace/coverage/cover_reg_top/0.uart_tl_intg_err.2254715027 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:30 PM PDT 24 89934059 ps
T1199 /workspace/coverage/cover_reg_top/16.uart_tl_intg_err.2799255354 Mar 28 12:31:59 PM PDT 24 Mar 28 12:32:00 PM PDT 24 266286003 ps
T1200 /workspace/coverage/cover_reg_top/24.uart_intr_test.4213276492 Mar 28 12:31:43 PM PDT 24 Mar 28 12:31:44 PM PDT 24 44952679 ps
T55 /workspace/coverage/cover_reg_top/0.uart_csr_rw.614478558 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:38 PM PDT 24 33825079 ps
T1201 /workspace/coverage/cover_reg_top/38.uart_intr_test.598814367 Mar 28 12:32:08 PM PDT 24 Mar 28 12:32:09 PM PDT 24 13986342 ps
T69 /workspace/coverage/cover_reg_top/19.uart_same_csr_outstanding.3732838299 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:42 PM PDT 24 34102509 ps
T1202 /workspace/coverage/cover_reg_top/8.uart_csr_mem_rw_with_rand_reset.679761197 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:34 PM PDT 24 23793523 ps
T1203 /workspace/coverage/cover_reg_top/2.uart_csr_bit_bash.3157876781 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:41 PM PDT 24 580002942 ps
T70 /workspace/coverage/cover_reg_top/9.uart_same_csr_outstanding.2421406248 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:28 PM PDT 24 28616842 ps
T1204 /workspace/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.2929606813 Mar 28 12:31:29 PM PDT 24 Mar 28 12:31:34 PM PDT 24 46066019 ps
T1205 /workspace/coverage/cover_reg_top/19.uart_intr_test.4093274594 Mar 28 12:31:41 PM PDT 24 Mar 28 12:31:42 PM PDT 24 14089941 ps
T1206 /workspace/coverage/cover_reg_top/21.uart_intr_test.2560894455 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 14457641 ps
T1207 /workspace/coverage/cover_reg_top/14.uart_intr_test.2352570792 Mar 28 12:32:08 PM PDT 24 Mar 28 12:32:09 PM PDT 24 13151695 ps
T1208 /workspace/coverage/cover_reg_top/7.uart_intr_test.3064862831 Mar 28 12:31:29 PM PDT 24 Mar 28 12:31:29 PM PDT 24 12144396 ps
T1209 /workspace/coverage/cover_reg_top/17.uart_tl_errors.2738268837 Mar 28 12:31:41 PM PDT 24 Mar 28 12:31:44 PM PDT 24 99645317 ps
T1210 /workspace/coverage/cover_reg_top/29.uart_intr_test.1160095713 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:34 PM PDT 24 12649235 ps
T1211 /workspace/coverage/cover_reg_top/8.uart_tl_intg_err.915444087 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:33 PM PDT 24 73925951 ps
T108 /workspace/coverage/cover_reg_top/18.uart_tl_intg_err.1691661807 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:42 PM PDT 24 586164797 ps
T71 /workspace/coverage/cover_reg_top/7.uart_csr_rw.2741057236 Mar 28 12:31:35 PM PDT 24 Mar 28 12:31:35 PM PDT 24 61974340 ps
T1212 /workspace/coverage/cover_reg_top/13.uart_intr_test.1712128727 Mar 28 12:31:47 PM PDT 24 Mar 28 12:31:53 PM PDT 24 25667808 ps
T72 /workspace/coverage/cover_reg_top/17.uart_same_csr_outstanding.2085774935 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:35 PM PDT 24 96939614 ps
T109 /workspace/coverage/cover_reg_top/7.uart_tl_intg_err.230520620 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 166403872 ps
T73 /workspace/coverage/cover_reg_top/0.uart_same_csr_outstanding.3861016362 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:35 PM PDT 24 33129045 ps
T1213 /workspace/coverage/cover_reg_top/8.uart_intr_test.3361045270 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:29 PM PDT 24 48141445 ps
T74 /workspace/coverage/cover_reg_top/13.uart_same_csr_outstanding.1288078320 Mar 28 12:31:42 PM PDT 24 Mar 28 12:31:43 PM PDT 24 20924864 ps
T1214 /workspace/coverage/cover_reg_top/4.uart_csr_bit_bash.1281414293 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:36 PM PDT 24 1974849316 ps
T56 /workspace/coverage/cover_reg_top/4.uart_csr_aliasing.2925306241 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:29 PM PDT 24 143844384 ps
T1215 /workspace/coverage/cover_reg_top/9.uart_intr_test.2444931041 Mar 28 12:31:39 PM PDT 24 Mar 28 12:31:41 PM PDT 24 17134476 ps
T79 /workspace/coverage/cover_reg_top/17.uart_tl_intg_err.3191959736 Mar 28 12:31:52 PM PDT 24 Mar 28 12:31:53 PM PDT 24 172123999 ps
T1216 /workspace/coverage/cover_reg_top/8.uart_tl_errors.2055207849 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:36 PM PDT 24 40946260 ps
T1217 /workspace/coverage/cover_reg_top/10.uart_tl_errors.3010517247 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:34 PM PDT 24 38644315 ps
T82 /workspace/coverage/cover_reg_top/6.uart_tl_intg_err.3692514737 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:40 PM PDT 24 93877251 ps
T57 /workspace/coverage/cover_reg_top/0.uart_csr_bit_bash.885203280 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:34 PM PDT 24 264284685 ps
T107 /workspace/coverage/cover_reg_top/3.uart_tl_intg_err.3272432837 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:39 PM PDT 24 354865771 ps
T1218 /workspace/coverage/cover_reg_top/25.uart_intr_test.2470836642 Mar 28 12:32:13 PM PDT 24 Mar 28 12:32:18 PM PDT 24 11614389 ps
T1219 /workspace/coverage/cover_reg_top/6.uart_tl_errors.2444873639 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:31 PM PDT 24 445582964 ps
T1220 /workspace/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.3373067827 Mar 28 12:31:30 PM PDT 24 Mar 28 12:31:31 PM PDT 24 86639848 ps
T58 /workspace/coverage/cover_reg_top/15.uart_csr_rw.1700773061 Mar 28 12:31:35 PM PDT 24 Mar 28 12:31:36 PM PDT 24 12574122 ps
T1221 /workspace/coverage/cover_reg_top/4.uart_tl_errors.1952548890 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:39 PM PDT 24 367042685 ps
T1222 /workspace/coverage/cover_reg_top/2.uart_tl_errors.4032642343 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:33 PM PDT 24 292694358 ps
T1223 /workspace/coverage/cover_reg_top/39.uart_intr_test.3999591735 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:38 PM PDT 24 16453353 ps
T1224 /workspace/coverage/cover_reg_top/35.uart_intr_test.1878446392 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:34 PM PDT 24 18673391 ps
T1225 /workspace/coverage/cover_reg_top/1.uart_tl_errors.625315115 Mar 28 12:31:30 PM PDT 24 Mar 28 12:31:32 PM PDT 24 143023359 ps
T1226 /workspace/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.4035769000 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:33 PM PDT 24 154715317 ps
T1227 /workspace/coverage/cover_reg_top/2.uart_intr_test.2235347947 Mar 28 12:31:26 PM PDT 24 Mar 28 12:31:27 PM PDT 24 20028811 ps
T83 /workspace/coverage/cover_reg_top/19.uart_tl_intg_err.1322756007 Mar 28 12:31:38 PM PDT 24 Mar 28 12:31:40 PM PDT 24 539440168 ps
T1228 /workspace/coverage/cover_reg_top/0.uart_intr_test.709048 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:27 PM PDT 24 49660038 ps
T1229 /workspace/coverage/cover_reg_top/14.uart_csr_rw.3817201117 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:41 PM PDT 24 12043167 ps
T1230 /workspace/coverage/cover_reg_top/15.uart_same_csr_outstanding.2053105852 Mar 28 12:31:41 PM PDT 24 Mar 28 12:31:43 PM PDT 24 51728662 ps
T1231 /workspace/coverage/cover_reg_top/11.uart_csr_rw.3154877459 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:32 PM PDT 24 24265343 ps
T1232 /workspace/coverage/cover_reg_top/4.uart_csr_hw_reset.1157548573 Mar 28 12:31:37 PM PDT 24 Mar 28 12:31:38 PM PDT 24 12308500 ps
T1233 /workspace/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.3099923516 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:29 PM PDT 24 23765330 ps
T1234 /workspace/coverage/cover_reg_top/0.uart_tl_errors.1902423675 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:29 PM PDT 24 316666101 ps
T1235 /workspace/coverage/cover_reg_top/11.uart_intr_test.1500792022 Mar 28 12:31:31 PM PDT 24 Mar 28 12:31:31 PM PDT 24 18828654 ps
T1236 /workspace/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.669310127 Mar 28 12:31:27 PM PDT 24 Mar 28 12:31:28 PM PDT 24 21349135 ps
T84 /workspace/coverage/cover_reg_top/11.uart_tl_intg_err.109898431 Mar 28 12:31:28 PM PDT 24 Mar 28 12:31:29 PM PDT 24 135583203 ps
T1237 /workspace/coverage/cover_reg_top/16.uart_same_csr_outstanding.2656909039 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 24907731 ps
T1238 /workspace/coverage/cover_reg_top/16.uart_csr_rw.1128763513 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:34 PM PDT 24 15780310 ps
T1239 /workspace/coverage/cover_reg_top/16.uart_intr_test.1045694055 Mar 28 12:32:03 PM PDT 24 Mar 28 12:32:04 PM PDT 24 29748414 ps
T1240 /workspace/coverage/cover_reg_top/10.uart_csr_rw.3967815544 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 14740922 ps
T1241 /workspace/coverage/cover_reg_top/33.uart_intr_test.2456914786 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:34 PM PDT 24 31202214 ps
T1242 /workspace/coverage/cover_reg_top/10.uart_tl_intg_err.1040823414 Mar 28 12:31:30 PM PDT 24 Mar 28 12:31:31 PM PDT 24 87311931 ps
T1243 /workspace/coverage/cover_reg_top/15.uart_intr_test.2948180403 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:41 PM PDT 24 12951030 ps
T59 /workspace/coverage/cover_reg_top/3.uart_csr_rw.3764555556 Mar 28 12:31:21 PM PDT 24 Mar 28 12:31:22 PM PDT 24 18113993 ps
T1244 /workspace/coverage/cover_reg_top/30.uart_intr_test.1205292427 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:42 PM PDT 24 26337017 ps
T1245 /workspace/coverage/cover_reg_top/7.uart_same_csr_outstanding.1493493529 Mar 28 12:31:33 PM PDT 24 Mar 28 12:31:34 PM PDT 24 87203411 ps
T1246 /workspace/coverage/cover_reg_top/3.uart_csr_bit_bash.1532865992 Mar 28 12:31:29 PM PDT 24 Mar 28 12:31:30 PM PDT 24 93322871 ps
T1247 /workspace/coverage/cover_reg_top/8.uart_same_csr_outstanding.4049522444 Mar 28 12:31:35 PM PDT 24 Mar 28 12:31:42 PM PDT 24 15221089 ps
T1248 /workspace/coverage/cover_reg_top/18.uart_same_csr_outstanding.2409017161 Mar 28 12:32:05 PM PDT 24 Mar 28 12:32:06 PM PDT 24 30900797 ps
T1249 /workspace/coverage/cover_reg_top/1.uart_csr_hw_reset.2895325023 Mar 28 12:31:21 PM PDT 24 Mar 28 12:31:21 PM PDT 24 25022366 ps
T1250 /workspace/coverage/cover_reg_top/27.uart_intr_test.679801970 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:37 PM PDT 24 43066839 ps
T1251 /workspace/coverage/cover_reg_top/34.uart_intr_test.1817934971 Mar 28 12:31:35 PM PDT 24 Mar 28 12:31:36 PM PDT 24 69834830 ps
T1252 /workspace/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.1953045822 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:33 PM PDT 24 165577767 ps
T1253 /workspace/coverage/cover_reg_top/9.uart_tl_errors.76002087 Mar 28 12:31:36 PM PDT 24 Mar 28 12:31:39 PM PDT 24 201698970 ps
T1254 /workspace/coverage/cover_reg_top/15.uart_tl_errors.684628254 Mar 28 12:32:10 PM PDT 24 Mar 28 12:32:14 PM PDT 24 77587824 ps
T1255 /workspace/coverage/cover_reg_top/46.uart_intr_test.145436014 Mar 28 12:31:40 PM PDT 24 Mar 28 12:31:42 PM PDT 24 35746633 ps
T1256 /workspace/coverage/cover_reg_top/47.uart_intr_test.585888008 Mar 28 12:31:43 PM PDT 24 Mar 28 12:31:45 PM PDT 24 22919304 ps
T1257 /workspace/coverage/cover_reg_top/1.uart_intr_test.3564827651 Mar 28 12:31:31 PM PDT 24 Mar 28 12:31:32 PM PDT 24 11652905 ps
T1258 /workspace/coverage/cover_reg_top/13.uart_tl_intg_err.1534060198 Mar 28 12:31:32 PM PDT 24 Mar 28 12:31:33 PM PDT 24 49125730 ps
T1259 /workspace/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.1674461140 Mar 28 12:31:34 PM PDT 24 Mar 28 12:31:35 PM PDT 24 57793093 ps
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