Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 74288630 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 30270034 1 T1 623 T2 10 T3 184



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 94386952 1 T1 70344 T2 11385 T3 12644
values[0x0] 4806308 1 T1 275 T2 7 T3 160
values[0x1] 5365404 1 T1 259 T2 6 T3 154



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 51663080 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 52895584 1 T1 23927 T2 3825 T3 4376



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 366211 1 T1 272 T2 46 T3 40
valid_sources[0x01] 356613 1 T1 268 T2 21 T3 56
valid_sources[0x02] 482397 1 T1 277 T2 43 T3 67
valid_sources[0x03] 434314 1 T1 295 T2 66 T3 66
valid_sources[0x04] 415754 1 T1 261 T2 28 T3 60
valid_sources[0x05] 426715 1 T1 272 T2 38 T3 45
valid_sources[0x06] 359220 1 T1 318 T2 45 T3 48
valid_sources[0x07] 423310 1 T1 265 T2 27 T3 42
valid_sources[0x08] 391708 1 T1 299 T2 26 T3 45
valid_sources[0x09] 384719 1 T1 258 T2 27 T3 47
valid_sources[0x0a] 404425 1 T1 283 T2 21 T3 50
valid_sources[0x0b] 387935 1 T1 246 T2 59 T3 45
valid_sources[0x0c] 359617 1 T1 261 T2 46 T3 47
valid_sources[0x0d] 380316 1 T1 258 T2 63 T3 59
valid_sources[0x0e] 423987 1 T1 268 T2 28 T3 42
valid_sources[0x0f] 390862 1 T1 284 T2 47 T3 60
valid_sources[0x10] 486113 1 T1 267 T2 33 T3 53
valid_sources[0x11] 414367 1 T1 288 T2 73 T3 61
valid_sources[0x12] 393995 1 T1 275 T2 76 T3 52
valid_sources[0x13] 460414 1 T1 323 T2 54 T3 59
valid_sources[0x14] 366158 1 T1 295 T2 49 T3 47
valid_sources[0x15] 387534 1 T1 297 T2 70 T3 44
valid_sources[0x16] 397448 1 T1 286 T2 30 T3 50
valid_sources[0x17] 405149 1 T1 278 T2 29 T3 35
valid_sources[0x18] 417110 1 T1 267 T2 22 T3 54
valid_sources[0x19] 365492 1 T1 334 T2 77 T3 60
valid_sources[0x1a] 426804 1 T1 275 T2 98 T3 53
valid_sources[0x1b] 370290 1 T1 297 T2 46 T3 46
valid_sources[0x1c] 429268 1 T1 302 T2 61 T3 52
valid_sources[0x1d] 384696 1 T1 274 T2 46 T3 54
valid_sources[0x1e] 454899 1 T1 265 T2 54 T3 41
valid_sources[0x1f] 388176 1 T1 294 T2 38 T3 48
valid_sources[0x20] 458378 1 T1 267 T2 59 T3 56
valid_sources[0x21] 416752 1 T1 288 T2 59 T3 53
valid_sources[0x22] 384024 1 T1 275 T2 40 T3 53
valid_sources[0x23] 457595 1 T1 260 T2 67 T3 35
valid_sources[0x24] 467372 1 T1 252 T2 24 T3 46
valid_sources[0x25] 443561 1 T1 276 T2 31 T3 42
valid_sources[0x26] 401382 1 T1 296 T2 25 T3 40
valid_sources[0x27] 388054 1 T1 260 T2 54 T3 47
valid_sources[0x28] 410329 1 T1 251 T2 64 T3 50
valid_sources[0x29] 413193 1 T1 260 T2 28 T3 47
valid_sources[0x2a] 529619 1 T1 295 T2 57 T3 54
valid_sources[0x2b] 436899 1 T1 274 T2 41 T3 41
valid_sources[0x2c] 361533 1 T1 291 T2 55 T3 55
valid_sources[0x2d] 381007 1 T1 250 T2 43 T3 45
valid_sources[0x2e] 414000 1 T1 284 T2 28 T3 43
valid_sources[0x2f] 398340 1 T1 278 T2 48 T3 56
valid_sources[0x30] 405288 1 T1 303 T2 73 T3 60
valid_sources[0x31] 390504 1 T1 285 T2 12 T3 52
valid_sources[0x32] 391280 1 T1 266 T2 46 T3 56
valid_sources[0x33] 400042 1 T1 275 T2 49 T3 52
valid_sources[0x34] 387248 1 T1 292 T2 50 T3 44
valid_sources[0x35] 434759 1 T1 306 T2 20 T3 46
valid_sources[0x36] 424035 1 T1 281 T2 26 T3 55
valid_sources[0x37] 408616 1 T1 272 T2 38 T3 52
valid_sources[0x38] 383973 1 T1 278 T2 50 T3 61
valid_sources[0x39] 441195 1 T1 271 T2 24 T3 44
valid_sources[0x3a] 389792 1 T1 302 T2 43 T3 54
valid_sources[0x3b] 446137 1 T1 259 T2 32 T3 41
valid_sources[0x3c] 386247 1 T1 238 T2 40 T3 52
valid_sources[0x3d] 439976 1 T1 249 T2 61 T3 60
valid_sources[0x3e] 422733 1 T1 311 T2 57 T3 50
valid_sources[0x3f] 437939 1 T1 263 T2 39 T3 48
valid_sources[0x40] 586276 1 T1 261 T2 34 T3 58
valid_sources[0x41] 375419 1 T1 269 T2 18 T3 59
valid_sources[0x42] 384100 1 T1 312 T2 46 T3 47
valid_sources[0x43] 411148 1 T1 306 T2 27 T3 62
valid_sources[0x44] 447592 1 T1 288 T2 44 T3 44
valid_sources[0x45] 387505 1 T1 228 T2 33 T3 64
valid_sources[0x46] 378669 1 T1 286 T2 12 T3 48
valid_sources[0x47] 474441 1 T1 283 T2 29 T3 48
valid_sources[0x48] 371378 1 T1 283 T2 46 T3 50
valid_sources[0x49] 429503 1 T1 273 T2 59 T3 41
valid_sources[0x4a] 391317 1 T1 282 T2 39 T3 41
valid_sources[0x4b] 401391 1 T1 292 T2 29 T3 48
valid_sources[0x4c] 400634 1 T1 271 T2 17 T3 52
valid_sources[0x4d] 404809 1 T1 300 T2 17 T3 53
valid_sources[0x4e] 421358 1 T1 282 T2 34 T3 48
valid_sources[0x4f] 373187 1 T1 254 T2 34 T3 53
valid_sources[0x50] 388577 1 T1 262 T2 66 T3 55
valid_sources[0x51] 366946 1 T1 292 T2 34 T3 41
valid_sources[0x52] 380054 1 T1 240 T2 18 T3 57
valid_sources[0x53] 461249 1 T1 241 T2 48 T3 71
valid_sources[0x54] 365713 1 T1 273 T2 69 T3 50
valid_sources[0x55] 401415 1 T1 292 T2 68 T3 49
valid_sources[0x56] 369676 1 T1 281 T2 18 T3 39
valid_sources[0x57] 514642 1 T1 268 T2 35 T3 39
valid_sources[0x58] 420162 1 T1 299 T2 82 T3 46
valid_sources[0x59] 430647 1 T1 265 T2 28 T3 54
valid_sources[0x5a] 384115 1 T1 295 T2 56 T3 54
valid_sources[0x5b] 374571 1 T1 259 T2 30 T3 55
valid_sources[0x5c] 407783 1 T1 260 T2 51 T3 47
valid_sources[0x5d] 395788 1 T1 293 T2 57 T3 62
valid_sources[0x5e] 457158 1 T1 286 T2 40 T3 63
valid_sources[0x5f] 422186 1 T1 269 T2 45 T3 49
valid_sources[0x60] 402340 1 T1 285 T2 35 T3 51
valid_sources[0x61] 356042 1 T1 262 T2 58 T3 62
valid_sources[0x62] 429206 1 T1 241 T2 30 T3 61
valid_sources[0x63] 387232 1 T1 297 T2 91 T3 46
valid_sources[0x64] 381427 1 T1 246 T2 58 T3 47
valid_sources[0x65] 386757 1 T1 254 T2 20 T3 57
valid_sources[0x66] 374311 1 T1 297 T2 40 T3 55
valid_sources[0x67] 370494 1 T1 291 T2 8 T3 58
valid_sources[0x68] 389367 1 T1 233 T2 55 T3 53
valid_sources[0x69] 364160 1 T1 263 T2 91 T3 41
valid_sources[0x6a] 401762 1 T1 248 T2 15 T3 71
valid_sources[0x6b] 412997 1 T1 254 T2 53 T3 47
valid_sources[0x6c] 415954 1 T1 309 T2 45 T3 50
valid_sources[0x6d] 392251 1 T1 261 T2 23 T3 41
valid_sources[0x6e] 436498 1 T1 238 T2 38 T3 53
valid_sources[0x6f] 376455 1 T1 261 T2 24 T3 48
valid_sources[0x70] 432204 1 T1 240 T2 73 T3 49
valid_sources[0x71] 405506 1 T1 317 T2 45 T3 51
valid_sources[0x72] 388386 1 T1 280 T2 49 T3 48
valid_sources[0x73] 357801 1 T1 289 T2 44 T3 53
valid_sources[0x74] 400516 1 T1 313 T2 42 T3 55
valid_sources[0x75] 415699 1 T1 282 T2 30 T3 52
valid_sources[0x76] 389151 1 T1 281 T2 19 T3 58
valid_sources[0x77] 365033 1 T1 261 T2 59 T3 52
valid_sources[0x78] 394970 1 T1 296 T2 44 T3 58
valid_sources[0x79] 405152 1 T1 274 T2 56 T3 39
valid_sources[0x7a] 424137 1 T1 254 T2 52 T3 45
valid_sources[0x7b] 381246 1 T1 268 T2 16 T3 53
valid_sources[0x7c] 506259 1 T1 268 T2 71 T3 56
valid_sources[0x7d] 391444 1 T1 284 T2 31 T3 48
valid_sources[0x7e] 381683 1 T1 250 T2 44 T3 28
valid_sources[0x7f] 399560 1 T1 273 T2 43 T3 50
valid_sources[0x80] 381922 1 T1 279 T2 48 T3 48



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 21271731 1 T1 437 T2 6 T3 97
values[0x0] all_enables biggest_size 4528941 1 T1 116 T2 2 T3 60
values[0x1] all_enables biggest_size 4469362 1 T1 70 T2 2 T3 27

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%