Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	76936085	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33302835

1

T1

88

T2

154153

T3

160

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	98729877	1			T1	36612		T2	163657		T3	164
values[0x0]	5433112	1			T1	84		T2	33799		T3	144
values[0x1]	6075931	1			T1	74		T2	38258		T3	123

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53470960	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

56767960

1

T1

12308

T2

173804

T3

200

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	415065	1			T1	352		T2	906		T4	142
valid_sources[0x01]	523432	1			T1	21		T2	943		T3	1
valid_sources[0x02]	420846	1			T1	325		T2	918		T4	164
valid_sources[0x03]	420666	1			T1	123		T2	909		T3	4
valid_sources[0x04]	407810	1			T2	927		T4	144		T5	68
valid_sources[0x05]	540046	1			T1	260		T2	925		T3	2
valid_sources[0x06]	421929	1			T1	71		T2	908		T3	1
valid_sources[0x07]	443200	1			T1	31		T2	909		T3	3
valid_sources[0x08]	476871	1			T1	97		T2	941		T4	135
valid_sources[0x09]	416155	1			T1	31		T2	901		T3	4
valid_sources[0x0a]	413682	1			T1	69		T2	863		T3	3
valid_sources[0x0b]	425058	1			T1	268		T2	899		T3	4
valid_sources[0x0c]	461822	1			T1	265		T2	1011		T4	166
valid_sources[0x0d]	509581	1			T1	76		T2	962		T3	1
valid_sources[0x0e]	428602	1			T1	133		T2	881		T3	1
valid_sources[0x0f]	462497	1			T1	176		T2	864		T4	152
valid_sources[0x10]	422313	1			T1	343		T2	895		T3	2
valid_sources[0x11]	443547	1			T1	73		T2	922		T3	2
valid_sources[0x12]	393830	1			T1	31		T2	932		T3	5
valid_sources[0x13]	405794	1			T1	209		T2	996		T4	137
valid_sources[0x14]	398401	1			T1	85		T2	908		T3	2
valid_sources[0x15]	403943	1			T1	1		T2	1007		T3	1
valid_sources[0x16]	408739	1			T1	112		T2	960		T4	153
valid_sources[0x17]	405101	1			T1	83		T2	965		T3	1
valid_sources[0x18]	585466	1			T1	496		T2	991		T3	3
valid_sources[0x19]	391335	1			T1	145		T2	926		T3	4
valid_sources[0x1a]	404653	1			T1	46		T2	951		T3	2
valid_sources[0x1b]	409121	1			T1	43		T2	876		T4	162
valid_sources[0x1c]	420164	1			T1	8		T2	875		T4	170
valid_sources[0x1d]	394188	1			T1	142		T2	843		T3	3
valid_sources[0x1e]	460656	1			T1	26		T2	914		T3	1
valid_sources[0x1f]	390134	1			T1	224		T2	959		T3	1
valid_sources[0x20]	606944	1			T1	68		T2	950		T3	3
valid_sources[0x21]	398298	1			T1	130		T2	915		T4	155
valid_sources[0x22]	554354	1			T1	71		T2	883		T4	147
valid_sources[0x23]	405495	1			T1	23		T2	902		T3	2
valid_sources[0x24]	405079	1			T1	80		T2	987		T3	4
valid_sources[0x25]	401893	1			T1	36		T2	900		T4	122
valid_sources[0x26]	578643	1			T2	901		T3	4		T4	142
valid_sources[0x27]	471138	1			T1	90		T2	902		T3	2
valid_sources[0x28]	409427	1			T1	5		T2	911		T3	2
valid_sources[0x29]	431425	1			T1	21		T2	939		T3	5
valid_sources[0x2a]	403490	1			T1	66		T2	896		T4	140
valid_sources[0x2b]	432983	1			T2	888		T4	159		T5	83
valid_sources[0x2c]	432944	1			T1	142		T2	942		T3	1
valid_sources[0x2d]	406774	1			T1	504		T2	881		T4	138
valid_sources[0x2e]	399480	1			T1	304		T2	941		T3	2
valid_sources[0x2f]	435190	1			T1	104		T2	960		T4	124
valid_sources[0x30]	455695	1			T1	64		T2	902		T3	3
valid_sources[0x31]	415717	1			T1	366		T2	909		T3	3
valid_sources[0x32]	425540	1			T1	221		T2	963		T3	1
valid_sources[0x33]	391414	1			T1	175		T2	870		T4	136
valid_sources[0x34]	425864	1			T1	288		T2	887		T4	145
valid_sources[0x35]	433342	1			T1	154		T2	881		T3	1
valid_sources[0x36]	402025	1			T1	74		T2	898		T4	137
valid_sources[0x37]	398839	1			T1	38		T2	961		T4	126
valid_sources[0x38]	421806	1			T1	100		T2	891		T3	1
valid_sources[0x39]	409447	1			T1	96		T2	914		T4	110
valid_sources[0x3a]	413285	1			T1	229		T2	967		T4	153
valid_sources[0x3b]	402844	1			T1	70		T2	911		T4	159
valid_sources[0x3c]	423574	1			T2	874		T3	2		T4	163
valid_sources[0x3d]	458852	1			T1	197		T2	913		T3	4
valid_sources[0x3e]	411383	1			T1	144		T2	971		T3	1
valid_sources[0x3f]	391556	1			T1	9		T2	886		T3	1
valid_sources[0x40]	421791	1			T1	195		T2	912		T3	1
valid_sources[0x41]	414040	1			T1	179		T2	900		T3	2
valid_sources[0x42]	428699	1			T2	966		T3	1		T4	157
valid_sources[0x43]	410846	1			T1	308		T2	916		T3	3
valid_sources[0x44]	408050	1			T1	19		T2	843		T3	2
valid_sources[0x45]	400733	1			T1	10		T2	921		T3	7
valid_sources[0x46]	413834	1			T1	43		T2	946		T3	4
valid_sources[0x47]	400382	1			T1	106		T2	990		T3	1
valid_sources[0x48]	401984	1			T1	160		T2	876		T3	5
valid_sources[0x49]	406148	1			T1	255		T2	1000		T3	2
valid_sources[0x4a]	405192	1			T2	866		T3	4		T4	172
valid_sources[0x4b]	427834	1			T2	891		T3	2		T4	162
valid_sources[0x4c]	487315	1			T1	90		T2	913		T3	1
valid_sources[0x4d]	434418	1			T1	140		T2	963		T3	1
valid_sources[0x4e]	424948	1			T1	140		T2	996		T3	2
valid_sources[0x4f]	420629	1			T1	257		T2	851		T3	1
valid_sources[0x50]	425136	1			T1	38		T2	970		T3	1
valid_sources[0x51]	416730	1			T1	267		T2	982		T3	3
valid_sources[0x52]	425713	1			T1	282		T2	834		T4	138
valid_sources[0x53]	550474	1			T1	37		T2	956		T4	137
valid_sources[0x54]	381102	1			T1	175		T2	887		T3	3
valid_sources[0x55]	432161	1			T1	384		T2	983		T3	1
valid_sources[0x56]	410328	1			T1	284		T2	962		T3	2
valid_sources[0x57]	528175	1			T1	18		T2	897		T3	3
valid_sources[0x58]	420789	1			T1	77		T2	879		T4	151
valid_sources[0x59]	413118	1			T1	77		T2	970		T4	144
valid_sources[0x5a]	399243	1			T1	210		T2	981		T3	3
valid_sources[0x5b]	451058	1			T1	202		T2	959		T3	2
valid_sources[0x5c]	466535	1			T1	515		T2	965		T4	141
valid_sources[0x5d]	412947	1			T1	306		T2	936		T3	2
valid_sources[0x5e]	406101	1			T1	165		T2	882		T4	125
valid_sources[0x5f]	445592	1			T1	170		T2	895		T3	2
valid_sources[0x60]	450287	1			T1	220		T2	904		T3	1
valid_sources[0x61]	429112	1			T1	91		T2	933		T3	4
valid_sources[0x62]	425837	1			T1	1		T2	955		T3	4
valid_sources[0x63]	396699	1			T1	149		T2	981		T3	1
valid_sources[0x64]	404908	1			T1	46		T2	971		T3	5
valid_sources[0x65]	429373	1			T1	257		T2	936		T3	1
valid_sources[0x66]	433430	1			T1	204		T2	914		T3	2
valid_sources[0x67]	429696	1			T1	70		T2	865		T3	2
valid_sources[0x68]	640996	1			T1	20		T2	877		T4	173
valid_sources[0x69]	440614	1			T1	182		T2	956		T3	2
valid_sources[0x6a]	384558	1			T1	255		T2	978		T3	4
valid_sources[0x6b]	450835	1			T1	228		T2	951		T4	162
valid_sources[0x6c]	403019	1			T1	113		T2	980		T3	3
valid_sources[0x6d]	445870	1			T1	6		T2	902		T3	6
valid_sources[0x6e]	432031	1			T1	72		T2	842		T4	138
valid_sources[0x6f]	410544	1			T1	206		T2	888		T3	1
valid_sources[0x70]	419021	1			T1	97		T2	930		T3	4
valid_sources[0x71]	413814	1			T1	52		T2	876		T3	2
valid_sources[0x72]	415361	1			T1	241		T2	953		T4	140
valid_sources[0x73]	398304	1			T1	359		T2	825		T3	1
valid_sources[0x74]	431470	1			T1	54		T2	947		T3	4
valid_sources[0x75]	448643	1			T1	119		T2	913		T4	126
valid_sources[0x76]	430677	1			T1	213		T2	886		T4	121
valid_sources[0x77]	400202	1			T1	435		T2	931		T4	150
valid_sources[0x78]	542451	1			T1	9		T2	1001		T3	2
valid_sources[0x79]	416926	1			T1	32		T2	950		T4	137
valid_sources[0x7a]	398157	1			T1	131		T2	988		T4	121
valid_sources[0x7b]	409452	1			T1	235		T2	926		T3	1
valid_sources[0x7c]	487090	1			T1	91		T2	895		T3	3
valid_sources[0x7d]	404799	1			T1	81		T2	867		T4	160
valid_sources[0x7e]	413328	1			T1	61		T2	937		T3	1
valid_sources[0x7f]	424608	1			T1	3		T2	995		T4	151
valid_sources[0x80]	442490	1			T1	2		T2	863		T3	1

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

23097384

1

T1

33

T2

88417

T3

73

values[0x0]

all_enables

biggest_size

5135316

1

T1

28

T2

32959

T3

58

values[0x1]

all_enables

biggest_size

5070135

1

T1

27

T2

32777

T3

29