Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69838058	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

26733287

1

T1

86

T2

12

T3

12

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	87033224	1			T1	192		T2	32		T3	32
values[0x0]	4504593	1			T1	36		T2	4		T3	5
values[0x1]	5033528	1			T1	31		T2	9		T3	8

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48328581	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

48242764

1

T1

127

T2

21

T3

19

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	356072	1			T4	25		T6	1495		T7	3
valid_sources[0x01]	384527	1			T1	1		T4	27		T6	1464
valid_sources[0x02]	387992	1			T4	26		T6	1507		T7	3
valid_sources[0x03]	353677	1			T1	7		T4	24		T6	1475
valid_sources[0x04]	356957	1			T4	22		T6	1504		T7	1
valid_sources[0x05]	358473	1			T4	24		T6	1360		T9	916
valid_sources[0x06]	367288	1			T4	21		T6	1447		T7	2
valid_sources[0x07]	438561	1			T4	35		T6	1458		T7	1
valid_sources[0x08]	409608	1			T4	19		T6	1448		T7	2
valid_sources[0x09]	359284	1			T4	26		T6	1548		T7	1
valid_sources[0x0a]	384054	1			T4	32		T6	1423		T9	940
valid_sources[0x0b]	412627	1			T4	22		T6	1552		T7	1
valid_sources[0x0c]	351298	1			T4	28		T6	1466		T9	925
valid_sources[0x0d]	356620	1			T1	8		T4	19		T6	1522
valid_sources[0x0e]	388680	1			T1	2		T4	25		T6	1490
valid_sources[0x0f]	365028	1			T1	8		T4	34		T6	1391
valid_sources[0x10]	349688	1			T1	1		T4	35		T6	1287
valid_sources[0x11]	454513	1			T1	2		T4	32		T6	1399
valid_sources[0x12]	376579	1			T4	16		T6	1339		T7	2
valid_sources[0x13]	367939	1			T4	36		T6	1406		T7	1
valid_sources[0x14]	357157	1			T1	4		T4	21		T6	1559
valid_sources[0x15]	401606	1			T4	15		T6	1438		T7	2
valid_sources[0x16]	361301	1			T1	2		T2	4		T4	21
valid_sources[0x17]	344603	1			T4	23		T6	1418		T7	1
valid_sources[0x18]	394203	1			T4	32		T6	1494		T7	1
valid_sources[0x19]	366321	1			T1	1		T4	28		T6	1398
valid_sources[0x1a]	399177	1			T2	5		T4	20		T6	1442
valid_sources[0x1b]	359691	1			T1	3		T4	24		T6	1440
valid_sources[0x1c]	348083	1			T4	16		T6	1413		T7	4
valid_sources[0x1d]	351139	1			T4	30		T6	1311		T9	956
valid_sources[0x1e]	442899	1			T4	22		T6	1368		T7	3
valid_sources[0x1f]	360117	1			T4	32		T6	1465		T9	947
valid_sources[0x20]	379830	1			T4	21		T6	1582		T7	1
valid_sources[0x21]	352245	1			T1	1		T4	32		T6	1382
valid_sources[0x22]	344660	1			T4	19		T6	1406		T9	978
valid_sources[0x23]	383032	1			T4	22		T6	1498		T9	1006
valid_sources[0x24]	382492	1			T4	18		T6	1559		T7	1
valid_sources[0x25]	382135	1			T4	31		T6	1551		T7	1
valid_sources[0x26]	371655	1			T1	5		T4	28		T6	1413
valid_sources[0x27]	355348	1			T4	24		T6	1367		T9	983
valid_sources[0x28]	370794	1			T4	31		T6	1344		T7	1
valid_sources[0x29]	404845	1			T1	7		T4	18		T6	1418
valid_sources[0x2a]	380823	1			T2	4		T4	27		T6	1572
valid_sources[0x2b]	365061	1			T4	36		T6	1455		T7	3
valid_sources[0x2c]	360738	1			T4	27		T6	1600		T7	1
valid_sources[0x2d]	368051	1			T4	24		T6	1386		T9	903
valid_sources[0x2e]	391252	1			T4	30		T6	1363		T9	826
valid_sources[0x2f]	355677	1			T4	24		T6	1554		T7	1
valid_sources[0x30]	368432	1			T4	28		T6	1453		T7	3
valid_sources[0x31]	371576	1			T4	16		T6	1537		T7	3
valid_sources[0x32]	358897	1			T4	28		T6	1404		T7	2
valid_sources[0x33]	373183	1			T4	32		T6	1382		T9	1012
valid_sources[0x34]	418714	1			T4	32		T6	1427		T7	2
valid_sources[0x35]	471480	1			T1	6		T4	27		T6	1482
valid_sources[0x36]	397867	1			T4	32		T6	1436		T9	990
valid_sources[0x37]	356392	1			T1	10		T4	32		T6	1496
valid_sources[0x38]	509537	1			T4	23		T6	1532		T9	903
valid_sources[0x39]	381188	1			T4	24		T6	1338		T7	2
valid_sources[0x3a]	365325	1			T4	29		T6	1424		T7	1
valid_sources[0x3b]	356405	1			T4	25		T6	1520		T7	1
valid_sources[0x3c]	392126	1			T4	25		T6	1490		T9	926
valid_sources[0x3d]	370731	1			T4	28		T6	1500		T9	900
valid_sources[0x3e]	367268	1			T4	25		T6	1472		T7	1
valid_sources[0x3f]	350792	1			T4	28		T6	1649		T7	1
valid_sources[0x40]	390297	1			T4	34		T6	1469		T7	1
valid_sources[0x41]	388603	1			T4	30		T6	1521		T9	967
valid_sources[0x42]	424444	1			T4	37		T6	1444		T7	2
valid_sources[0x43]	360123	1			T4	27		T6	1534		T9	805
valid_sources[0x44]	377218	1			T1	4		T4	25		T6	1436
valid_sources[0x45]	391398	1			T4	24		T6	1443		T7	2
valid_sources[0x46]	366463	1			T4	27		T6	1489		T9	809
valid_sources[0x47]	388597	1			T1	1		T4	26		T6	1448
valid_sources[0x48]	355752	1			T4	31		T6	1472		T9	1008
valid_sources[0x49]	348833	1			T4	29		T6	1465		T7	1
valid_sources[0x4a]	356234	1			T4	22		T6	1512		T9	1005
valid_sources[0x4b]	348235	1			T4	25		T6	1567		T9	1005
valid_sources[0x4c]	348731	1			T4	39		T6	1462		T7	2
valid_sources[0x4d]	354438	1			T4	27		T6	1392		T9	943
valid_sources[0x4e]	351000	1			T4	31		T6	1480		T7	1
valid_sources[0x4f]	350048	1			T4	25		T6	1420		T7	4
valid_sources[0x50]	385080	1			T4	31		T6	1594		T9	880
valid_sources[0x51]	368465	1			T4	23		T6	1411		T7	1
valid_sources[0x52]	359618	1			T4	29		T6	1669		T9	935
valid_sources[0x53]	349333	1			T4	23		T6	1467		T7	1
valid_sources[0x54]	354642	1			T4	36		T6	1375		T9	876
valid_sources[0x55]	409036	1			T4	29		T6	1380		T9	996
valid_sources[0x56]	380689	1			T4	28		T6	1473		T7	1
valid_sources[0x57]	349046	1			T4	18		T6	1346		T7	1
valid_sources[0x58]	406464	1			T4	29		T6	1370		T7	2
valid_sources[0x59]	413018	1			T4	23		T6	1542		T9	763
valid_sources[0x5a]	371255	1			T1	4		T4	30		T6	1568
valid_sources[0x5b]	370446	1			T4	28		T6	1443		T7	1
valid_sources[0x5c]	401660	1			T3	45		T4	26		T6	1403
valid_sources[0x5d]	363063	1			T4	26		T6	1442		T9	855
valid_sources[0x5e]	378092	1			T4	24		T6	1447		T7	1
valid_sources[0x5f]	388432	1			T1	3		T4	26		T6	1631
valid_sources[0x60]	426065	1			T4	24		T6	1487		T7	1
valid_sources[0x61]	413057	1			T1	2		T4	23		T6	1568
valid_sources[0x62]	339445	1			T4	18		T6	1419		T7	1
valid_sources[0x63]	375838	1			T4	21		T6	1408		T7	1
valid_sources[0x64]	429781	1			T1	3		T4	36		T6	1469
valid_sources[0x65]	348620	1			T4	29		T6	1394		T7	5
valid_sources[0x66]	357236	1			T4	36		T6	1496		T9	1054
valid_sources[0x67]	378963	1			T4	36		T6	1559		T9	879
valid_sources[0x68]	378196	1			T1	2		T4	26		T6	1487
valid_sources[0x69]	374436	1			T4	30		T6	1442		T7	2
valid_sources[0x6a]	362066	1			T4	19		T6	1392		T7	1
valid_sources[0x6b]	373212	1			T4	26		T6	1532		T7	1
valid_sources[0x6c]	367511	1			T4	38		T6	1546		T7	1
valid_sources[0x6d]	346880	1			T2	4		T4	29		T6	1478
valid_sources[0x6e]	357571	1			T2	1		T4	24		T6	1502
valid_sources[0x6f]	383868	1			T4	23		T6	1407		T7	2
valid_sources[0x70]	396367	1			T2	3		T4	21		T6	1458
valid_sources[0x71]	355026	1			T4	22		T6	1419		T7	1
valid_sources[0x72]	372224	1			T4	26		T6	1500		T7	3
valid_sources[0x73]	377298	1			T4	24		T6	1448		T7	5
valid_sources[0x74]	365785	1			T4	22		T6	1375		T9	995
valid_sources[0x75]	367280	1			T4	24		T6	1464		T7	2
valid_sources[0x76]	359644	1			T4	27		T6	1465		T7	4
valid_sources[0x77]	410097	1			T4	24		T6	1590		T7	1
valid_sources[0x78]	389206	1			T4	31		T6	1528		T7	1
valid_sources[0x79]	368521	1			T4	18		T6	1464		T9	837
valid_sources[0x7a]	358222	1			T1	12		T4	29		T6	1480
valid_sources[0x7b]	367660	1			T1	2		T4	25		T6	1472
valid_sources[0x7c]	398176	1			T1	3		T4	25		T6	1488
valid_sources[0x7d]	349449	1			T4	21		T6	1431		T7	1
valid_sources[0x7e]	393206	1			T1	2		T2	1		T4	30
valid_sources[0x7f]	345797	1			T4	23		T6	1491		T7	2
valid_sources[0x80]	397877	1			T2	2		T4	18		T6	1433

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18291967

1

T1

58

T2

7

T3

6

values[0x0]

all_enables

biggest_size

4246806

1

T1

13

T2

2

T3

3

values[0x1]

all_enables

biggest_size

4194514

1

T1

15

T2

3

T3

3