Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	85397049	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

33674600

1

T1

111

T2

11

T3

160

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	108085726	1			T1	20402		T2	32		T3	7694
values[0x0]	5192850	1			T1	166		T2	7		T3	173
values[0x1]	5793073	1			T1	134		T2	6		T3	152

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	59368850	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

59702799

1

T1

6954

T2

18

T3

2667

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	449619	1			T1	81		T3	24		T4	17
valid_sources[0x01]	450035	1			T1	48		T3	27		T4	17
valid_sources[0x02]	476420	1			T1	73		T3	14		T4	13
valid_sources[0x03]	438478	1			T1	82		T3	22		T4	10
valid_sources[0x04]	476674	1			T1	83		T3	41		T4	10
valid_sources[0x05]	455534	1			T1	77		T3	18		T4	19
valid_sources[0x06]	450719	1			T1	71		T2	7		T3	27
valid_sources[0x07]	469128	1			T1	104		T3	33		T4	12
valid_sources[0x08]	514596	1			T1	77		T2	1		T3	31
valid_sources[0x09]	481849	1			T1	102		T3	32		T4	19
valid_sources[0x0a]	449979	1			T1	70		T3	44		T4	13
valid_sources[0x0b]	498388	1			T1	88		T3	31		T4	10
valid_sources[0x0c]	449670	1			T1	75		T3	24		T4	13
valid_sources[0x0d]	462685	1			T1	67		T3	36		T4	10
valid_sources[0x0e]	505138	1			T1	75		T3	35		T4	15
valid_sources[0x0f]	446319	1			T1	62		T3	31		T4	13
valid_sources[0x10]	446155	1			T1	74		T3	29		T4	12
valid_sources[0x11]	435866	1			T1	93		T3	29		T4	8
valid_sources[0x12]	494160	1			T1	84		T3	49		T4	10
valid_sources[0x13]	428099	1			T1	94		T3	35		T4	20
valid_sources[0x14]	565546	1			T1	64		T3	17		T4	9
valid_sources[0x15]	548889	1			T1	67		T2	3		T3	29
valid_sources[0x16]	425584	1			T1	78		T3	28		T4	15
valid_sources[0x17]	435572	1			T1	99		T3	23		T4	6
valid_sources[0x18]	441210	1			T1	81		T3	27		T4	9
valid_sources[0x19]	438881	1			T1	85		T3	19		T4	6
valid_sources[0x1a]	458210	1			T1	94		T3	30		T4	7
valid_sources[0x1b]	435928	1			T1	69		T3	33		T4	10
valid_sources[0x1c]	442368	1			T1	76		T3	37		T4	8
valid_sources[0x1d]	433461	1			T1	90		T3	27		T4	20
valid_sources[0x1e]	451481	1			T1	73		T3	24		T4	11
valid_sources[0x1f]	457526	1			T1	105		T3	28		T4	17
valid_sources[0x20]	505449	1			T1	106		T3	13		T4	7
valid_sources[0x21]	428146	1			T1	68		T3	26		T4	17
valid_sources[0x22]	462201	1			T1	73		T3	38		T4	6
valid_sources[0x23]	453819	1			T1	84		T3	23		T4	13
valid_sources[0x24]	465957	1			T1	109		T3	40		T4	13
valid_sources[0x25]	546838	1			T1	60		T3	37		T4	6
valid_sources[0x26]	468025	1			T1	91		T3	33		T4	16
valid_sources[0x27]	608195	1			T1	74		T3	34		T4	10
valid_sources[0x28]	434016	1			T1	74		T3	28		T4	12
valid_sources[0x29]	412365	1			T1	57		T3	25		T4	13
valid_sources[0x2a]	445236	1			T1	81		T3	34		T4	2
valid_sources[0x2b]	434816	1			T1	75		T2	1		T3	33
valid_sources[0x2c]	448837	1			T1	76		T3	45		T4	10
valid_sources[0x2d]	449098	1			T1	102		T3	37		T4	11
valid_sources[0x2e]	458247	1			T1	61		T3	31		T4	8
valid_sources[0x2f]	448879	1			T1	83		T3	29		T4	11
valid_sources[0x30]	438539	1			T1	63		T3	44		T4	18
valid_sources[0x31]	530526	1			T1	62		T3	50		T4	7
valid_sources[0x32]	432912	1			T1	79		T2	3		T3	56
valid_sources[0x33]	597438	1			T1	98		T3	21		T4	16
valid_sources[0x34]	538937	1			T1	67		T3	33		T4	13
valid_sources[0x35]	518189	1			T1	93		T3	28		T4	12
valid_sources[0x36]	437818	1			T1	99		T3	37		T4	23
valid_sources[0x37]	450595	1			T1	89		T3	31		T4	8
valid_sources[0x38]	460770	1			T1	85		T3	34		T4	15
valid_sources[0x39]	482181	1			T1	74		T3	29		T4	21
valid_sources[0x3a]	460475	1			T1	61		T3	27		T4	14
valid_sources[0x3b]	453544	1			T1	84		T3	36		T4	17
valid_sources[0x3c]	543822	1			T1	105		T3	28		T4	21
valid_sources[0x3d]	448530	1			T1	75		T3	23		T4	13
valid_sources[0x3e]	467686	1			T1	58		T3	34		T4	12
valid_sources[0x3f]	446711	1			T1	66		T3	34		T4	12
valid_sources[0x40]	447364	1			T1	71		T3	23		T4	12
valid_sources[0x41]	438597	1			T1	81		T3	47		T4	11
valid_sources[0x42]	446611	1			T1	81		T3	16		T4	11
valid_sources[0x43]	433161	1			T1	91		T3	30		T4	15
valid_sources[0x44]	419838	1			T1	52		T3	22		T4	9
valid_sources[0x45]	463824	1			T1	83		T3	21		T4	12
valid_sources[0x46]	430052	1			T1	78		T3	28		T4	6
valid_sources[0x47]	459716	1			T1	99		T3	35		T4	20
valid_sources[0x48]	443181	1			T1	92		T3	49		T4	11
valid_sources[0x49]	526051	1			T1	84		T3	28		T4	7
valid_sources[0x4a]	527701	1			T1	73		T3	33		T4	5
valid_sources[0x4b]	467850	1			T1	75		T3	28		T4	15
valid_sources[0x4c]	433519	1			T1	96		T3	39		T4	9
valid_sources[0x4d]	421412	1			T1	102		T3	38		T4	13
valid_sources[0x4e]	437748	1			T1	78		T3	45		T4	18
valid_sources[0x4f]	458259	1			T1	67		T3	35		T4	22
valid_sources[0x50]	461062	1			T1	64		T3	27		T4	10
valid_sources[0x51]	457354	1			T1	55		T3	23		T4	15
valid_sources[0x52]	457590	1			T1	70		T2	1		T3	33
valid_sources[0x53]	460755	1			T1	85		T3	52		T4	16
valid_sources[0x54]	500109	1			T1	72		T3	33		T4	2
valid_sources[0x55]	442087	1			T1	82		T3	18		T4	13
valid_sources[0x56]	425348	1			T1	66		T3	47		T4	17
valid_sources[0x57]	451932	1			T1	91		T3	32		T4	6
valid_sources[0x58]	463100	1			T1	77		T3	29		T4	11
valid_sources[0x59]	443672	1			T1	77		T3	40		T4	21
valid_sources[0x5a]	462287	1			T1	99		T3	14		T4	6
valid_sources[0x5b]	528680	1			T1	75		T3	29		T4	11
valid_sources[0x5c]	450900	1			T1	67		T3	31		T4	14
valid_sources[0x5d]	632847	1			T1	73		T3	27		T4	6
valid_sources[0x5e]	433465	1			T1	75		T3	27		T4	13
valid_sources[0x5f]	434888	1			T1	94		T2	1		T3	45
valid_sources[0x60]	437540	1			T1	72		T3	29		T4	20
valid_sources[0x61]	616611	1			T1	50		T3	31		T4	10
valid_sources[0x62]	445093	1			T1	75		T3	41		T4	11
valid_sources[0x63]	472517	1			T1	84		T3	36		T4	18
valid_sources[0x64]	494035	1			T1	75		T3	31		T4	5
valid_sources[0x65]	463870	1			T1	85		T3	26		T4	11
valid_sources[0x66]	448970	1			T1	78		T3	23		T4	9
valid_sources[0x67]	473780	1			T1	106		T3	26		T4	11
valid_sources[0x68]	427264	1			T1	75		T3	46		T4	10
valid_sources[0x69]	435495	1			T1	61		T3	36		T4	16
valid_sources[0x6a]	454872	1			T1	71		T3	20		T4	29
valid_sources[0x6b]	446757	1			T1	105		T3	38		T4	9
valid_sources[0x6c]	709207	1			T1	67		T2	6		T3	25
valid_sources[0x6d]	469538	1			T1	92		T3	23		T4	8
valid_sources[0x6e]	467136	1			T1	72		T3	29		T4	17
valid_sources[0x6f]	423929	1			T1	97		T3	26		T4	9
valid_sources[0x70]	459718	1			T1	65		T3	38		T4	13
valid_sources[0x71]	431917	1			T1	76		T3	26		T4	14
valid_sources[0x72]	472689	1			T1	47		T3	44		T4	10
valid_sources[0x73]	493052	1			T1	117		T3	28		T4	8
valid_sources[0x74]	450327	1			T1	74		T3	34		T4	8
valid_sources[0x75]	442994	1			T1	47		T3	25		T4	5
valid_sources[0x76]	471914	1			T1	79		T3	26		T4	10
valid_sources[0x77]	444905	1			T1	65		T3	36		T4	24
valid_sources[0x78]	508774	1			T1	58		T3	31		T4	13
valid_sources[0x79]	464113	1			T1	77		T3	35		T4	13
valid_sources[0x7a]	435180	1			T1	85		T3	42		T4	20
valid_sources[0x7b]	469200	1			T1	90		T3	30		T4	16
valid_sources[0x7c]	535159	1			T1	74		T3	25		T4	15
valid_sources[0x7d]	435816	1			T1	104		T3	24		T4	7
valid_sources[0x7e]	550859	1			T1	86		T3	31		T4	5
valid_sources[0x7f]	440122	1			T1	70		T3	41		T4	11
valid_sources[0x80]	457618	1			T1	71		T3	40		T4	7

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

23927059

1

T1

11

T2

8

T3

52

values[0x0]

all_enables

biggest_size

4905750

1

T1

63

T2

2

T3

70

values[0x1]

all_enables

biggest_size

4841791

1

T1

37

T2

1

T3

38