Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	78352161	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

27766807

1

T1

11

T2

180

T3

107481

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	96086962	1			T1	10670		T2	104916		T3	176112
values[0x0]	4741874	1			T1	9		T2	101		T3	9108
values[0x1]	5290132	1			T1	10		T2	116		T3	10255

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54035212	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

52083756

1

T1

5282

T2

35376

T3

125933

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	556995	1			T1	49		T2	505		T3	785
valid_sources[0x01]	443292	1			T1	45		T2	384		T3	735
valid_sources[0x02]	387926	1			T1	45		T2	418		T3	629
valid_sources[0x03]	427486	1			T1	53		T2	438		T3	847
valid_sources[0x04]	410596	1			T1	58		T2	421		T3	756
valid_sources[0x05]	382565	1			T1	53		T2	354		T3	1064
valid_sources[0x06]	361632	1			T1	42		T2	453		T3	552
valid_sources[0x07]	398873	1			T1	38		T2	387		T3	707
valid_sources[0x08]	415726	1			T1	44		T2	365		T3	820
valid_sources[0x09]	564042	1			T1	38		T2	451		T3	850
valid_sources[0x0a]	384303	1			T1	41		T2	459		T3	797
valid_sources[0x0b]	417332	1			T1	37		T2	489		T3	686
valid_sources[0x0c]	440775	1			T1	64		T2	510		T3	708
valid_sources[0x0d]	389309	1			T1	51		T2	391		T3	706
valid_sources[0x0e]	377800	1			T1	41		T2	462		T3	656
valid_sources[0x0f]	369282	1			T1	39		T2	451		T3	708
valid_sources[0x10]	384813	1			T1	33		T2	345		T3	695
valid_sources[0x11]	429741	1			T1	33		T2	414		T3	748
valid_sources[0x12]	384822	1			T1	45		T2	450		T3	757
valid_sources[0x13]	524063	1			T1	44		T2	444		T3	914
valid_sources[0x14]	375877	1			T1	41		T2	345		T3	538
valid_sources[0x15]	374872	1			T1	46		T2	455		T3	830
valid_sources[0x16]	359521	1			T1	42		T2	404		T3	727
valid_sources[0x17]	394832	1			T1	41		T2	381		T3	684
valid_sources[0x18]	380012	1			T1	48		T2	384		T3	783
valid_sources[0x19]	390452	1			T1	47		T2	428		T3	834
valid_sources[0x1a]	382649	1			T1	42		T2	435		T3	689
valid_sources[0x1b]	424800	1			T1	45		T2	402		T3	855
valid_sources[0x1c]	392066	1			T1	26		T2	299		T3	611
valid_sources[0x1d]	378063	1			T1	47		T2	358		T3	506
valid_sources[0x1e]	485367	1			T1	50		T2	457		T3	668
valid_sources[0x1f]	377871	1			T1	45		T2	323		T3	868
valid_sources[0x20]	378017	1			T1	55		T2	366		T3	733
valid_sources[0x21]	536341	1			T1	28		T2	339		T3	804
valid_sources[0x22]	370966	1			T1	58		T2	404		T3	917
valid_sources[0x23]	451157	1			T1	34		T2	404		T3	617
valid_sources[0x24]	404394	1			T1	47		T2	450		T3	761
valid_sources[0x25]	422745	1			T1	27		T2	385		T3	760
valid_sources[0x26]	512425	1			T1	54		T2	498		T3	880
valid_sources[0x27]	392050	1			T1	34		T2	359		T3	809
valid_sources[0x28]	478034	1			T1	42		T2	525		T3	817
valid_sources[0x29]	408491	1			T1	39		T2	316		T3	679
valid_sources[0x2a]	396502	1			T1	50		T2	480		T3	823
valid_sources[0x2b]	398074	1			T1	31		T2	321		T3	988
valid_sources[0x2c]	360109	1			T1	42		T2	337		T3	893
valid_sources[0x2d]	388845	1			T1	41		T2	392		T3	664
valid_sources[0x2e]	380394	1			T1	51		T2	463		T3	808
valid_sources[0x2f]	365045	1			T1	27		T2	407		T3	666
valid_sources[0x30]	398982	1			T1	35		T2	352		T3	914
valid_sources[0x31]	476339	1			T1	46		T2	384		T3	718
valid_sources[0x32]	433938	1			T1	27		T2	445		T3	758
valid_sources[0x33]	378126	1			T1	37		T2	436		T3	1128
valid_sources[0x34]	550200	1			T1	36		T2	451		T3	797
valid_sources[0x35]	397866	1			T1	45		T2	451		T3	708
valid_sources[0x36]	412342	1			T1	31		T2	416		T3	511
valid_sources[0x37]	389432	1			T1	60		T2	404		T3	878
valid_sources[0x38]	396880	1			T1	36		T2	363		T3	701
valid_sources[0x39]	404927	1			T1	33		T2	547		T3	602
valid_sources[0x3a]	380011	1			T1	43		T2	383		T3	774
valid_sources[0x3b]	391599	1			T1	41		T2	422		T3	511
valid_sources[0x3c]	407732	1			T1	48		T2	520		T3	668
valid_sources[0x3d]	380804	1			T1	41		T2	402		T3	828
valid_sources[0x3e]	371039	1			T1	40		T2	473		T3	841
valid_sources[0x3f]	410049	1			T1	40		T2	368		T3	848
valid_sources[0x40]	373723	1			T1	47		T2	437		T3	694
valid_sources[0x41]	393116	1			T1	52		T2	389		T3	773
valid_sources[0x42]	401414	1			T1	42		T2	385		T3	944
valid_sources[0x43]	440501	1			T1	35		T2	380		T3	821
valid_sources[0x44]	416152	1			T1	31		T2	343		T3	749
valid_sources[0x45]	441377	1			T1	45		T2	306		T3	745
valid_sources[0x46]	394639	1			T1	33		T2	489		T3	902
valid_sources[0x47]	386121	1			T1	39		T2	351		T3	794
valid_sources[0x48]	396079	1			T1	52		T2	346		T3	724
valid_sources[0x49]	455305	1			T1	43		T2	502		T3	870
valid_sources[0x4a]	407814	1			T1	37		T2	347		T3	597
valid_sources[0x4b]	459011	1			T1	40		T2	327		T3	577
valid_sources[0x4c]	417462	1			T1	34		T2	413		T3	580
valid_sources[0x4d]	384542	1			T1	46		T2	355		T3	856
valid_sources[0x4e]	515920	1			T1	45		T2	343		T3	577
valid_sources[0x4f]	406091	1			T1	47		T2	486		T3	976
valid_sources[0x50]	398667	1			T1	63		T2	389		T3	608
valid_sources[0x51]	451859	1			T1	34		T2	342		T3	874
valid_sources[0x52]	400453	1			T1	35		T2	470		T3	710
valid_sources[0x53]	388400	1			T1	28		T2	416		T3	678
valid_sources[0x54]	364750	1			T1	28		T2	417		T3	804
valid_sources[0x55]	414448	1			T1	34		T2	385		T3	603
valid_sources[0x56]	387249	1			T1	44		T2	299		T3	824
valid_sources[0x57]	410703	1			T1	46		T2	453		T3	841
valid_sources[0x58]	427476	1			T1	31		T2	519		T3	746
valid_sources[0x59]	511452	1			T1	39		T2	377		T3	874
valid_sources[0x5a]	414789	1			T1	29		T2	421		T3	864
valid_sources[0x5b]	364158	1			T1	48		T2	385		T3	703
valid_sources[0x5c]	375471	1			T1	33		T2	443		T3	689
valid_sources[0x5d]	375273	1			T1	42		T2	422		T3	828
valid_sources[0x5e]	395177	1			T1	39		T2	336		T3	726
valid_sources[0x5f]	497346	1			T1	54		T2	452		T3	815
valid_sources[0x60]	382643	1			T1	37		T2	411		T3	774
valid_sources[0x61]	372489	1			T1	45		T2	372		T3	674
valid_sources[0x62]	410824	1			T1	40		T2	366		T3	962
valid_sources[0x63]	447087	1			T1	42		T2	417		T3	877
valid_sources[0x64]	429470	1			T1	41		T2	435		T3	703
valid_sources[0x65]	456342	1			T1	46		T2	479		T3	532
valid_sources[0x66]	385159	1			T1	42		T2	378		T3	741
valid_sources[0x67]	405508	1			T1	49		T2	436		T3	820
valid_sources[0x68]	397661	1			T1	35		T2	468		T3	691
valid_sources[0x69]	384709	1			T1	45		T2	409		T3	767
valid_sources[0x6a]	394943	1			T1	42		T2	404		T3	668
valid_sources[0x6b]	493826	1			T1	40		T2	376		T3	776
valid_sources[0x6c]	411361	1			T1	55		T2	386		T3	765
valid_sources[0x6d]	372121	1			T1	38		T2	424		T3	844
valid_sources[0x6e]	407659	1			T1	41		T2	369		T3	796
valid_sources[0x6f]	415825	1			T1	40		T2	472		T3	654
valid_sources[0x70]	374634	1			T1	53		T2	356		T3	661
valid_sources[0x71]	501197	1			T1	56		T2	432		T3	620
valid_sources[0x72]	480291	1			T1	64		T2	406		T3	584
valid_sources[0x73]	393292	1			T1	36		T2	484		T3	674
valid_sources[0x74]	377247	1			T1	55		T2	432		T3	572
valid_sources[0x75]	465632	1			T1	36		T2	421		T3	858
valid_sources[0x76]	500860	1			T1	44		T2	320		T3	816
valid_sources[0x77]	434201	1			T1	29		T2	435		T3	722
valid_sources[0x78]	547004	1			T1	45		T2	385		T3	553
valid_sources[0x79]	407043	1			T1	45		T2	353		T3	699
valid_sources[0x7a]	393977	1			T1	47		T2	403		T3	844
valid_sources[0x7b]	369702	1			T1	37		T2	411		T3	803
valid_sources[0x7c]	422352	1			T1	44		T2	374		T3	614
valid_sources[0x7d]	423843	1			T1	44		T2	434		T3	1021
valid_sources[0x7e]	403071	1			T1	37		T2	417		T3	863
valid_sources[0x7f]	414084	1			T1	33		T2	441		T3	758
valid_sources[0x80]	450051	1			T1	45		T2	365		T3	701

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18913844

1

T1

1

T2

118

T3

89918

values[0x0]

all_enables

biggest_size

4456867

1

T1

5

T2

43

T3

8871

values[0x1]

all_enables

biggest_size

4396096

1

T1

5

T2

19

T3

8692