Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 83160697 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 32178054 1 T1 150 T2 6 T3 71



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 105202325 1 T1 2286 T2 1 T3 93
values[0x0] 4792426 1 T1 107 T2 4 T3 52
values[0x1] 5344000 1 T1 112 T2 3 T3 37



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 57810093 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 57528658 1 T1 893 T2 6 T3 87



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 424998 1 T4 1 T6 10 T7 301
valid_sources[0x01] 448549 1 T4 1 T6 8 T7 316
valid_sources[0x02] 440920 1 T6 3 T7 318 T8 6
valid_sources[0x03] 453926 1 T6 11 T7 294 T9 672
valid_sources[0x04] 453908 1 T6 9 T7 311 T8 8
valid_sources[0x05] 423791 1 T6 10 T7 295 T8 1
valid_sources[0x06] 430542 1 T6 4 T7 337 T9 642
valid_sources[0x07] 498491 1 T4 1 T6 2 T7 340
valid_sources[0x08] 483349 1 T6 10 T7 284 T8 8
valid_sources[0x09] 423125 1 T6 8 T7 338 T8 23
valid_sources[0x0a] 485711 1 T6 8 T7 276 T8 7
valid_sources[0x0b] 433441 1 T6 4 T7 291 T9 620
valid_sources[0x0c] 447195 1 T4 1 T6 5 T7 311
valid_sources[0x0d] 444407 1 T6 8 T7 259 T8 31
valid_sources[0x0e] 415557 1 T6 3 T7 302 T9 627
valid_sources[0x0f] 423053 1 T6 4 T7 335 T8 2
valid_sources[0x10] 457362 1 T4 1 T6 4 T7 292
valid_sources[0x11] 399611 1 T6 5 T7 313 T9 632
valid_sources[0x12] 426932 1 T6 5 T7 350 T8 25
valid_sources[0x13] 436956 1 T4 1 T6 11 T7 315
valid_sources[0x14] 417853 1 T4 1 T6 11 T7 313
valid_sources[0x15] 431350 1 T6 7 T7 302 T9 626
valid_sources[0x16] 407705 1 T6 5 T7 346 T8 23
valid_sources[0x17] 418856 1 T4 1 T6 6 T7 346
valid_sources[0x18] 435673 1 T6 2 T7 313 T8 53
valid_sources[0x19] 414776 1 T6 13 T7 318 T8 11
valid_sources[0x1a] 406145 1 T6 10 T7 328 T9 656
valid_sources[0x1b] 424590 1 T6 11 T7 344 T8 64
valid_sources[0x1c] 434853 1 T4 2 T6 14 T7 348
valid_sources[0x1d] 446046 1 T6 14 T7 303 T9 630
valid_sources[0x1e] 468967 1 T6 3 T7 301 T9 580
valid_sources[0x1f] 477532 1 T6 6 T7 309 T9 669
valid_sources[0x20] 403457 1 T6 6 T7 296 T9 642
valid_sources[0x21] 484413 1 T6 5 T7 315 T8 27
valid_sources[0x22] 426872 1 T6 9 T7 300 T8 30
valid_sources[0x23] 563118 1 T6 8 T7 327 T8 5
valid_sources[0x24] 438272 1 T6 15 T7 303 T9 615
valid_sources[0x25] 448270 1 T6 9 T7 373 T8 4
valid_sources[0x26] 429580 1 T6 10 T7 300 T8 28
valid_sources[0x27] 476457 1 T6 3 T7 290 T9 624
valid_sources[0x28] 429252 1 T6 6 T7 322 T9 643
valid_sources[0x29] 459668 1 T6 3 T7 327 T8 47
valid_sources[0x2a] 445794 1 T6 10 T7 282 T9 612
valid_sources[0x2b] 444744 1 T6 4 T7 319 T8 22
valid_sources[0x2c] 400128 1 T6 4 T7 305 T9 618
valid_sources[0x2d] 426269 1 T6 8 T7 315 T9 650
valid_sources[0x2e] 418017 1 T6 6 T7 308 T9 588
valid_sources[0x2f] 472581 1 T6 13 T7 318 T8 22
valid_sources[0x30] 430487 1 T6 6 T7 254 T8 1
valid_sources[0x31] 450624 1 T6 11 T7 296 T8 21
valid_sources[0x32] 411263 1 T6 3 T7 317 T9 640
valid_sources[0x33] 431279 1 T6 5 T7 318 T9 594
valid_sources[0x34] 444422 1 T4 2 T6 11 T7 314
valid_sources[0x35] 483764 1 T6 13 T7 324 T8 4
valid_sources[0x36] 413464 1 T6 12 T7 328 T9 611
valid_sources[0x37] 431316 1 T4 2 T6 7 T7 344
valid_sources[0x38] 787589 1 T6 5 T7 322 T9 587
valid_sources[0x39] 423114 1 T6 7 T7 292 T8 5
valid_sources[0x3a] 495340 1 T4 2 T6 4 T7 309
valid_sources[0x3b] 430714 1 T6 2 T7 308 T9 672
valid_sources[0x3c] 444463 1 T4 1 T6 6 T7 303
valid_sources[0x3d] 435112 1 T6 9 T7 245 T9 648
valid_sources[0x3e] 434513 1 T4 2 T6 15 T7 350
valid_sources[0x3f] 410396 1 T6 2 T7 310 T8 6
valid_sources[0x40] 460948 1 T1 136 T6 12 T7 323
valid_sources[0x41] 514497 1 T6 10 T7 302 T9 623
valid_sources[0x42] 505171 1 T6 10 T7 343 T9 610
valid_sources[0x43] 425506 1 T6 9 T7 292 T9 638
valid_sources[0x44] 464778 1 T6 7 T7 300 T9 602
valid_sources[0x45] 436038 1 T6 5 T7 324 T8 34
valid_sources[0x46] 439003 1 T6 4 T7 290 T8 5
valid_sources[0x47] 538075 1 T6 9 T7 343 T8 13
valid_sources[0x48] 417207 1 T6 9 T7 276 T8 5
valid_sources[0x49] 412941 1 T6 3 T7 324 T9 638
valid_sources[0x4a] 500247 1 T4 1 T6 9 T7 298
valid_sources[0x4b] 435429 1 T3 1 T4 1 T6 6
valid_sources[0x4c] 429367 1 T6 1 T7 269 T8 12
valid_sources[0x4d] 436070 1 T6 7 T7 311 T8 12
valid_sources[0x4e] 477421 1 T6 4 T7 296 T8 5
valid_sources[0x4f] 429773 1 T6 6 T7 337 T8 6
valid_sources[0x50] 452375 1 T6 6 T7 334 T8 3
valid_sources[0x51] 423777 1 T4 1 T6 3 T7 268
valid_sources[0x52] 514601 1 T6 9 T7 313 T8 16
valid_sources[0x53] 438548 1 T6 3 T7 310 T8 10
valid_sources[0x54] 438053 1 T6 13 T7 312 T9 615
valid_sources[0x55] 546639 1 T6 10 T7 290 T9 671
valid_sources[0x56] 473184 1 T6 8 T7 291 T8 15
valid_sources[0x57] 458377 1 T1 808 T6 9 T7 340
valid_sources[0x58] 414191 1 T6 3 T7 341 T9 646
valid_sources[0x59] 457156 1 T6 12 T7 305 T8 3
valid_sources[0x5a] 467363 1 T6 4 T7 271 T8 5
valid_sources[0x5b] 433670 1 T6 7 T7 316 T8 6
valid_sources[0x5c] 447955 1 T5 339 T6 3 T7 302
valid_sources[0x5d] 400214 1 T6 12 T7 281 T9 625
valid_sources[0x5e] 441716 1 T6 8 T7 328 T8 9
valid_sources[0x5f] 427120 1 T6 9 T7 316 T8 25
valid_sources[0x60] 397765 1 T6 5 T7 288 T9 594
valid_sources[0x61] 422006 1 T6 11 T7 318 T8 3
valid_sources[0x62] 421311 1 T4 1 T6 8 T7 321
valid_sources[0x63] 432757 1 T6 13 T7 303 T8 4
valid_sources[0x64] 485089 1 T6 8 T7 308 T8 7
valid_sources[0x65] 433034 1 T6 7 T7 278 T9 630
valid_sources[0x66] 440107 1 T6 9 T7 327 T9 647
valid_sources[0x67] 458606 1 T6 9 T7 320 T8 15
valid_sources[0x68] 496763 1 T6 7 T7 300 T8 16
valid_sources[0x69] 429835 1 T6 4 T7 291 T8 34
valid_sources[0x6a] 412850 1 T6 4 T7 297 T8 59
valid_sources[0x6b] 465472 1 T6 2 T7 283 T8 17
valid_sources[0x6c] 454120 1 T6 6 T7 319 T8 78
valid_sources[0x6d] 406285 1 T6 5 T7 342 T8 38
valid_sources[0x6e] 448047 1 T6 10 T7 282 T8 6
valid_sources[0x6f] 468907 1 T6 9 T7 347 T9 598
valid_sources[0x70] 400242 1 T4 2 T6 6 T7 336
valid_sources[0x71] 524985 1 T6 11 T7 332 T9 615
valid_sources[0x72] 448300 1 T6 5 T7 319 T8 28
valid_sources[0x73] 484943 1 T6 9 T7 325 T9 637
valid_sources[0x74] 448357 1 T6 8 T7 367 T9 629
valid_sources[0x75] 421882 1 T6 12 T7 285 T9 656
valid_sources[0x76] 507688 1 T4 1 T6 12 T7 324
valid_sources[0x77] 432649 1 T4 1 T6 6 T7 294
valid_sources[0x78] 427887 1 T6 2 T7 301 T8 14
valid_sources[0x79] 457260 1 T6 8 T7 320 T9 632
valid_sources[0x7a] 422011 1 T6 9 T7 337 T8 41
valid_sources[0x7b] 572332 1 T6 7 T7 331 T8 1
valid_sources[0x7c] 407054 1 T6 8 T7 284 T9 617
valid_sources[0x7d] 436519 1 T6 9 T7 304 T9 638
valid_sources[0x7e] 485373 1 T6 8 T7 319 T9 615
valid_sources[0x7f] 437785 1 T6 6 T7 324 T8 7
valid_sources[0x80] 427101 1 T6 8 T7 298 T9 663



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 23207915 1 T1 80 T2 1 T3 39
values[0x0] all_enables biggest_size 4514469 1 T1 44 T2 3 T3 23
values[0x1] all_enables biggest_size 4455670 1 T1 26 T2 2 T3 9

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%