Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	78659718	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30571459

1

T1

19

T2

36622

T3

39

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	99279690	1			T1	755		T2	374540		T3	16121
values[0x0]	4699321	1			T1	17		T2	1847		T3	32
values[0x1]	5252166	1			T1	23		T2	1891		T3	22

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54610687	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

54620490

1

T1

262

T2

145249

T3

7936

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	410087	1			T1	8		T2	1515		T3	70
valid_sources[0x01]	455589	1			T1	4		T2	1607		T3	49
valid_sources[0x02]	395990	1			T1	5		T2	1323		T3	62
valid_sources[0x03]	418577	1			T1	2		T2	1433		T3	56
valid_sources[0x04]	416513	1			T1	1		T2	1419		T3	59
valid_sources[0x05]	400443	1			T1	5		T2	1370		T3	52
valid_sources[0x06]	411786	1			T1	1		T2	1518		T3	68
valid_sources[0x07]	409896	1			T1	4		T2	1486		T3	65
valid_sources[0x08]	412387	1			T1	2		T2	1495		T3	58
valid_sources[0x09]	401172	1			T1	4		T2	1358		T3	63
valid_sources[0x0a]	396490	1			T1	2		T2	1471		T3	65
valid_sources[0x0b]	441923	1			T1	5		T2	1484		T3	58
valid_sources[0x0c]	421670	1			T1	5		T2	1687		T3	70
valid_sources[0x0d]	413579	1			T2	1436		T3	77		T4	117
valid_sources[0x0e]	403264	1			T1	3		T2	1542		T3	69
valid_sources[0x0f]	433021	1			T1	3		T2	1419		T3	69
valid_sources[0x10]	435108	1			T1	4		T2	1399		T3	62
valid_sources[0x11]	397103	1			T1	3		T2	1377		T3	80
valid_sources[0x12]	565506	1			T1	5		T2	1438		T3	52
valid_sources[0x13]	404782	1			T1	1		T2	1502		T3	63
valid_sources[0x14]	414151	1			T1	2		T2	1472		T3	56
valid_sources[0x15]	412471	1			T1	6		T2	1441		T3	68
valid_sources[0x16]	442010	1			T1	2		T2	1413		T3	50
valid_sources[0x17]	403726	1			T1	4		T2	1503		T3	56
valid_sources[0x18]	397163	1			T1	3		T2	1489		T3	51
valid_sources[0x19]	441611	1			T1	5		T2	1439		T3	68
valid_sources[0x1a]	428660	1			T1	7		T2	1580		T3	68
valid_sources[0x1b]	421848	1			T1	4		T2	1612		T3	50
valid_sources[0x1c]	397737	1			T1	3		T2	1425		T3	66
valid_sources[0x1d]	462258	1			T1	1		T2	1484		T3	64
valid_sources[0x1e]	401283	1			T1	4		T2	1415		T3	44
valid_sources[0x1f]	402248	1			T1	1		T2	1467		T3	66
valid_sources[0x20]	402762	1			T1	1		T2	1390		T3	58
valid_sources[0x21]	416776	1			T1	3		T2	1314		T3	54
valid_sources[0x22]	402566	1			T1	2		T2	1691		T3	58
valid_sources[0x23]	408822	1			T1	7		T2	1347		T3	66
valid_sources[0x24]	430938	1			T1	3		T2	1522		T3	63
valid_sources[0x25]	580160	1			T2	1541		T3	64		T4	116
valid_sources[0x26]	424143	1			T1	3		T2	1380		T3	58
valid_sources[0x27]	408150	1			T1	7		T2	1507		T3	62
valid_sources[0x28]	415912	1			T1	3		T2	1432		T3	62
valid_sources[0x29]	444385	1			T1	7		T2	1524		T3	59
valid_sources[0x2a]	531581	1			T1	4		T2	1482		T3	66
valid_sources[0x2b]	419223	1			T1	3		T2	1556		T3	50
valid_sources[0x2c]	417568	1			T1	4		T2	1420		T3	44
valid_sources[0x2d]	424218	1			T1	2		T2	1502		T3	59
valid_sources[0x2e]	465934	1			T1	1		T2	1443		T3	66
valid_sources[0x2f]	441755	1			T1	5		T2	1476		T3	62
valid_sources[0x30]	409081	1			T1	1		T2	1488		T3	72
valid_sources[0x31]	396528	1			T1	2		T2	1422		T3	80
valid_sources[0x32]	458479	1			T1	7		T2	1444		T3	66
valid_sources[0x33]	413287	1			T1	3		T2	1467		T3	63
valid_sources[0x34]	411041	1			T1	2		T2	1524		T3	78
valid_sources[0x35]	418338	1			T1	5		T2	1585		T3	61
valid_sources[0x36]	414127	1			T1	2		T2	1368		T3	63
valid_sources[0x37]	398045	1			T1	1		T2	1456		T3	83
valid_sources[0x38]	427690	1			T1	7		T2	1475		T3	61
valid_sources[0x39]	421022	1			T1	3		T2	1301		T3	58
valid_sources[0x3a]	397465	1			T1	3		T2	1452		T3	69
valid_sources[0x3b]	405808	1			T1	3		T2	1442		T3	82
valid_sources[0x3c]	390882	1			T1	2		T2	1301		T3	62
valid_sources[0x3d]	404956	1			T1	4		T2	1550		T3	69
valid_sources[0x3e]	423212	1			T1	5		T2	1662		T3	62
valid_sources[0x3f]	408121	1			T1	10		T2	1484		T3	72
valid_sources[0x40]	413416	1			T1	1		T2	1527		T3	54
valid_sources[0x41]	409776	1			T1	3		T2	1526		T3	70
valid_sources[0x42]	468423	1			T1	3		T2	1418		T3	59
valid_sources[0x43]	424134	1			T1	4		T2	1379		T3	61
valid_sources[0x44]	414916	1			T1	5		T2	1400		T3	65
valid_sources[0x45]	411469	1			T1	3		T2	1451		T3	69
valid_sources[0x46]	449536	1			T1	3		T2	1550		T3	67
valid_sources[0x47]	404165	1			T1	2		T2	1451		T3	74
valid_sources[0x48]	449411	1			T1	2		T2	1468		T3	59
valid_sources[0x49]	445022	1			T1	2		T2	1476		T3	65
valid_sources[0x4a]	550748	1			T1	1		T2	1556		T3	65
valid_sources[0x4b]	394035	1			T1	4		T2	1556		T3	62
valid_sources[0x4c]	424625	1			T1	4		T2	1653		T3	75
valid_sources[0x4d]	406809	1			T2	1566		T3	61		T4	88
valid_sources[0x4e]	407042	1			T1	1		T2	1313		T3	73
valid_sources[0x4f]	446484	1			T1	2		T2	1567		T3	65
valid_sources[0x50]	406100	1			T1	3		T2	1325		T3	59
valid_sources[0x51]	392869	1			T1	4		T2	1590		T3	73
valid_sources[0x52]	390804	1			T1	5		T2	1471		T3	74
valid_sources[0x53]	399476	1			T2	1375		T3	65		T4	94
valid_sources[0x54]	405774	1			T1	3		T2	1579		T3	75
valid_sources[0x55]	537985	1			T1	4		T2	1426		T3	73
valid_sources[0x56]	427798	1			T1	3		T2	1555		T3	70
valid_sources[0x57]	401747	1			T1	5		T2	1622		T3	65
valid_sources[0x58]	423594	1			T1	2		T2	1653		T3	60
valid_sources[0x59]	413155	1			T1	1		T2	1497		T3	51
valid_sources[0x5a]	453505	1			T1	1		T2	1449		T3	69
valid_sources[0x5b]	418284	1			T1	2		T2	1516		T3	62
valid_sources[0x5c]	409624	1			T1	4		T2	1421		T3	54
valid_sources[0x5d]	413619	1			T1	1		T2	1314		T3	55
valid_sources[0x5e]	406309	1			T1	4		T2	1460		T3	63
valid_sources[0x5f]	454483	1			T1	1		T2	1590		T3	53
valid_sources[0x60]	406588	1			T2	1637		T3	68		T4	83
valid_sources[0x61]	415984	1			T1	5		T2	1488		T3	84
valid_sources[0x62]	428723	1			T1	4		T2	1552		T3	54
valid_sources[0x63]	399698	1			T1	3		T2	1400		T3	59
valid_sources[0x64]	400478	1			T1	1		T2	1340		T3	69
valid_sources[0x65]	414006	1			T1	1		T2	1503		T3	64
valid_sources[0x66]	413923	1			T1	4		T2	1451		T3	48
valid_sources[0x67]	479438	1			T1	4		T2	1547		T3	63
valid_sources[0x68]	492949	1			T2	1451		T3	47		T4	102
valid_sources[0x69]	425569	1			T1	1		T2	1368		T3	60
valid_sources[0x6a]	419150	1			T1	2		T2	1575		T3	71
valid_sources[0x6b]	417667	1			T1	6		T2	1497		T3	62
valid_sources[0x6c]	417575	1			T1	3		T2	1610		T3	83
valid_sources[0x6d]	425728	1			T1	5		T2	1498		T3	65
valid_sources[0x6e]	421697	1			T1	4		T2	1343		T3	61
valid_sources[0x6f]	401923	1			T1	1		T2	1536		T3	54
valid_sources[0x70]	403525	1			T1	3		T2	1420		T3	61
valid_sources[0x71]	409477	1			T1	1		T2	1529		T3	60
valid_sources[0x72]	402928	1			T1	5		T2	1540		T3	73
valid_sources[0x73]	429310	1			T1	3		T2	1400		T3	67
valid_sources[0x74]	436901	1			T1	2		T2	1499		T3	67
valid_sources[0x75]	426144	1			T1	5		T2	1681		T3	59
valid_sources[0x76]	526985	1			T1	1		T2	1467		T3	73
valid_sources[0x77]	409538	1			T1	6		T2	1514		T3	56
valid_sources[0x78]	449766	1			T1	3		T2	1625		T3	65
valid_sources[0x79]	474414	1			T1	1		T2	1520		T3	64
valid_sources[0x7a]	408095	1			T1	3		T2	1424		T3	75
valid_sources[0x7b]	405969	1			T1	3		T2	1613		T3	60
valid_sources[0x7c]	488371	1			T1	2		T2	1485		T3	51
valid_sources[0x7d]	462822	1			T1	4		T2	1512		T3	70
valid_sources[0x7e]	499863	1			T1	3		T2	1433		T3	66
valid_sources[0x7f]	406541	1			T1	2		T2	1449		T3	49
valid_sources[0x80]	423065	1			T1	4		T2	1528		T3	76

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21781017

1

T1

4

T2

35708

T3

1

values[0x0]

all_enables

biggest_size

4422619

1

T1

11

T2

594

T3

25

values[0x1]

all_enables

biggest_size

4367823

1

T1

4

T2

320

T3

13