Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 72666624 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 27826784 1 T1 897 T2 8 T3 42



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 91204095 1 T1 52495 T2 2906 T3 73189
values[0x0] 4388599 1 T1 455 T2 7 T3 33
values[0x1] 4900714 1 T1 433 T2 6 T3 34



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 50368280 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 50125128 1 T1 18164 T2 959 T3 36633



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 345809 1 T1 224 T2 21 T3 304
valid_sources[0x01] 365859 1 T1 204 T2 8 T3 300
valid_sources[0x02] 401034 1 T1 219 T2 3 T3 315
valid_sources[0x03] 363290 1 T1 208 T2 14 T3 346
valid_sources[0x04] 347575 1 T1 231 T2 9 T3 384
valid_sources[0x05] 349313 1 T1 203 T2 9 T3 260
valid_sources[0x06] 380464 1 T1 222 T2 25 T3 269
valid_sources[0x07] 370836 1 T1 204 T2 9 T3 257
valid_sources[0x08] 416056 1 T1 193 T2 11 T3 322
valid_sources[0x09] 356143 1 T1 191 T3 335 T5 4
valid_sources[0x0a] 378845 1 T1 229 T2 1 T3 341
valid_sources[0x0b] 404059 1 T1 203 T2 1 T3 280
valid_sources[0x0c] 385156 1 T1 194 T2 19 T3 242
valid_sources[0x0d] 429063 1 T1 220 T2 20 T3 304
valid_sources[0x0e] 367893 1 T1 202 T2 4 T3 304
valid_sources[0x0f] 370820 1 T1 189 T2 17 T3 251
valid_sources[0x10] 391440 1 T1 206 T3 289 T5 3
valid_sources[0x11] 384446 1 T1 186 T2 11 T3 315
valid_sources[0x12] 340709 1 T1 238 T2 11 T3 264
valid_sources[0x13] 386247 1 T1 215 T2 21 T3 242
valid_sources[0x14] 377683 1 T1 202 T2 15 T3 312
valid_sources[0x15] 370801 1 T1 204 T2 27 T3 229
valid_sources[0x16] 369415 1 T1 211 T2 20 T3 301
valid_sources[0x17] 381795 1 T1 221 T2 6 T3 238
valid_sources[0x18] 368619 1 T1 212 T2 6 T3 257
valid_sources[0x19] 435991 1 T1 208 T2 1 T3 260
valid_sources[0x1a] 366624 1 T1 193 T2 21 T3 296
valid_sources[0x1b] 392186 1 T1 220 T2 17 T3 291
valid_sources[0x1c] 374260 1 T1 197 T3 305 T5 3
valid_sources[0x1d] 378230 1 T1 223 T3 360 T5 3
valid_sources[0x1e] 373459 1 T1 188 T2 19 T3 284
valid_sources[0x1f] 369753 1 T1 190 T2 5 T3 278
valid_sources[0x20] 370339 1 T1 205 T2 40 T3 241
valid_sources[0x21] 403162 1 T1 227 T2 6 T3 288
valid_sources[0x22] 357221 1 T1 195 T2 25 T3 254
valid_sources[0x23] 393354 1 T1 235 T2 2 T3 299
valid_sources[0x24] 354783 1 T1 212 T2 8 T3 279
valid_sources[0x25] 406589 1 T1 240 T2 26 T3 303
valid_sources[0x26] 372688 1 T1 200 T2 13 T3 269
valid_sources[0x27] 349647 1 T1 220 T2 12 T3 245
valid_sources[0x28] 401496 1 T1 219 T3 246 T4 13
valid_sources[0x29] 412271 1 T1 222 T3 356 T5 2
valid_sources[0x2a] 365782 1 T1 214 T2 30 T3 344
valid_sources[0x2b] 376300 1 T1 174 T2 8 T3 268
valid_sources[0x2c] 381590 1 T1 195 T2 2 T3 264
valid_sources[0x2d] 378504 1 T1 211 T2 4 T3 259
valid_sources[0x2e] 360006 1 T1 193 T2 25 T3 293
valid_sources[0x2f] 367648 1 T1 209 T2 23 T3 367
valid_sources[0x30] 357459 1 T1 211 T2 28 T3 233
valid_sources[0x31] 345648 1 T1 230 T2 10 T3 266
valid_sources[0x32] 388923 1 T1 212 T2 11 T3 265
valid_sources[0x33] 401248 1 T1 212 T2 20 T3 253
valid_sources[0x34] 385942 1 T1 202 T2 6 T3 335
valid_sources[0x35] 675495 1 T1 202 T2 13 T3 214
valid_sources[0x36] 375840 1 T1 185 T2 6 T3 329
valid_sources[0x37] 379892 1 T1 181 T2 27 T3 314
valid_sources[0x38] 350736 1 T1 200 T3 290 T5 4
valid_sources[0x39] 379895 1 T1 222 T2 48 T3 226
valid_sources[0x3a] 372104 1 T1 227 T2 12 T3 323
valid_sources[0x3b] 413393 1 T1 201 T2 15 T3 220
valid_sources[0x3c] 382140 1 T1 185 T3 267 T5 4
valid_sources[0x3d] 356017 1 T1 212 T2 14 T3 240
valid_sources[0x3e] 359964 1 T1 218 T2 10 T3 273
valid_sources[0x3f] 368720 1 T1 209 T2 13 T3 212
valid_sources[0x40] 619143 1 T1 220 T3 317 T5 6
valid_sources[0x41] 375440 1 T1 209 T2 9 T3 267
valid_sources[0x42] 375261 1 T1 208 T2 1 T3 276
valid_sources[0x43] 469288 1 T1 205 T2 7 T3 342
valid_sources[0x44] 402984 1 T1 218 T2 8 T3 327
valid_sources[0x45] 419474 1 T1 222 T2 5 T3 247
valid_sources[0x46] 366939 1 T1 219 T2 2 T3 316
valid_sources[0x47] 395390 1 T1 212 T2 19 T3 315
valid_sources[0x48] 378115 1 T1 235 T2 8 T3 297
valid_sources[0x49] 393294 1 T1 213 T2 2 T3 279
valid_sources[0x4a] 345916 1 T1 203 T2 16 T3 276
valid_sources[0x4b] 366308 1 T1 212 T2 29 T3 273
valid_sources[0x4c] 354575 1 T1 206 T3 286 T6 300
valid_sources[0x4d] 356003 1 T1 186 T2 1 T3 323
valid_sources[0x4e] 417516 1 T1 209 T2 21 T3 227
valid_sources[0x4f] 555260 1 T1 182 T2 17 T3 334
valid_sources[0x50] 379036 1 T1 231 T2 22 T3 273
valid_sources[0x51] 375558 1 T1 193 T2 7 T3 292
valid_sources[0x52] 377793 1 T1 218 T2 7 T3 293
valid_sources[0x53] 387838 1 T1 191 T3 287 T5 3
valid_sources[0x54] 347036 1 T1 203 T3 297 T5 3
valid_sources[0x55] 360216 1 T1 206 T2 6 T3 304
valid_sources[0x56] 359189 1 T1 216 T3 268 T5 5
valid_sources[0x57] 372673 1 T1 193 T2 7 T3 363
valid_sources[0x58] 384283 1 T1 228 T2 6 T3 317
valid_sources[0x59] 366640 1 T1 181 T2 3 T3 318
valid_sources[0x5a] 383220 1 T1 239 T2 7 T3 253
valid_sources[0x5b] 373854 1 T1 188 T2 10 T3 263
valid_sources[0x5c] 386608 1 T1 222 T2 9 T3 234
valid_sources[0x5d] 561580 1 T1 204 T2 7 T3 312
valid_sources[0x5e] 397254 1 T1 236 T2 3 T3 352
valid_sources[0x5f] 399847 1 T1 222 T2 1 T3 256
valid_sources[0x60] 372791 1 T1 224 T3 251 T4 50
valid_sources[0x61] 391083 1 T1 229 T3 257 T5 3
valid_sources[0x62] 376771 1 T1 193 T3 282 T5 3
valid_sources[0x63] 372213 1 T1 218 T2 10 T3 302
valid_sources[0x64] 377208 1 T1 234 T2 5 T3 228
valid_sources[0x65] 398450 1 T1 206 T3 273 T5 4
valid_sources[0x66] 408018 1 T1 223 T2 6 T3 253
valid_sources[0x67] 366546 1 T1 193 T2 18 T3 338
valid_sources[0x68] 372348 1 T1 200 T2 11 T3 272
valid_sources[0x69] 398912 1 T1 203 T2 3 T3 366
valid_sources[0x6a] 361093 1 T1 213 T2 15 T3 272
valid_sources[0x6b] 367394 1 T1 187 T2 4 T3 320
valid_sources[0x6c] 409951 1 T1 201 T2 20 T3 297
valid_sources[0x6d] 378643 1 T1 210 T2 5 T3 242
valid_sources[0x6e] 380138 1 T1 213 T2 9 T3 243
valid_sources[0x6f] 354368 1 T1 174 T2 6 T3 259
valid_sources[0x70] 429936 1 T1 237 T2 6 T3 320
valid_sources[0x71] 362726 1 T1 205 T2 19 T3 343
valid_sources[0x72] 361884 1 T1 193 T3 291 T4 37
valid_sources[0x73] 389243 1 T1 192 T2 1 T3 374
valid_sources[0x74] 394482 1 T1 228 T3 288 T5 3
valid_sources[0x75] 403941 1 T1 191 T2 4 T3 264
valid_sources[0x76] 397940 1 T1 204 T2 15 T3 280
valid_sources[0x77] 378982 1 T1 205 T2 17 T3 274
valid_sources[0x78] 379359 1 T1 191 T3 294 T5 4
valid_sources[0x79] 368358 1 T1 182 T2 1 T3 246
valid_sources[0x7a] 627462 1 T1 216 T2 1 T3 322
valid_sources[0x7b] 392274 1 T1 220 T2 7 T3 344
valid_sources[0x7c] 363631 1 T1 228 T3 272 T4 17
valid_sources[0x7d] 375620 1 T1 223 T2 8 T3 231
valid_sources[0x7e] 373472 1 T1 211 T2 35 T3 328
valid_sources[0x7f] 361156 1 T1 228 T2 21 T3 294
valid_sources[0x80] 361592 1 T1 233 T2 12 T3 256



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 19630933 1 T1 610 T2 5 T4 66
values[0x0] all_enables biggest_size 4125366 1 T1 177 T2 2 T3 21
values[0x1] all_enables biggest_size 4070485 1 T1 110 T2 1 T3 21

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%