Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	68214191	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

20482414

1

T1

81

T2

52

T3

266

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	82156158	1			T1	188		T2	47		T3	404
values[0x0]	3100772	1			T1	30		T2	31		T3	113
values[0x1]	3439675	1			T1	39		T2	44		T3	129

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46915848	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

41780757

1

T1

122

T2

59

T3

345

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	337730	1			T1	3		T2	1		T4	2214
valid_sources[0x01]	382559	1			T1	1		T4	2280		T6	2
valid_sources[0x02]	362899	1			T4	2165		T6	3		T7	41
valid_sources[0x03]	365966	1			T1	1		T4	2184		T6	15
valid_sources[0x04]	336052	1			T1	2		T2	3		T3	646
valid_sources[0x05]	368097	1			T4	2260		T6	3		T7	24
valid_sources[0x06]	431937	1			T4	2298		T6	15		T7	27
valid_sources[0x07]	329277	1			T1	1		T2	3		T4	2312
valid_sources[0x08]	325481	1			T4	2263		T6	3		T7	31
valid_sources[0x09]	326658	1			T1	3		T4	2198		T6	3
valid_sources[0x0a]	337877	1			T1	2		T4	2278		T5	45
valid_sources[0x0b]	351165	1			T1	1		T4	2114		T6	2
valid_sources[0x0c]	322554	1			T1	2		T4	2234		T7	41
valid_sources[0x0d]	324451	1			T2	1		T4	2147		T7	41
valid_sources[0x0e]	314414	1			T1	1		T4	2180		T7	41
valid_sources[0x0f]	312787	1			T1	2		T4	2225		T6	8
valid_sources[0x10]	321626	1			T1	1		T4	2167		T6	16
valid_sources[0x11]	425864	1			T1	1		T2	2		T4	2337
valid_sources[0x12]	333905	1			T4	2138		T6	7		T7	22
valid_sources[0x13]	355257	1			T1	1		T2	2		T4	2195
valid_sources[0x14]	328900	1			T4	2172		T6	11		T7	30
valid_sources[0x15]	356776	1			T4	2312		T6	1		T7	25
valid_sources[0x16]	335693	1			T1	2		T2	2		T4	2093
valid_sources[0x17]	314056	1			T4	2141		T6	4		T7	35
valid_sources[0x18]	385588	1			T4	2223		T6	5		T7	41
valid_sources[0x19]	344952	1			T4	2157		T6	28		T7	29
valid_sources[0x1a]	329055	1			T4	2153		T6	10		T7	40
valid_sources[0x1b]	321414	1			T2	4		T4	2271		T6	25
valid_sources[0x1c]	337052	1			T1	2		T4	2235		T6	8
valid_sources[0x1d]	330358	1			T1	1		T4	2217		T6	5
valid_sources[0x1e]	339488	1			T4	2093		T7	29		T8	171
valid_sources[0x1f]	323848	1			T1	1		T4	2203		T6	4
valid_sources[0x20]	347348	1			T1	2		T2	1		T4	2220
valid_sources[0x21]	326149	1			T4	2258		T7	31		T8	157
valid_sources[0x22]	328187	1			T4	2254		T7	19		T8	167
valid_sources[0x23]	321510	1			T4	2179		T6	11		T7	46
valid_sources[0x24]	420216	1			T1	2		T4	2191		T6	9
valid_sources[0x25]	322257	1			T4	2241		T6	3		T7	31
valid_sources[0x26]	416178	1			T1	1		T4	2204		T6	16
valid_sources[0x27]	337384	1			T1	1		T4	2178		T6	2
valid_sources[0x28]	318829	1			T4	2196		T6	3		T7	36
valid_sources[0x29]	333646	1			T4	2309		T6	9		T7	23
valid_sources[0x2a]	318001	1			T1	1		T4	2177		T6	4
valid_sources[0x2b]	344136	1			T4	2204		T6	19		T7	36
valid_sources[0x2c]	339380	1			T4	2229		T6	9		T7	38
valid_sources[0x2d]	323449	1			T4	2232		T6	3		T7	35
valid_sources[0x2e]	331799	1			T4	2367		T6	3		T7	42
valid_sources[0x2f]	347162	1			T1	4		T2	1		T4	2294
valid_sources[0x30]	326191	1			T4	2214		T6	3		T7	37
valid_sources[0x31]	322860	1			T1	1		T4	2302		T6	1
valid_sources[0x32]	380320	1			T4	2185		T6	9		T7	34
valid_sources[0x33]	332382	1			T4	2315		T6	2		T7	23
valid_sources[0x34]	338019	1			T1	1		T4	2199		T6	12
valid_sources[0x35]	327140	1			T2	2		T4	2265		T6	7
valid_sources[0x36]	337294	1			T1	1		T2	1		T4	2235
valid_sources[0x37]	340532	1			T4	2282		T6	5		T7	40
valid_sources[0x38]	349817	1			T2	1		T4	2298		T6	12
valid_sources[0x39]	401144	1			T1	2		T4	2167		T6	2
valid_sources[0x3a]	315544	1			T1	1		T4	2146		T6	1
valid_sources[0x3b]	406154	1			T4	2367		T6	11		T7	29
valid_sources[0x3c]	356508	1			T4	2131		T6	2		T7	38
valid_sources[0x3d]	327493	1			T1	1		T4	2201		T6	7
valid_sources[0x3e]	347132	1			T1	3		T2	2		T4	2160
valid_sources[0x3f]	343774	1			T4	2245		T7	42		T8	183
valid_sources[0x40]	327840	1			T1	1		T2	1		T4	2249
valid_sources[0x41]	362420	1			T2	2		T4	2233		T6	10
valid_sources[0x42]	333501	1			T1	1		T4	2207		T6	4
valid_sources[0x43]	338302	1			T1	1		T2	1		T4	2172
valid_sources[0x44]	346321	1			T1	1		T4	2181		T6	2
valid_sources[0x45]	333552	1			T4	2211		T6	1		T7	29
valid_sources[0x46]	322002	1			T1	1		T4	2291		T6	6
valid_sources[0x47]	359878	1			T4	2282		T6	3		T7	36
valid_sources[0x48]	318261	1			T1	1		T4	2295		T6	2
valid_sources[0x49]	399702	1			T1	3		T4	2142		T6	2
valid_sources[0x4a]	342428	1			T1	1		T4	2303		T6	2
valid_sources[0x4b]	331003	1			T2	1		T4	2182		T6	5
valid_sources[0x4c]	322181	1			T4	2231		T6	15		T7	21
valid_sources[0x4d]	324849	1			T1	1		T4	2242		T6	1
valid_sources[0x4e]	357714	1			T4	2185		T6	3		T7	33
valid_sources[0x4f]	327985	1			T1	1		T4	2189		T6	1
valid_sources[0x50]	339067	1			T2	1		T4	2237		T6	8
valid_sources[0x51]	329722	1			T4	2128		T6	4		T7	37
valid_sources[0x52]	339922	1			T1	1		T4	2195		T6	27
valid_sources[0x53]	333138	1			T1	1		T2	2		T4	2225
valid_sources[0x54]	316286	1			T1	1		T4	2168		T6	9
valid_sources[0x55]	389925	1			T1	1		T2	1		T4	2217
valid_sources[0x56]	327916	1			T4	2268		T6	8		T7	37
valid_sources[0x57]	361510	1			T1	2		T4	2233		T6	4
valid_sources[0x58]	332548	1			T1	2		T4	2211		T6	17
valid_sources[0x59]	329814	1			T1	1		T4	2231		T7	32
valid_sources[0x5a]	331823	1			T1	2		T4	2232		T7	31
valid_sources[0x5b]	315703	1			T4	2200		T7	22		T8	168
valid_sources[0x5c]	338440	1			T1	2		T4	2147		T6	6
valid_sources[0x5d]	398303	1			T2	2		T4	2288		T6	8
valid_sources[0x5e]	361640	1			T1	2		T4	2184		T7	39
valid_sources[0x5f]	319118	1			T1	2		T4	2245		T6	7
valid_sources[0x60]	381128	1			T4	2141		T6	2		T7	29
valid_sources[0x61]	316799	1			T4	2221		T6	8		T7	39
valid_sources[0x62]	322754	1			T1	3		T4	2165		T7	31
valid_sources[0x63]	336619	1			T1	1		T4	2120		T6	7
valid_sources[0x64]	371260	1			T1	1		T4	2266		T6	19
valid_sources[0x65]	348333	1			T4	2284		T7	27		T8	161
valid_sources[0x66]	343635	1			T1	1		T2	1		T4	2125
valid_sources[0x67]	343795	1			T1	1		T2	1		T4	2130
valid_sources[0x68]	330361	1			T4	2097		T7	37		T8	153
valid_sources[0x69]	392863	1			T4	2140		T6	2		T7	44
valid_sources[0x6a]	346666	1			T1	2		T2	1		T4	2338
valid_sources[0x6b]	332289	1			T1	2		T2	2		T4	2335
valid_sources[0x6c]	445870	1			T1	3		T4	2156		T6	4
valid_sources[0x6d]	327801	1			T1	2		T4	2158		T6	5
valid_sources[0x6e]	326859	1			T1	3		T4	2174		T6	2
valid_sources[0x6f]	319299	1			T4	2263		T6	9		T7	32
valid_sources[0x70]	329250	1			T4	2164		T7	24		T8	175
valid_sources[0x71]	346522	1			T1	1		T4	2151		T6	2
valid_sources[0x72]	313748	1			T1	1		T4	2304		T6	18
valid_sources[0x73]	350031	1			T1	2		T4	2146		T6	6
valid_sources[0x74]	328615	1			T4	2171		T7	38		T8	194
valid_sources[0x75]	311895	1			T1	1		T4	2286		T6	15
valid_sources[0x76]	379835	1			T4	2271		T7	34		T8	151
valid_sources[0x77]	324347	1			T1	2		T4	2266		T6	5
valid_sources[0x78]	343124	1			T4	2263		T6	10		T7	29
valid_sources[0x79]	328068	1			T4	2306		T6	9		T7	31
valid_sources[0x7a]	343472	1			T1	2		T4	2181		T7	29
valid_sources[0x7b]	435529	1			T4	2321		T6	8		T7	24
valid_sources[0x7c]	367819	1			T4	2210		T6	3		T7	32
valid_sources[0x7d]	324282	1			T2	1		T4	2261		T6	4
valid_sources[0x7e]	366917	1			T1	1		T4	2174		T6	3
valid_sources[0x7f]	315773	1			T1	1		T2	1		T4	2226
valid_sources[0x80]	363016	1			T1	1		T2	1		T4	2184

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

14784973

1

T1

54

T2

26

T3

186

values[0x0]

all_enables

biggest_size

2876751

1

T1

15

T2

15

T3

54

values[0x1]

all_enables

biggest_size

2820690

1

T1

12

T2

11

T3

26