Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 67027105 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 23246599 1 T1 83798 T2 88 T3 287182



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 83498162 1 T1 248133 T2 6802 T3 418846
values[0x0] 3207678 1 T1 686 T2 72 T3 74760
values[0x1] 3567864 1 T1 691 T2 86 T3 84119



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 46501386 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 43772318 1 T1 127577 T2 2317 T3 374501



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 475413 1 T1 971 T2 36 T3 2244
valid_sources[0x01] 391588 1 T1 1050 T2 40 T3 2249
valid_sources[0x02] 345782 1 T1 967 T2 30 T3 2265
valid_sources[0x03] 328872 1 T1 1030 T2 51 T3 2348
valid_sources[0x04] 320027 1 T1 1069 T2 31 T3 2264
valid_sources[0x05] 327901 1 T1 990 T2 33 T3 2292
valid_sources[0x06] 337112 1 T1 983 T2 44 T3 2240
valid_sources[0x07] 333774 1 T1 1076 T2 21 T3 2347
valid_sources[0x08] 559516 1 T1 1042 T2 29 T3 2231
valid_sources[0x09] 372174 1 T1 963 T2 43 T3 2279
valid_sources[0x0a] 334403 1 T1 964 T2 37 T3 2148
valid_sources[0x0b] 339967 1 T1 1038 T2 30 T3 2228
valid_sources[0x0c] 342492 1 T1 1034 T2 33 T3 2336
valid_sources[0x0d] 367393 1 T1 907 T2 20 T3 2238
valid_sources[0x0e] 423731 1 T1 1007 T2 37 T3 2292
valid_sources[0x0f] 362350 1 T1 982 T2 24 T3 2232
valid_sources[0x10] 364113 1 T1 1018 T2 34 T3 2361
valid_sources[0x11] 335189 1 T1 971 T2 18 T3 2275
valid_sources[0x12] 348033 1 T1 942 T2 15 T3 2118
valid_sources[0x13] 341028 1 T1 966 T2 49 T3 2337
valid_sources[0x14] 340706 1 T1 997 T2 44 T3 2279
valid_sources[0x15] 316334 1 T1 1013 T2 30 T3 2252
valid_sources[0x16] 341637 1 T1 930 T2 15 T3 2230
valid_sources[0x17] 345084 1 T1 848 T2 37 T3 2273
valid_sources[0x18] 331776 1 T1 980 T2 34 T3 2405
valid_sources[0x19] 347418 1 T1 980 T2 28 T3 2267
valid_sources[0x1a] 335867 1 T1 940 T2 26 T3 2275
valid_sources[0x1b] 345502 1 T1 941 T2 22 T3 2108
valid_sources[0x1c] 342145 1 T1 920 T2 26 T3 2223
valid_sources[0x1d] 372304 1 T1 1004 T2 22 T3 2237
valid_sources[0x1e] 321942 1 T1 971 T2 33 T3 2195
valid_sources[0x1f] 358117 1 T1 906 T2 30 T3 2223
valid_sources[0x20] 334448 1 T1 952 T2 42 T3 2220
valid_sources[0x21] 346859 1 T1 996 T2 25 T3 2138
valid_sources[0x22] 347296 1 T1 1018 T2 29 T3 2242
valid_sources[0x23] 351261 1 T1 947 T2 21 T3 2262
valid_sources[0x24] 368062 1 T1 1037 T2 19 T3 2252
valid_sources[0x25] 329158 1 T1 947 T2 35 T3 2184
valid_sources[0x26] 331528 1 T1 922 T2 32 T3 2312
valid_sources[0x27] 341727 1 T1 989 T2 12 T3 2208
valid_sources[0x28] 358789 1 T1 909 T2 22 T3 2167
valid_sources[0x29] 333436 1 T1 933 T2 20 T3 2321
valid_sources[0x2a] 350187 1 T1 965 T2 31 T3 2264
valid_sources[0x2b] 331317 1 T1 935 T2 10 T3 2304
valid_sources[0x2c] 351920 1 T1 1066 T2 25 T3 2285
valid_sources[0x2d] 323240 1 T1 1028 T2 48 T3 2390
valid_sources[0x2e] 327717 1 T1 994 T2 28 T3 2284
valid_sources[0x2f] 332083 1 T1 869 T2 33 T3 2157
valid_sources[0x30] 334625 1 T1 970 T2 12 T3 2303
valid_sources[0x31] 337403 1 T1 1019 T2 16 T3 2289
valid_sources[0x32] 350889 1 T1 1027 T2 13 T3 2172
valid_sources[0x33] 352341 1 T1 989 T2 11 T3 2271
valid_sources[0x34] 330975 1 T1 863 T2 16 T3 2215
valid_sources[0x35] 347874 1 T1 1021 T2 25 T3 2173
valid_sources[0x36] 332891 1 T1 1031 T2 47 T3 2289
valid_sources[0x37] 336490 1 T1 964 T2 38 T3 2215
valid_sources[0x38] 334702 1 T1 939 T2 19 T3 2259
valid_sources[0x39] 340017 1 T1 914 T2 38 T3 2167
valid_sources[0x3a] 347537 1 T1 1050 T2 34 T3 2333
valid_sources[0x3b] 353314 1 T1 985 T2 14 T3 2229
valid_sources[0x3c] 328398 1 T1 1001 T2 56 T3 2327
valid_sources[0x3d] 355451 1 T1 931 T2 23 T3 2344
valid_sources[0x3e] 340540 1 T1 869 T2 22 T3 2203
valid_sources[0x3f] 357051 1 T1 929 T2 30 T3 2082
valid_sources[0x40] 433549 1 T1 994 T2 28 T3 2142
valid_sources[0x41] 337890 1 T1 929 T2 35 T3 2104
valid_sources[0x42] 340545 1 T1 877 T2 34 T3 2227
valid_sources[0x43] 342018 1 T1 1009 T2 23 T3 2239
valid_sources[0x44] 332592 1 T1 979 T2 36 T3 2155
valid_sources[0x45] 374928 1 T1 981 T2 17 T3 2257
valid_sources[0x46] 332628 1 T1 1011 T2 21 T3 2152
valid_sources[0x47] 335714 1 T1 995 T2 18 T3 2199
valid_sources[0x48] 334040 1 T1 985 T2 36 T3 2311
valid_sources[0x49] 335497 1 T1 953 T2 45 T3 2318
valid_sources[0x4a] 315531 1 T1 979 T2 32 T3 2308
valid_sources[0x4b] 321361 1 T1 945 T2 20 T3 2194
valid_sources[0x4c] 332255 1 T1 962 T2 35 T3 2231
valid_sources[0x4d] 353378 1 T1 958 T2 27 T3 2154
valid_sources[0x4e] 326788 1 T1 968 T2 20 T3 2307
valid_sources[0x4f] 331958 1 T1 1038 T2 19 T3 2144
valid_sources[0x50] 344870 1 T1 985 T2 33 T3 2276
valid_sources[0x51] 351204 1 T1 948 T2 44 T3 2140
valid_sources[0x52] 360969 1 T1 1001 T2 16 T3 2246
valid_sources[0x53] 343994 1 T1 938 T2 19 T3 2235
valid_sources[0x54] 338377 1 T1 922 T2 31 T3 2417
valid_sources[0x55] 331547 1 T1 1090 T2 23 T3 2391
valid_sources[0x56] 378475 1 T1 1029 T2 19 T3 2418
valid_sources[0x57] 334118 1 T1 890 T2 24 T3 2309
valid_sources[0x58] 332182 1 T1 1005 T2 15 T3 2213
valid_sources[0x59] 340902 1 T1 1062 T2 7 T3 2167
valid_sources[0x5a] 324799 1 T1 957 T2 23 T3 2335
valid_sources[0x5b] 319157 1 T1 956 T2 25 T3 2168
valid_sources[0x5c] 341894 1 T1 989 T2 14 T3 2387
valid_sources[0x5d] 341103 1 T1 965 T2 14 T3 2211
valid_sources[0x5e] 352230 1 T1 980 T2 39 T3 2353
valid_sources[0x5f] 333636 1 T1 1006 T2 24 T3 2326
valid_sources[0x60] 363414 1 T1 969 T2 12 T3 2315
valid_sources[0x61] 331726 1 T1 1003 T2 45 T3 2368
valid_sources[0x62] 345922 1 T1 941 T2 18 T3 2212
valid_sources[0x63] 343853 1 T1 989 T2 30 T3 2202
valid_sources[0x64] 328512 1 T1 962 T2 23 T3 2375
valid_sources[0x65] 347768 1 T1 1040 T2 23 T3 2279
valid_sources[0x66] 330703 1 T1 994 T2 24 T3 2228
valid_sources[0x67] 350743 1 T1 945 T2 25 T3 2227
valid_sources[0x68] 350477 1 T1 966 T2 54 T3 2265
valid_sources[0x69] 341369 1 T1 1027 T2 23 T3 2385
valid_sources[0x6a] 329764 1 T1 969 T2 23 T3 2240
valid_sources[0x6b] 323135 1 T1 941 T2 9 T3 2235
valid_sources[0x6c] 488411 1 T1 875 T2 30 T3 2229
valid_sources[0x6d] 358553 1 T1 998 T2 22 T3 2289
valid_sources[0x6e] 354383 1 T1 910 T2 22 T3 2284
valid_sources[0x6f] 351222 1 T1 932 T2 46 T3 2115
valid_sources[0x70] 336298 1 T1 969 T2 9 T3 2173
valid_sources[0x71] 387452 1 T1 829 T2 26 T3 2325
valid_sources[0x72] 337971 1 T1 1012 T2 19 T3 2354
valid_sources[0x73] 322906 1 T1 927 T2 49 T3 2289
valid_sources[0x74] 390297 1 T1 952 T2 23 T3 2193
valid_sources[0x75] 338868 1 T1 984 T2 37 T3 2317
valid_sources[0x76] 325863 1 T1 923 T2 24 T3 2265
valid_sources[0x77] 355301 1 T1 973 T2 17 T3 2206
valid_sources[0x78] 345245 1 T1 1034 T2 19 T3 2400
valid_sources[0x79] 333545 1 T1 953 T2 17 T3 2307
valid_sources[0x7a] 329121 1 T1 946 T2 32 T3 2242
valid_sources[0x7b] 318461 1 T1 964 T2 21 T3 2246
valid_sources[0x7c] 336279 1 T1 1024 T2 37 T3 2288
valid_sources[0x7d] 344864 1 T1 1005 T2 26 T3 2178
valid_sources[0x7e] 333712 1 T1 1001 T2 29 T3 2216
valid_sources[0x7f] 396809 1 T1 1006 T2 15 T3 2209
valid_sources[0x80] 342458 1 T1 949 T2 43 T3 2245



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 17339684 1 T1 83331 T2 44 T3 141940
values[0x0] all_enables biggest_size 2982069 1 T1 287 T2 25 T3 72791
values[0x1] all_enables biggest_size 2924846 1 T1 180 T2 19 T3 72451

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%