Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	69464085	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

23443114

1

T1

674

T2

159

T3

354

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	86058958	1			T1	7042		T2	28424		T3	7474
values[0x0]	3244868	1			T1	257		T2	132		T3	118
values[0x1]	3603373	1			T1	256		T2	143		T3	114

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48101125	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

44806074

1

T1

2882

T2

9701

T3

2717

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	348278	1			T1	46		T2	134		T3	36
valid_sources[0x01]	405916	1			T1	29		T2	118		T3	22
valid_sources[0x02]	335969	1			T1	22		T2	106		T3	33
valid_sources[0x03]	344584	1			T1	31		T2	102		T3	26
valid_sources[0x04]	358166	1			T1	21		T2	117		T3	20
valid_sources[0x05]	353652	1			T1	27		T2	131		T3	15
valid_sources[0x06]	410848	1			T1	43		T2	88		T3	22
valid_sources[0x07]	339533	1			T1	29		T2	107		T3	38
valid_sources[0x08]	401431	1			T1	38		T2	91		T3	37
valid_sources[0x09]	353232	1			T1	25		T2	120		T3	24
valid_sources[0x0a]	413037	1			T1	29		T2	83		T3	22
valid_sources[0x0b]	359900	1			T1	54		T2	114		T3	33
valid_sources[0x0c]	374194	1			T1	28		T2	129		T3	18
valid_sources[0x0d]	340996	1			T1	39		T2	104		T3	29
valid_sources[0x0e]	372270	1			T1	23		T2	150		T3	39
valid_sources[0x0f]	344322	1			T1	12		T2	137		T3	32
valid_sources[0x10]	411563	1			T1	17		T2	107		T3	32
valid_sources[0x11]	374040	1			T1	30		T2	136		T3	34
valid_sources[0x12]	364788	1			T1	25		T2	100		T3	18
valid_sources[0x13]	341949	1			T1	32		T2	97		T3	22
valid_sources[0x14]	362645	1			T1	29		T2	99		T3	25
valid_sources[0x15]	369094	1			T1	19		T2	127		T3	37
valid_sources[0x16]	355554	1			T1	34		T2	135		T3	32
valid_sources[0x17]	362265	1			T1	42		T2	138		T3	21
valid_sources[0x18]	361379	1			T1	33		T2	155		T3	25
valid_sources[0x19]	381719	1			T1	20		T2	100		T3	30
valid_sources[0x1a]	436409	1			T1	37		T2	79		T3	40
valid_sources[0x1b]	362169	1			T1	23		T2	111		T3	56
valid_sources[0x1c]	383517	1			T1	38		T2	106		T3	50
valid_sources[0x1d]	347651	1			T1	26		T2	101		T3	31
valid_sources[0x1e]	346971	1			T1	15		T2	90		T3	49
valid_sources[0x1f]	347383	1			T1	28		T2	103		T3	36
valid_sources[0x20]	363308	1			T1	42		T2	132		T3	22
valid_sources[0x21]	347689	1			T1	26		T2	136		T3	36
valid_sources[0x22]	353436	1			T1	14		T2	113		T3	33
valid_sources[0x23]	348411	1			T1	30		T2	129		T3	33
valid_sources[0x24]	369808	1			T1	32		T2	93		T3	25
valid_sources[0x25]	538841	1			T1	36		T2	97		T3	25
valid_sources[0x26]	358840	1			T1	54		T2	146		T3	36
valid_sources[0x27]	360664	1			T1	56		T2	77		T3	32
valid_sources[0x28]	410609	1			T1	21		T2	93		T3	25
valid_sources[0x29]	335497	1			T1	39		T2	132		T3	24
valid_sources[0x2a]	392845	1			T1	30		T2	97		T3	47
valid_sources[0x2b]	327489	1			T1	22		T2	136		T3	22
valid_sources[0x2c]	347561	1			T1	25		T2	88		T3	28
valid_sources[0x2d]	360461	1			T1	16		T2	116		T3	24
valid_sources[0x2e]	346931	1			T1	22		T2	119		T3	35
valid_sources[0x2f]	379466	1			T1	46		T2	115		T3	23
valid_sources[0x30]	507178	1			T1	24		T2	125		T3	32
valid_sources[0x31]	349091	1			T1	23		T2	122		T3	32
valid_sources[0x32]	338025	1			T1	21		T2	133		T3	33
valid_sources[0x33]	332691	1			T1	13		T2	134		T3	31
valid_sources[0x34]	337654	1			T1	16		T2	140		T3	34
valid_sources[0x35]	340609	1			T1	32		T2	93		T3	22
valid_sources[0x36]	331908	1			T1	35		T2	105		T3	24
valid_sources[0x37]	343084	1			T1	31		T2	107		T3	36
valid_sources[0x38]	373604	1			T1	27		T2	116		T3	20
valid_sources[0x39]	389373	1			T1	38		T2	115		T3	32
valid_sources[0x3a]	448018	1			T1	23		T2	97		T3	27
valid_sources[0x3b]	335713	1			T1	21		T2	127		T3	47
valid_sources[0x3c]	331730	1			T1	24		T2	118		T3	17
valid_sources[0x3d]	345182	1			T1	39		T2	113		T3	36
valid_sources[0x3e]	361978	1			T1	14		T2	109		T3	27
valid_sources[0x3f]	354970	1			T1	16		T2	102		T3	32
valid_sources[0x40]	337581	1			T1	26		T2	137		T3	23
valid_sources[0x41]	348391	1			T1	17		T2	122		T3	32
valid_sources[0x42]	376082	1			T1	34		T2	121		T3	18
valid_sources[0x43]	356735	1			T1	33		T2	115		T3	31
valid_sources[0x44]	395832	1			T1	36		T2	122		T3	30
valid_sources[0x45]	367610	1			T1	26		T2	104		T3	21
valid_sources[0x46]	364984	1			T1	36		T2	91		T3	37
valid_sources[0x47]	348206	1			T1	29		T2	110		T3	22
valid_sources[0x48]	350362	1			T1	31		T2	126		T3	34
valid_sources[0x49]	354488	1			T1	40		T2	93		T3	39
valid_sources[0x4a]	340940	1			T1	41		T2	102		T3	31
valid_sources[0x4b]	397483	1			T1	17		T2	118		T3	35
valid_sources[0x4c]	333501	1			T1	25		T2	90		T3	38
valid_sources[0x4d]	345129	1			T1	34		T2	100		T3	29
valid_sources[0x4e]	354515	1			T1	35		T2	106		T3	25
valid_sources[0x4f]	362905	1			T1	11		T2	101		T3	28
valid_sources[0x50]	359727	1			T1	26		T2	159		T3	24
valid_sources[0x51]	380916	1			T1	37		T2	116		T3	32
valid_sources[0x52]	376872	1			T1	32		T2	99		T3	20
valid_sources[0x53]	329850	1			T1	20		T2	116		T3	30
valid_sources[0x54]	354837	1			T1	26		T2	114		T3	47
valid_sources[0x55]	362114	1			T1	34		T2	115		T3	39
valid_sources[0x56]	331052	1			T1	28		T2	122		T3	25
valid_sources[0x57]	346109	1			T1	32		T2	112		T3	37
valid_sources[0x58]	364112	1			T1	18		T2	98		T3	20
valid_sources[0x59]	347999	1			T1	53		T2	124		T3	22
valid_sources[0x5a]	387088	1			T1	31		T2	95		T3	25
valid_sources[0x5b]	377752	1			T1	30		T2	125		T3	23
valid_sources[0x5c]	369032	1			T1	26		T2	103		T3	24
valid_sources[0x5d]	330481	1			T1	32		T2	116		T3	31
valid_sources[0x5e]	348230	1			T1	25		T2	165		T3	24
valid_sources[0x5f]	341197	1			T1	34		T2	93		T3	34
valid_sources[0x60]	323077	1			T1	36		T2	115		T3	31
valid_sources[0x61]	347025	1			T1	15		T2	105		T3	41
valid_sources[0x62]	380173	1			T1	13		T2	152		T3	26
valid_sources[0x63]	378771	1			T1	33		T2	128		T3	25
valid_sources[0x64]	353796	1			T1	29		T2	91		T3	23
valid_sources[0x65]	339813	1			T1	26		T2	149		T3	33
valid_sources[0x66]	345493	1			T1	23		T2	118		T3	29
valid_sources[0x67]	346934	1			T1	37		T2	113		T3	24
valid_sources[0x68]	469868	1			T1	31		T2	128		T3	32
valid_sources[0x69]	353919	1			T1	27		T2	118		T3	36
valid_sources[0x6a]	397515	1			T1	23		T2	102		T3	38
valid_sources[0x6b]	337533	1			T1	27		T2	121		T3	32
valid_sources[0x6c]	351287	1			T1	24		T2	174		T3	30
valid_sources[0x6d]	335352	1			T1	38		T2	154		T3	21
valid_sources[0x6e]	354658	1			T1	37		T2	108		T3	33
valid_sources[0x6f]	352018	1			T1	29		T2	131		T3	35
valid_sources[0x70]	333910	1			T1	38		T2	91		T3	36
valid_sources[0x71]	349433	1			T1	18		T2	122		T3	30
valid_sources[0x72]	346415	1			T1	37		T2	100		T3	36
valid_sources[0x73]	366878	1			T1	28		T2	102		T3	11
valid_sources[0x74]	326459	1			T1	21		T2	124		T3	26
valid_sources[0x75]	340147	1			T1	35		T2	106		T3	28
valid_sources[0x76]	361569	1			T1	31		T2	122		T3	17
valid_sources[0x77]	362079	1			T1	23		T2	147		T3	31
valid_sources[0x78]	375225	1			T1	22		T2	106		T3	31
valid_sources[0x79]	363347	1			T1	31		T2	98		T3	43
valid_sources[0x7a]	347306	1			T1	25		T2	124		T3	29
valid_sources[0x7b]	366372	1			T1	28		T2	110		T3	33
valid_sources[0x7c]	347658	1			T1	36		T2	122		T3	31
valid_sources[0x7d]	360025	1			T1	40		T2	104		T3	52
valid_sources[0x7e]	358829	1			T1	19		T2	74		T3	20
valid_sources[0x7f]	348619	1			T1	17		T2	97		T3	28
valid_sources[0x80]	342480	1			T1	42		T2	101		T3	34

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

17463011

1

T1

503

T2

86

T3

263

values[0x0]

all_enables

biggest_size

3018308

1

T1

106

T2

51

T3

56

values[0x1]

all_enables

biggest_size

2961795

1

T1

65

T2

22

T3

35