Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	68307644	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

23430557

1

T1

185

T2

53397

T3

43

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	85078906	1			T1	1740		T2	796443		T3	31656
values[0x0]	3152120	1			T1	110		T2	2097		T3	26
values[0x1]	3507175	1			T1	105		T2	2165		T3	32

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	47338430	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

44399771

1

T1

715

T2

294969

T3

15904

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	353879	1			T1	3		T2	2508		T3	237
valid_sources[0x01]	380068	1			T1	12		T2	2019		T3	218
valid_sources[0x02]	330108	1			T1	2		T2	2553		T3	84
valid_sources[0x03]	326922	1			T1	1		T2	2988		T3	130
valid_sources[0x04]	347571	1			T1	10		T2	2899		T3	164
valid_sources[0x05]	310263	1			T1	12		T2	2199		T3	147
valid_sources[0x06]	385748	1			T1	5		T2	2380		T3	234
valid_sources[0x07]	345498	1			T1	7		T2	3291		T3	134
valid_sources[0x08]	397098	1			T1	17		T2	2533		T3	55
valid_sources[0x09]	357977	1			T1	9		T2	2766		T3	187
valid_sources[0x0a]	347649	1			T1	1		T2	2099		T3	105
valid_sources[0x0b]	333799	1			T1	2		T2	3325		T3	48
valid_sources[0x0c]	339028	1			T1	5		T2	2280		T3	112
valid_sources[0x0d]	353732	1			T1	6		T2	2588		T3	92
valid_sources[0x0e]	353412	1			T1	7		T2	2841		T3	163
valid_sources[0x0f]	402011	1			T1	9		T2	2441		T3	318
valid_sources[0x10]	326324	1			T1	6		T2	2403		T3	162
valid_sources[0x11]	337872	1			T1	12		T2	3205		T3	100
valid_sources[0x12]	371557	1			T1	5		T2	2689		T3	94
valid_sources[0x13]	529233	1			T1	19		T2	2495		T3	63
valid_sources[0x14]	321630	1			T1	11		T2	2297		T3	264
valid_sources[0x15]	330854	1			T1	16		T2	2614		T3	30
valid_sources[0x16]	350852	1			T1	6		T2	2393		T3	56
valid_sources[0x17]	323982	1			T1	9		T2	2123		T3	118
valid_sources[0x18]	339078	1			T1	4		T2	3179		T3	109
valid_sources[0x19]	344922	1			T1	7		T2	3101		T3	83
valid_sources[0x1a]	441079	1			T1	4		T2	2446		T3	91
valid_sources[0x1b]	424700	1			T1	7		T2	2650		T3	64
valid_sources[0x1c]	511806	1			T1	1		T2	2516		T3	119
valid_sources[0x1d]	337341	1			T1	10		T2	2738		T3	143
valid_sources[0x1e]	343226	1			T1	4		T2	2312		T3	63
valid_sources[0x1f]	366620	1			T1	7		T2	2891		T3	130
valid_sources[0x20]	350105	1			T1	5		T2	3083		T3	62
valid_sources[0x21]	497572	1			T1	5		T2	2325		T3	81
valid_sources[0x22]	348912	1			T1	16		T2	2650		T3	184
valid_sources[0x23]	353780	1			T1	12		T2	3037		T3	78
valid_sources[0x24]	320695	1			T1	4		T2	3584		T3	175
valid_sources[0x25]	337137	1			T1	6		T2	3295		T3	27
valid_sources[0x26]	336197	1			T1	2		T2	2462		T3	186
valid_sources[0x27]	365100	1			T1	4		T2	2899		T3	76
valid_sources[0x28]	320785	1			T1	3		T2	2278		T3	44
valid_sources[0x29]	335217	1			T1	13		T2	2268		T3	359
valid_sources[0x2a]	357849	1			T1	11		T2	2739		T3	115
valid_sources[0x2b]	308921	1			T1	5		T2	2427		T3	188
valid_sources[0x2c]	362404	1			T1	12		T2	2912		T3	135
valid_sources[0x2d]	334045	1			T1	11		T2	3190		T3	51
valid_sources[0x2e]	372858	1			T1	10		T2	59302		T3	54
valid_sources[0x2f]	327385	1			T1	7		T2	2950		T3	92
valid_sources[0x30]	326326	1			T1	9		T2	3300		T3	171
valid_sources[0x31]	309974	1			T1	11		T2	2133		T3	145
valid_sources[0x32]	331376	1			T1	11		T2	3130		T3	76
valid_sources[0x33]	332737	1			T1	14		T2	2783		T3	127
valid_sources[0x34]	405170	1			T1	9		T2	2244		T3	36
valid_sources[0x35]	343847	1			T1	18		T2	3009		T3	176
valid_sources[0x36]	618979	1			T1	8		T2	2719		T3	129
valid_sources[0x37]	398265	1			T1	8		T2	2980		T3	126
valid_sources[0x38]	347752	1			T1	8		T2	2909		T3	137
valid_sources[0x39]	343254	1			T1	10		T2	2544		T3	172
valid_sources[0x3a]	347529	1			T1	12		T2	2587		T3	69
valid_sources[0x3b]	352805	1			T1	7		T2	2236		T3	84
valid_sources[0x3c]	466853	1			T1	3		T2	3260		T3	77
valid_sources[0x3d]	339630	1			T1	4		T2	2212		T3	225
valid_sources[0x3e]	324104	1			T1	6		T2	2804		T3	56
valid_sources[0x3f]	404230	1			T1	2		T2	2043		T3	110
valid_sources[0x40]	374206	1			T1	15		T2	2119		T3	262
valid_sources[0x41]	335401	1			T1	8		T2	2193		T3	43
valid_sources[0x42]	330759	1			T1	4		T2	2070		T3	158
valid_sources[0x43]	333499	1			T1	16		T2	3065		T3	109
valid_sources[0x44]	382970	1			T1	15		T2	2622		T3	139
valid_sources[0x45]	343741	1			T1	8		T2	1908		T3	180
valid_sources[0x46]	355684	1			T1	6		T2	3200		T3	184
valid_sources[0x47]	383081	1			T1	5		T2	2652		T3	168
valid_sources[0x48]	327760	1			T1	9		T2	2061		T3	99
valid_sources[0x49]	311390	1			T1	9		T2	3235		T3	84
valid_sources[0x4a]	324106	1			T1	4		T2	2332		T3	151
valid_sources[0x4b]	329843	1			T1	9		T2	2624		T3	165
valid_sources[0x4c]	356663	1			T1	5		T2	2509		T3	154
valid_sources[0x4d]	340644	1			T1	3		T2	3045		T3	222
valid_sources[0x4e]	357765	1			T1	9		T2	3508		T3	58
valid_sources[0x4f]	339247	1			T1	6		T2	2278		T3	136
valid_sources[0x50]	349316	1			T1	2		T2	2219		T3	93
valid_sources[0x51]	334902	1			T1	18		T2	3311		T3	110
valid_sources[0x52]	331431	1			T1	6		T2	2827		T3	65
valid_sources[0x53]	337920	1			T1	10		T2	3326		T3	63
valid_sources[0x54]	314424	1			T1	10		T2	2343		T3	61
valid_sources[0x55]	329852	1			T1	5		T2	2511		T3	86
valid_sources[0x56]	355730	1			T1	3		T2	18167		T3	168
valid_sources[0x57]	343020	1			T1	5		T2	2877		T3	172
valid_sources[0x58]	405511	1			T1	3		T2	48441		T3	234
valid_sources[0x59]	389986	1			T1	3		T2	2918		T3	150
valid_sources[0x5a]	339535	1			T1	9		T2	2948		T3	161
valid_sources[0x5b]	335755	1			T1	3		T2	2041		T3	189
valid_sources[0x5c]	331063	1			T1	6		T2	2825		T3	67
valid_sources[0x5d]	359353	1			T2	2278		T3	65		T5	730
valid_sources[0x5e]	325123	1			T1	9		T2	2590		T3	89
valid_sources[0x5f]	367510	1			T1	16		T2	2451		T3	251
valid_sources[0x60]	351645	1			T1	6		T2	2275		T3	205
valid_sources[0x61]	344626	1			T1	5		T2	2935		T3	161
valid_sources[0x62]	358349	1			T1	10		T2	3066		T3	191
valid_sources[0x63]	315151	1			T1	6		T2	2698		T3	43
valid_sources[0x64]	313593	1			T1	6		T2	2445		T3	116
valid_sources[0x65]	319268	1			T1	8		T2	2169		T3	262
valid_sources[0x66]	356089	1			T1	7		T2	2396		T3	150
valid_sources[0x67]	351972	1			T1	7		T2	2590		T3	120
valid_sources[0x68]	323868	1			T1	1		T2	2923		T3	180
valid_sources[0x69]	337048	1			T1	14		T2	2445		T3	71
valid_sources[0x6a]	380648	1			T1	8		T2	2533		T3	210
valid_sources[0x6b]	450623	1			T1	20		T2	3300		T3	188
valid_sources[0x6c]	404902	1			T1	2		T2	2271		T3	292
valid_sources[0x6d]	357122	1			T1	2		T2	2179		T3	137
valid_sources[0x6e]	322916	1			T1	5		T2	2348		T3	207
valid_sources[0x6f]	345532	1			T1	3		T2	1847		T3	210
valid_sources[0x70]	351901	1			T1	10		T2	2351		T3	129
valid_sources[0x71]	342102	1			T1	2		T2	2362		T3	210
valid_sources[0x72]	347040	1			T1	17		T2	3426		T3	80
valid_sources[0x73]	531828	1			T1	15		T2	2300		T3	176
valid_sources[0x74]	374332	1			T1	12		T2	2289		T3	76
valid_sources[0x75]	343045	1			T1	1		T2	2708		T3	195
valid_sources[0x76]	411491	1			T1	5		T2	3211		T3	72
valid_sources[0x77]	482924	1			T1	8		T2	3207		T3	177
valid_sources[0x78]	402149	1			T1	6		T2	2351		T3	67
valid_sources[0x79]	336703	1			T1	2		T2	2525		T3	112
valid_sources[0x7a]	351742	1			T1	4		T2	2660		T3	85
valid_sources[0x7b]	466368	1			T1	7		T2	2963		T3	63
valid_sources[0x7c]	344656	1			T1	8		T2	2853		T3	43
valid_sources[0x7d]	329140	1			T1	2		T2	2174		T3	73
valid_sources[0x7e]	326215	1			T1	10		T2	3093		T3	226
valid_sources[0x7f]	343798	1			T1	5		T2	2326		T3	82
valid_sources[0x80]	326524	1			T1	5		T2	2612		T3	99

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

17631379

1

T1

117

T2

52306

T4

3

values[0x0]

all_enables

biggest_size

2926831

1

T1

50

T2

705

T3

20

values[0x1]

all_enables

biggest_size

2872347

1

T1

18

T2

386

T3

23