Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	73188448	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

25492458

1

T1

14

T2

339587

T3

8

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	91973899	1			T1	816		T2	689750		T3	17686
values[0x0]	3175041	1			T1	6		T2	828		T3	6
values[0x1]	3531966	1			T1	7		T2	854		T3	7

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	50882308	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

47798598

1

T1

257

T2

411619

T3

5935

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	353440	1			T1	4		T2	2647		T3	59
valid_sources[0x01]	460914	1			T1	2		T2	2688		T3	74
valid_sources[0x02]	356671	1			T1	2		T2	2683		T3	77
valid_sources[0x03]	383131	1			T1	1		T2	2613		T3	66
valid_sources[0x04]	356086	1			T1	6		T2	2832		T3	76
valid_sources[0x05]	362357	1			T1	6		T2	2595		T3	69
valid_sources[0x06]	499633	1			T1	4		T2	2747		T3	60
valid_sources[0x07]	387421	1			T1	5		T2	2613		T3	73
valid_sources[0x08]	400142	1			T1	4		T2	2749		T3	75
valid_sources[0x09]	402033	1			T1	2		T2	2712		T3	59
valid_sources[0x0a]	364240	1			T1	5		T2	2646		T3	67
valid_sources[0x0b]	376465	1			T1	3		T2	2738		T3	67
valid_sources[0x0c]	364463	1			T1	5		T2	2608		T3	69
valid_sources[0x0d]	379036	1			T1	3		T2	2715		T3	75
valid_sources[0x0e]	362814	1			T1	6		T2	2637		T3	73
valid_sources[0x0f]	422244	1			T1	2		T2	2883		T3	72
valid_sources[0x10]	380293	1			T1	2		T2	2883		T3	63
valid_sources[0x11]	473054	1			T1	2		T2	2722		T3	79
valid_sources[0x12]	344333	1			T1	3		T2	2579		T3	77
valid_sources[0x13]	400544	1			T1	3		T2	2764		T3	81
valid_sources[0x14]	373829	1			T1	1		T2	2704		T3	60
valid_sources[0x15]	384792	1			T1	4		T2	2866		T3	77
valid_sources[0x16]	390789	1			T1	4		T2	2658		T3	68
valid_sources[0x17]	386226	1			T1	1		T2	2652		T3	73
valid_sources[0x18]	370900	1			T1	4		T2	2690		T3	69
valid_sources[0x19]	366432	1			T1	2		T2	2533		T3	72
valid_sources[0x1a]	416233	1			T1	6		T2	2704		T3	74
valid_sources[0x1b]	378514	1			T1	1		T2	2816		T3	60
valid_sources[0x1c]	359608	1			T1	6		T2	2799		T3	68
valid_sources[0x1d]	423231	1			T1	2		T2	2722		T3	63
valid_sources[0x1e]	362763	1			T1	3		T2	2829		T3	73
valid_sources[0x1f]	370258	1			T1	4		T2	2759		T3	64
valid_sources[0x20]	363415	1			T1	2		T2	2804		T3	85
valid_sources[0x21]	365694	1			T1	9		T2	2661		T3	70
valid_sources[0x22]	374045	1			T1	5		T2	2685		T3	72
valid_sources[0x23]	390663	1			T1	4		T2	2680		T3	81
valid_sources[0x24]	361669	1			T1	4		T2	2646		T3	69
valid_sources[0x25]	353300	1			T1	3		T2	2761		T3	72
valid_sources[0x26]	429830	1			T1	2		T2	2593		T3	94
valid_sources[0x27]	373889	1			T1	2		T2	2607		T3	61
valid_sources[0x28]	374938	1			T1	1		T2	2718		T3	55
valid_sources[0x29]	352590	1			T1	7		T2	2820		T3	67
valid_sources[0x2a]	384070	1			T1	5		T2	2635		T3	67
valid_sources[0x2b]	354566	1			T1	4		T2	2664		T3	50
valid_sources[0x2c]	391036	1			T1	5		T2	2785		T3	66
valid_sources[0x2d]	382493	1			T1	3		T2	2793		T3	69
valid_sources[0x2e]	377568	1			T1	5		T2	2599		T3	67
valid_sources[0x2f]	382854	1			T1	5		T2	2764		T3	67
valid_sources[0x30]	500936	1			T1	2		T2	2638		T3	67
valid_sources[0x31]	373250	1			T1	2		T2	2637		T3	76
valid_sources[0x32]	365170	1			T2	2656		T3	74		T4	2
valid_sources[0x33]	365872	1			T1	7		T2	2602		T3	85
valid_sources[0x34]	399756	1			T1	6		T2	2687		T3	66
valid_sources[0x35]	387333	1			T1	2		T2	2693		T3	79
valid_sources[0x36]	453095	1			T1	1		T2	2661		T3	81
valid_sources[0x37]	377060	1			T1	4		T2	2652		T3	80
valid_sources[0x38]	358392	1			T1	1		T2	2742		T3	59
valid_sources[0x39]	373025	1			T1	7		T2	2760		T3	72
valid_sources[0x3a]	357818	1			T1	3		T2	2624		T3	63
valid_sources[0x3b]	387293	1			T1	4		T2	2984		T3	63
valid_sources[0x3c]	378999	1			T1	3		T2	2840		T3	75
valid_sources[0x3d]	395444	1			T1	9		T2	2628		T3	73
valid_sources[0x3e]	513432	1			T1	2		T2	2540		T3	73
valid_sources[0x3f]	380182	1			T1	2		T2	2653		T3	70
valid_sources[0x40]	370476	1			T1	7		T2	2789		T3	66
valid_sources[0x41]	380464	1			T1	7		T2	2607		T3	63
valid_sources[0x42]	373746	1			T2	2618		T3	44		T4	8
valid_sources[0x43]	422743	1			T1	1		T2	2724		T3	91
valid_sources[0x44]	384856	1			T1	3		T2	2770		T3	77
valid_sources[0x45]	425320	1			T1	5		T2	2771		T3	62
valid_sources[0x46]	364906	1			T1	4		T2	2809		T3	64
valid_sources[0x47]	381255	1			T1	2		T2	2702		T3	77
valid_sources[0x48]	346287	1			T1	8		T2	2709		T3	77
valid_sources[0x49]	367999	1			T2	2685		T3	62		T4	1
valid_sources[0x4a]	358901	1			T1	4		T2	2773		T3	50
valid_sources[0x4b]	390522	1			T1	5		T2	2732		T3	60
valid_sources[0x4c]	365536	1			T2	2725		T3	79		T6	51
valid_sources[0x4d]	418792	1			T1	3		T2	2660		T3	73
valid_sources[0x4e]	397877	1			T2	2666		T3	83		T4	6
valid_sources[0x4f]	479770	1			T1	4		T2	2715		T3	75
valid_sources[0x50]	382947	1			T1	4		T2	2543		T3	74
valid_sources[0x51]	376580	1			T1	6		T2	2693		T3	75
valid_sources[0x52]	373546	1			T1	5		T2	2577		T3	64
valid_sources[0x53]	387301	1			T1	5		T2	2730		T3	75
valid_sources[0x54]	386792	1			T2	2726		T3	69		T5	1
valid_sources[0x55]	372995	1			T1	1		T2	2680		T3	57
valid_sources[0x56]	360583	1			T1	4		T2	2561		T3	90
valid_sources[0x57]	384424	1			T1	2		T2	2847		T3	76
valid_sources[0x58]	370342	1			T1	6		T2	2802		T3	74
valid_sources[0x59]	429031	1			T1	4		T2	2785		T3	84
valid_sources[0x5a]	404466	1			T1	5		T2	2618		T3	72
valid_sources[0x5b]	369068	1			T1	1		T2	2773		T3	62
valid_sources[0x5c]	389043	1			T1	5		T2	2714		T3	76
valid_sources[0x5d]	379704	1			T1	3		T2	2548		T3	58
valid_sources[0x5e]	376413	1			T2	2770		T3	66		T6	79
valid_sources[0x5f]	377083	1			T1	1		T2	2869		T3	64
valid_sources[0x60]	425131	1			T1	6		T2	2787		T3	79
valid_sources[0x61]	357941	1			T1	2		T2	2804		T3	71
valid_sources[0x62]	360473	1			T1	5		T2	2703		T3	66
valid_sources[0x63]	394091	1			T1	4		T2	2608		T3	61
valid_sources[0x64]	382399	1			T1	2		T2	2685		T3	55
valid_sources[0x65]	373781	1			T1	3		T2	2744		T3	61
valid_sources[0x66]	374373	1			T1	1		T2	2647		T3	64
valid_sources[0x67]	367673	1			T1	2		T2	2473		T3	59
valid_sources[0x68]	413294	1			T1	3		T2	2804		T3	81
valid_sources[0x69]	403184	1			T1	4		T2	2777		T3	69
valid_sources[0x6a]	362790	1			T1	8		T2	2703		T3	79
valid_sources[0x6b]	357657	1			T1	6		T2	2808		T3	73
valid_sources[0x6c]	356880	1			T1	2		T2	2702		T3	62
valid_sources[0x6d]	442233	1			T1	3		T2	2731		T3	80
valid_sources[0x6e]	369982	1			T1	2		T2	2646		T3	62
valid_sources[0x6f]	378150	1			T1	2		T2	2821		T3	70
valid_sources[0x70]	396797	1			T1	1		T2	2794		T3	59
valid_sources[0x71]	370403	1			T2	2849		T3	66		T4	5
valid_sources[0x72]	391820	1			T1	1		T2	2629		T3	81
valid_sources[0x73]	350096	1			T1	3		T2	2608		T3	65
valid_sources[0x74]	455037	1			T1	2		T2	2708		T3	59
valid_sources[0x75]	394302	1			T1	6		T2	2632		T3	62
valid_sources[0x76]	353333	1			T1	3		T2	2607		T3	55
valid_sources[0x77]	386177	1			T1	3		T2	2728		T3	71
valid_sources[0x78]	393702	1			T1	3		T2	2774		T3	63
valid_sources[0x79]	374021	1			T1	1		T2	2677		T3	56
valid_sources[0x7a]	387614	1			T1	3		T2	2655		T3	75
valid_sources[0x7b]	480671	1			T1	1		T2	2744		T3	52
valid_sources[0x7c]	374697	1			T1	5		T2	2692		T3	78
valid_sources[0x7d]	377536	1			T1	2		T2	2636		T3	75
valid_sources[0x7e]	384777	1			T1	2		T2	2677		T3	63
valid_sources[0x7f]	398793	1			T1	1		T2	2550		T3	67
valid_sources[0x80]	378540	1			T1	6		T2	2711		T3	62

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

19672810

1

T1

6

T2

338936

T3

5

values[0x0]

all_enables

biggest_size

2936793

1

T1

4

T2

411

T3

2

values[0x1]

all_enables

biggest_size

2882855

1

T1

4

T2

240

T3

1