Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	76179549	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30188242

1

T1

5

T2

127

T3

119

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	96497160	1			T1	4380		T2	6176		T3	9748
values[0x0]	4667604	1			T1	2		T2	137		T3	156
values[0x1]	5203027	1			T1	8		T2	117		T3	145

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	52948148	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

53419643

1

T1

2175

T2

2139

T3

3415

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	389448	1			T1	11		T2	35		T3	6
valid_sources[0x01]	382210	1			T1	22		T2	25		T3	43
valid_sources[0x02]	437289	1			T1	12		T2	17		T3	34
valid_sources[0x03]	428928	1			T1	26		T2	38		T3	19
valid_sources[0x04]	402832	1			T1	22		T2	12		T3	64
valid_sources[0x05]	387642	1			T1	18		T2	17		T3	63
valid_sources[0x06]	400812	1			T1	9		T2	37		T3	42
valid_sources[0x07]	395137	1			T1	14		T2	6		T3	38
valid_sources[0x08]	369184	1			T1	12		T2	11		T3	9
valid_sources[0x09]	427124	1			T1	14		T2	20		T3	28
valid_sources[0x0a]	491824	1			T1	18		T2	26		T3	47
valid_sources[0x0b]	411199	1			T1	11		T2	34		T3	33
valid_sources[0x0c]	371748	1			T1	15		T2	8		T3	58
valid_sources[0x0d]	465798	1			T1	18		T2	19		T3	9
valid_sources[0x0e]	422150	1			T1	20		T2	24		T3	34
valid_sources[0x0f]	399334	1			T1	18		T2	41		T3	46
valid_sources[0x10]	394448	1			T1	12		T2	27		T3	6
valid_sources[0x11]	422908	1			T1	15		T2	11		T3	23
valid_sources[0x12]	392432	1			T1	9		T2	14		T3	38
valid_sources[0x13]	432559	1			T1	17		T2	19		T3	8
valid_sources[0x14]	396553	1			T1	6		T2	39		T3	7
valid_sources[0x15]	394395	1			T1	19		T2	17		T3	28
valid_sources[0x16]	405088	1			T1	19		T2	11		T3	14
valid_sources[0x17]	413223	1			T1	9		T2	42		T3	15
valid_sources[0x18]	405228	1			T1	14		T2	17		T3	82
valid_sources[0x19]	387757	1			T1	15		T2	29		T3	61
valid_sources[0x1a]	420286	1			T1	19		T2	9		T3	27
valid_sources[0x1b]	403991	1			T1	17		T2	32		T3	37
valid_sources[0x1c]	409980	1			T1	15		T2	22		T3	29
valid_sources[0x1d]	403257	1			T1	17		T2	19		T3	28
valid_sources[0x1e]	395352	1			T1	21		T2	15		T3	39
valid_sources[0x1f]	375165	1			T1	17		T2	32		T3	55
valid_sources[0x20]	365230	1			T1	17		T2	16		T3	58
valid_sources[0x21]	442623	1			T1	21		T2	32		T3	28
valid_sources[0x22]	404945	1			T1	12		T2	14		T3	17
valid_sources[0x23]	431512	1			T1	16		T2	30		T3	18
valid_sources[0x24]	395319	1			T1	15		T2	19		T3	93
valid_sources[0x25]	424643	1			T1	14		T2	34		T3	65
valid_sources[0x26]	493023	1			T1	9		T2	14		T3	62
valid_sources[0x27]	378101	1			T1	15		T2	8		T3	36
valid_sources[0x28]	393089	1			T1	21		T2	13		T3	32
valid_sources[0x29]	399356	1			T1	21		T2	21		T3	44
valid_sources[0x2a]	394122	1			T1	14		T2	29		T3	129
valid_sources[0x2b]	407482	1			T1	14		T2	34		T3	9
valid_sources[0x2c]	404818	1			T1	14		T2	42		T3	44
valid_sources[0x2d]	386349	1			T1	27		T2	34		T3	40
valid_sources[0x2e]	401343	1			T1	19		T2	33		T3	27
valid_sources[0x2f]	407970	1			T1	20		T2	13		T3	27
valid_sources[0x30]	421607	1			T1	23		T2	37		T3	23
valid_sources[0x31]	378502	1			T1	21		T2	18		T3	15
valid_sources[0x32]	388496	1			T1	9		T2	28		T3	24
valid_sources[0x33]	400506	1			T1	29		T2	34		T3	24
valid_sources[0x34]	400953	1			T1	12		T2	28		T3	38
valid_sources[0x35]	392147	1			T1	16		T2	15		T3	42
valid_sources[0x36]	408316	1			T1	22		T2	24		T3	41
valid_sources[0x37]	389937	1			T1	21		T2	46		T3	76
valid_sources[0x38]	405110	1			T1	23		T2	32		T3	95
valid_sources[0x39]	388476	1			T1	12		T2	27		T3	8
valid_sources[0x3a]	422841	1			T1	13		T2	31		T3	18
valid_sources[0x3b]	496759	1			T1	15		T2	34		T3	13
valid_sources[0x3c]	409015	1			T1	14		T2	19		T3	29
valid_sources[0x3d]	440789	1			T1	10		T2	12		T3	40
valid_sources[0x3e]	406192	1			T1	16		T2	18		T3	25
valid_sources[0x3f]	387376	1			T1	16		T2	16		T3	55
valid_sources[0x40]	382440	1			T1	15		T2	16		T3	42
valid_sources[0x41]	490215	1			T1	16		T2	42		T3	46
valid_sources[0x42]	428023	1			T1	24		T2	36		T3	39
valid_sources[0x43]	427650	1			T1	13		T2	27		T3	37
valid_sources[0x44]	418470	1			T1	18		T2	8		T3	13
valid_sources[0x45]	400450	1			T1	19		T2	16		T3	65
valid_sources[0x46]	390525	1			T1	19		T2	18		T3	30
valid_sources[0x47]	419966	1			T1	22		T2	11		T3	72
valid_sources[0x48]	406264	1			T1	23		T2	30		T3	31
valid_sources[0x49]	449703	1			T1	15		T2	24		T3	37
valid_sources[0x4a]	450886	1			T1	15		T2	43		T3	24
valid_sources[0x4b]	466560	1			T1	12		T2	15		T3	45
valid_sources[0x4c]	397608	1			T1	14		T2	23		T3	37
valid_sources[0x4d]	416523	1			T1	16		T2	28		T3	49
valid_sources[0x4e]	441400	1			T1	16		T2	34		T3	10
valid_sources[0x4f]	401162	1			T1	17		T2	35		T3	26
valid_sources[0x50]	392324	1			T1	13		T2	37		T3	53
valid_sources[0x51]	460184	1			T1	17		T2	24		T3	56
valid_sources[0x52]	376983	1			T1	22		T2	41		T3	48
valid_sources[0x53]	396955	1			T1	18		T2	32		T3	88
valid_sources[0x54]	396935	1			T1	21		T2	23		T3	85
valid_sources[0x55]	403562	1			T1	18		T2	13		T3	28
valid_sources[0x56]	436468	1			T1	17		T2	4		T3	90
valid_sources[0x57]	450121	1			T1	23		T2	21		T3	21
valid_sources[0x58]	417720	1			T1	19		T2	40		T3	15
valid_sources[0x59]	383169	1			T1	18		T2	23		T3	24
valid_sources[0x5a]	394555	1			T1	16		T2	36		T3	55
valid_sources[0x5b]	384659	1			T1	17		T2	45		T3	12
valid_sources[0x5c]	430979	1			T1	15		T2	29		T3	8
valid_sources[0x5d]	424260	1			T1	17		T2	15		T3	24
valid_sources[0x5e]	381512	1			T1	17		T2	34		T3	16
valid_sources[0x5f]	438739	1			T1	12		T2	33		T3	35
valid_sources[0x60]	387242	1			T1	16		T2	23		T3	89
valid_sources[0x61]	405271	1			T1	17		T2	26		T3	26
valid_sources[0x62]	533006	1			T1	16		T2	17		T3	42
valid_sources[0x63]	469155	1			T1	14		T2	19		T3	63
valid_sources[0x64]	422698	1			T1	18		T2	3		T3	17
valid_sources[0x65]	420259	1			T1	16		T2	9		T3	61
valid_sources[0x66]	380146	1			T1	20		T2	14		T3	26
valid_sources[0x67]	386489	1			T1	22		T2	45		T3	40
valid_sources[0x68]	398820	1			T1	13		T2	21		T3	48
valid_sources[0x69]	402894	1			T1	17		T2	20		T3	23
valid_sources[0x6a]	390761	1			T1	23		T2	22		T3	21
valid_sources[0x6b]	397317	1			T1	29		T2	32		T3	34
valid_sources[0x6c]	383856	1			T1	21		T2	11		T3	70
valid_sources[0x6d]	413050	1			T1	13		T2	16		T3	22
valid_sources[0x6e]	388716	1			T1	11		T2	25		T3	43
valid_sources[0x6f]	450653	1			T1	17		T2	23		T3	3
valid_sources[0x70]	379503	1			T1	21		T2	36		T3	48
valid_sources[0x71]	465025	1			T1	21		T2	46		T3	58
valid_sources[0x72]	558878	1			T1	21		T2	23		T3	87
valid_sources[0x73]	437045	1			T1	22		T2	9		T3	28
valid_sources[0x74]	470728	1			T1	14		T2	23		T3	64
valid_sources[0x75]	431537	1			T1	19		T2	25		T3	60
valid_sources[0x76]	392603	1			T1	14		T2	40		T3	55
valid_sources[0x77]	386752	1			T1	21		T2	22		T3	20
valid_sources[0x78]	465058	1			T1	11		T2	33		T3	55
valid_sources[0x79]	450271	1			T1	19		T2	27		T3	16
valid_sources[0x7a]	531251	1			T1	16		T2	55		T3	20
valid_sources[0x7b]	385166	1			T1	17		T2	18		T3	54
valid_sources[0x7c]	412980	1			T1	17		T2	19		T3	40
valid_sources[0x7d]	394583	1			T1	17		T2	21		T3	58
valid_sources[0x7e]	851052	1			T1	19		T2	19		T3	62
valid_sources[0x7f]	433547	1			T1	20		T2	60		T3	53
valid_sources[0x80]	398338	1			T1	11		T2	32		T3	11

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21443581

1

T2

62

T3

38

T5

145

values[0x0]

all_enables

biggest_size

4401789

1

T1

2

T2

39

T3

54

values[0x1]

all_enables

biggest_size

4342872

1

T1

3

T2

26

T3

27