Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 76556216 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 31872271 1 T1 18 T2 271538 T3 94347



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 97240423 1 T1 11479 T2 731504 T3 226986
values[0x0] 5286784 1 T1 20 T2 843 T3 428
values[0x1] 5901280 1 T1 35 T2 895 T3 454



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 53193631 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 55234856 1 T1 3835 T2 389598 T3 126488



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 403934 1 T1 22 T2 2827 T3 892
valid_sources[0x01] 409767 1 T1 40 T2 2860 T3 920
valid_sources[0x02] 484722 1 T1 24 T2 2903 T3 904
valid_sources[0x03] 413817 1 T1 46 T2 2773 T3 923
valid_sources[0x04] 399537 1 T1 59 T2 3011 T3 861
valid_sources[0x05] 427060 1 T1 38 T2 2894 T3 1023
valid_sources[0x06] 400735 1 T1 34 T2 2934 T3 930
valid_sources[0x07] 402847 1 T1 40 T2 2930 T3 950
valid_sources[0x08] 397101 1 T1 43 T2 2825 T3 912
valid_sources[0x09] 417784 1 T1 50 T2 2843 T3 888
valid_sources[0x0a] 419052 1 T1 52 T2 2838 T3 883
valid_sources[0x0b] 439765 1 T1 48 T2 2869 T3 882
valid_sources[0x0c] 389908 1 T1 40 T2 2819 T3 852
valid_sources[0x0d] 447454 1 T1 49 T2 2939 T3 817
valid_sources[0x0e] 391391 1 T1 21 T2 2872 T3 791
valid_sources[0x0f] 401364 1 T1 48 T2 2873 T3 954
valid_sources[0x10] 419735 1 T1 35 T2 2927 T3 934
valid_sources[0x11] 429188 1 T1 58 T2 2848 T3 920
valid_sources[0x12] 405064 1 T1 40 T2 2859 T3 791
valid_sources[0x13] 430715 1 T1 43 T2 2769 T3 901
valid_sources[0x14] 424869 1 T1 46 T2 2886 T3 847
valid_sources[0x15] 399884 1 T1 43 T2 2673 T3 895
valid_sources[0x16] 407847 1 T1 27 T2 2875 T3 961
valid_sources[0x17] 404204 1 T1 47 T2 2893 T3 820
valid_sources[0x18] 416872 1 T1 69 T2 2865 T3 979
valid_sources[0x19] 409879 1 T1 39 T2 2825 T3 996
valid_sources[0x1a] 401879 1 T1 34 T2 2854 T3 875
valid_sources[0x1b] 420840 1 T1 64 T2 2832 T3 956
valid_sources[0x1c] 402014 1 T1 40 T2 2928 T3 907
valid_sources[0x1d] 406761 1 T1 25 T2 2964 T3 934
valid_sources[0x1e] 406014 1 T1 43 T2 2816 T3 823
valid_sources[0x1f] 389427 1 T1 55 T2 2876 T3 814
valid_sources[0x20] 427506 1 T1 31 T2 2849 T3 916
valid_sources[0x21] 398038 1 T1 68 T2 2906 T3 824
valid_sources[0x22] 414817 1 T1 50 T2 2829 T3 804
valid_sources[0x23] 415444 1 T1 52 T2 2813 T3 950
valid_sources[0x24] 398713 1 T1 29 T2 2936 T3 953
valid_sources[0x25] 420646 1 T1 52 T2 2891 T3 946
valid_sources[0x26] 394295 1 T1 37 T2 2847 T3 1136
valid_sources[0x27] 400671 1 T1 39 T2 2892 T3 806
valid_sources[0x28] 433780 1 T1 52 T2 2910 T3 765
valid_sources[0x29] 413449 1 T1 45 T2 2822 T3 846
valid_sources[0x2a] 390129 1 T1 68 T2 2853 T3 884
valid_sources[0x2b] 415158 1 T1 36 T2 2949 T3 899
valid_sources[0x2c] 448048 1 T1 51 T2 2814 T3 969
valid_sources[0x2d] 546440 1 T1 41 T2 2889 T3 760
valid_sources[0x2e] 441246 1 T1 39 T2 2789 T3 949
valid_sources[0x2f] 402763 1 T1 46 T2 2767 T3 994
valid_sources[0x30] 467101 1 T1 38 T2 2893 T3 924
valid_sources[0x31] 571888 1 T1 36 T2 2865 T3 905
valid_sources[0x32] 589778 1 T1 45 T2 2808 T3 847
valid_sources[0x33] 410420 1 T1 55 T2 2841 T3 883
valid_sources[0x34] 393795 1 T1 26 T2 2823 T3 824
valid_sources[0x35] 435781 1 T1 46 T2 2864 T3 870
valid_sources[0x36] 401176 1 T1 30 T2 2791 T3 816
valid_sources[0x37] 409839 1 T1 49 T2 2851 T3 977
valid_sources[0x38] 452240 1 T1 31 T2 2920 T3 797
valid_sources[0x39] 407416 1 T1 43 T2 2861 T3 775
valid_sources[0x3a] 430782 1 T1 50 T2 2863 T3 846
valid_sources[0x3b] 407785 1 T1 45 T2 2781 T3 865
valid_sources[0x3c] 434298 1 T1 47 T2 2700 T3 887
valid_sources[0x3d] 417899 1 T1 50 T2 2821 T3 930
valid_sources[0x3e] 412271 1 T1 80 T2 2895 T3 829
valid_sources[0x3f] 399132 1 T1 51 T2 2903 T3 854
valid_sources[0x40] 473446 1 T1 43 T2 2849 T3 790
valid_sources[0x41] 452345 1 T1 28 T2 2910 T3 876
valid_sources[0x42] 487878 1 T1 62 T2 2810 T3 838
valid_sources[0x43] 434137 1 T1 58 T2 2899 T3 896
valid_sources[0x44] 397814 1 T1 61 T2 2908 T3 768
valid_sources[0x45] 414522 1 T1 34 T2 2872 T3 1002
valid_sources[0x46] 466155 1 T1 60 T2 2821 T3 917
valid_sources[0x47] 420257 1 T1 28 T2 2927 T3 854
valid_sources[0x48] 464862 1 T1 52 T2 2766 T3 852
valid_sources[0x49] 423722 1 T1 63 T2 2788 T3 797
valid_sources[0x4a] 406327 1 T1 44 T2 2840 T3 848
valid_sources[0x4b] 488793 1 T1 23 T2 2845 T3 938
valid_sources[0x4c] 419291 1 T1 37 T2 2911 T3 887
valid_sources[0x4d] 412528 1 T1 55 T2 2796 T3 993
valid_sources[0x4e] 432799 1 T1 35 T2 2824 T3 844
valid_sources[0x4f] 408281 1 T1 31 T2 2844 T3 879
valid_sources[0x50] 407476 1 T1 51 T2 2907 T3 929
valid_sources[0x51] 533249 1 T1 43 T2 2854 T3 948
valid_sources[0x52] 422837 1 T1 39 T2 2800 T3 861
valid_sources[0x53] 419625 1 T1 61 T2 2898 T3 968
valid_sources[0x54] 378073 1 T1 54 T2 2902 T3 960
valid_sources[0x55] 397218 1 T1 41 T2 2896 T3 941
valid_sources[0x56] 423524 1 T1 24 T2 2791 T3 1009
valid_sources[0x57] 398125 1 T1 54 T2 2853 T3 894
valid_sources[0x58] 407930 1 T1 37 T2 2884 T3 797
valid_sources[0x59] 395211 1 T1 43 T2 2857 T3 919
valid_sources[0x5a] 417136 1 T1 30 T2 2874 T3 903
valid_sources[0x5b] 418686 1 T1 60 T2 2875 T3 935
valid_sources[0x5c] 404294 1 T1 26 T2 2715 T3 962
valid_sources[0x5d] 389927 1 T1 47 T2 2750 T3 1014
valid_sources[0x5e] 394716 1 T1 38 T2 2848 T3 948
valid_sources[0x5f] 466320 1 T1 44 T2 2904 T3 947
valid_sources[0x60] 407144 1 T1 43 T2 2850 T3 851
valid_sources[0x61] 407981 1 T1 44 T2 2965 T3 966
valid_sources[0x62] 457845 1 T1 56 T2 2868 T3 877
valid_sources[0x63] 431931 1 T1 52 T2 2741 T3 899
valid_sources[0x64] 420965 1 T1 43 T2 2760 T3 1028
valid_sources[0x65] 418759 1 T1 41 T2 2954 T3 850
valid_sources[0x66] 455003 1 T1 36 T2 2851 T3 865
valid_sources[0x67] 398952 1 T1 45 T2 2850 T3 879
valid_sources[0x68] 391633 1 T1 33 T2 2806 T3 902
valid_sources[0x69] 432213 1 T1 35 T2 2951 T3 867
valid_sources[0x6a] 398351 1 T1 44 T2 2947 T3 898
valid_sources[0x6b] 408305 1 T1 62 T2 2868 T3 1003
valid_sources[0x6c] 390166 1 T1 26 T2 2804 T3 813
valid_sources[0x6d] 467186 1 T1 39 T2 2921 T3 896
valid_sources[0x6e] 423194 1 T1 59 T2 2978 T3 936
valid_sources[0x6f] 434266 1 T1 37 T2 2921 T3 954
valid_sources[0x70] 406300 1 T1 45 T2 2935 T3 850
valid_sources[0x71] 391182 1 T1 65 T2 2922 T3 844
valid_sources[0x72] 405883 1 T1 49 T2 2952 T3 836
valid_sources[0x73] 398071 1 T1 37 T2 2855 T3 899
valid_sources[0x74] 413775 1 T1 48 T2 2825 T3 772
valid_sources[0x75] 392227 1 T1 37 T2 2840 T3 770
valid_sources[0x76] 469760 1 T1 31 T2 2867 T3 821
valid_sources[0x77] 542833 1 T1 29 T2 2820 T3 878
valid_sources[0x78] 419308 1 T1 35 T2 2877 T3 962
valid_sources[0x79] 406881 1 T1 42 T2 2799 T3 864
valid_sources[0x7a] 449634 1 T1 38 T2 2853 T3 768
valid_sources[0x7b] 496300 1 T1 44 T2 2832 T3 902
valid_sources[0x7c] 385462 1 T1 49 T2 2858 T3 957
valid_sources[0x7d] 386002 1 T1 55 T2 2881 T3 838
valid_sources[0x7e] 440502 1 T1 39 T2 2967 T3 884
valid_sources[0x7f] 413967 1 T1 50 T2 2845 T3 995
valid_sources[0x80] 441576 1 T1 58 T2 2859 T3 796



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 21917997 1 T1 6 T2 270901 T3 94032
values[0x0] all_enables biggest_size 5006983 1 T1 7 T2 399 T3 205
values[0x1] all_enables biggest_size 4947291 1 T1 5 T2 238 T3 110

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%