Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	79024208	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

27030509

1

T1

7

T3

9

T4

147

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	96484238	1			T1	32		T2	1		T3	9252
values[0x0]	4529382	1			T1	6		T2	1		T3	7
values[0x1]	5041097	1			T1	7		T2	1		T3	6

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	54476141	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

51578576

1

T1

15

T2

1

T3

3121

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	461139	1			T3	27		T5	319		T7	14
valid_sources[0x01]	521919	1			T3	30		T4	1		T5	281
valid_sources[0x02]	411493	1			T3	53		T5	289		T6	38
valid_sources[0x03]	397583	1			T3	50		T5	290		T6	27
valid_sources[0x04]	381200	1			T3	25		T4	30		T5	294
valid_sources[0x05]	462653	1			T3	83		T5	323		T7	10
valid_sources[0x06]	412489	1			T1	2		T3	44		T4	40
valid_sources[0x07]	398573	1			T3	43		T5	286		T6	13
valid_sources[0x08]	651022	1			T3	18		T4	10		T5	262
valid_sources[0x09]	428317	1			T1	3		T3	30		T4	3
valid_sources[0x0a]	405396	1			T3	9		T4	12		T5	348
valid_sources[0x0b]	486843	1			T3	44		T5	282		T7	19
valid_sources[0x0c]	381924	1			T3	56		T5	293		T7	12
valid_sources[0x0d]	391711	1			T3	20		T4	15		T5	299
valid_sources[0x0e]	452029	1			T3	49		T5	290		T7	16
valid_sources[0x0f]	381544	1			T3	33		T5	300		T7	14
valid_sources[0x10]	372240	1			T3	32		T5	316		T7	14
valid_sources[0x11]	380421	1			T1	1		T3	32		T5	296
valid_sources[0x12]	386780	1			T3	21		T5	302		T6	8
valid_sources[0x13]	395054	1			T3	13		T5	312		T7	12
valid_sources[0x14]	378625	1			T1	1		T3	35		T5	278
valid_sources[0x15]	371074	1			T3	26		T5	325		T6	16
valid_sources[0x16]	364651	1			T3	18		T5	298		T7	14
valid_sources[0x17]	391791	1			T3	9		T5	291		T7	16
valid_sources[0x18]	395855	1			T3	28		T5	274		T7	17
valid_sources[0x19]	407959	1			T3	60		T5	329		T6	37
valid_sources[0x1a]	396188	1			T3	29		T5	278		T6	11
valid_sources[0x1b]	372389	1			T3	46		T5	287		T7	15
valid_sources[0x1c]	440891	1			T3	47		T4	10		T5	322
valid_sources[0x1d]	398340	1			T1	1		T3	26		T4	7
valid_sources[0x1e]	398846	1			T3	21		T4	10		T5	289
valid_sources[0x1f]	389305	1			T3	21		T5	313		T7	16
valid_sources[0x20]	454862	1			T3	79		T5	280		T6	25
valid_sources[0x21]	384680	1			T3	35		T4	21		T5	317
valid_sources[0x22]	396115	1			T3	19		T5	279		T7	21
valid_sources[0x23]	540525	1			T3	39		T5	325		T6	62
valid_sources[0x24]	390531	1			T3	30		T4	33		T5	283
valid_sources[0x25]	407872	1			T3	63		T4	38		T5	287
valid_sources[0x26]	419829	1			T3	46		T5	293		T7	12
valid_sources[0x27]	413612	1			T3	38		T4	24		T5	321
valid_sources[0x28]	440131	1			T3	53		T4	24		T5	315
valid_sources[0x29]	459127	1			T3	53		T5	308		T7	10
valid_sources[0x2a]	403595	1			T3	52		T5	276		T7	14
valid_sources[0x2b]	482033	1			T3	42		T5	315		T7	12
valid_sources[0x2c]	398221	1			T3	40		T5	259		T7	17
valid_sources[0x2d]	378620	1			T1	1		T3	43		T5	302
valid_sources[0x2e]	382981	1			T3	36		T5	299		T7	9
valid_sources[0x2f]	392148	1			T3	27		T5	302		T6	16
valid_sources[0x30]	382841	1			T3	18		T5	298		T6	26
valid_sources[0x31]	387004	1			T3	18		T5	319		T7	10
valid_sources[0x32]	401641	1			T3	33		T5	288		T6	53
valid_sources[0x33]	400308	1			T3	36		T5	294		T7	9
valid_sources[0x34]	405931	1			T3	51		T4	6		T5	271
valid_sources[0x35]	406602	1			T3	21		T5	310		T6	297
valid_sources[0x36]	414093	1			T3	33		T5	298		T7	11
valid_sources[0x37]	391032	1			T3	40		T5	284		T7	16
valid_sources[0x38]	423104	1			T3	48		T5	265		T7	14
valid_sources[0x39]	423851	1			T3	39		T5	311		T7	15
valid_sources[0x3a]	400123	1			T3	24		T5	302		T7	17
valid_sources[0x3b]	402222	1			T3	39		T5	293		T6	59
valid_sources[0x3c]	441052	1			T3	63		T5	277		T7	22
valid_sources[0x3d]	445410	1			T3	49		T5	361		T7	16
valid_sources[0x3e]	406162	1			T1	5		T3	29		T5	296
valid_sources[0x3f]	419158	1			T3	28		T5	275		T6	18
valid_sources[0x40]	386465	1			T3	29		T5	278		T7	13
valid_sources[0x41]	385613	1			T3	22		T5	319		T7	9
valid_sources[0x42]	388870	1			T3	34		T5	300		T7	19
valid_sources[0x43]	421584	1			T3	32		T5	288		T6	11
valid_sources[0x44]	369328	1			T3	17		T5	280		T6	115
valid_sources[0x45]	404748	1			T3	33		T4	5		T5	330
valid_sources[0x46]	393158	1			T3	46		T5	261		T7	21
valid_sources[0x47]	382747	1			T3	39		T4	116		T5	338
valid_sources[0x48]	469450	1			T3	39		T5	350		T6	76
valid_sources[0x49]	468759	1			T3	24		T5	335		T7	15
valid_sources[0x4a]	411781	1			T3	25		T4	25		T5	334
valid_sources[0x4b]	410317	1			T1	1		T3	22		T5	293
valid_sources[0x4c]	395711	1			T3	7		T5	320		T6	89
valid_sources[0x4d]	399205	1			T3	25		T4	21		T5	283
valid_sources[0x4e]	381632	1			T3	30		T4	21		T5	273
valid_sources[0x4f]	419046	1			T3	22		T5	325		T7	13
valid_sources[0x50]	367239	1			T3	5		T5	281		T7	21
valid_sources[0x51]	429512	1			T3	32		T4	2		T5	306
valid_sources[0x52]	389039	1			T3	17		T5	320		T7	11
valid_sources[0x53]	414452	1			T3	44		T5	287		T7	17
valid_sources[0x54]	389691	1			T3	42		T5	310		T7	14
valid_sources[0x55]	381624	1			T3	35		T5	330		T7	15
valid_sources[0x56]	412516	1			T3	28		T5	301		T7	14
valid_sources[0x57]	505791	1			T2	3		T3	27		T4	14
valid_sources[0x58]	378664	1			T3	36		T5	305		T7	17
valid_sources[0x59]	467603	1			T3	22		T5	293		T7	14
valid_sources[0x5a]	470693	1			T3	42		T5	316		T7	24
valid_sources[0x5b]	356283	1			T3	10		T5	270		T7	11
valid_sources[0x5c]	403867	1			T3	35		T4	16		T5	296
valid_sources[0x5d]	396092	1			T3	45		T5	303		T7	20
valid_sources[0x5e]	519185	1			T3	12		T5	310		T6	38
valid_sources[0x5f]	403821	1			T3	18		T4	18		T5	298
valid_sources[0x60]	416230	1			T1	1		T3	36		T4	2
valid_sources[0x61]	398668	1			T3	43		T5	324		T7	12
valid_sources[0x62]	513201	1			T3	31		T5	280		T7	22
valid_sources[0x63]	392352	1			T3	51		T4	31		T5	284
valid_sources[0x64]	391314	1			T3	19		T5	297		T6	25
valid_sources[0x65]	389435	1			T3	65		T5	317		T6	47
valid_sources[0x66]	379697	1			T3	30		T5	289		T7	17
valid_sources[0x67]	424345	1			T3	71		T5	293		T6	24
valid_sources[0x68]	502665	1			T3	16		T4	32		T5	314
valid_sources[0x69]	356100	1			T3	46		T5	306		T7	14
valid_sources[0x6a]	513589	1			T3	41		T5	317		T7	22
valid_sources[0x6b]	401995	1			T3	17		T5	307		T7	17
valid_sources[0x6c]	392934	1			T3	40		T5	280		T7	12
valid_sources[0x6d]	403785	1			T3	17		T4	14		T5	314
valid_sources[0x6e]	422270	1			T3	39		T5	322		T7	7
valid_sources[0x6f]	394345	1			T3	30		T4	69		T5	278
valid_sources[0x70]	416971	1			T3	36		T5	295		T7	13
valid_sources[0x71]	380571	1			T3	40		T5	313		T7	19
valid_sources[0x72]	380749	1			T3	12		T4	9		T5	330
valid_sources[0x73]	403985	1			T3	28		T5	327		T7	12
valid_sources[0x74]	476270	1			T1	1		T3	29		T5	299
valid_sources[0x75]	368887	1			T3	23		T5	289		T7	10
valid_sources[0x76]	395803	1			T3	40		T4	30		T5	263
valid_sources[0x77]	442007	1			T3	32		T4	5		T5	284
valid_sources[0x78]	400065	1			T3	54		T5	283		T7	18
valid_sources[0x79]	381407	1			T3	37		T4	10		T5	281
valid_sources[0x7a]	378320	1			T3	51		T5	335		T6	152
valid_sources[0x7b]	392284	1			T3	21		T5	287		T7	5
valid_sources[0x7c]	564162	1			T3	19		T5	354		T6	136
valid_sources[0x7d]	440120	1			T3	61		T4	40		T5	331
valid_sources[0x7e]	402157	1			T3	47		T5	298		T6	104
valid_sources[0x7f]	457242	1			T3	19		T5	314		T7	17
valid_sources[0x80]	434792	1			T3	45		T4	61		T5	303

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18588019

1

T1

4

T3

5

T4

78

values[0x0]

all_enables

biggest_size

4254040

1

T3

3

T4

47

T5

81

values[0x1]

all_enables

biggest_size

4188450

1

T1

3

T3

1

T4

22