Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 75581474 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 31791021 1 T1 12 T2 218397 T3 48



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 96690123 1 T1 32 T2 438289 T3 4798
values[0x0] 5046137 1 T1 8 T2 24232 T3 56
values[0x1] 5636235 1 T1 5 T2 27220 T3 51



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 52558368 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 54814127 1 T1 19 T2 289032 T3 1630



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 406476 1 T2 1830 T3 22 T5 2842
valid_sources[0x01] 494147 1 T2 1861 T3 18 T5 2634
valid_sources[0x02] 481997 1 T2 1904 T3 20 T5 2775
valid_sources[0x03] 400433 1 T2 1885 T3 30 T5 2628
valid_sources[0x04] 393115 1 T2 1897 T3 19 T5 2661
valid_sources[0x05] 390119 1 T2 1903 T3 25 T5 2767
valid_sources[0x06] 392036 1 T2 1915 T3 19 T5 2648
valid_sources[0x07] 433790 1 T2 1890 T3 13 T5 2634
valid_sources[0x08] 405517 1 T2 2014 T3 21 T5 2733
valid_sources[0x09] 414653 1 T2 1948 T3 23 T5 2705
valid_sources[0x0a] 427057 1 T2 1912 T3 14 T5 2676
valid_sources[0x0b] 393249 1 T2 1855 T3 18 T5 2695
valid_sources[0x0c] 387552 1 T2 1877 T3 27 T5 2590
valid_sources[0x0d] 401309 1 T2 1941 T3 21 T5 2603
valid_sources[0x0e] 406437 1 T2 1987 T3 19 T5 2640
valid_sources[0x0f] 390903 1 T2 1956 T3 19 T5 2702
valid_sources[0x10] 386716 1 T2 1971 T3 20 T5 2617
valid_sources[0x11] 603172 1 T2 1947 T3 21 T5 2620
valid_sources[0x12] 408930 1 T2 2001 T3 19 T5 2727
valid_sources[0x13] 402534 1 T2 1874 T3 25 T5 2608
valid_sources[0x14] 425221 1 T2 1946 T3 15 T5 2845
valid_sources[0x15] 498567 1 T2 1927 T3 17 T5 2809
valid_sources[0x16] 427302 1 T2 1856 T3 24 T5 2775
valid_sources[0x17] 404219 1 T2 1951 T3 16 T5 2660
valid_sources[0x18] 387580 1 T2 2021 T3 14 T5 2689
valid_sources[0x19] 497042 1 T2 1952 T3 20 T5 2620
valid_sources[0x1a] 464536 1 T2 1929 T3 23 T5 2656
valid_sources[0x1b] 401549 1 T2 1865 T3 17 T5 2638
valid_sources[0x1c] 384025 1 T2 1941 T3 15 T5 2709
valid_sources[0x1d] 381116 1 T2 1762 T3 24 T5 2744
valid_sources[0x1e] 429968 1 T2 1785 T3 16 T5 2607
valid_sources[0x1f] 413605 1 T2 1952 T3 11 T5 2748
valid_sources[0x20] 423362 1 T2 2021 T3 16 T5 2696
valid_sources[0x21] 384366 1 T2 1875 T3 21 T5 2637
valid_sources[0x22] 682325 1 T2 1943 T3 16 T5 2657
valid_sources[0x23] 427898 1 T2 1856 T3 11 T5 2649
valid_sources[0x24] 402096 1 T2 1966 T3 21 T5 2635
valid_sources[0x25] 438150 1 T2 1916 T3 15 T5 2693
valid_sources[0x26] 390744 1 T2 1977 T3 19 T5 2635
valid_sources[0x27] 403544 1 T2 1961 T3 23 T5 2596
valid_sources[0x28] 439385 1 T2 1852 T3 15 T5 2601
valid_sources[0x29] 392460 1 T2 1848 T3 16 T5 2705
valid_sources[0x2a] 416260 1 T2 1916 T3 17 T5 2689
valid_sources[0x2b] 386626 1 T2 2035 T3 15 T5 2619
valid_sources[0x2c] 403298 1 T2 1859 T3 25 T5 2641
valid_sources[0x2d] 406336 1 T2 1860 T3 9 T5 2718
valid_sources[0x2e] 398033 1 T2 2007 T3 22 T5 2745
valid_sources[0x2f] 411943 1 T2 1867 T3 15 T5 2721
valid_sources[0x30] 409692 1 T2 1901 T3 24 T5 2704
valid_sources[0x31] 398322 1 T2 1911 T3 21 T5 2573
valid_sources[0x32] 392533 1 T2 1967 T3 22 T4 2
valid_sources[0x33] 418094 1 T2 1979 T3 19 T5 2628
valid_sources[0x34] 400472 1 T2 1944 T3 21 T5 2644
valid_sources[0x35] 433783 1 T2 1800 T3 19 T5 2685
valid_sources[0x36] 443649 1 T2 1981 T3 12 T5 2690
valid_sources[0x37] 413092 1 T2 1905 T3 20 T5 2596
valid_sources[0x38] 414480 1 T2 1960 T3 19 T5 2722
valid_sources[0x39] 404212 1 T2 1803 T3 22 T5 2768
valid_sources[0x3a] 397417 1 T2 1979 T3 25 T5 2581
valid_sources[0x3b] 493843 1 T2 1933 T3 21 T5 2717
valid_sources[0x3c] 392750 1 T2 1927 T3 14 T5 2814
valid_sources[0x3d] 452854 1 T2 1949 T3 32 T5 2658
valid_sources[0x3e] 410611 1 T2 2027 T3 24 T5 2533
valid_sources[0x3f] 394073 1 T2 1933 T3 22 T5 2729
valid_sources[0x40] 385876 1 T2 1839 T3 24 T5 2578
valid_sources[0x41] 407085 1 T2 2026 T3 14 T5 2662
valid_sources[0x42] 401544 1 T2 1947 T3 18 T5 2766
valid_sources[0x43] 441323 1 T2 1893 T3 19 T5 2652
valid_sources[0x44] 417759 1 T2 1889 T3 8 T5 2619
valid_sources[0x45] 450195 1 T2 1833 T3 14 T5 2690
valid_sources[0x46] 394570 1 T2 1876 T3 21 T5 2617
valid_sources[0x47] 416507 1 T2 1829 T3 25 T5 2759
valid_sources[0x48] 393152 1 T2 1908 T3 14 T5 2693
valid_sources[0x49] 554083 1 T2 1910 T3 20 T5 2547
valid_sources[0x4a] 408862 1 T2 1885 T3 16 T5 2574
valid_sources[0x4b] 388357 1 T2 1900 T3 19 T5 2662
valid_sources[0x4c] 409463 1 T2 1931 T3 16 T5 2612
valid_sources[0x4d] 419537 1 T2 1927 T3 24 T5 2723
valid_sources[0x4e] 402047 1 T2 1986 T3 19 T5 2836
valid_sources[0x4f] 420079 1 T2 1948 T3 25 T5 2618
valid_sources[0x50] 417774 1 T2 1906 T3 17 T5 2733
valid_sources[0x51] 397676 1 T2 1882 T3 25 T5 2645
valid_sources[0x52] 425142 1 T2 1897 T3 15 T5 2678
valid_sources[0x53] 428676 1 T2 1909 T3 19 T5 2709
valid_sources[0x54] 417048 1 T2 1869 T3 27 T5 2721
valid_sources[0x55] 385577 1 T2 1943 T3 26 T5 2789
valid_sources[0x56] 414763 1 T2 1944 T3 22 T5 2680
valid_sources[0x57] 420030 1 T2 1919 T3 20 T5 2670
valid_sources[0x58] 415875 1 T2 1873 T3 13 T5 2754
valid_sources[0x59] 437741 1 T2 1843 T3 26 T5 2637
valid_sources[0x5a] 408729 1 T2 1896 T3 19 T5 2682
valid_sources[0x5b] 451509 1 T2 1923 T3 17 T5 2556
valid_sources[0x5c] 392950 1 T2 1845 T3 11 T5 2551
valid_sources[0x5d] 411799 1 T2 1778 T3 15 T5 2723
valid_sources[0x5e] 402651 1 T2 1931 T3 22 T5 2677
valid_sources[0x5f] 571433 1 T2 2069 T3 19 T5 2625
valid_sources[0x60] 420332 1 T2 1784 T3 23 T5 2716
valid_sources[0x61] 411932 1 T2 1997 T3 19 T5 2619
valid_sources[0x62] 398859 1 T2 1946 T3 27 T5 2746
valid_sources[0x63] 415526 1 T2 1868 T3 20 T5 2648
valid_sources[0x64] 391570 1 T2 1968 T3 16 T5 2702
valid_sources[0x65] 385895 1 T2 1978 T3 18 T5 2668
valid_sources[0x66] 394564 1 T2 1879 T3 16 T5 2692
valid_sources[0x67] 447527 1 T2 1898 T3 26 T5 2673
valid_sources[0x68] 429287 1 T2 1935 T3 21 T5 2690
valid_sources[0x69] 460353 1 T2 1993 T3 18 T5 2590
valid_sources[0x6a] 426690 1 T2 1893 T3 24 T5 2703
valid_sources[0x6b] 470065 1 T2 1886 T3 19 T5 2682
valid_sources[0x6c] 383092 1 T2 1885 T3 19 T5 2640
valid_sources[0x6d] 411260 1 T2 1883 T3 15 T5 2636
valid_sources[0x6e] 393778 1 T2 1901 T3 21 T5 2722
valid_sources[0x6f] 408916 1 T2 2000 T3 20 T5 2631
valid_sources[0x70] 395923 1 T2 1878 T3 23 T5 2680
valid_sources[0x71] 407893 1 T2 1952 T3 11 T5 2705
valid_sources[0x72] 414795 1 T2 1993 T3 28 T5 2623
valid_sources[0x73] 402184 1 T2 1902 T3 13 T5 2625
valid_sources[0x74] 407481 1 T2 1924 T3 14 T5 2621
valid_sources[0x75] 407365 1 T2 1971 T3 14 T5 2673
valid_sources[0x76] 390469 1 T2 1929 T3 11 T5 2831
valid_sources[0x77] 391478 1 T2 1882 T3 25 T5 2665
valid_sources[0x78] 448628 1 T2 1928 T3 19 T5 2727
valid_sources[0x79] 403590 1 T2 1844 T3 30 T5 2682
valid_sources[0x7a] 481005 1 T2 1877 T3 15 T5 2640
valid_sources[0x7b] 460378 1 T2 1804 T3 18 T5 2757
valid_sources[0x7c] 398033 1 T2 1944 T3 20 T5 2591
valid_sources[0x7d] 411421 1 T2 1916 T3 12 T5 2620
valid_sources[0x7e] 486757 1 T2 1848 T3 13 T5 2685
valid_sources[0x7f] 397749 1 T2 1872 T3 19 T5 2669
valid_sources[0x80] 434541 1 T1 5 T2 1926 T3 9



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 22277985 1 T1 5 T2 171840 T3 20
values[0x0] all_enables biggest_size 4785745 1 T1 6 T2 23449 T3 16
values[0x1] all_enables biggest_size 4727291 1 T1 1 T2 23108 T3 12

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%