Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 76193606 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 30284584 1 T1 423 T2 12 T3 197



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 95565151 1 T1 21456 T2 32 T3 321
values[0x0] 5151564 1 T1 199 T2 7 T3 48
values[0x1] 5761475 1 T1 171 T2 6 T3 38



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 52731836 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 53746354 1 T1 7420 T2 17 T3 226



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 392306 1 T4 492 T5 3 T6 1811
valid_sources[0x01] 449801 1 T2 1 T4 868 T5 1
valid_sources[0x02] 396014 1 T4 971 T5 1 T6 1743
valid_sources[0x03] 405154 1 T4 1963 T5 8 T6 1742
valid_sources[0x04] 394892 1 T4 716 T6 1829 T7 3
valid_sources[0x05] 405107 1 T4 843 T5 3 T6 1846
valid_sources[0x06] 398866 1 T4 748 T5 2 T6 1751
valid_sources[0x07] 439807 1 T4 1696 T5 3 T6 1846
valid_sources[0x08] 389269 1 T4 1327 T5 2 T6 1940
valid_sources[0x09] 503655 1 T4 1267 T6 1825 T8 462
valid_sources[0x0a] 384228 1 T4 1440 T5 1 T6 1804
valid_sources[0x0b] 387794 1 T4 514 T5 6 T6 1849
valid_sources[0x0c] 507614 1 T4 1123 T6 1801 T7 6
valid_sources[0x0d] 379425 1 T4 975 T5 2 T6 1790
valid_sources[0x0e] 525930 1 T4 1192 T5 1 T6 1839
valid_sources[0x0f] 420563 1 T4 555 T6 1846 T7 6
valid_sources[0x10] 391842 1 T2 1 T4 1157 T5 4
valid_sources[0x11] 435756 1 T4 1407 T5 1 T6 1913
valid_sources[0x12] 465818 1 T4 1297 T5 1 T6 1849
valid_sources[0x13] 408926 1 T4 788 T5 2 T6 1743
valid_sources[0x14] 429170 1 T4 1284 T6 1802 T7 49
valid_sources[0x15] 377871 1 T4 932 T5 2 T6 1847
valid_sources[0x16] 393753 1 T4 1641 T6 1771 T7 4291
valid_sources[0x17] 423185 1 T2 1 T4 640 T5 4
valid_sources[0x18] 386874 1 T4 881 T5 2 T6 1755
valid_sources[0x19] 399908 1 T4 808 T5 1 T6 1887
valid_sources[0x1a] 386051 1 T4 1059 T6 1851 T7 4664
valid_sources[0x1b] 377670 1 T2 1 T4 1398 T5 1
valid_sources[0x1c] 449495 1 T4 1043 T6 1860 T7 442
valid_sources[0x1d] 378245 1 T4 1398 T5 10 T6 1784
valid_sources[0x1e] 395200 1 T4 1434 T6 1745 T7 34
valid_sources[0x1f] 385190 1 T4 1187 T6 1818 T8 370
valid_sources[0x20] 369985 1 T4 1665 T5 9 T6 1849
valid_sources[0x21] 430946 1 T4 1298 T5 1 T6 1793
valid_sources[0x22] 458085 1 T4 930 T6 1750 T8 278
valid_sources[0x23] 417022 1 T2 1 T4 1069 T5 5
valid_sources[0x24] 405075 1 T4 1409 T5 3 T6 1751
valid_sources[0x25] 427938 1 T2 1 T4 1475 T6 1736
valid_sources[0x26] 389772 1 T4 708 T5 5 T6 1835
valid_sources[0x27] 410411 1 T4 715 T5 4 T6 1709
valid_sources[0x28] 393575 1 T4 782 T5 7 T6 1739
valid_sources[0x29] 411258 1 T4 924 T5 3 T6 1905
valid_sources[0x2a] 404188 1 T2 1 T3 407 T4 982
valid_sources[0x2b] 462265 1 T4 1013 T5 3 T6 1892
valid_sources[0x2c] 378364 1 T4 942 T6 1864 T7 3057
valid_sources[0x2d] 378134 1 T4 512 T5 1 T6 1762
valid_sources[0x2e] 388185 1 T4 1186 T5 1 T6 1802
valid_sources[0x2f] 496515 1 T2 1 T4 603 T6 1778
valid_sources[0x30] 388563 1 T4 542 T5 2 T6 1845
valid_sources[0x31] 438340 1 T4 699 T5 2 T6 1951
valid_sources[0x32] 492098 1 T4 1067 T6 1843 T7 1
valid_sources[0x33] 390658 1 T4 1217 T6 1836 T8 412
valid_sources[0x34] 389769 1 T4 941 T6 1827 T7 84
valid_sources[0x35] 390612 1 T4 1407 T5 1 T6 1857
valid_sources[0x36] 409270 1 T4 653 T5 5 T6 1799
valid_sources[0x37] 389562 1 T4 762 T5 3 T6 1703
valid_sources[0x38] 389990 1 T4 937 T6 1891 T8 379
valid_sources[0x39] 369193 1 T4 993 T5 2 T6 1767
valid_sources[0x3a] 502409 1 T4 1537 T5 5 T6 1810
valid_sources[0x3b] 409488 1 T4 1017 T6 1773 T7 11
valid_sources[0x3c] 389749 1 T4 837 T5 4 T6 1809
valid_sources[0x3d] 407003 1 T4 1144 T5 2 T6 1768
valid_sources[0x3e] 503633 1 T2 1 T4 1154 T5 2
valid_sources[0x3f] 407258 1 T4 674 T5 1 T6 1796
valid_sources[0x40] 513955 1 T2 1 T4 1594 T5 2
valid_sources[0x41] 512026 1 T4 887 T5 1 T6 1829
valid_sources[0x42] 435925 1 T4 1764 T5 2 T6 1840
valid_sources[0x43] 428023 1 T4 866 T5 1 T6 1838
valid_sources[0x44] 406490 1 T4 524 T5 6 T6 1798
valid_sources[0x45] 386648 1 T4 1052 T5 2 T6 1833
valid_sources[0x46] 427004 1 T4 815 T5 5 T6 1740
valid_sources[0x47] 487122 1 T4 896 T5 3 T6 1765
valid_sources[0x48] 380404 1 T4 1423 T5 3 T6 1881
valid_sources[0x49] 415925 1 T4 697 T5 3 T6 1859
valid_sources[0x4a] 397861 1 T4 1196 T5 2 T6 1941
valid_sources[0x4b] 478953 1 T2 1 T4 788 T5 1
valid_sources[0x4c] 401212 1 T2 3 T4 1776 T6 1851
valid_sources[0x4d] 374253 1 T4 1257 T5 1 T6 1762
valid_sources[0x4e] 392343 1 T4 993 T6 1834 T7 38
valid_sources[0x4f] 430214 1 T4 7425 T6 1831 T8 367
valid_sources[0x50] 422853 1 T4 1161 T5 3 T6 1800
valid_sources[0x51] 636837 1 T4 1295 T5 4 T6 1811
valid_sources[0x52] 402833 1 T2 2 T4 957 T6 1786
valid_sources[0x53] 393904 1 T4 908 T6 1800 T8 340
valid_sources[0x54] 403443 1 T4 717 T6 1761 T7 2015
valid_sources[0x55] 379383 1 T4 416 T5 2 T6 1832
valid_sources[0x56] 461086 1 T4 1089 T5 2 T6 1778
valid_sources[0x57] 395027 1 T2 1 T4 794 T5 4
valid_sources[0x58] 402596 1 T4 1097 T5 3 T6 1791
valid_sources[0x59] 380867 1 T4 1319 T6 1868 T7 12
valid_sources[0x5a] 495288 1 T4 1406 T6 1888 T7 24
valid_sources[0x5b] 410008 1 T4 1072 T5 5 T6 1824
valid_sources[0x5c] 472871 1 T4 1189 T6 1863 T8 400
valid_sources[0x5d] 406468 1 T4 709 T5 7 T6 1716
valid_sources[0x5e] 413215 1 T4 535 T5 2 T6 1813
valid_sources[0x5f] 452412 1 T4 1129 T6 1862 T7 38
valid_sources[0x60] 399918 1 T4 660 T6 1779 T7 865
valid_sources[0x61] 441872 1 T4 887 T5 1 T6 1789
valid_sources[0x62] 457478 1 T4 1010 T5 2 T6 1814
valid_sources[0x63] 401676 1 T4 1091 T5 2 T6 1817
valid_sources[0x64] 413175 1 T4 620 T6 1833 T7 2283
valid_sources[0x65] 416871 1 T4 408 T5 2 T6 1732
valid_sources[0x66] 406188 1 T2 1 T4 914 T5 3
valid_sources[0x67] 394738 1 T4 1522 T5 1 T6 1770
valid_sources[0x68] 462220 1 T4 537 T5 3 T6 1904
valid_sources[0x69] 405762 1 T2 2 T4 773 T5 1
valid_sources[0x6a] 396611 1 T4 818 T5 1 T6 1807
valid_sources[0x6b] 397569 1 T4 654 T5 1 T6 1825
valid_sources[0x6c] 440774 1 T2 2 T4 1206 T5 1
valid_sources[0x6d] 377230 1 T4 1121 T5 6 T6 1842
valid_sources[0x6e] 385076 1 T4 766 T5 2 T6 1845
valid_sources[0x6f] 407225 1 T4 1144 T5 5 T6 1830
valid_sources[0x70] 416003 1 T4 689 T5 11 T6 1856
valid_sources[0x71] 460717 1 T4 1214 T5 6 T6 1792
valid_sources[0x72] 419523 1 T4 593 T5 4 T6 1817
valid_sources[0x73] 417205 1 T4 877 T5 4 T6 1801
valid_sources[0x74] 429014 1 T4 1227 T5 1 T6 1809
valid_sources[0x75] 397101 1 T4 654 T6 1807 T8 441
valid_sources[0x76] 387864 1 T4 1038 T5 9 T6 1728
valid_sources[0x77] 371884 1 T4 1143 T5 1 T6 1862
valid_sources[0x78] 401699 1 T4 1276 T6 1737 T7 1
valid_sources[0x79] 438954 1 T4 720 T5 2 T6 1796
valid_sources[0x7a] 379142 1 T4 997 T5 1 T6 1758
valid_sources[0x7b] 392990 1 T4 523 T5 4 T6 1886
valid_sources[0x7c] 378178 1 T4 363 T5 2 T6 1814
valid_sources[0x7d] 380572 1 T4 1146 T6 1827 T7 101
valid_sources[0x7e] 457412 1 T4 1168 T5 2 T6 1753
valid_sources[0x7f] 412662 1 T2 1 T4 1192 T5 7
valid_sources[0x80] 389496 1 T4 1375 T5 3 T6 1823



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20598445 1 T1 312 T2 5 T3 161
values[0x0] all_enables biggest_size 4873084 1 T1 85 T2 5 T3 25
values[0x1] all_enables biggest_size 4813055 1 T1 26 T2 2 T3 11

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%