Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	76791486	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

28184166

1

T1

165

T2

171

T3

74

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	95119016	1			T1	755		T2	91601		T3	4271
values[0x0]	4661101	1			T1	33		T2	236		T3	111
values[0x1]	5195535	1			T1	47		T2	246		T3	115

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	53045196	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

51930456

1

T1

367

T2

31083

T3

1538

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	400054	1			T1	3		T2	460		T3	9
valid_sources[0x01]	403632	1			T1	12		T2	436		T3	13
valid_sources[0x02]	361725	1			T1	3		T2	374		T3	19
valid_sources[0x03]	427108	1			T2	227		T3	14		T4	2
valid_sources[0x04]	384538	1			T1	6		T2	248		T3	15
valid_sources[0x05]	377703	1			T1	11		T2	490		T3	13
valid_sources[0x06]	411448	1			T1	3		T2	289		T3	13
valid_sources[0x07]	413048	1			T1	9		T2	354		T3	15
valid_sources[0x08]	403740	1			T1	6		T2	429		T3	17
valid_sources[0x09]	448903	1			T1	4		T2	451		T3	14
valid_sources[0x0a]	441331	1			T1	4		T2	290		T3	17
valid_sources[0x0b]	373085	1			T1	6		T2	276		T3	15
valid_sources[0x0c]	396631	1			T2	462		T3	18		T4	5
valid_sources[0x0d]	365875	1			T1	8		T2	489		T3	19
valid_sources[0x0e]	421771	1			T2	426		T3	21		T4	5
valid_sources[0x0f]	381904	1			T1	1		T2	395		T3	15
valid_sources[0x10]	394897	1			T1	6		T2	243		T3	18
valid_sources[0x11]	435483	1			T1	1		T2	262		T3	14
valid_sources[0x12]	389998	1			T2	364		T3	11		T4	2
valid_sources[0x13]	372614	1			T1	1		T2	411		T3	28
valid_sources[0x14]	392159	1			T2	382		T3	13		T4	7
valid_sources[0x15]	386282	1			T1	5		T2	270		T3	20
valid_sources[0x16]	403200	1			T1	4		T2	273		T3	15
valid_sources[0x17]	387777	1			T1	3		T2	374		T3	24
valid_sources[0x18]	429089	1			T1	11		T2	373		T3	15
valid_sources[0x19]	388780	1			T1	8		T2	320		T3	11
valid_sources[0x1a]	381299	1			T1	1		T2	335		T3	11
valid_sources[0x1b]	386969	1			T1	4		T2	374		T3	15
valid_sources[0x1c]	375412	1			T1	2		T2	359		T3	22
valid_sources[0x1d]	379144	1			T1	3		T2	484		T3	20
valid_sources[0x1e]	373007	1			T1	4		T2	459		T3	6
valid_sources[0x1f]	381740	1			T1	1		T2	363		T3	16
valid_sources[0x20]	375784	1			T1	1		T2	236		T3	7
valid_sources[0x21]	399706	1			T1	5		T2	290		T3	12
valid_sources[0x22]	380193	1			T1	2		T2	407		T3	14
valid_sources[0x23]	402552	1			T1	5		T2	468		T3	15
valid_sources[0x24]	356593	1			T1	5		T2	331		T3	16
valid_sources[0x25]	459409	1			T1	3		T2	382		T3	11
valid_sources[0x26]	363751	1			T2	492		T3	10		T4	3
valid_sources[0x27]	397676	1			T2	396		T3	21		T4	5
valid_sources[0x28]	541182	1			T1	12		T2	434		T3	26
valid_sources[0x29]	382853	1			T1	5		T2	254		T3	18
valid_sources[0x2a]	484742	1			T1	3		T2	444		T3	30
valid_sources[0x2b]	406361	1			T1	3		T2	364		T3	15
valid_sources[0x2c]	422777	1			T2	335		T3	17		T4	2
valid_sources[0x2d]	373216	1			T1	3		T2	317		T3	6
valid_sources[0x2e]	375898	1			T1	3		T2	356		T3	17
valid_sources[0x2f]	382902	1			T1	10		T2	385		T3	21
valid_sources[0x30]	392423	1			T1	1		T2	281		T3	24
valid_sources[0x31]	391689	1			T1	6		T2	340		T3	17
valid_sources[0x32]	429356	1			T2	288		T3	8		T5	1240
valid_sources[0x33]	503921	1			T1	1		T2	415		T3	22
valid_sources[0x34]	446783	1			T1	7		T2	331		T3	23
valid_sources[0x35]	378687	1			T1	2		T2	274		T3	13
valid_sources[0x36]	395096	1			T2	333		T3	12		T4	3
valid_sources[0x37]	401906	1			T1	3		T2	371		T3	20
valid_sources[0x38]	374441	1			T1	5		T2	242		T3	26
valid_sources[0x39]	481946	1			T1	9		T2	320		T3	12
valid_sources[0x3a]	387804	1			T2	234		T3	17		T4	2
valid_sources[0x3b]	369415	1			T1	1		T2	293		T3	14
valid_sources[0x3c]	588755	1			T1	15		T2	417		T3	19
valid_sources[0x3d]	415836	1			T1	5		T2	248		T3	23
valid_sources[0x3e]	499877	1			T1	8		T2	332		T3	22
valid_sources[0x3f]	384863	1			T1	3		T2	290		T3	18
valid_sources[0x40]	408851	1			T2	269		T3	17		T4	1
valid_sources[0x41]	367454	1			T2	426		T3	19		T4	4
valid_sources[0x42]	489472	1			T1	1		T2	439		T3	21
valid_sources[0x43]	433642	1			T1	6		T2	343		T3	16
valid_sources[0x44]	401195	1			T2	409		T3	18		T4	1
valid_sources[0x45]	387555	1			T1	5		T2	393		T3	8
valid_sources[0x46]	454108	1			T1	6		T2	269		T3	7
valid_sources[0x47]	390638	1			T1	2		T2	288		T3	25
valid_sources[0x48]	402839	1			T1	10		T2	424		T3	22
valid_sources[0x49]	424451	1			T2	424		T3	17		T4	7
valid_sources[0x4a]	438204	1			T2	481		T3	37		T4	3
valid_sources[0x4b]	371916	1			T1	10		T2	298		T3	12
valid_sources[0x4c]	417867	1			T1	1		T2	345		T3	26
valid_sources[0x4d]	406102	1			T1	3		T2	378		T3	11
valid_sources[0x4e]	473357	1			T1	7		T2	382		T3	16
valid_sources[0x4f]	391559	1			T1	5		T2	548		T3	17
valid_sources[0x50]	434954	1			T1	8		T2	356		T3	19
valid_sources[0x51]	453554	1			T1	1		T2	413		T3	24
valid_sources[0x52]	367682	1			T1	1		T2	341		T3	11
valid_sources[0x53]	412584	1			T2	409		T3	22		T4	2
valid_sources[0x54]	366648	1			T2	225		T3	16		T4	1
valid_sources[0x55]	374166	1			T1	1		T2	262		T3	26
valid_sources[0x56]	422925	1			T2	466		T3	22		T4	1
valid_sources[0x57]	417027	1			T1	2		T2	538		T3	19
valid_sources[0x58]	398471	1			T2	378		T3	18		T4	1
valid_sources[0x59]	390917	1			T1	5		T2	284		T3	20
valid_sources[0x5a]	407988	1			T1	5		T2	332		T3	11
valid_sources[0x5b]	372473	1			T1	4		T2	337		T3	22
valid_sources[0x5c]	416061	1			T1	3		T2	325		T3	16
valid_sources[0x5d]	424217	1			T2	339		T3	17		T4	1
valid_sources[0x5e]	452082	1			T2	265		T3	10		T4	3
valid_sources[0x5f]	398445	1			T1	2		T2	295		T3	22
valid_sources[0x60]	367651	1			T2	292		T3	25		T4	4
valid_sources[0x61]	481010	1			T1	3		T2	319		T3	24
valid_sources[0x62]	376556	1			T2	332		T3	22		T4	2
valid_sources[0x63]	394116	1			T1	3		T2	415		T3	10
valid_sources[0x64]	379928	1			T2	549		T3	25		T4	6
valid_sources[0x65]	414079	1			T1	6		T2	343		T3	21
valid_sources[0x66]	411905	1			T1	7		T2	330		T3	24
valid_sources[0x67]	369167	1			T1	4		T2	385		T3	22
valid_sources[0x68]	384779	1			T1	3		T2	389		T3	22
valid_sources[0x69]	369797	1			T1	6		T2	392		T3	18
valid_sources[0x6a]	459622	1			T1	1		T2	230		T3	20
valid_sources[0x6b]	404320	1			T1	5		T2	340		T3	18
valid_sources[0x6c]	403889	1			T1	1		T2	401		T3	6
valid_sources[0x6d]	431939	1			T1	3		T2	331		T3	16
valid_sources[0x6e]	505932	1			T1	3		T2	270		T3	29
valid_sources[0x6f]	384217	1			T1	2		T2	290		T3	19
valid_sources[0x70]	366805	1			T1	4		T2	393		T3	37
valid_sources[0x71]	374133	1			T1	6		T2	529		T3	23
valid_sources[0x72]	711249	1			T1	1		T2	328		T3	26
valid_sources[0x73]	387247	1			T2	416		T3	13		T4	1
valid_sources[0x74]	387345	1			T2	331		T3	12		T4	1
valid_sources[0x75]	419672	1			T1	1		T2	321		T3	18
valid_sources[0x76]	420929	1			T1	2		T2	256		T3	18
valid_sources[0x77]	385767	1			T1	2		T2	364		T3	13
valid_sources[0x78]	387684	1			T1	1		T2	371		T3	22
valid_sources[0x79]	408767	1			T2	202		T3	21		T4	2
valid_sources[0x7a]	391696	1			T2	489		T3	15		T4	3
valid_sources[0x7b]	458158	1			T1	4		T2	382		T3	12
valid_sources[0x7c]	384530	1			T2	225		T3	15		T4	6
valid_sources[0x7d]	536806	1			T1	2		T2	264		T3	16
valid_sources[0x7e]	380974	1			T1	2		T2	336		T3	24
valid_sources[0x7f]	365312	1			T1	7		T2	281		T3	8
valid_sources[0x80]	390371	1			T1	2		T2	371		T3	18

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

19442006

1

T1

122

T2

32

T3

6

values[0x0]

all_enables

biggest_size

4400770

1

T1

20

T2

84

T3

37

values[0x1]

all_enables

biggest_size

4341390

1

T1

23

T2

55

T3

31