Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	81456587	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

30418630

1

T1

6

T2

87

T3

17

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	101361878	1			T1	1		T2	87368		T3	23920
values[0x0]	4971451	1			T1	10		T2	84		T3	8
values[0x1]	5541888	1			T1	6		T2	84		T3	14

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	56302181	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

55573036

1

T1

7

T2

29071

T3

12033

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	428003	1			T2	380		T3	117		T5	49
valid_sources[0x01]	403440	1			T1	1		T2	323		T3	73
valid_sources[0x02]	427368	1			T2	318		T3	23		T5	20
valid_sources[0x03]	405287	1			T2	344		T3	103		T5	28
valid_sources[0x04]	460461	1			T2	363		T3	68		T5	41
valid_sources[0x05]	394376	1			T2	356		T3	91		T5	41
valid_sources[0x06]	406851	1			T2	349		T3	66		T5	48
valid_sources[0x07]	449295	1			T2	306		T3	84		T5	49
valid_sources[0x08]	433058	1			T2	313		T3	198		T5	39
valid_sources[0x09]	464255	1			T2	320		T3	58		T5	45
valid_sources[0x0a]	450622	1			T2	343		T3	83		T5	27
valid_sources[0x0b]	452769	1			T2	353		T3	126		T5	33
valid_sources[0x0c]	402334	1			T2	315		T3	182		T5	57
valid_sources[0x0d]	474575	1			T2	335		T3	98		T5	35
valid_sources[0x0e]	416620	1			T2	302		T3	132		T5	26
valid_sources[0x0f]	404430	1			T2	299		T3	78		T5	39
valid_sources[0x10]	410763	1			T2	400		T3	38		T5	43
valid_sources[0x11]	430925	1			T2	374		T3	73		T5	65
valid_sources[0x12]	416383	1			T2	351		T3	39		T5	43
valid_sources[0x13]	400807	1			T2	321		T3	58		T5	33
valid_sources[0x14]	406711	1			T2	320		T3	62		T5	48
valid_sources[0x15]	491081	1			T2	330		T3	29		T5	40
valid_sources[0x16]	412548	1			T2	324		T3	39		T5	46
valid_sources[0x17]	424812	1			T2	314		T3	126		T5	48
valid_sources[0x18]	423410	1			T2	334		T3	221		T5	35
valid_sources[0x19]	458819	1			T2	313		T3	27		T5	30
valid_sources[0x1a]	428097	1			T1	1		T2	346		T3	119
valid_sources[0x1b]	422682	1			T2	320		T3	37		T5	50
valid_sources[0x1c]	408014	1			T2	349		T3	31		T5	44
valid_sources[0x1d]	434599	1			T2	341		T3	52		T5	59
valid_sources[0x1e]	404353	1			T2	370		T3	95		T5	38
valid_sources[0x1f]	424132	1			T2	351		T3	95		T5	34
valid_sources[0x20]	439973	1			T2	328		T3	129		T5	25
valid_sources[0x21]	401933	1			T1	2		T2	335		T3	43
valid_sources[0x22]	444820	1			T2	363		T3	100		T5	33
valid_sources[0x23]	435529	1			T2	310		T3	54		T5	32
valid_sources[0x24]	438882	1			T2	342		T3	138		T5	53
valid_sources[0x25]	406814	1			T2	361		T3	166		T5	22
valid_sources[0x26]	432424	1			T2	322		T3	46		T5	47
valid_sources[0x27]	404071	1			T1	1		T2	326		T3	33
valid_sources[0x28]	527543	1			T2	326		T3	72		T5	34
valid_sources[0x29]	420812	1			T2	315		T3	156		T5	42
valid_sources[0x2a]	473335	1			T2	336		T3	60		T5	39
valid_sources[0x2b]	432690	1			T2	353		T3	75		T5	50
valid_sources[0x2c]	422915	1			T2	333		T3	57		T5	60
valid_sources[0x2d]	440078	1			T2	346		T3	153		T5	29
valid_sources[0x2e]	438559	1			T2	327		T3	68		T4	1
valid_sources[0x2f]	434233	1			T2	374		T3	154		T5	51
valid_sources[0x30]	458448	1			T2	342		T3	43		T5	30
valid_sources[0x31]	433890	1			T2	388		T3	96		T5	45
valid_sources[0x32]	502393	1			T1	1		T2	336		T3	47
valid_sources[0x33]	409206	1			T2	353		T3	61		T5	44
valid_sources[0x34]	446251	1			T2	325		T3	149		T5	32
valid_sources[0x35]	411326	1			T2	335		T3	202		T5	53
valid_sources[0x36]	417598	1			T2	330		T3	200		T5	29
valid_sources[0x37]	408487	1			T2	332		T3	82		T5	67
valid_sources[0x38]	432333	1			T2	367		T3	96		T5	40
valid_sources[0x39]	418471	1			T2	344		T3	59		T5	37
valid_sources[0x3a]	413048	1			T2	332		T3	56		T5	33
valid_sources[0x3b]	412684	1			T2	388		T3	43		T5	50
valid_sources[0x3c]	400246	1			T1	1		T2	330		T3	55
valid_sources[0x3d]	412846	1			T2	342		T3	92		T5	51
valid_sources[0x3e]	443470	1			T2	350		T3	72		T5	13
valid_sources[0x3f]	502085	1			T2	361		T3	137		T5	30
valid_sources[0x40]	408959	1			T2	331		T3	95		T5	35
valid_sources[0x41]	425149	1			T2	350		T3	93		T5	24
valid_sources[0x42]	419738	1			T2	318		T3	35		T5	32
valid_sources[0x43]	425091	1			T2	370		T3	96		T5	37
valid_sources[0x44]	451213	1			T1	1		T2	337		T3	75
valid_sources[0x45]	847612	1			T2	351		T3	157		T5	46
valid_sources[0x46]	427876	1			T1	1		T2	331		T3	66
valid_sources[0x47]	439263	1			T2	323		T3	34		T5	46
valid_sources[0x48]	535102	1			T2	348		T3	75		T5	45
valid_sources[0x49]	424659	1			T2	358		T3	97		T5	41
valid_sources[0x4a]	447926	1			T2	382		T3	73		T5	49
valid_sources[0x4b]	415010	1			T2	341		T3	52		T5	45
valid_sources[0x4c]	419187	1			T2	330		T3	106		T5	43
valid_sources[0x4d]	461749	1			T2	307		T3	231		T5	40
valid_sources[0x4e]	492855	1			T2	348		T3	60		T5	52
valid_sources[0x4f]	447828	1			T2	340		T3	125		T5	54
valid_sources[0x50]	413305	1			T2	365		T3	37		T5	54
valid_sources[0x51]	492692	1			T2	331		T3	38		T5	41
valid_sources[0x52]	410517	1			T2	348		T3	96		T5	27
valid_sources[0x53]	399361	1			T2	350		T3	166		T5	31
valid_sources[0x54]	410832	1			T2	354		T3	78		T5	32
valid_sources[0x55]	403436	1			T2	347		T3	53		T5	58
valid_sources[0x56]	415939	1			T2	344		T3	168		T5	37
valid_sources[0x57]	443823	1			T2	306		T3	45		T5	32
valid_sources[0x58]	473881	1			T2	334		T3	172		T5	24
valid_sources[0x59]	430962	1			T2	362		T3	80		T5	41
valid_sources[0x5a]	417379	1			T2	337		T3	102		T5	49
valid_sources[0x5b]	425181	1			T2	333		T3	73		T5	34
valid_sources[0x5c]	441723	1			T2	343		T3	63		T5	35
valid_sources[0x5d]	467122	1			T1	1		T2	331		T3	128
valid_sources[0x5e]	408432	1			T2	327		T3	145		T5	52
valid_sources[0x5f]	417693	1			T2	363		T3	112		T5	43
valid_sources[0x60]	459032	1			T2	343		T3	65		T5	32
valid_sources[0x61]	413726	1			T2	348		T3	39		T5	31
valid_sources[0x62]	422564	1			T2	327		T3	105		T5	57
valid_sources[0x63]	435514	1			T2	345		T3	74		T5	31
valid_sources[0x64]	413152	1			T2	369		T3	79		T5	23
valid_sources[0x65]	441487	1			T2	326		T3	88		T5	41
valid_sources[0x66]	414885	1			T1	1		T2	351		T3	17
valid_sources[0x67]	414643	1			T2	346		T3	78		T5	62
valid_sources[0x68]	433309	1			T2	378		T3	96		T5	56
valid_sources[0x69]	404447	1			T2	326		T3	88		T5	41
valid_sources[0x6a]	408194	1			T2	336		T3	78		T5	36
valid_sources[0x6b]	448888	1			T2	377		T3	67		T5	37
valid_sources[0x6c]	423998	1			T2	366		T3	71		T5	33
valid_sources[0x6d]	419806	1			T2	371		T3	121		T5	18
valid_sources[0x6e]	414061	1			T2	382		T3	166		T5	68
valid_sources[0x6f]	426227	1			T2	320		T3	124		T5	23
valid_sources[0x70]	432281	1			T2	371		T3	127		T5	32
valid_sources[0x71]	457794	1			T2	332		T3	46		T5	36
valid_sources[0x72]	483399	1			T2	334		T3	128		T5	23
valid_sources[0x73]	408705	1			T2	345		T3	64		T5	43
valid_sources[0x74]	421948	1			T2	332		T3	81		T5	33
valid_sources[0x75]	423934	1			T2	328		T3	94		T5	37
valid_sources[0x76]	438902	1			T2	340		T3	132		T5	31
valid_sources[0x77]	404736	1			T2	358		T3	135		T5	44
valid_sources[0x78]	427257	1			T2	308		T3	158		T5	21
valid_sources[0x79]	530291	1			T2	320		T3	145		T5	47
valid_sources[0x7a]	411467	1			T2	373		T3	102		T5	30
valid_sources[0x7b]	462637	1			T2	325		T3	38		T5	71
valid_sources[0x7c]	411322	1			T2	358		T3	54		T5	33
valid_sources[0x7d]	431143	1			T2	353		T3	104		T5	64
valid_sources[0x7e]	446337	1			T2	323		T3	186		T5	33
valid_sources[0x7f]	431579	1			T2	337		T3	84		T5	56
valid_sources[0x80]	481514	1			T2	350		T3	77		T5	42

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

21084733

1

T1

1

T2

39

T4

63

values[0x0]

all_enables

biggest_size

4697164

1

T1

4

T2

28

T3

6

values[0x1]

all_enables

biggest_size

4636733

1

T1

1

T2

20

T3

11