Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 81461866 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 30468273 1 T1 178 T2 11 T3 93



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 101247334 1 T1 1571 T2 32 T3 738
values[0x0] 5052683 1 T1 175 T2 10 T3 22
values[0x1] 5630122 1 T1 166 T2 3 T3 34



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 56309671 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 55620468 1 T1 692 T2 19 T3 310



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 441275 1 T1 9 T4 295 T5 2
valid_sources[0x01] 414630 1 T1 4 T3 15 T4 282
valid_sources[0x02] 416838 1 T1 3 T3 1 T4 215
valid_sources[0x03] 452708 1 T1 7 T3 3 T4 229
valid_sources[0x04] 411601 1 T1 4 T3 4 T4 205
valid_sources[0x05] 411791 1 T1 6 T3 4 T4 306
valid_sources[0x06] 406583 1 T1 6 T3 1 T4 313
valid_sources[0x07] 407144 1 T1 13 T3 3 T4 319
valid_sources[0x08] 461281 1 T1 12 T3 1 T4 230
valid_sources[0x09] 500152 1 T1 4 T3 4 T4 251
valid_sources[0x0a] 394449 1 T1 6 T3 5 T4 245
valid_sources[0x0b] 409834 1 T1 9 T3 4 T4 263
valid_sources[0x0c] 438906 1 T1 7 T3 8 T4 321
valid_sources[0x0d] 396737 1 T1 9 T3 8 T4 339
valid_sources[0x0e] 458725 1 T1 12 T3 3 T4 350
valid_sources[0x0f] 411810 1 T1 12 T3 11 T4 243
valid_sources[0x10] 412262 1 T1 10 T3 1 T4 294
valid_sources[0x11] 403557 1 T1 7 T3 1 T4 245
valid_sources[0x12] 425146 1 T1 10 T3 3 T4 240
valid_sources[0x13] 418398 1 T1 4 T3 4 T4 255
valid_sources[0x14] 437995 1 T1 6 T3 1 T4 315
valid_sources[0x15] 460873 1 T1 13 T3 3 T4 250
valid_sources[0x16] 421697 1 T1 3 T3 2 T4 268
valid_sources[0x17] 411190 1 T1 7 T4 276 T5 4
valid_sources[0x18] 402564 1 T1 3 T3 3 T4 289
valid_sources[0x19] 392863 1 T1 8 T4 260 T5 1
valid_sources[0x1a] 391544 1 T1 7 T3 3 T4 308
valid_sources[0x1b] 412671 1 T1 7 T3 1 T4 303
valid_sources[0x1c] 521712 1 T1 6 T3 13 T4 280
valid_sources[0x1d] 409209 1 T1 7 T3 3 T4 225
valid_sources[0x1e] 615626 1 T1 8 T3 1 T4 191
valid_sources[0x1f] 494513 1 T1 5 T3 6 T4 266
valid_sources[0x20] 414110 1 T1 5 T3 4 T4 229
valid_sources[0x21] 421078 1 T1 7 T3 3 T4 273
valid_sources[0x22] 596273 1 T1 7 T3 7 T4 288
valid_sources[0x23] 478003 1 T1 9 T3 4 T4 287
valid_sources[0x24] 410384 1 T1 13 T3 10 T4 251
valid_sources[0x25] 597890 1 T1 11 T4 286 T5 7
valid_sources[0x26] 465622 1 T1 6 T4 343 T5 5
valid_sources[0x27] 454724 1 T1 7 T3 6 T4 278
valid_sources[0x28] 413557 1 T1 12 T3 6 T4 267
valid_sources[0x29] 396713 1 T1 4 T4 343 T5 5
valid_sources[0x2a] 427559 1 T1 3 T3 7 T4 302
valid_sources[0x2b] 413965 1 T1 6 T3 3 T4 289
valid_sources[0x2c] 416890 1 T1 4 T3 14 T4 260
valid_sources[0x2d] 406649 1 T1 12 T3 13 T4 301
valid_sources[0x2e] 475193 1 T1 10 T3 6 T4 302
valid_sources[0x2f] 410151 1 T1 2 T3 1 T4 268
valid_sources[0x30] 420269 1 T1 8 T3 5 T4 266
valid_sources[0x31] 395675 1 T1 7 T3 5 T4 193
valid_sources[0x32] 429711 1 T1 3 T3 1 T4 252
valid_sources[0x33] 425628 1 T1 12 T3 3 T4 245
valid_sources[0x34] 429395 1 T1 9 T3 8 T4 328
valid_sources[0x35] 407481 1 T1 5 T3 8 T4 193
valid_sources[0x36] 433302 1 T1 7 T3 1 T4 288
valid_sources[0x37] 543034 1 T1 12 T3 1 T4 273
valid_sources[0x38] 403424 1 T1 6 T3 1 T4 255
valid_sources[0x39] 468205 1 T1 9 T3 3 T4 351
valid_sources[0x3a] 406713 1 T1 7 T3 1 T4 254
valid_sources[0x3b] 420236 1 T1 7 T4 292 T5 6
valid_sources[0x3c] 458884 1 T1 6 T3 3 T4 260
valid_sources[0x3d] 503989 1 T1 6 T3 3 T4 221
valid_sources[0x3e] 430727 1 T1 11 T3 2 T4 336
valid_sources[0x3f] 474202 1 T1 5 T3 6 T4 255
valid_sources[0x40] 408781 1 T1 6 T3 3 T4 415
valid_sources[0x41] 425432 1 T1 9 T3 2 T4 294
valid_sources[0x42] 476599 1 T1 12 T4 338 T5 4
valid_sources[0x43] 468898 1 T1 8 T3 1 T4 239
valid_sources[0x44] 412809 1 T1 5 T3 7 T4 318
valid_sources[0x45] 413954 1 T1 5 T4 235 T5 2
valid_sources[0x46] 406894 1 T1 6 T3 5 T4 282
valid_sources[0x47] 424205 1 T1 5 T3 1 T4 336
valid_sources[0x48] 425688 1 T1 11 T2 45 T4 274
valid_sources[0x49] 411086 1 T1 9 T3 1 T4 309
valid_sources[0x4a] 551824 1 T1 9 T4 280 T5 2
valid_sources[0x4b] 394072 1 T1 8 T3 2 T4 207
valid_sources[0x4c] 413713 1 T1 6 T3 3 T4 264
valid_sources[0x4d] 400718 1 T1 7 T3 1 T4 328
valid_sources[0x4e] 417958 1 T1 14 T3 2 T4 269
valid_sources[0x4f] 432044 1 T1 10 T3 2 T4 311
valid_sources[0x50] 584691 1 T1 8 T3 4 T4 259
valid_sources[0x51] 580039 1 T1 7 T3 3 T4 315
valid_sources[0x52] 415842 1 T1 5 T4 262 T5 2
valid_sources[0x53] 436607 1 T1 6 T3 2 T4 274
valid_sources[0x54] 430176 1 T1 8 T3 1 T4 266
valid_sources[0x55] 425239 1 T1 7 T3 3 T4 238
valid_sources[0x56] 480983 1 T1 7 T3 1 T4 282
valid_sources[0x57] 403003 1 T1 2 T4 291 T5 5
valid_sources[0x58] 424133 1 T1 10 T3 5 T4 262
valid_sources[0x59] 402042 1 T1 11 T4 223 T5 5
valid_sources[0x5a] 392183 1 T1 4 T4 280 T5 2
valid_sources[0x5b] 420183 1 T1 11 T3 5 T4 227
valid_sources[0x5c] 411704 1 T1 11 T3 2 T4 308
valid_sources[0x5d] 404938 1 T1 10 T3 7 T4 295
valid_sources[0x5e] 427639 1 T1 9 T3 1 T4 294
valid_sources[0x5f] 408489 1 T1 8 T4 347 T6 154
valid_sources[0x60] 422520 1 T1 8 T4 249 T5 6
valid_sources[0x61] 490288 1 T1 7 T3 10 T4 289
valid_sources[0x62] 451555 1 T1 7 T4 231 T5 5
valid_sources[0x63] 430475 1 T1 11 T4 274 T6 173
valid_sources[0x64] 411414 1 T1 4 T3 2 T4 329
valid_sources[0x65] 402508 1 T1 6 T3 2 T4 351
valid_sources[0x66] 421989 1 T1 5 T4 350 T5 5
valid_sources[0x67] 585570 1 T1 7 T3 2 T4 314
valid_sources[0x68] 417834 1 T1 10 T4 288 T5 4
valid_sources[0x69] 421287 1 T1 3 T4 302 T5 4
valid_sources[0x6a] 494904 1 T1 10 T3 1 T4 299
valid_sources[0x6b] 421233 1 T1 10 T3 2 T4 244
valid_sources[0x6c] 423138 1 T1 8 T4 266 T5 1
valid_sources[0x6d] 412252 1 T1 6 T3 11 T4 296
valid_sources[0x6e] 397434 1 T1 1 T4 306 T5 5
valid_sources[0x6f] 417387 1 T1 8 T3 2 T4 255
valid_sources[0x70] 455505 1 T1 9 T3 5 T4 250
valid_sources[0x71] 513627 1 T1 5 T3 6 T4 231
valid_sources[0x72] 450638 1 T1 12 T4 311 T5 2
valid_sources[0x73] 445340 1 T1 4 T3 5 T4 257
valid_sources[0x74] 400266 1 T1 3 T3 4 T4 368
valid_sources[0x75] 463936 1 T1 6 T3 1 T4 289
valid_sources[0x76] 401774 1 T1 4 T3 10 T4 253
valid_sources[0x77] 403877 1 T1 4 T3 1 T4 257
valid_sources[0x78] 405036 1 T1 8 T3 4 T4 375
valid_sources[0x79] 414039 1 T1 8 T3 1 T4 284
valid_sources[0x7a] 462829 1 T1 8 T3 3 T4 240
valid_sources[0x7b] 423159 1 T1 4 T3 3 T4 219
valid_sources[0x7c] 398939 1 T1 3 T4 340 T5 6
valid_sources[0x7d] 420789 1 T1 12 T3 2 T4 381
valid_sources[0x7e] 403186 1 T1 6 T3 3 T4 267
valid_sources[0x7f] 413499 1 T1 9 T3 2 T4 277
valid_sources[0x80] 406672 1 T1 8 T3 4 T4 290



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20992024 1 T1 77 T2 7 T3 80
values[0x0] all_enables biggest_size 4771213 1 T1 68 T2 3 T3 10
values[0x1] all_enables biggest_size 4705036 1 T1 33 T2 1 T3 3

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%