Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	84155835	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

32438090

1

T1

124

T2

234

T3

70867

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	106598850	1			T1	2468		T2	5061		T3	105295
values[0x0]	4722366	1			T1	112		T2	102		T3	25583
values[0x1]	5272709	1			T1	134		T2	131		T3	27983

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	58553689	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

58040236

1

T1

963

T2

1891

T3

99465

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	437772	1			T1	18		T2	12		T3	618
valid_sources[0x01]	430081	1			T1	6		T2	36		T3	676
valid_sources[0x02]	536928	1			T1	12		T2	15		T3	625
valid_sources[0x03]	466314	1			T1	9		T2	16		T3	663
valid_sources[0x04]	503734	1			T1	8		T2	27		T3	643
valid_sources[0x05]	460849	1			T1	9		T2	27		T3	630
valid_sources[0x06]	459930	1			T1	14		T2	11		T3	626
valid_sources[0x07]	435671	1			T1	3		T2	23		T3	644
valid_sources[0x08]	449090	1			T1	1		T2	37		T3	599
valid_sources[0x09]	433208	1			T1	21		T2	35		T3	592
valid_sources[0x0a]	434219	1			T1	8		T2	14		T3	595
valid_sources[0x0b]	420522	1			T1	6		T2	49		T3	647
valid_sources[0x0c]	443852	1			T1	10		T2	20		T3	624
valid_sources[0x0d]	430106	1			T1	18		T2	5		T3	622
valid_sources[0x0e]	441880	1			T1	22		T2	44		T3	615
valid_sources[0x0f]	444235	1			T1	19		T2	7		T3	616
valid_sources[0x10]	421751	1			T1	4		T2	12		T3	615
valid_sources[0x11]	463434	1			T1	13		T2	7		T3	626
valid_sources[0x12]	441421	1			T1	2		T2	22		T3	624
valid_sources[0x13]	424332	1			T1	6		T2	16		T3	638
valid_sources[0x14]	444251	1			T2	16		T3	612		T4	323
valid_sources[0x15]	499750	1			T1	6		T2	26		T3	614
valid_sources[0x16]	473440	1			T1	7		T2	26		T3	634
valid_sources[0x17]	421549	1			T1	12		T2	12		T3	637
valid_sources[0x18]	465893	1			T1	11		T2	36		T3	671
valid_sources[0x19]	455366	1			T1	4		T2	36		T3	650
valid_sources[0x1a]	427051	1			T1	3		T2	34		T3	617
valid_sources[0x1b]	462470	1			T1	16		T2	9		T3	588
valid_sources[0x1c]	440687	1			T1	12		T2	21		T3	575
valid_sources[0x1d]	437830	1			T1	10		T2	26		T3	638
valid_sources[0x1e]	450518	1			T1	8		T2	25		T3	604
valid_sources[0x1f]	471564	1			T1	14		T2	29		T3	608
valid_sources[0x20]	481961	1			T1	13		T2	30		T3	662
valid_sources[0x21]	470860	1			T1	7		T2	17		T3	601
valid_sources[0x22]	425551	1			T1	7		T2	10		T3	623
valid_sources[0x23]	451493	1			T1	6		T2	36		T3	611
valid_sources[0x24]	423726	1			T1	9		T2	11		T3	614
valid_sources[0x25]	464031	1			T1	6		T2	17		T3	577
valid_sources[0x26]	429802	1			T1	1		T2	25		T3	638
valid_sources[0x27]	451236	1			T1	18		T2	25		T3	673
valid_sources[0x28]	512070	1			T1	13		T2	17		T3	601
valid_sources[0x29]	429475	1			T1	11		T2	10		T3	597
valid_sources[0x2a]	459384	1			T1	8		T2	36		T3	668
valid_sources[0x2b]	458481	1			T1	13		T2	20		T3	621
valid_sources[0x2c]	462185	1			T1	8		T2	19		T3	609
valid_sources[0x2d]	564757	1			T1	6		T2	17		T3	609
valid_sources[0x2e]	517842	1			T1	3		T2	26		T3	664
valid_sources[0x2f]	428851	1			T1	3		T2	18		T3	589
valid_sources[0x30]	441643	1			T1	4		T2	19		T3	650
valid_sources[0x31]	446306	1			T1	12		T2	11		T3	598
valid_sources[0x32]	446623	1			T1	6		T2	11		T3	673
valid_sources[0x33]	463179	1			T1	11		T2	15		T3	619
valid_sources[0x34]	464909	1			T1	15		T2	8		T3	638
valid_sources[0x35]	485119	1			T1	13		T2	6		T3	640
valid_sources[0x36]	443073	1			T1	16		T2	17		T3	710
valid_sources[0x37]	474233	1			T1	10		T2	9		T3	585
valid_sources[0x38]	429544	1			T1	19		T2	26		T3	607
valid_sources[0x39]	536735	1			T1	8		T2	18		T3	596
valid_sources[0x3a]	441885	1			T1	17		T2	11		T3	615
valid_sources[0x3b]	434017	1			T1	21		T2	41		T3	674
valid_sources[0x3c]	443673	1			T1	4		T2	18		T3	607
valid_sources[0x3d]	508039	1			T1	31		T2	22		T3	574
valid_sources[0x3e]	453279	1			T1	4		T2	10		T3	649
valid_sources[0x3f]	421384	1			T1	7		T2	15		T3	629
valid_sources[0x40]	443821	1			T1	12		T2	29		T3	622
valid_sources[0x41]	716497	1			T1	33		T2	17		T3	599
valid_sources[0x42]	451785	1			T1	4		T2	44		T3	675
valid_sources[0x43]	420050	1			T1	5		T2	25		T3	627
valid_sources[0x44]	439356	1			T1	4		T2	19		T3	570
valid_sources[0x45]	455537	1			T1	16		T2	24		T3	682
valid_sources[0x46]	469857	1			T1	13		T2	20		T3	680
valid_sources[0x47]	433859	1			T1	11		T2	11		T3	560
valid_sources[0x48]	442258	1			T1	13		T2	16		T3	573
valid_sources[0x49]	474908	1			T1	13		T2	16		T3	678
valid_sources[0x4a]	413197	1			T1	12		T2	9		T3	562
valid_sources[0x4b]	462591	1			T1	9		T2	15		T3	598
valid_sources[0x4c]	456943	1			T1	7		T2	27		T3	627
valid_sources[0x4d]	491335	1			T1	13		T2	14		T3	615
valid_sources[0x4e]	457815	1			T1	10		T2	32		T3	637
valid_sources[0x4f]	443191	1			T1	23		T2	19		T3	588
valid_sources[0x50]	430554	1			T1	10		T2	13		T3	624
valid_sources[0x51]	434845	1			T1	2		T2	13		T3	635
valid_sources[0x52]	524630	1			T1	2		T2	20		T3	625
valid_sources[0x53]	421662	1			T1	1		T2	34		T3	628
valid_sources[0x54]	460908	1			T1	10		T2	34		T3	622
valid_sources[0x55]	445579	1			T2	12		T3	618		T4	305
valid_sources[0x56]	443579	1			T1	5		T2	30		T3	649
valid_sources[0x57]	453041	1			T1	12		T2	12		T3	603
valid_sources[0x58]	439431	1			T1	27		T2	41		T3	584
valid_sources[0x59]	438914	1			T1	3		T2	20		T3	634
valid_sources[0x5a]	465994	1			T1	10		T2	31		T3	590
valid_sources[0x5b]	469384	1			T1	7		T2	22		T3	640
valid_sources[0x5c]	445050	1			T1	26		T2	21		T3	595
valid_sources[0x5d]	437422	1			T1	14		T2	11		T3	661
valid_sources[0x5e]	436362	1			T2	27		T3	631		T4	316
valid_sources[0x5f]	441381	1			T1	13		T2	12		T3	617
valid_sources[0x60]	460171	1			T1	2		T2	14		T3	570
valid_sources[0x61]	437741	1			T1	4		T2	43		T3	634
valid_sources[0x62]	435393	1			T1	10		T2	17		T3	623
valid_sources[0x63]	454915	1			T1	6		T2	18		T3	615
valid_sources[0x64]	458454	1			T1	11		T2	9		T3	573
valid_sources[0x65]	438109	1			T1	16		T2	28		T3	613
valid_sources[0x66]	474209	1			T1	16		T2	19		T3	644
valid_sources[0x67]	477550	1			T1	17		T2	11		T3	597
valid_sources[0x68]	424603	1			T1	18		T2	5		T3	603
valid_sources[0x69]	447181	1			T1	11		T2	32		T3	571
valid_sources[0x6a]	440087	1			T1	8		T2	13		T3	643
valid_sources[0x6b]	455302	1			T1	4		T2	18		T3	641
valid_sources[0x6c]	494557	1			T2	18		T3	613		T4	328
valid_sources[0x6d]	438941	1			T1	15		T2	11		T3	624
valid_sources[0x6e]	557239	1			T1	23		T2	16		T3	635
valid_sources[0x6f]	531111	1			T1	8		T2	22		T3	634
valid_sources[0x70]	521179	1			T1	9		T2	39		T3	617
valid_sources[0x71]	474391	1			T1	2		T2	10		T3	645
valid_sources[0x72]	492804	1			T1	3		T2	15		T3	591
valid_sources[0x73]	424553	1			T1	4		T2	7		T3	672
valid_sources[0x74]	448132	1			T1	12		T2	18		T3	655
valid_sources[0x75]	441953	1			T1	17		T2	20		T3	632
valid_sources[0x76]	444739	1			T1	24		T2	16		T3	636
valid_sources[0x77]	440710	1			T1	9		T2	19		T3	655
valid_sources[0x78]	485184	1			T1	13		T2	22		T3	600
valid_sources[0x79]	451645	1			T1	15		T2	42		T3	594
valid_sources[0x7a]	438102	1			T1	15		T2	23		T3	622
valid_sources[0x7b]	446169	1			T1	4		T2	41		T3	616
valid_sources[0x7c]	415887	1			T1	15		T2	8		T3	607
valid_sources[0x7d]	471374	1			T1	9		T2	10		T3	610
valid_sources[0x7e]	451820	1			T1	5		T2	19		T3	629
valid_sources[0x7f]	431575	1			T1	13		T2	8		T3	588
valid_sources[0x80]	429370	1			T1	5		T2	31		T3	606

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

23598792

1

T1

59

T2

148

T3

23216

values[0x0]

all_enables

biggest_size

4450162

1

T1

38

T2

44

T3

24112

values[0x1]

all_enables

biggest_size

4389136

1

T1

27

T2

42

T3

23539