Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 74076269 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 29594502 1 T1 248 T2 92 T3 17



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 93043819 1 T1 512783 T2 2290 T3 7550
values[0x0] 5023283 1 T1 202 T2 66 T3 12
values[0x1] 5603669 1 T1 209 T2 53 T3 14



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 51317952 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 52352819 1 T1 170912 T2 836 T3 3802



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 402122 1 T1 2093 T4 19 T5 1339
valid_sources[0x01] 378200 1 T1 1979 T4 10 T5 1336
valid_sources[0x02] 427676 1 T1 1926 T4 19 T5 1423
valid_sources[0x03] 502759 1 T1 1970 T4 14 T5 1371
valid_sources[0x04] 378117 1 T1 2020 T4 24 T5 1398
valid_sources[0x05] 363437 1 T1 2002 T4 14 T5 1337
valid_sources[0x06] 416083 1 T1 1918 T4 19 T5 1338
valid_sources[0x07] 443056 1 T1 2132 T4 17 T5 1377
valid_sources[0x08] 429948 1 T1 2048 T4 19 T5 1378
valid_sources[0x09] 417248 1 T1 1952 T3 1296 T4 26
valid_sources[0x0a] 374058 1 T1 1775 T4 13 T5 1394
valid_sources[0x0b] 376582 1 T1 1838 T4 19 T5 1337
valid_sources[0x0c] 374704 1 T1 1966 T4 16 T5 1360
valid_sources[0x0d] 394579 1 T1 1873 T4 23 T5 1304
valid_sources[0x0e] 382238 1 T1 1941 T4 24 T5 1412
valid_sources[0x0f] 382357 1 T1 1930 T4 19 T5 1328
valid_sources[0x10] 386874 1 T1 1931 T4 22 T5 1346
valid_sources[0x11] 405570 1 T1 1876 T4 14 T5 1305
valid_sources[0x12] 389073 1 T1 1914 T4 20 T5 1321
valid_sources[0x13] 421468 1 T1 2034 T4 23 T5 1347
valid_sources[0x14] 389240 1 T1 2016 T4 16 T5 1379
valid_sources[0x15] 416511 1 T1 1918 T4 19 T5 1342
valid_sources[0x16] 371870 1 T1 2029 T4 16 T5 1396
valid_sources[0x17] 388898 1 T1 2130 T4 30 T5 1424
valid_sources[0x18] 384403 1 T1 2109 T4 34 T5 1320
valid_sources[0x19] 380609 1 T1 2067 T4 18 T5 1426
valid_sources[0x1a] 446537 1 T1 2000 T4 23 T5 1373
valid_sources[0x1b] 394091 1 T1 2013 T4 16 T5 1320
valid_sources[0x1c] 397836 1 T1 2171 T4 24 T5 1298
valid_sources[0x1d] 395499 1 T1 2057 T4 21 T5 1336
valid_sources[0x1e] 380402 1 T1 1907 T4 20 T5 1343
valid_sources[0x1f] 375662 1 T1 1987 T4 16 T5 1383
valid_sources[0x20] 397760 1 T1 2076 T4 22 T5 1339
valid_sources[0x21] 429875 1 T1 1931 T4 18 T5 1283
valid_sources[0x22] 383085 1 T1 1900 T4 17 T5 1389
valid_sources[0x23] 432896 1 T1 1981 T2 2409 T4 26
valid_sources[0x24] 365055 1 T1 1997 T4 15 T5 1334
valid_sources[0x25] 391200 1 T1 1896 T4 22 T5 1371
valid_sources[0x26] 369591 1 T1 1991 T4 27 T5 1403
valid_sources[0x27] 374509 1 T1 2036 T4 17 T5 1377
valid_sources[0x28] 398353 1 T1 1976 T4 15 T5 1366
valid_sources[0x29] 384074 1 T1 2026 T4 28 T5 1454
valid_sources[0x2a] 408620 1 T1 2027 T4 20 T5 1347
valid_sources[0x2b] 391810 1 T1 2068 T4 25 T5 1337
valid_sources[0x2c] 384943 1 T1 1959 T4 16 T5 1330
valid_sources[0x2d] 379528 1 T1 2052 T4 21 T5 1332
valid_sources[0x2e] 384069 1 T1 2114 T4 21 T5 1411
valid_sources[0x2f] 381383 1 T1 2027 T4 16 T5 1320
valid_sources[0x30] 394455 1 T1 1950 T4 22 T5 1387
valid_sources[0x31] 499888 1 T1 2037 T4 21 T5 1316
valid_sources[0x32] 398243 1 T1 1992 T4 17 T5 1392
valid_sources[0x33] 419370 1 T1 1942 T4 21 T5 1327
valid_sources[0x34] 380387 1 T1 2070 T4 20 T5 1360
valid_sources[0x35] 394132 1 T1 2007 T4 23 T5 1426
valid_sources[0x36] 390711 1 T1 2016 T4 11 T5 1362
valid_sources[0x37] 406658 1 T1 2025 T4 24 T5 1326
valid_sources[0x38] 381283 1 T1 2012 T4 25 T5 1321
valid_sources[0x39] 373858 1 T1 1920 T4 20 T5 1375
valid_sources[0x3a] 478279 1 T1 2150 T4 12 T5 1363
valid_sources[0x3b] 420800 1 T1 2081 T4 19 T5 1355
valid_sources[0x3c] 377819 1 T1 2139 T4 14 T5 1329
valid_sources[0x3d] 665335 1 T1 2022 T4 27 T5 1352
valid_sources[0x3e] 385753 1 T1 2039 T4 23 T5 1424
valid_sources[0x3f] 396917 1 T1 2063 T4 16 T5 1295
valid_sources[0x40] 396494 1 T1 1935 T3 1295 T4 27
valid_sources[0x41] 487208 1 T1 2021 T4 24 T5 1336
valid_sources[0x42] 386176 1 T1 2136 T4 35 T5 1283
valid_sources[0x43] 422331 1 T1 1907 T4 20 T5 1390
valid_sources[0x44] 399460 1 T1 1994 T4 26 T5 1315
valid_sources[0x45] 403439 1 T1 2107 T4 23 T5 1391
valid_sources[0x46] 410466 1 T1 2075 T4 13 T5 1383
valid_sources[0x47] 473279 1 T1 1870 T4 18 T5 1370
valid_sources[0x48] 385944 1 T1 2100 T4 15 T5 1422
valid_sources[0x49] 375576 1 T1 2001 T4 18 T5 1330
valid_sources[0x4a] 392327 1 T1 2089 T4 32 T5 1371
valid_sources[0x4b] 394356 1 T1 1944 T4 13 T5 1340
valid_sources[0x4c] 469983 1 T1 1997 T4 20 T5 1398
valid_sources[0x4d] 415837 1 T1 1941 T4 10 T5 1342
valid_sources[0x4e] 386631 1 T1 2023 T4 32 T5 1368
valid_sources[0x4f] 375614 1 T1 2001 T4 22 T5 1364
valid_sources[0x50] 387156 1 T1 1838 T4 18 T5 1357
valid_sources[0x51] 393042 1 T1 2010 T4 21 T5 1377
valid_sources[0x52] 365751 1 T1 2037 T4 22 T5 1363
valid_sources[0x53] 406618 1 T1 2071 T4 16 T5 1363
valid_sources[0x54] 387722 1 T1 2000 T4 25 T5 1381
valid_sources[0x55] 379252 1 T1 1985 T4 21 T5 1338
valid_sources[0x56] 400900 1 T1 2126 T4 21 T5 1382
valid_sources[0x57] 390947 1 T1 2011 T4 18 T5 1417
valid_sources[0x58] 371149 1 T1 1858 T4 20 T5 1355
valid_sources[0x59] 421111 1 T1 1971 T4 21 T5 1325
valid_sources[0x5a] 389038 1 T1 2082 T4 17 T5 1401
valid_sources[0x5b] 520969 1 T1 1980 T4 17 T5 1315
valid_sources[0x5c] 516899 1 T1 2101 T4 18 T5 1361
valid_sources[0x5d] 379368 1 T1 1969 T4 16 T5 1299
valid_sources[0x5e] 387750 1 T1 1939 T4 17 T5 1385
valid_sources[0x5f] 497648 1 T1 1912 T4 14 T5 1413
valid_sources[0x60] 385485 1 T1 2106 T4 17 T5 1389
valid_sources[0x61] 491150 1 T1 2049 T4 15 T5 1324
valid_sources[0x62] 414100 1 T1 2017 T4 12 T5 1428
valid_sources[0x63] 371093 1 T1 2037 T4 16 T5 1335
valid_sources[0x64] 401633 1 T1 2092 T4 20 T5 1378
valid_sources[0x65] 396678 1 T1 2026 T4 28 T5 1363
valid_sources[0x66] 416787 1 T1 2009 T4 26 T5 1382
valid_sources[0x67] 374801 1 T1 2021 T4 21 T5 1335
valid_sources[0x68] 403997 1 T1 1868 T4 14 T5 1324
valid_sources[0x69] 434517 1 T1 1983 T4 15 T5 1346
valid_sources[0x6a] 435213 1 T1 2069 T4 12 T5 1343
valid_sources[0x6b] 402681 1 T1 1853 T4 23 T5 1317
valid_sources[0x6c] 410714 1 T1 1932 T4 18 T5 1346
valid_sources[0x6d] 410562 1 T1 2114 T4 26 T5 1336
valid_sources[0x6e] 385542 1 T1 2040 T4 29 T5 1384
valid_sources[0x6f] 444480 1 T1 2001 T4 16 T5 1328
valid_sources[0x70] 379865 1 T1 2020 T4 16 T5 1318
valid_sources[0x71] 392796 1 T1 2135 T3 1296 T4 26
valid_sources[0x72] 378198 1 T1 2035 T4 12 T5 1388
valid_sources[0x73] 408929 1 T1 1973 T4 21 T5 1352
valid_sources[0x74] 395184 1 T1 2128 T4 15 T5 1357
valid_sources[0x75] 405486 1 T1 1982 T4 22 T5 1352
valid_sources[0x76] 460843 1 T1 2013 T4 27 T5 1323
valid_sources[0x77] 386062 1 T1 1946 T4 25 T5 1384
valid_sources[0x78] 406154 1 T1 2068 T4 19 T5 1382
valid_sources[0x79] 379871 1 T1 1930 T4 23 T5 1378
valid_sources[0x7a] 511301 1 T1 2057 T4 14 T5 1345
valid_sources[0x7b] 391659 1 T1 1951 T4 24 T5 1379
valid_sources[0x7c] 387210 1 T1 1989 T4 15 T5 1414
valid_sources[0x7d] 477944 1 T1 2131 T4 7 T5 1332
valid_sources[0x7e] 388517 1 T1 2095 T4 14 T5 1306
valid_sources[0x7f] 385952 1 T1 2092 T4 19 T5 1386
valid_sources[0x80] 382702 1 T1 2136 T4 19 T5 1278



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20157746 1 T1 129 T2 4 T4 150
values[0x0] all_enables biggest_size 4751300 1 T1 78 T2 51 T3 8
values[0x1] all_enables biggest_size 4685456 1 T1 41 T2 37 T3 9

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%