Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	70045929	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

28220232

1

T1

32

T2

216

T3

254

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	87783950	1			T1	1		T2	186309		T3	6876
values[0x0]	4955202	1			T1	22		T2	192		T3	155
values[0x1]	5527009	1			T1	20		T2	217		T3	156

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	48497341	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

49768820

1

T1

36

T2

62256

T3

2502

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	355470	1			T1	2		T2	810		T3	36
valid_sources[0x01]	371495	1			T2	709		T3	22		T4	352
valid_sources[0x02]	379891	1			T2	722		T3	20		T4	4237
valid_sources[0x03]	370732	1			T2	613		T3	39		T4	1656
valid_sources[0x04]	458847	1			T2	683		T3	29		T4	406
valid_sources[0x05]	385375	1			T1	2		T2	752		T3	26
valid_sources[0x06]	374742	1			T2	740		T3	25		T4	3340
valid_sources[0x07]	389293	1			T2	797		T3	30		T4	373
valid_sources[0x08]	434770	1			T2	721		T3	24		T4	2990
valid_sources[0x09]	438871	1			T2	775		T3	30		T4	810
valid_sources[0x0a]	496815	1			T1	1		T2	654		T3	22
valid_sources[0x0b]	368545	1			T2	729		T3	33		T4	606
valid_sources[0x0c]	440867	1			T2	721		T3	31		T4	1184
valid_sources[0x0d]	363738	1			T2	742		T3	34		T4	304
valid_sources[0x0e]	372422	1			T1	1		T2	623		T3	18
valid_sources[0x0f]	379225	1			T2	849		T3	20		T4	6158
valid_sources[0x10]	352131	1			T2	822		T3	29		T4	197
valid_sources[0x11]	364683	1			T2	776		T3	32		T4	246
valid_sources[0x12]	362408	1			T2	755		T3	32		T4	3256
valid_sources[0x13]	483873	1			T2	700		T3	35		T4	2812
valid_sources[0x14]	373669	1			T1	1		T2	659		T3	36
valid_sources[0x15]	355577	1			T1	1		T2	686		T3	29
valid_sources[0x16]	369810	1			T2	691		T3	26		T4	1326
valid_sources[0x17]	364074	1			T2	728		T3	33		T4	2790
valid_sources[0x18]	374755	1			T2	657		T3	28		T4	176
valid_sources[0x19]	390499	1			T2	633		T3	31		T4	3079
valid_sources[0x1a]	353463	1			T2	632		T3	38		T4	506
valid_sources[0x1b]	367674	1			T1	1		T2	671		T3	45
valid_sources[0x1c]	492982	1			T2	781		T3	25		T4	380
valid_sources[0x1d]	401606	1			T2	747		T3	22		T4	1555
valid_sources[0x1e]	413889	1			T2	833		T3	35		T4	1712
valid_sources[0x1f]	359827	1			T2	682		T3	27		T4	362
valid_sources[0x20]	345643	1			T2	674		T3	33		T4	562
valid_sources[0x21]	363640	1			T1	1		T2	818		T3	25
valid_sources[0x22]	458083	1			T2	673		T3	24		T4	682
valid_sources[0x23]	395026	1			T2	763		T3	21		T4	233
valid_sources[0x24]	362194	1			T2	814		T3	29		T4	591
valid_sources[0x25]	349667	1			T2	706		T3	33		T4	448
valid_sources[0x26]	521767	1			T2	714		T3	20		T4	290
valid_sources[0x27]	338198	1			T2	755		T3	35		T4	204
valid_sources[0x28]	363628	1			T2	804		T3	30		T4	411
valid_sources[0x29]	371480	1			T2	728		T3	27		T4	496
valid_sources[0x2a]	349135	1			T2	733		T3	28		T4	791
valid_sources[0x2b]	424220	1			T2	803		T3	21		T4	191
valid_sources[0x2c]	367635	1			T2	767		T3	31		T4	1070
valid_sources[0x2d]	362293	1			T1	1		T2	708		T3	29
valid_sources[0x2e]	366548	1			T2	704		T3	21		T4	3693
valid_sources[0x2f]	352184	1			T2	767		T3	26		T4	782
valid_sources[0x30]	370033	1			T1	1		T2	666		T3	40
valid_sources[0x31]	348780	1			T2	804		T3	19		T4	427
valid_sources[0x32]	466562	1			T2	625		T3	25		T4	280
valid_sources[0x33]	367534	1			T2	759		T3	27		T4	263
valid_sources[0x34]	359817	1			T2	776		T3	36		T4	592
valid_sources[0x35]	353179	1			T1	1		T2	611		T3	35
valid_sources[0x36]	361356	1			T2	624		T3	29		T4	2929
valid_sources[0x37]	395839	1			T2	706		T3	26		T4	1443
valid_sources[0x38]	357093	1			T1	1		T2	682		T3	26
valid_sources[0x39]	350534	1			T2	748		T3	28		T4	1219
valid_sources[0x3a]	332209	1			T2	646		T3	21		T4	837
valid_sources[0x3b]	366607	1			T1	1		T2	697		T3	23
valid_sources[0x3c]	361113	1			T2	732		T3	30		T4	483
valid_sources[0x3d]	398784	1			T2	781		T3	19		T4	725
valid_sources[0x3e]	406539	1			T2	688		T3	33		T4	799
valid_sources[0x3f]	380396	1			T1	1		T2	694		T3	34
valid_sources[0x40]	404053	1			T2	692		T3	26		T4	361
valid_sources[0x41]	368667	1			T2	754		T3	28		T4	278
valid_sources[0x42]	375463	1			T2	690		T3	23		T4	673
valid_sources[0x43]	364923	1			T2	747		T3	30		T4	239
valid_sources[0x44]	374266	1			T2	785		T3	25		T4	507
valid_sources[0x45]	385393	1			T2	788		T3	36		T4	6263
valid_sources[0x46]	373270	1			T2	829		T3	43		T4	370
valid_sources[0x47]	403931	1			T1	2		T2	757		T3	29
valid_sources[0x48]	686574	1			T2	809		T3	33		T4	290
valid_sources[0x49]	366255	1			T1	1		T2	665		T3	28
valid_sources[0x4a]	439612	1			T2	692		T3	40		T4	246
valid_sources[0x4b]	399183	1			T2	559		T3	34		T4	430
valid_sources[0x4c]	390051	1			T2	739		T3	29		T4	500
valid_sources[0x4d]	387528	1			T2	745		T3	25		T4	392
valid_sources[0x4e]	344843	1			T2	692		T3	38		T4	521
valid_sources[0x4f]	372430	1			T2	664		T3	31		T4	264
valid_sources[0x50]	399280	1			T2	682		T3	32		T4	197
valid_sources[0x51]	377569	1			T2	736		T3	27		T4	280
valid_sources[0x52]	346183	1			T2	741		T3	31		T4	199
valid_sources[0x53]	370402	1			T2	790		T3	25		T4	945
valid_sources[0x54]	339775	1			T2	696		T3	29		T4	670
valid_sources[0x55]	380669	1			T2	699		T3	29		T4	2933
valid_sources[0x56]	366883	1			T2	674		T3	34		T4	583
valid_sources[0x57]	352271	1			T2	699		T3	27		T4	645
valid_sources[0x58]	417821	1			T2	783		T3	28		T4	527
valid_sources[0x59]	355492	1			T1	1		T2	768		T3	21
valid_sources[0x5a]	365359	1			T2	709		T3	26		T4	285
valid_sources[0x5b]	374538	1			T1	1		T2	742		T3	21
valid_sources[0x5c]	358690	1			T2	776		T3	21		T4	113
valid_sources[0x5d]	339663	1			T2	641		T3	27		T4	342
valid_sources[0x5e]	384384	1			T2	675		T3	32		T4	897
valid_sources[0x5f]	394120	1			T2	665		T3	24		T4	527
valid_sources[0x60]	387025	1			T2	689		T3	27		T4	342
valid_sources[0x61]	355782	1			T2	711		T3	28		T4	272
valid_sources[0x62]	372638	1			T2	741		T3	35		T4	692
valid_sources[0x63]	371164	1			T2	778		T3	15		T4	638
valid_sources[0x64]	354012	1			T2	666		T3	31		T4	923
valid_sources[0x65]	443355	1			T2	742		T3	37		T4	373
valid_sources[0x66]	395773	1			T2	741		T3	39		T4	612
valid_sources[0x67]	389992	1			T2	738		T3	28		T4	4284
valid_sources[0x68]	354920	1			T2	760		T3	24		T4	503
valid_sources[0x69]	431624	1			T2	802		T3	29		T4	961
valid_sources[0x6a]	345102	1			T1	1		T2	791		T3	36
valid_sources[0x6b]	379658	1			T2	679		T3	27		T4	585
valid_sources[0x6c]	403918	1			T2	811		T3	30		T4	265
valid_sources[0x6d]	445892	1			T1	1		T2	717		T3	32
valid_sources[0x6e]	369850	1			T1	1		T2	778		T3	19
valid_sources[0x6f]	351481	1			T2	616		T3	33		T4	285
valid_sources[0x70]	359734	1			T2	725		T3	35		T4	278
valid_sources[0x71]	386535	1			T2	617		T3	25		T4	453
valid_sources[0x72]	364299	1			T1	1		T2	731		T3	34
valid_sources[0x73]	395639	1			T2	747		T3	18		T4	310
valid_sources[0x74]	373433	1			T2	700		T3	27		T4	2670
valid_sources[0x75]	362667	1			T1	1		T2	690		T3	37
valid_sources[0x76]	356662	1			T1	1		T2	769		T3	20
valid_sources[0x77]	383928	1			T2	716		T3	35		T4	171
valid_sources[0x78]	462942	1			T2	709		T3	34		T4	263
valid_sources[0x79]	383004	1			T2	637		T3	31		T4	503
valid_sources[0x7a]	397123	1			T2	757		T3	27		T4	766
valid_sources[0x7b]	347533	1			T2	682		T3	27		T4	1826
valid_sources[0x7c]	364050	1			T2	856		T3	21		T4	745
valid_sources[0x7d]	392548	1			T2	722		T3	29		T4	1439
valid_sources[0x7e]	341914	1			T2	697		T3	25		T4	166
valid_sources[0x7f]	395921	1			T2	732		T3	23		T4	1092
valid_sources[0x80]	354029	1			T2	731		T3	23		T4	389

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

18905555

1

T1

1

T2

105

T3

156

values[0x0]

all_enables

biggest_size

4688350

1

T1

18

T2

64

T3

55

values[0x1]

all_enables

biggest_size

4626327

1

T1

13

T2

47

T3

43