Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
dashboard | hierarchy | modlist | groups | tests | asserts

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}
SCOREINSTANCESWEIGHTGOALAT LEASTPER INSTANCEAUTO BIN MAXPRINT MISSING
100.00 100.00 1 100 1 1 64 64


Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:
NAMESCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg 100.00 1 100 1 64 64




Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
100.00 1 100 1 64 64




Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 134 0 134 100.00
Crosses 3 0 3 100.00


Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_mask 1 0 1 100.00 100 1 1 0
cp_opcode 3 0 3 100.00 100 1 1 0
cp_size 1 0 1 100.00 100 1 1 0
cp_source 129 0 129 100.00 100 1 1 0


Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
tl_a_chan_cov_cg_cc 3 0 3 100.00 100 1 1 0


Summary for Variable cp_mask

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_mask

Excluded/Illegal bins
NAMECOUNTSTATUS
others 77976340 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
all_enables 29486236 1 T1 2 T2 13 T3 388



Summary for Variable cp_opcode

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 0 3 100.00


User Defined Bins for cp_opcode

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] 97166643 1 T1 1 T2 7703 T3 4452
values[0x0] 4867283 1 T1 4 T2 7 T3 162
values[0x1] 5428650 1 T1 5 T2 6 T3 160



Summary for Variable cp_size

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 1 0 1 100.00


User Defined Bins for cp_size

Excluded/Illegal bins
NAMECOUNTSTATUS
others 53909500 Excluded


Covered bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
biggest_size 53553076 1 T1 3 T2 2542 T3 1771



Summary for Variable cp_source

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 129 0 129 100.00


User Defined Bins for cp_source

Bins
NAMECOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
valid_sources[0x00] 402087 1 T2 33 T3 16 T4 2839
valid_sources[0x01] 418862 1 T2 30 T3 21 T4 2950
valid_sources[0x02] 408259 1 T2 30 T3 22 T4 2798
valid_sources[0x03] 407390 1 T2 26 T3 15 T4 2890
valid_sources[0x04] 533631 1 T2 34 T3 18 T4 2783
valid_sources[0x05] 402090 1 T2 28 T3 12 T4 2838
valid_sources[0x06] 407415 1 T2 26 T3 22 T4 2816
valid_sources[0x07] 408861 1 T2 27 T3 21 T4 2899
valid_sources[0x08] 407219 1 T2 25 T3 19 T4 2961
valid_sources[0x09] 532191 1 T2 29 T3 16 T4 2797
valid_sources[0x0a] 516475 1 T2 19 T3 19 T4 2802
valid_sources[0x0b] 381737 1 T2 36 T3 18 T4 2848
valid_sources[0x0c] 395165 1 T2 34 T3 26 T4 2949
valid_sources[0x0d] 384762 1 T2 27 T3 23 T4 2795
valid_sources[0x0e] 417500 1 T2 30 T3 20 T4 2862
valid_sources[0x0f] 423817 1 T2 22 T3 19 T4 2933
valid_sources[0x10] 429569 1 T2 30 T3 17 T4 2945
valid_sources[0x11] 427112 1 T2 24 T3 31 T4 2925
valid_sources[0x12] 408387 1 T2 39 T3 21 T4 2830
valid_sources[0x13] 418339 1 T2 30 T3 15 T4 2907
valid_sources[0x14] 404997 1 T2 27 T3 20 T4 2774
valid_sources[0x15] 373771 1 T2 22 T3 21 T4 2861
valid_sources[0x16] 390638 1 T2 26 T3 29 T4 3009
valid_sources[0x17] 429977 1 T2 35 T3 23 T4 2860
valid_sources[0x18] 388214 1 T2 29 T3 16 T4 3027
valid_sources[0x19] 442402 1 T2 30 T3 10 T4 2890
valid_sources[0x1a] 411253 1 T2 32 T3 21 T4 2853
valid_sources[0x1b] 417606 1 T2 23 T3 21 T4 2743
valid_sources[0x1c] 425312 1 T2 27 T3 20 T4 2855
valid_sources[0x1d] 406312 1 T2 41 T3 12 T4 2869
valid_sources[0x1e] 409298 1 T2 35 T3 26 T4 2756
valid_sources[0x1f] 453662 1 T2 22 T3 23 T4 2945
valid_sources[0x20] 500383 1 T2 25 T3 18 T4 2928
valid_sources[0x21] 443411 1 T2 20 T3 16 T4 2812
valid_sources[0x22] 408057 1 T2 32 T3 20 T4 2997
valid_sources[0x23] 417751 1 T2 28 T3 18 T4 2810
valid_sources[0x24] 383976 1 T2 33 T3 10 T4 2822
valid_sources[0x25] 402090 1 T2 29 T3 11 T4 2853
valid_sources[0x26] 424100 1 T2 19 T3 24 T4 2819
valid_sources[0x27] 473020 1 T1 10 T2 31 T3 22
valid_sources[0x28] 441194 1 T2 30 T3 13 T4 2920
valid_sources[0x29] 392710 1 T2 28 T3 20 T4 2968
valid_sources[0x2a] 403023 1 T2 21 T3 18 T4 2985
valid_sources[0x2b] 386019 1 T2 35 T3 17 T4 2859
valid_sources[0x2c] 368008 1 T2 21 T3 16 T4 2921
valid_sources[0x2d] 418517 1 T2 32 T3 12 T4 2838
valid_sources[0x2e] 386457 1 T2 35 T3 13 T4 2882
valid_sources[0x2f] 420219 1 T2 22 T3 21 T4 3030
valid_sources[0x30] 400058 1 T2 25 T3 17 T4 2877
valid_sources[0x31] 402001 1 T2 30 T3 15 T4 2915
valid_sources[0x32] 409900 1 T2 35 T3 29 T4 2846
valid_sources[0x33] 396622 1 T2 35 T3 11 T4 2895
valid_sources[0x34] 400401 1 T2 29 T3 25 T4 2852
valid_sources[0x35] 384085 1 T2 41 T3 15 T4 3056
valid_sources[0x36] 393759 1 T2 27 T3 14 T4 2853
valid_sources[0x37] 403320 1 T2 31 T3 26 T4 2887
valid_sources[0x38] 422369 1 T2 22 T3 15 T4 2835
valid_sources[0x39] 424645 1 T2 22 T3 21 T4 2821
valid_sources[0x3a] 403304 1 T2 31 T3 23 T4 2883
valid_sources[0x3b] 394774 1 T2 34 T3 11 T4 2767
valid_sources[0x3c] 423274 1 T2 35 T3 23 T4 2833
valid_sources[0x3d] 445308 1 T2 32 T3 22 T4 2801
valid_sources[0x3e] 401158 1 T2 33 T3 14 T4 2862
valid_sources[0x3f] 409869 1 T2 32 T3 15 T4 2928
valid_sources[0x40] 501035 1 T2 28 T3 16 T4 2838
valid_sources[0x41] 380593 1 T2 33 T3 20 T4 2910
valid_sources[0x42] 523980 1 T2 29 T3 23 T4 2712
valid_sources[0x43] 404803 1 T2 28 T3 24 T4 2894
valid_sources[0x44] 377076 1 T2 34 T3 26 T4 2879
valid_sources[0x45] 433495 1 T2 28 T3 23 T4 2761
valid_sources[0x46] 386653 1 T2 30 T3 17 T4 2878
valid_sources[0x47] 417719 1 T2 30 T3 20 T4 2944
valid_sources[0x48] 381538 1 T2 29 T3 20 T4 2820
valid_sources[0x49] 406693 1 T2 22 T3 24 T4 2827
valid_sources[0x4a] 417518 1 T2 39 T3 14 T4 2944
valid_sources[0x4b] 416892 1 T2 27 T3 22 T4 2797
valid_sources[0x4c] 430150 1 T2 32 T3 16 T4 2842
valid_sources[0x4d] 428185 1 T2 33 T3 22 T4 2826
valid_sources[0x4e] 425845 1 T2 29 T3 24 T4 2839
valid_sources[0x4f] 420863 1 T2 29 T3 16 T4 2845
valid_sources[0x50] 460436 1 T2 31 T3 26 T4 2841
valid_sources[0x51] 396827 1 T2 29 T3 18 T4 2935
valid_sources[0x52] 415311 1 T2 19 T3 16 T4 2988
valid_sources[0x53] 379929 1 T2 28 T3 22 T4 2930
valid_sources[0x54] 397069 1 T2 33 T3 14 T4 2847
valid_sources[0x55] 403409 1 T2 26 T3 16 T4 2838
valid_sources[0x56] 411208 1 T2 34 T3 22 T4 2860
valid_sources[0x57] 423711 1 T2 24 T3 22 T4 2871
valid_sources[0x58] 423850 1 T2 39 T3 22 T4 2896
valid_sources[0x59] 436782 1 T2 22 T3 17 T4 2734
valid_sources[0x5a] 402152 1 T2 37 T3 14 T4 2814
valid_sources[0x5b] 397520 1 T2 31 T3 22 T4 2757
valid_sources[0x5c] 429613 1 T2 26 T3 11 T4 2898
valid_sources[0x5d] 397648 1 T2 43 T3 26 T4 2884
valid_sources[0x5e] 399105 1 T2 41 T3 12 T4 2871
valid_sources[0x5f] 440307 1 T2 41 T3 25 T4 2997
valid_sources[0x60] 396785 1 T2 36 T3 18 T4 2738
valid_sources[0x61] 379186 1 T2 39 T3 18 T4 2887
valid_sources[0x62] 477857 1 T2 27 T3 19 T4 2739
valid_sources[0x63] 394124 1 T2 28 T3 27 T4 2799
valid_sources[0x64] 388839 1 T2 29 T3 14 T4 2829
valid_sources[0x65] 400470 1 T2 25 T3 16 T4 2911
valid_sources[0x66] 461029 1 T2 32 T3 15 T4 2836
valid_sources[0x67] 488499 1 T2 35 T3 21 T4 2895
valid_sources[0x68] 452325 1 T2 24 T3 25 T4 2892
valid_sources[0x69] 441299 1 T2 24 T3 17 T4 2903
valid_sources[0x6a] 387002 1 T2 29 T3 13 T4 2876
valid_sources[0x6b] 419066 1 T2 33 T3 26 T4 2837
valid_sources[0x6c] 434287 1 T2 31 T3 16 T4 2884
valid_sources[0x6d] 400609 1 T2 30 T3 10 T4 2838
valid_sources[0x6e] 390536 1 T2 33 T3 22 T4 2872
valid_sources[0x6f] 419311 1 T2 17 T3 19 T4 2813
valid_sources[0x70] 511117 1 T2 30 T3 23 T4 2884
valid_sources[0x71] 384136 1 T2 23 T3 20 T4 2924
valid_sources[0x72] 411956 1 T2 35 T3 14 T4 2892
valid_sources[0x73] 405450 1 T2 19 T3 21 T4 2954
valid_sources[0x74] 434631 1 T2 33 T3 22 T4 2874
valid_sources[0x75] 514752 1 T2 25 T3 18 T4 2869
valid_sources[0x76] 436667 1 T2 19 T3 21 T4 2744
valid_sources[0x77] 386756 1 T2 29 T3 7 T4 2834
valid_sources[0x78] 417154 1 T2 26 T3 18 T4 3000
valid_sources[0x79] 420226 1 T2 20 T3 9 T4 2823
valid_sources[0x7a] 390100 1 T2 30 T3 8 T4 2708
valid_sources[0x7b] 388108 1 T2 27 T3 23 T4 2904
valid_sources[0x7c] 394559 1 T2 32 T3 32 T4 2817
valid_sources[0x7d] 467873 1 T2 40 T3 9 T4 2885
valid_sources[0x7e] 526953 1 T2 29 T3 20 T4 2831
valid_sources[0x7f] 397033 1 T2 31 T3 15 T4 2814
valid_sources[0x80] 468154 1 T2 30 T3 18 T4 2803



Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 3 0 3 100.00


Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins
cp_opcodecp_maskcp_sizeCOUNTAT LEASTSTATUSTESTCOUNTTESTCOUNTTESTCOUNT
values[0x4] all_enables biggest_size 20330610 1 T1 1 T2 8 T3 278
values[0x0] all_enables biggest_size 4606198 1 T2 3 T3 67 T4 448
values[0x1] all_enables biggest_size 4549428 1 T1 1 T2 2 T3 43

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%