Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	67517318	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

25392017

1

T1

53564

T2

20

T3

21334

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	82920116	1			T1	486231		T2	379		T3	178605
values[0x0]	4721791	1			T1	1426		T2	28		T3	1859
values[0x1]	5267428	1			T1	1491		T2	27		T3	1870

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46522170	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

46387165

1

T1

191409

T2

157

T3

71706

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	365519	1			T1	1223		T3	641		T4	2
valid_sources[0x01]	388204	1			T1	972		T3	668		T4	2
valid_sources[0x02]	348674	1			T1	2119		T3	757		T6	471
valid_sources[0x03]	344538	1			T1	1237		T3	718		T4	2
valid_sources[0x04]	372321	1			T1	1541		T3	671		T4	3
valid_sources[0x05]	359236	1			T1	1308		T3	725		T6	1015
valid_sources[0x06]	363079	1			T1	1286		T3	722		T4	1
valid_sources[0x07]	369300	1			T1	2176		T3	678		T4	5
valid_sources[0x08]	390386	1			T1	1881		T3	707		T4	3
valid_sources[0x09]	329067	1			T1	1322		T3	687		T4	4
valid_sources[0x0a]	345517	1			T1	1888		T3	673		T6	1360
valid_sources[0x0b]	350685	1			T1	1505		T3	640		T4	1
valid_sources[0x0c]	341603	1			T1	1039		T3	710		T4	2
valid_sources[0x0d]	368683	1			T1	1321		T3	718		T4	3
valid_sources[0x0e]	350921	1			T1	1029		T3	807		T4	6
valid_sources[0x0f]	362080	1			T1	714		T3	698		T6	267
valid_sources[0x10]	351958	1			T1	1233		T3	675		T6	217
valid_sources[0x11]	347982	1			T1	1507		T3	700		T4	3
valid_sources[0x12]	364849	1			T1	4348		T3	714		T4	2
valid_sources[0x13]	376703	1			T1	735		T3	654		T4	6
valid_sources[0x14]	373783	1			T1	1412		T3	682		T4	1
valid_sources[0x15]	341011	1			T1	1176		T3	722		T4	6
valid_sources[0x16]	346606	1			T1	1644		T3	753		T4	5
valid_sources[0x17]	343709	1			T1	1759		T3	729		T4	2
valid_sources[0x18]	398471	1			T1	1517		T3	744		T4	5
valid_sources[0x19]	359593	1			T1	1074		T3	701		T6	327
valid_sources[0x1a]	333881	1			T1	958		T3	759		T4	5
valid_sources[0x1b]	348769	1			T1	810		T3	705		T4	2
valid_sources[0x1c]	349819	1			T1	1589		T3	683		T4	1
valid_sources[0x1d]	372803	1			T1	1986		T3	710		T4	3
valid_sources[0x1e]	380162	1			T1	1168		T3	766		T4	1
valid_sources[0x1f]	342935	1			T1	874		T3	714		T4	2
valid_sources[0x20]	339594	1			T1	1164		T3	721		T4	5
valid_sources[0x21]	355514	1			T1	649		T3	694		T4	2
valid_sources[0x22]	339787	1			T1	1240		T3	657		T4	6
valid_sources[0x23]	344988	1			T1	1050		T3	797		T4	1
valid_sources[0x24]	367277	1			T1	1926		T3	725		T4	2
valid_sources[0x25]	393355	1			T1	4926		T3	696		T4	2
valid_sources[0x26]	363185	1			T1	1244		T3	706		T4	2
valid_sources[0x27]	322758	1			T1	941		T3	731		T4	6
valid_sources[0x28]	375702	1			T1	1138		T3	654		T4	2
valid_sources[0x29]	347594	1			T1	814		T3	714		T4	2
valid_sources[0x2a]	358156	1			T1	1249		T3	729		T4	4
valid_sources[0x2b]	347110	1			T1	1397		T3	694		T4	5
valid_sources[0x2c]	333213	1			T1	991		T3	770		T4	1
valid_sources[0x2d]	353738	1			T1	857		T3	680		T4	4
valid_sources[0x2e]	341438	1			T1	1096		T3	761		T4	3
valid_sources[0x2f]	438824	1			T1	1224		T3	721		T4	6
valid_sources[0x30]	349116	1			T1	1528		T3	735		T4	5
valid_sources[0x31]	359335	1			T1	1339		T3	714		T6	178
valid_sources[0x32]	369236	1			T1	2248		T3	704		T4	3
valid_sources[0x33]	469240	1			T1	1853		T3	767		T4	2
valid_sources[0x34]	358796	1			T1	1214		T3	775		T4	5
valid_sources[0x35]	354452	1			T1	789		T3	685		T6	373
valid_sources[0x36]	378534	1			T1	1563		T3	818		T4	5
valid_sources[0x37]	374265	1			T1	1180		T3	691		T4	3
valid_sources[0x38]	380314	1			T1	2383		T3	689		T4	2
valid_sources[0x39]	353102	1			T1	1964		T3	689		T4	2
valid_sources[0x3a]	393206	1			T1	1294		T2	1		T3	658
valid_sources[0x3b]	372452	1			T1	1694		T3	692		T4	1
valid_sources[0x3c]	396213	1			T1	1216		T3	650		T4	6
valid_sources[0x3d]	382522	1			T1	896		T3	735		T4	5
valid_sources[0x3e]	362146	1			T1	1127		T3	747		T4	2
valid_sources[0x3f]	353882	1			T1	1024		T3	700		T4	5
valid_sources[0x40]	339880	1			T1	1315		T3	722		T4	4
valid_sources[0x41]	383582	1			T1	3036		T3	728		T4	3
valid_sources[0x42]	360397	1			T1	1006		T3	726		T4	6
valid_sources[0x43]	345359	1			T1	1173		T3	720		T4	5
valid_sources[0x44]	449860	1			T1	2866		T3	674		T4	6
valid_sources[0x45]	387242	1			T1	1564		T3	720		T6	779
valid_sources[0x46]	334577	1			T1	1235		T3	708		T4	1
valid_sources[0x47]	455787	1			T1	1010		T3	682		T4	3
valid_sources[0x48]	350892	1			T1	1167		T3	711		T4	1
valid_sources[0x49]	353757	1			T1	1022		T3	765		T4	5
valid_sources[0x4a]	345128	1			T1	2150		T3	710		T4	5
valid_sources[0x4b]	372097	1			T1	1972		T3	715		T4	4
valid_sources[0x4c]	380033	1			T1	1454		T3	748		T4	1
valid_sources[0x4d]	354584	1			T1	1170		T3	772		T4	4
valid_sources[0x4e]	375376	1			T1	2866		T3	689		T4	1
valid_sources[0x4f]	354472	1			T1	1067		T3	703		T4	3
valid_sources[0x50]	324584	1			T1	2033		T3	709		T4	3
valid_sources[0x51]	463762	1			T1	1419		T3	716		T4	5
valid_sources[0x52]	337479	1			T1	834		T3	725		T4	5
valid_sources[0x53]	336524	1			T1	705		T3	757		T4	2
valid_sources[0x54]	353583	1			T1	889		T3	689		T4	2
valid_sources[0x55]	376709	1			T1	3224		T3	678		T4	3
valid_sources[0x56]	387981	1			T1	1209		T3	667		T4	6
valid_sources[0x57]	359441	1			T1	1385		T3	732		T4	4
valid_sources[0x58]	363727	1			T1	945		T3	652		T4	1
valid_sources[0x59]	353765	1			T1	793		T3	744		T4	2
valid_sources[0x5a]	342402	1			T1	1387		T3	790		T4	1
valid_sources[0x5b]	369897	1			T1	1258		T3	688		T4	4
valid_sources[0x5c]	358428	1			T1	1163		T3	760		T4	3
valid_sources[0x5d]	343170	1			T1	787		T3	709		T4	1
valid_sources[0x5e]	330734	1			T1	1366		T3	736		T4	1
valid_sources[0x5f]	351677	1			T1	1732		T3	702		T4	5
valid_sources[0x60]	565042	1			T1	1580		T3	683		T4	1
valid_sources[0x61]	437465	1			T1	103029		T3	712		T4	4
valid_sources[0x62]	346940	1			T1	934		T3	671		T6	278
valid_sources[0x63]	351533	1			T1	1399		T3	745		T6	130
valid_sources[0x64]	357914	1			T1	1474		T3	707		T4	2
valid_sources[0x65]	358255	1			T1	1421		T3	781		T4	4
valid_sources[0x66]	335025	1			T1	1213		T3	764		T4	6
valid_sources[0x67]	338233	1			T1	977		T3	715		T4	3
valid_sources[0x68]	414718	1			T1	1140		T3	674		T4	5
valid_sources[0x69]	355606	1			T1	1150		T3	739		T4	3
valid_sources[0x6a]	349005	1			T1	1127		T3	753		T4	6
valid_sources[0x6b]	377288	1			T1	886		T3	740		T4	2
valid_sources[0x6c]	352046	1			T1	2070		T3	754		T4	3
valid_sources[0x6d]	340409	1			T1	1011		T3	687		T4	4
valid_sources[0x6e]	393314	1			T1	1195		T2	31		T3	680
valid_sources[0x6f]	374012	1			T1	1202		T3	664		T4	1
valid_sources[0x70]	368313	1			T1	34446		T3	686		T6	564
valid_sources[0x71]	397015	1			T1	616		T3	644		T4	1
valid_sources[0x72]	371444	1			T1	1066		T3	762		T4	1
valid_sources[0x73]	338710	1			T1	1162		T3	719		T6	244
valid_sources[0x74]	331322	1			T1	1465		T3	685		T4	6
valid_sources[0x75]	349483	1			T1	1047		T3	650		T4	5
valid_sources[0x76]	348561	1			T1	583		T3	722		T4	4
valid_sources[0x77]	348307	1			T1	1028		T3	651		T4	2
valid_sources[0x78]	331076	1			T1	1361		T3	673		T4	3
valid_sources[0x79]	346408	1			T1	2015		T3	699		T4	1
valid_sources[0x7a]	462666	1			T1	1279		T3	762		T4	6
valid_sources[0x7b]	412955	1			T1	1907		T3	677		T4	3
valid_sources[0x7c]	357542	1			T1	1319		T3	676		T4	3
valid_sources[0x7d]	356747	1			T1	1824		T3	760		T4	3
valid_sources[0x7e]	416754	1			T1	2328		T3	749		T4	2
valid_sources[0x7f]	427199	1			T1	1052		T3	725		T4	6
valid_sources[0x80]	351288	1			T1	1127		T3	715		T4	3

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

16523255

1

T1

52847

T2

5

T3

20390

values[0x0]

all_enables

biggest_size

4461972

1

T1

477

T2

9

T3

642

values[0x1]

all_enables

biggest_size

4406790

1

T1

240

T2

6

T3

302