Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	64289345	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

15384117

1

T1

127

T2

21

T3

108

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	78490152	1			T1	41		T2	8138		T3	1513
values[0x0]	574025	1			T1	190		T2	29		T3	86
values[0x1]	609285	1			T1	185		T2	24		T3	93

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	44606552	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

35066910

1

T1

170

T2

2696

T3

605

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	294513	1			T2	39		T3	6		T5	198
valid_sources[0x01]	282324	1			T3	2		T5	180		T6	123
valid_sources[0x02]	297761	1			T1	11		T2	67		T3	8
valid_sources[0x03]	287253	1			T3	5		T5	216		T6	139
valid_sources[0x04]	317924	1			T3	9		T4	1		T5	188
valid_sources[0x05]	402231	1			T1	3		T3	8		T4	4
valid_sources[0x06]	368754	1			T3	7		T5	171		T6	138
valid_sources[0x07]	297393	1			T3	7		T5	178		T6	136
valid_sources[0x08]	346071	1			T1	1		T2	165		T3	14
valid_sources[0x09]	306923	1			T2	32		T3	7		T4	1
valid_sources[0x0a]	300367	1			T1	2		T3	5		T5	176
valid_sources[0x0b]	292515	1			T3	14		T5	156		T6	127
valid_sources[0x0c]	422072	1			T3	7		T5	213		T6	132
valid_sources[0x0d]	278088	1			T3	7		T5	169		T6	126
valid_sources[0x0e]	374806	1			T2	3		T3	9		T5	211
valid_sources[0x0f]	350623	1			T2	33		T3	12		T5	176
valid_sources[0x10]	315200	1			T1	4		T2	21		T3	12
valid_sources[0x11]	293465	1			T1	1		T2	1		T3	3
valid_sources[0x12]	295095	1			T1	9		T3	5		T5	184
valid_sources[0x13]	325331	1			T3	9		T5	201		T6	111
valid_sources[0x14]	298492	1			T2	127		T3	3		T5	170
valid_sources[0x15]	288039	1			T3	8		T5	175		T6	148
valid_sources[0x16]	350028	1			T3	9		T5	155		T6	110
valid_sources[0x17]	346228	1			T3	7		T5	158		T6	109
valid_sources[0x18]	321352	1			T3	4		T5	188		T6	133
valid_sources[0x19]	309797	1			T3	5		T5	155		T6	155
valid_sources[0x1a]	334572	1			T2	29		T3	13		T5	222
valid_sources[0x1b]	291287	1			T1	3		T2	4		T3	6
valid_sources[0x1c]	287400	1			T1	7		T2	2		T3	7
valid_sources[0x1d]	261155	1			T1	1		T3	8		T5	176
valid_sources[0x1e]	270617	1			T2	63		T3	8		T5	173
valid_sources[0x1f]	302470	1			T2	50		T3	2		T5	190
valid_sources[0x20]	298739	1			T1	2		T3	6		T5	202
valid_sources[0x21]	286931	1			T3	6		T5	179		T6	136
valid_sources[0x22]	284344	1			T2	10		T3	9		T5	172
valid_sources[0x23]	290122	1			T1	2		T3	8		T5	163
valid_sources[0x24]	346181	1			T1	1		T2	61		T3	5
valid_sources[0x25]	273179	1			T2	111		T3	6		T5	213
valid_sources[0x26]	357791	1			T2	84		T3	9		T5	169
valid_sources[0x27]	357985	1			T2	21		T3	1		T5	178
valid_sources[0x28]	280398	1			T1	1		T2	11		T3	1
valid_sources[0x29]	280252	1			T3	7		T5	171		T6	137
valid_sources[0x2a]	471898	1			T1	6		T2	6		T3	2
valid_sources[0x2b]	545506	1			T2	91		T3	12		T5	191
valid_sources[0x2c]	294798	1			T1	7		T2	119		T3	10
valid_sources[0x2d]	278003	1			T3	11		T5	174		T6	151
valid_sources[0x2e]	396183	1			T1	2		T2	239		T3	10
valid_sources[0x2f]	288624	1			T2	52		T3	7		T5	190
valid_sources[0x30]	285249	1			T1	3		T3	6		T5	176
valid_sources[0x31]	313417	1			T1	3		T3	8		T5	184
valid_sources[0x32]	328337	1			T3	7		T5	178		T6	136
valid_sources[0x33]	310239	1			T3	6		T5	185		T6	110
valid_sources[0x34]	286918	1			T1	7		T2	17		T3	16
valid_sources[0x35]	295191	1			T2	25		T3	4		T5	197
valid_sources[0x36]	370429	1			T3	6		T5	204		T6	136
valid_sources[0x37]	278995	1			T3	16		T5	177		T6	147
valid_sources[0x38]	283267	1			T3	3		T5	158		T6	145
valid_sources[0x39]	280124	1			T3	5		T5	159		T6	111
valid_sources[0x3a]	271751	1			T1	3		T3	18		T5	167
valid_sources[0x3b]	295251	1			T2	147		T3	5		T5	174
valid_sources[0x3c]	417556	1			T2	79		T3	7		T5	188
valid_sources[0x3d]	282074	1			T2	14		T3	5		T5	165
valid_sources[0x3e]	281922	1			T1	6		T3	8		T5	186
valid_sources[0x3f]	286287	1			T1	8		T3	10		T5	183
valid_sources[0x40]	306676	1			T2	190		T3	6		T5	189
valid_sources[0x41]	321430	1			T3	4		T4	8		T5	209
valid_sources[0x42]	331236	1			T2	29		T3	5		T5	183
valid_sources[0x43]	285543	1			T1	2		T2	7		T3	7
valid_sources[0x44]	281417	1			T1	1		T3	5		T5	188
valid_sources[0x45]	308943	1			T2	90		T3	11		T5	170
valid_sources[0x46]	405431	1			T3	9		T5	179		T6	161
valid_sources[0x47]	341816	1			T3	8		T5	172		T6	141
valid_sources[0x48]	265490	1			T1	3		T3	7		T5	173
valid_sources[0x49]	289268	1			T2	4		T3	6		T5	202
valid_sources[0x4a]	307499	1			T2	8		T3	4		T5	193
valid_sources[0x4b]	393056	1			T1	1		T3	7		T5	176
valid_sources[0x4c]	278911	1			T2	184		T3	3		T5	184
valid_sources[0x4d]	306237	1			T1	2		T2	13		T3	3
valid_sources[0x4e]	317554	1			T1	1		T2	89		T3	1
valid_sources[0x4f]	281376	1			T2	21		T3	3		T5	172
valid_sources[0x50]	272281	1			T3	7		T4	9		T5	191
valid_sources[0x51]	302667	1			T3	10		T5	161		T6	126
valid_sources[0x52]	285261	1			T2	126		T3	5		T5	181
valid_sources[0x53]	263810	1			T1	1		T2	32		T3	9
valid_sources[0x54]	296274	1			T3	4		T5	175		T6	132
valid_sources[0x55]	276952	1			T3	4		T4	7		T5	199
valid_sources[0x56]	336872	1			T1	6		T3	12		T5	191
valid_sources[0x57]	317244	1			T1	6		T3	6		T5	183
valid_sources[0x58]	267182	1			T2	6		T3	9		T5	165
valid_sources[0x59]	364159	1			T1	10		T2	23		T3	10
valid_sources[0x5a]	283681	1			T1	1		T2	25		T3	1
valid_sources[0x5b]	371278	1			T2	61		T3	3		T5	204
valid_sources[0x5c]	291497	1			T2	131		T3	7		T5	202
valid_sources[0x5d]	293158	1			T3	7		T4	4		T5	180
valid_sources[0x5e]	294330	1			T3	7		T5	198		T6	145
valid_sources[0x5f]	295608	1			T1	3		T2	11		T3	9
valid_sources[0x60]	286618	1			T2	12		T3	8		T5	182
valid_sources[0x61]	349707	1			T3	4		T5	190		T6	116
valid_sources[0x62]	292024	1			T3	3		T5	187		T6	141
valid_sources[0x63]	303194	1			T1	4		T3	8		T5	170
valid_sources[0x64]	301528	1			T1	3		T2	172		T3	6
valid_sources[0x65]	287128	1			T2	95		T3	10		T5	177
valid_sources[0x66]	292184	1			T1	1		T3	5		T5	166
valid_sources[0x67]	316955	1			T1	9		T2	7		T3	8
valid_sources[0x68]	307276	1			T1	4		T2	4		T3	7
valid_sources[0x69]	306192	1			T2	44		T5	189		T6	131
valid_sources[0x6a]	292390	1			T1	10		T3	12		T5	181
valid_sources[0x6b]	285540	1			T3	3		T5	199		T6	174
valid_sources[0x6c]	288856	1			T2	68		T3	4		T5	187
valid_sources[0x6d]	317164	1			T1	16		T2	41		T3	5
valid_sources[0x6e]	283203	1			T1	1		T2	6		T3	10
valid_sources[0x6f]	304825	1			T2	109		T3	2		T5	175
valid_sources[0x70]	291670	1			T1	2		T2	38		T3	13
valid_sources[0x71]	344840	1			T1	1		T3	7		T5	197
valid_sources[0x72]	302915	1			T3	11		T5	180		T6	141
valid_sources[0x73]	335565	1			T2	29		T3	9		T5	186
valid_sources[0x74]	284766	1			T1	1		T2	31		T3	10
valid_sources[0x75]	286470	1			T2	34		T3	4		T5	159
valid_sources[0x76]	288762	1			T3	3		T5	183		T6	139
valid_sources[0x77]	272503	1			T2	48		T3	7		T5	205
valid_sources[0x78]	302985	1			T2	12		T3	4		T4	2
valid_sources[0x79]	289376	1			T2	6		T3	2		T5	171
valid_sources[0x7a]	271727	1			T2	131		T3	8		T5	152
valid_sources[0x7b]	283162	1			T1	10		T3	10		T5	190
valid_sources[0x7c]	283944	1			T2	102		T3	1		T4	6
valid_sources[0x7d]	304726	1			T1	3		T2	138		T3	4
valid_sources[0x7e]	266121	1			T3	4		T5	202		T6	143
valid_sources[0x7f]	303684	1			T3	7		T5	169		T6	144
valid_sources[0x80]	269082	1			T3	8		T5	171		T6	139

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

14630931

1

T1

16

T2

5

T3

52

values[0x0]

all_enables

biggest_size

400566

1

T1

75

T2

12

T3

35

values[0x1]

all_enables

biggest_size

352620

1

T1

36

T2

4

T3

21