Unified Coverage Report :: Group :: tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

Group : tl_agent_pkg::tl_a_chan_cov_cg::SHAPE{(2 << ((valid_source_width - 1) - 1))=128}

SCORE	INSTANCES	WEIGHT	GOAL	AT LEAST	PER INSTANCE	AUTO BIN MAX	PRINT MISSING
100.00	100.00	1	100	1	1	64	64

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_dv_tl_agent_0/tl_agent_cov.sv

1 Instances:

NAME	SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg	100.00	1	100	1	64	64

---

Group Instance : tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

---

Summary for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	134	0	134	100.00
Crosses	3	0	3	100.00

Variables for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_mask	1	0	1	100.00	100	1	1	0
cp_opcode	3	0	3	100.00	100	1	1	0
cp_size	1	0	1	100.00	100	1	1	0
cp_source	129	0	129	100.00	100	1	1	0

Crosses for Group Instance tl_agent_pkg.uvm_test_top.env.m_tl_agent_uart_reg_block.cov::m_tl_a_chan_cov_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
tl_a_chan_cov_cg_cc	3	0	3	100.00	100	1	1	0

Summary for Variable cp_mask

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_mask

Excluded/Illegal bins

NAME	COUNT	STATUS
others	66560944	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

all_enables

14736910

1

T1

29

T2

107

T3

18705

---

Summary for Variable cp_opcode

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	3	0	3	100.00

User Defined Bins for cp_opcode

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
values[0x4]	80043761	1			T1	12778		T2	2765		T3	120508
values[0x0]	608157	1			T1	24		T2	98		T3	1291
values[0x1]	645936	1			T1	19		T2	90		T3	1282

---

Summary for Variable cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	1	0	1	100.00

User Defined Bins for cp_size

Excluded/Illegal bins

NAME	COUNT	STATUS
others	46063365	Excluded

Covered bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

biggest_size

35234489

1

T1

6427

T2

1052

T3

50726

---

Summary for Variable cp_source

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	129	0	129	100.00

User Defined Bins for cp_source

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
valid_sources[0x00]	297103	1			T2	14		T3	429		T4	9
valid_sources[0x01]	318531	1			T2	15		T3	275		T4	26
valid_sources[0x02]	286432	1			T2	11		T3	211		T6	2
valid_sources[0x03]	271303	1			T2	8		T3	188		T6	7
valid_sources[0x04]	305198	1			T2	7		T3	149		T6	4
valid_sources[0x05]	290788	1			T2	8		T3	122		T6	3
valid_sources[0x06]	294491	1			T2	15		T3	107		T6	3
valid_sources[0x07]	300548	1			T1	1		T2	13		T3	104
valid_sources[0x08]	296713	1			T2	16		T3	282		T4	5
valid_sources[0x09]	276645	1			T2	13		T3	269		T6	6
valid_sources[0x0a]	303372	1			T2	12		T3	807		T4	1
valid_sources[0x0b]	287993	1			T2	11		T3	157		T4	30
valid_sources[0x0c]	268838	1			T2	13		T3	279		T4	21
valid_sources[0x0d]	316350	1			T2	14		T3	287		T4	48
valid_sources[0x0e]	313700	1			T2	15		T3	288		T4	5
valid_sources[0x0f]	288077	1			T2	15		T3	375		T4	9
valid_sources[0x10]	297046	1			T2	12		T3	246		T7	15
valid_sources[0x11]	300661	1			T2	12		T3	504		T4	2
valid_sources[0x12]	330910	1			T2	17		T3	225		T4	5
valid_sources[0x13]	321761	1			T2	9		T3	627		T4	22
valid_sources[0x14]	301313	1			T2	10		T3	386		T6	3
valid_sources[0x15]	292582	1			T2	3		T3	85		T6	2
valid_sources[0x16]	314875	1			T2	7		T3	121		T6	2
valid_sources[0x17]	284310	1			T2	14		T3	744		T6	2
valid_sources[0x18]	296184	1			T2	10		T3	274		T4	12
valid_sources[0x19]	310582	1			T2	7		T3	460		T6	1
valid_sources[0x1a]	310478	1			T2	11		T3	190		T4	17
valid_sources[0x1b]	287177	1			T2	9		T3	211		T6	1
valid_sources[0x1c]	334012	1			T2	12		T3	139		T4	2
valid_sources[0x1d]	288251	1			T2	11		T3	159		T6	7
valid_sources[0x1e]	293471	1			T2	12		T3	221		T6	3
valid_sources[0x1f]	509845	1			T2	9		T3	398		T4	13
valid_sources[0x20]	341215	1			T1	1		T2	9		T3	280
valid_sources[0x21]	310033	1			T2	13		T3	488		T6	4
valid_sources[0x22]	317068	1			T2	12		T3	404		T4	17
valid_sources[0x23]	294905	1			T2	11		T3	470		T6	5
valid_sources[0x24]	271162	1			T2	12		T3	37		T6	3
valid_sources[0x25]	293400	1			T2	11		T3	279		T4	29
valid_sources[0x26]	304867	1			T2	8		T3	110		T6	6
valid_sources[0x27]	281067	1			T2	9		T3	318		T4	15
valid_sources[0x28]	439844	1			T2	12		T3	254		T4	3
valid_sources[0x29]	414433	1			T2	6		T3	719		T6	1
valid_sources[0x2a]	299383	1			T2	18		T3	509		T4	8
valid_sources[0x2b]	294941	1			T2	5		T3	149		T4	3
valid_sources[0x2c]	314494	1			T2	12		T3	550		T4	23
valid_sources[0x2d]	305619	1			T2	15		T3	315		T4	18
valid_sources[0x2e]	290361	1			T2	10		T3	366		T6	5
valid_sources[0x2f]	481771	1			T2	12		T3	317		T6	3
valid_sources[0x30]	353666	1			T2	16		T3	109		T6	5
valid_sources[0x31]	340100	1			T2	13		T3	260		T4	17
valid_sources[0x32]	299686	1			T2	9		T3	184		T4	37
valid_sources[0x33]	273302	1			T2	8		T3	474		T4	3
valid_sources[0x34]	356259	1			T2	12		T3	333		T6	2
valid_sources[0x35]	293346	1			T2	12		T3	312		T6	2
valid_sources[0x36]	443476	1			T2	11		T3	345		T4	11
valid_sources[0x37]	401048	1			T2	11		T3	646		T4	3
valid_sources[0x38]	327699	1			T2	12		T3	526		T6	3
valid_sources[0x39]	421752	1			T2	17		T3	43		T4	69
valid_sources[0x3a]	306228	1			T2	10		T3	502		T6	3
valid_sources[0x3b]	359196	1			T2	14		T3	39212		T7	9
valid_sources[0x3c]	285194	1			T2	9		T3	233		T6	6
valid_sources[0x3d]	309613	1			T2	16		T3	224		T4	22
valid_sources[0x3e]	318308	1			T2	18		T3	274		T4	2
valid_sources[0x3f]	345845	1			T2	17		T3	76		T4	22
valid_sources[0x40]	283803	1			T2	14		T3	776		T6	5
valid_sources[0x41]	282628	1			T2	11		T3	85		T4	60
valid_sources[0x42]	309724	1			T2	7		T3	249		T6	2
valid_sources[0x43]	343728	1			T2	12		T3	336		T8	43
valid_sources[0x44]	399229	1			T2	14		T3	560		T6	3
valid_sources[0x45]	297777	1			T2	14		T3	273		T6	4
valid_sources[0x46]	288696	1			T2	12		T3	54		T6	2
valid_sources[0x47]	314679	1			T2	11		T3	491		T4	7
valid_sources[0x48]	315081	1			T2	19		T3	348		T4	14
valid_sources[0x49]	287894	1			T2	11		T3	432		T7	3
valid_sources[0x4a]	336684	1			T2	11		T3	560		T6	2
valid_sources[0x4b]	298373	1			T2	13		T3	418		T6	1
valid_sources[0x4c]	301336	1			T2	2		T3	326		T6	5
valid_sources[0x4d]	306359	1			T2	12		T3	78		T4	18
valid_sources[0x4e]	383756	1			T2	9		T3	97		T4	48
valid_sources[0x4f]	295320	1			T2	19		T3	219		T4	6
valid_sources[0x50]	321195	1			T2	10		T3	5721		T4	9
valid_sources[0x51]	317691	1			T2	7		T3	206		T4	20
valid_sources[0x52]	295189	1			T2	9		T3	288		T6	5
valid_sources[0x53]	293386	1			T2	6		T3	19		T6	2
valid_sources[0x54]	287740	1			T2	12		T3	419		T4	12
valid_sources[0x55]	284454	1			T2	14		T3	239		T4	22
valid_sources[0x56]	322023	1			T2	16		T3	457		T4	16
valid_sources[0x57]	303530	1			T2	13		T3	345		T6	2
valid_sources[0x58]	316725	1			T2	12		T3	441		T6	6
valid_sources[0x59]	385789	1			T2	9		T3	372		T6	4
valid_sources[0x5a]	359764	1			T2	12		T3	144		T6	7
valid_sources[0x5b]	304032	1			T2	12		T3	161		T6	1
valid_sources[0x5c]	295903	1			T2	7		T3	535		T4	15
valid_sources[0x5d]	287478	1			T2	10		T3	213		T4	9
valid_sources[0x5e]	277582	1			T2	11		T3	696		T6	2
valid_sources[0x5f]	279523	1			T2	11		T3	360		T6	1
valid_sources[0x60]	299066	1			T2	11		T3	370		T4	46
valid_sources[0x61]	324124	1			T2	9		T3	75		T6	2
valid_sources[0x62]	299856	1			T2	11		T3	416		T6	2
valid_sources[0x63]	284779	1			T2	9		T3	218		T4	2
valid_sources[0x64]	273461	1			T2	5		T3	303		T4	22
valid_sources[0x65]	294089	1			T2	17		T3	448		T6	7
valid_sources[0x66]	284337	1			T2	7		T3	315		T6	5
valid_sources[0x67]	420128	1			T2	11		T3	504		T6	7
valid_sources[0x68]	294599	1			T2	8		T3	144		T6	2
valid_sources[0x69]	292976	1			T2	11		T3	134		T4	2
valid_sources[0x6a]	318322	1			T2	7		T3	472		T4	13
valid_sources[0x6b]	285451	1			T2	10		T3	417		T6	3
valid_sources[0x6c]	322843	1			T2	11		T3	190		T6	3
valid_sources[0x6d]	307417	1			T2	12		T3	218		T6	4
valid_sources[0x6e]	305742	1			T2	6		T3	180		T4	28
valid_sources[0x6f]	405815	1			T2	13		T3	315		T4	4
valid_sources[0x70]	337981	1			T2	10		T3	122		T6	2
valid_sources[0x71]	341046	1			T2	7		T3	457		T4	31
valid_sources[0x72]	542877	1			T1	1		T2	14		T3	336
valid_sources[0x73]	302155	1			T2	9		T3	711		T4	9
valid_sources[0x74]	328085	1			T2	10		T3	372		T6	2
valid_sources[0x75]	367445	1			T2	7		T3	92		T6	3
valid_sources[0x76]	301519	1			T2	9		T3	402		T4	4
valid_sources[0x77]	320025	1			T2	8		T3	242		T6	1
valid_sources[0x78]	346556	1			T2	13		T3	94		T4	35
valid_sources[0x79]	286599	1			T2	22		T3	541		T4	10
valid_sources[0x7a]	308447	1			T2	11		T3	539		T4	5
valid_sources[0x7b]	402007	1			T2	12		T3	297		T6	5
valid_sources[0x7c]	292698	1			T2	13		T3	299		T6	2
valid_sources[0x7d]	322077	1			T2	16		T3	574		T4	8
valid_sources[0x7e]	286014	1			T2	13		T3	191		T4	9
valid_sources[0x7f]	338519	1			T2	12		T3	369		T7	3
valid_sources[0x80]	319032	1			T2	19		T3	164		T6	4

---

Summary for Cross tl_a_chan_cov_cg_cc

Samples crossed: cp_opcode cp_mask cp_size

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	3	0	3	100.00

Automatically Generated Cross Bins for tl_a_chan_cov_cg_cc

Bins

cp_opcode

cp_mask

cp_size

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

values[0x4]

all_enables

biggest_size

13943317

1

T2

54

T3

18055

T4

6

values[0x0]

all_enables

biggest_size

422278

1

T1

18

T2

36

T3

427

values[0x1]

all_enables

biggest_size

371315

1

T1

11

T2

17

T3

223