Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts



Module Instance : tb.dut.u_ctr_out

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
51.16 78.95 20.00 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
51.16 78.95 20.00 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.68 93.83 68.66 94.27 91.67 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children



Module Instance : tb.dut.u_ctr_in

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
51.16 78.95 20.00 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
51.16 78.95 20.00 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.68 93.83 68.66 94.27 91.67 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children



Module Instance : tb.dut.u_ctr_errors

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
57.70 84.21 33.33 55.56


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
57.70 84.21 33.33 55.56


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.68 93.83 68.66 94.27 91.67 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children



Module Instance : tb.dut.u_ctr_nodata_in

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
59.59 84.21 40.00 54.55


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
59.59 84.21 40.00 54.55


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
89.68 93.83 68.66 94.27 91.67 100.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
no children

Line Coverage for Module : usbdev_counter ( parameter NEndpoints=12,NEvents=4,Width=8,EpW=4 )
Line Coverage for Module self-instances :
SCORELINE
51.16 78.95
tb.dut.u_ctr_out

Line No.TotalCoveredPercent
TOTAL191578.95
ALWAYS457571.43
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 1 2
MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Line Coverage for Module : usbdev_counter ( parameter NEndpoints=1,NEvents=4,Width=8,EpW=1 )
Line Coverage for Module self-instances :
SCORELINE
57.70 84.21
tb.dut.u_ctr_errors

Line No.TotalCoveredPercent
TOTAL191684.21
ALWAYS457685.71
CONT_ASSIGN6100
CONT_ASSIGN6211100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 2 2
==> MISSING_ELSE
51 1 2
MISSING_ELSE
61 unreachable
62 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Line Coverage for Module : usbdev_counter ( parameter NEndpoints=12,NEvents=3,Width=8,EpW=4 )
Line Coverage for Module self-instances :
SCORELINE
51.16 78.95
tb.dut.u_ctr_in

Line No.TotalCoveredPercent
TOTAL191578.95
ALWAYS457571.43
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 1 2
MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Line Coverage for Module : usbdev_counter ( parameter NEndpoints=12,NEvents=1,Width=8,EpW=4 )
Line Coverage for Module self-instances :
SCORELINE
59.59 84.21
tb.dut.u_ctr_nodata_in

Line No.TotalCoveredPercent
TOTAL191684.21
ALWAYS457685.71
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 2 2
==> MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Cond Coverage for Module : usbdev_counter ( parameter NEndpoints=12,NEvents=4,Width=8,EpW=4 + NEndpoints=12,NEvents=3,Width=8,EpW=4 + NEndpoints=12,NEvents=1,Width=8,EpW=4 )
Cond Coverage for Module self-instances :
SCORECOND
51.16 20.00
tb.dut.u_ctr_out

SCORECOND
51.16 20.00
tb.dut.u_ctr_in

SCORECOND
59.59 40.00
tb.dut.u_ctr_nodata_in

TotalCoveredPercent
Conditions5240.00
Logical5240.00
Non-Logical00
Event00

 LINE       58
 EXPRESSION ((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0)
             -----------1-----------
-1-StatusTests
0Not Covered
1CoveredT3,T4,T5

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01Not Covered
10CoveredT6,T7,T8
11Not Covered

Cond Coverage for Module : usbdev_counter ( parameter NEndpoints=1,NEvents=4,Width=8,EpW=1 )
Cond Coverage for Module self-instances :
SCORECOND
57.70 33.33
tb.dut.u_ctr_errors

TotalCoveredPercent
Conditions3133.33
Logical3133.33
Non-Logical00
Event00

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01CoveredT3,T4,T5
10Not Covered
11Not Covered

Branch Coverage for Module : usbdev_counter ( parameter NEndpoints=12,NEvents=4,Width=8,EpW=4 + NEndpoints=12,NEvents=3,Width=8,EpW=4 + NEndpoints=12,NEvents=1,Width=8,EpW=4 )
Branch Coverage for Module self-instances :
SCOREBRANCH
51.16 54.55
tb.dut.u_ctr_out

SCOREBRANCH
51.16 54.55
tb.dut.u_ctr_in

SCOREBRANCH
59.59 54.55
tb.dut.u_ctr_nodata_in

Line No.TotalCoveredPercent
Branches 11 7 63.64
TERNARY 58 2 1 50.00
IF 45 5 4 80.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 58 ((ep_i < 4'(NEndpoints))) ?

Branches:
-1-StatusTests
1 Covered T3,T4,T5
0 Not Covered


LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 - Covered T3,T4,T5
0 - 1 Covered T3,T4,T5
0 - 0 Covered T3,T4,T5


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5


Branch Coverage for Module : usbdev_counter ( parameter NEndpoints=1,NEvents=4,Width=8,EpW=1 )
Branch Coverage for Module self-instances :
SCOREBRANCH
57.70 55.56
tb.dut.u_ctr_errors

Line No.TotalCoveredPercent
Branches 9 5 55.56
IF 45 5 3 60.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Covered T3,T4,T5
0 0 - Not Covered
0 - 1 Not Covered
0 - 0 Covered T3,T4,T5


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5

Line Coverage for Instance : tb.dut.u_ctr_out
Line No.TotalCoveredPercent
TOTAL191578.95
ALWAYS457571.43
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 1 2
MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Cond Coverage for Instance : tb.dut.u_ctr_out
TotalCoveredPercent
Conditions5120.00
Logical5120.00
Non-Logical00
Event00

 LINE       58
 EXPRESSION ((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0)
             -----------1-----------
-1-StatusTests
0Not Covered
1CoveredT3,T4,T5

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

Branch Coverage for Instance : tb.dut.u_ctr_out
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 58 2 1 50.00
IF 45 5 3 60.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 58 ((ep_i < 4'(NEndpoints))) ?

Branches:
-1-StatusTests
1 Covered T3,T4,T5
0 Not Covered


LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 - Covered T3,T4,T5
0 - 1 Not Covered
0 - 0 Covered T3,T4,T5


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5

Line Coverage for Instance : tb.dut.u_ctr_in
Line No.TotalCoveredPercent
TOTAL191578.95
ALWAYS457571.43
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 1 2
MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Cond Coverage for Instance : tb.dut.u_ctr_in
TotalCoveredPercent
Conditions5120.00
Logical5120.00
Non-Logical00
Event00

 LINE       58
 EXPRESSION ((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0)
             -----------1-----------
-1-StatusTests
0Not Covered
1CoveredT3,T4,T5

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

Branch Coverage for Instance : tb.dut.u_ctr_in
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 58 2 1 50.00
IF 45 5 3 60.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 58 ((ep_i < 4'(NEndpoints))) ?

Branches:
-1-StatusTests
1 Covered T3,T4,T5
0 Not Covered


LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 - Covered T3,T4,T5
0 - 1 Not Covered
0 - 0 Covered T3,T4,T5


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5

Line Coverage for Instance : tb.dut.u_ctr_errors
Line No.TotalCoveredPercent
TOTAL191684.21
ALWAYS457685.71
CONT_ASSIGN6100
CONT_ASSIGN6211100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 2 2
==> MISSING_ELSE
51 1 2
MISSING_ELSE
61 unreachable
62 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Cond Coverage for Instance : tb.dut.u_ctr_errors
TotalCoveredPercent
Conditions3133.33
Logical3133.33
Non-Logical00
Event00

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01CoveredT3,T4,T5
10Not Covered
11Not Covered

Branch Coverage for Instance : tb.dut.u_ctr_errors
Line No.TotalCoveredPercent
Branches 9 5 55.56
IF 45 5 3 60.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Covered T3,T4,T5
0 0 - Not Covered
0 - 1 Not Covered
0 - 0 Covered T3,T4,T5


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5

Line Coverage for Instance : tb.dut.u_ctr_nodata_in
Line No.TotalCoveredPercent
TOTAL191684.21
ALWAYS457685.71
CONT_ASSIGN5811100.00
ALWAYS708675.00
CONT_ASSIGN8411100.00
CONT_ASSIGN8511100.00
CONT_ASSIGN8611100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
45 1 1
46 1 1
47 1 1
50 1 2
MISSING_ELSE
51 2 2
==> MISSING_ELSE
58 1 1
70 1 1
71 1 1
72 1 1
73 1 1
74 0 1
78 1 2
MISSING_ELSE
80 1 1
84 1 1
85 1 1
86 1 1


Cond Coverage for Instance : tb.dut.u_ctr_nodata_in
TotalCoveredPercent
Conditions5240.00
Logical5240.00
Non-Logical00
Event00

 LINE       58
 EXPRESSION ((ep_i < 4'(NEndpoints)) ? endpoints[ep_i] : 1'b0)
             -----------1-----------
-1-StatusTests
0Not Covered
1CoveredT3,T4,T5

 LINE       78
 EXPRESSION (((|((ev_enables & event_i) & (~event_q)))) & ep_enabled)
             ---------------------1--------------------   -----2----
-1--2-StatusTests
01Not Covered
10CoveredT6,T7,T8
11Not Covered

Branch Coverage for Instance : tb.dut.u_ctr_nodata_in
Line No.TotalCoveredPercent
Branches 11 6 54.55
TERNARY 58 2 1 50.00
IF 45 5 3 60.00
IF 70 4 2 50.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv' or '../src/lowrisc_ip_usbdev_0.1/rtl/usbdev_counter.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 58 ((ep_i < 4'(NEndpoints))) ?

Branches:
-1-StatusTests
1 Covered T3,T4,T5
0 Not Covered


LineNo. Expression -1-: 45 if ((!rst_ni)) -2-: 50 if (endp_qe_i) -3-: 51 if (ev_qe_i)

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 - Covered T3,T4,T5
0 - 1 Covered T3,T4,T5
0 - 0 Not Covered


LineNo. Expression -1-: 70 if ((!rst_ni)) -2-: 73 if (reset_i) -3-: 78 if (((|((ev_enables & event_i) & (~event_q))) & ep_enabled))

Branches:
-1--2--3-StatusTests
1 - - Covered T3,T4,T5
0 1 - Not Covered
0 0 1 Not Covered
0 0 0 Covered T3,T4,T5

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%