Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
92.56 97.44 92.01 97.86 70.31 95.72 98.17 96.40


Total test records in report: 2039
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T1834 /workspace/coverage/default/25.usbdev_fifo_rst.1125925056 May 23 03:41:54 PM PDT 24 May 23 03:42:15 PM PDT 24 10105727918 ps
T1835 /workspace/coverage/default/45.usbdev_smoke.914220752 May 23 03:44:06 PM PDT 24 May 23 03:44:27 PM PDT 24 10119243088 ps
T1836 /workspace/coverage/default/8.usbdev_stall_priority_over_nak.2498340210 May 23 03:40:12 PM PDT 24 May 23 03:40:36 PM PDT 24 10136181858 ps
T1837 /workspace/coverage/default/26.usbdev_setup_trans_ignored.845963707 May 23 03:42:12 PM PDT 24 May 23 03:42:36 PM PDT 24 10048509454 ps
T1838 /workspace/coverage/default/34.usbdev_endpoint_access.3202720264 May 23 03:42:49 PM PDT 24 May 23 03:43:18 PM PDT 24 10909405770 ps
T1839 /workspace/coverage/default/48.random_length_in_trans.1683133774 May 23 03:44:45 PM PDT 24 May 23 03:45:13 PM PDT 24 10049740205 ps
T1840 /workspace/coverage/default/39.usbdev_min_length_out_transaction.3376092659 May 23 03:43:31 PM PDT 24 May 23 03:43:48 PM PDT 24 10061663271 ps
T1841 /workspace/coverage/default/21.max_length_in_transaction.1545966885 May 23 03:41:48 PM PDT 24 May 23 03:42:07 PM PDT 24 10180253455 ps
T1842 /workspace/coverage/default/38.usbdev_fifo_rst.2774522601 May 23 03:43:18 PM PDT 24 May 23 03:43:36 PM PDT 24 10115157679 ps
T1843 /workspace/coverage/default/9.usbdev_link_in_err.863426556 May 23 03:40:28 PM PDT 24 May 23 03:40:51 PM PDT 24 10062589320 ps
T1844 /workspace/coverage/default/2.usbdev_phy_config_usb_ref_disable.4243909157 May 23 03:39:52 PM PDT 24 May 23 03:40:15 PM PDT 24 10054754804 ps
T1845 /workspace/coverage/default/35.min_length_in_transaction.958658376 May 23 03:42:58 PM PDT 24 May 23 03:43:26 PM PDT 24 10076495230 ps
T1846 /workspace/coverage/default/27.usbdev_phy_pins_sense.123077944 May 23 03:42:18 PM PDT 24 May 23 03:42:42 PM PDT 24 10082329793 ps
T1847 /workspace/coverage/default/4.usbdev_disconnected.2377011587 May 23 03:39:45 PM PDT 24 May 23 03:40:03 PM PDT 24 10043582257 ps
T1848 /workspace/coverage/default/26.usbdev_data_toggle_restore.624142370 May 23 03:42:13 PM PDT 24 May 23 03:42:37 PM PDT 24 10622039824 ps
T1849 /workspace/coverage/default/4.usbdev_link_suspend.153763118 May 23 03:39:50 PM PDT 24 May 23 03:40:16 PM PDT 24 13250784684 ps
T1850 /workspace/coverage/default/4.usbdev_phy_pins_sense.2269298308 May 23 03:40:01 PM PDT 24 May 23 03:40:24 PM PDT 24 10045956908 ps
T1851 /workspace/coverage/default/12.usbdev_random_length_out_trans.1105120653 May 23 03:40:33 PM PDT 24 May 23 03:40:55 PM PDT 24 10101465481 ps
T1852 /workspace/coverage/default/26.usbdev_out_stall.1448839587 May 23 03:42:14 PM PDT 24 May 23 03:42:38 PM PDT 24 10094031686 ps
T1853 /workspace/coverage/default/42.usbdev_max_length_out_transaction.2603465218 May 23 03:43:41 PM PDT 24 May 23 03:44:02 PM PDT 24 10093637641 ps
T1854 /workspace/coverage/default/33.usbdev_setup_stage.2244635442 May 23 03:42:50 PM PDT 24 May 23 03:43:16 PM PDT 24 10052720414 ps
T1855 /workspace/coverage/default/25.usbdev_aon_wake_resume.4225553816 May 23 03:42:01 PM PDT 24 May 23 03:42:27 PM PDT 24 13298742460 ps
T1856 /workspace/coverage/default/30.usbdev_out_iso.2831421478 May 23 03:42:30 PM PDT 24 May 23 03:42:55 PM PDT 24 10155529021 ps
T1857 /workspace/coverage/default/11.usbdev_in_trans.2858049975 May 23 03:40:26 PM PDT 24 May 23 03:40:48 PM PDT 24 10114478114 ps
T1858 /workspace/coverage/default/33.usbdev_min_length_out_transaction.1499041981 May 23 03:42:52 PM PDT 24 May 23 03:43:20 PM PDT 24 10042965888 ps
T1859 /workspace/coverage/default/28.usbdev_bitstuff_err.3798853541 May 23 03:42:15 PM PDT 24 May 23 03:42:40 PM PDT 24 10059308124 ps
T1860 /workspace/coverage/default/8.usbdev_disconnected.1437592478 May 23 03:40:17 PM PDT 24 May 23 03:40:41 PM PDT 24 10061876258 ps
T1861 /workspace/coverage/default/29.random_length_in_trans.1220523406 May 23 03:42:38 PM PDT 24 May 23 03:43:04 PM PDT 24 10060660414 ps
T1862 /workspace/coverage/default/39.usbdev_pkt_buffer.1410142697 May 23 03:43:37 PM PDT 24 May 23 03:44:49 PM PDT 24 32446585958 ps
T1863 /workspace/coverage/default/44.usbdev_link_suspend.2191685596 May 23 03:44:09 PM PDT 24 May 23 03:44:33 PM PDT 24 13174804925 ps
T1864 /workspace/coverage/default/42.usbdev_in_stall.2674456101 May 23 03:43:42 PM PDT 24 May 23 03:44:06 PM PDT 24 10042924005 ps
T1865 /workspace/coverage/default/0.usbdev_in_iso.3277806680 May 23 03:39:26 PM PDT 24 May 23 03:39:50 PM PDT 24 10054286466 ps
T1866 /workspace/coverage/default/23.usbdev_fifo_rst.2363228898 May 23 03:41:53 PM PDT 24 May 23 03:42:15 PM PDT 24 10069875457 ps
T1867 /workspace/coverage/default/6.usbdev_aon_wake_disconnect.3138345129 May 23 03:39:58 PM PDT 24 May 23 03:40:28 PM PDT 24 14038550157 ps
T1868 /workspace/coverage/default/32.usbdev_in_stall.3551658035 May 23 03:42:37 PM PDT 24 May 23 03:43:05 PM PDT 24 10047255750 ps
T1869 /workspace/coverage/default/17.usbdev_pkt_received.3838872039 May 23 03:41:13 PM PDT 24 May 23 03:41:36 PM PDT 24 10129399770 ps
T1870 /workspace/coverage/default/12.usbdev_aon_wake_resume.3875914537 May 23 03:40:33 PM PDT 24 May 23 03:40:58 PM PDT 24 13239395555 ps
T119 /workspace/coverage/default/23.usbdev_nak_trans.957445624 May 23 03:41:47 PM PDT 24 May 23 03:42:07 PM PDT 24 10108701223 ps
T1871 /workspace/coverage/default/41.usbdev_max_length_out_transaction.2609715442 May 23 03:43:41 PM PDT 24 May 23 03:44:02 PM PDT 24 10099606072 ps
T1872 /workspace/coverage/default/1.usbdev_aon_wake_resume.129485396 May 23 03:39:31 PM PDT 24 May 23 03:39:55 PM PDT 24 13212365303 ps
T1873 /workspace/coverage/default/17.usbdev_smoke.4130550933 May 23 03:41:13 PM PDT 24 May 23 03:41:34 PM PDT 24 10188646477 ps
T1874 /workspace/coverage/default/19.usbdev_link_in_err.292052423 May 23 03:41:30 PM PDT 24 May 23 03:41:53 PM PDT 24 10084548356 ps
T104 /workspace/coverage/default/41.usbdev_nak_trans.1816217569 May 23 03:43:28 PM PDT 24 May 23 03:43:47 PM PDT 24 10150306617 ps
T1875 /workspace/coverage/default/6.usbdev_in_trans.1285282914 May 23 03:40:07 PM PDT 24 May 23 03:40:31 PM PDT 24 10076429965 ps
T1876 /workspace/coverage/default/24.usbdev_endpoint_access.2376084526 May 23 03:41:54 PM PDT 24 May 23 03:42:16 PM PDT 24 10731077219 ps
T1877 /workspace/coverage/default/8.usbdev_out_trans_nak.1907984409 May 23 03:40:08 PM PDT 24 May 23 03:40:32 PM PDT 24 10085977298 ps
T1878 /workspace/coverage/default/18.usbdev_aon_wake_reset.2996781915 May 23 03:41:13 PM PDT 24 May 23 03:41:40 PM PDT 24 13225568010 ps
T1879 /workspace/coverage/default/26.usbdev_fifo_rst.140189477 May 23 03:42:11 PM PDT 24 May 23 03:42:36 PM PDT 24 10265713558 ps
T1880 /workspace/coverage/default/31.usbdev_phy_pins_sense.2643905398 May 23 03:42:42 PM PDT 24 May 23 03:43:11 PM PDT 24 10070660930 ps
T1881 /workspace/coverage/default/15.usbdev_setup_trans_ignored.2276308166 May 23 03:40:59 PM PDT 24 May 23 03:41:22 PM PDT 24 10068096454 ps
T1882 /workspace/coverage/default/40.usbdev_pending_in_trans.1644123392 May 23 03:43:32 PM PDT 24 May 23 03:43:50 PM PDT 24 10108740625 ps
T1883 /workspace/coverage/default/43.usbdev_smoke.1788449722 May 23 03:43:41 PM PDT 24 May 23 03:44:03 PM PDT 24 10096904525 ps
T1884 /workspace/coverage/default/32.usbdev_pkt_buffer.3308361419 May 23 03:42:34 PM PDT 24 May 23 03:43:15 PM PDT 24 18003017931 ps
T1885 /workspace/coverage/default/3.usbdev_out_stall.3861754906 May 23 03:39:53 PM PDT 24 May 23 03:40:17 PM PDT 24 10065608255 ps
T1886 /workspace/coverage/default/38.usbdev_in_iso.2615098690 May 23 03:43:33 PM PDT 24 May 23 03:43:52 PM PDT 24 10091390357 ps
T1887 /workspace/coverage/default/33.usbdev_phy_config_eop_single_bit_handling.4093747378 May 23 03:42:50 PM PDT 24 May 23 03:43:18 PM PDT 24 10071470492 ps
T1888 /workspace/coverage/default/26.usbdev_max_length_out_transaction.1843342688 May 23 03:42:11 PM PDT 24 May 23 03:42:34 PM PDT 24 10101159107 ps
T1889 /workspace/coverage/default/12.usbdev_data_toggle_restore.2579016162 May 23 03:40:32 PM PDT 24 May 23 03:40:55 PM PDT 24 10915854663 ps
T1890 /workspace/coverage/default/35.usbdev_stall_priority_over_nak.419294203 May 23 03:43:01 PM PDT 24 May 23 03:43:27 PM PDT 24 10062868525 ps
T1891 /workspace/coverage/default/24.usbdev_stall_trans.4043593144 May 23 03:42:02 PM PDT 24 May 23 03:42:25 PM PDT 24 10074313324 ps
T1892 /workspace/coverage/default/36.max_length_in_transaction.1877784462 May 23 03:43:19 PM PDT 24 May 23 03:43:36 PM PDT 24 10171773749 ps
T1893 /workspace/coverage/default/17.usbdev_setup_stage.4014900337 May 23 03:41:13 PM PDT 24 May 23 03:41:36 PM PDT 24 10061492338 ps
T1894 /workspace/coverage/default/40.usbdev_disconnected.3529328243 May 23 03:43:35 PM PDT 24 May 23 03:43:54 PM PDT 24 10130472067 ps
T1895 /workspace/coverage/default/23.max_length_in_transaction.1511325188 May 23 03:41:54 PM PDT 24 May 23 03:42:16 PM PDT 24 10173516313 ps
T1896 /workspace/coverage/default/43.usbdev_random_length_out_trans.2393077499 May 23 03:44:21 PM PDT 24 May 23 03:44:44 PM PDT 24 10141026230 ps
T1897 /workspace/coverage/default/27.usbdev_aon_wake_resume.4152065136 May 23 03:42:19 PM PDT 24 May 23 03:42:44 PM PDT 24 13235275775 ps
T1898 /workspace/coverage/default/21.min_length_in_transaction.2027906591 May 23 03:41:33 PM PDT 24 May 23 03:41:57 PM PDT 24 10057703481 ps
T1899 /workspace/coverage/default/40.usbdev_phy_pins_sense.3994501874 May 23 03:43:37 PM PDT 24 May 23 03:43:58 PM PDT 24 10038726511 ps
T1900 /workspace/coverage/default/46.usbdev_in_stall.3852547073 May 23 03:44:13 PM PDT 24 May 23 03:44:34 PM PDT 24 10040513864 ps
T1901 /workspace/coverage/default/1.usbdev_bitstuff_err.95110372 May 23 03:39:39 PM PDT 24 May 23 03:39:58 PM PDT 24 10078459004 ps
T1902 /workspace/coverage/default/3.usbdev_in_trans.1815830200 May 23 03:39:40 PM PDT 24 May 23 03:39:58 PM PDT 24 10125155605 ps
T1903 /workspace/coverage/default/16.usbdev_fifo_rst.3585707846 May 23 03:41:00 PM PDT 24 May 23 03:41:25 PM PDT 24 10084932481 ps
T1904 /workspace/coverage/default/36.usbdev_out_trans_nak.1078185741 May 23 03:43:11 PM PDT 24 May 23 03:43:32 PM PDT 24 10066053355 ps
T1905 /workspace/coverage/default/6.usbdev_rx_crc_err.254326407 May 23 03:40:03 PM PDT 24 May 23 03:40:28 PM PDT 24 10046702219 ps
T1906 /workspace/coverage/default/37.usbdev_data_toggle_restore.3715966089 May 23 03:43:19 PM PDT 24 May 23 03:43:38 PM PDT 24 10182994413 ps
T1907 /workspace/coverage/default/47.usbdev_min_length_out_transaction.2373400335 May 23 03:44:33 PM PDT 24 May 23 03:45:02 PM PDT 24 10044696775 ps
T1908 /workspace/coverage/default/37.usbdev_stall_priority_over_nak.1794299564 May 23 03:43:28 PM PDT 24 May 23 03:43:46 PM PDT 24 10078543701 ps
T1909 /workspace/coverage/default/32.usbdev_pkt_sent.1116395654 May 23 03:42:43 PM PDT 24 May 23 03:43:10 PM PDT 24 10128799016 ps
T1910 /workspace/coverage/default/36.usbdev_disconnected.1863797273 May 23 03:42:57 PM PDT 24 May 23 03:43:25 PM PDT 24 10079861897 ps
T1911 /workspace/coverage/default/0.usbdev_data_toggle_restore.3063650533 May 23 03:39:26 PM PDT 24 May 23 03:39:50 PM PDT 24 10513010728 ps
T1912 /workspace/coverage/default/43.usbdev_enable.137792860 May 23 03:43:46 PM PDT 24 May 23 03:44:09 PM PDT 24 10057456541 ps
T1913 /workspace/coverage/default/33.usbdev_rx_crc_err.3777262592 May 23 03:42:52 PM PDT 24 May 23 03:43:19 PM PDT 24 10088325046 ps
T1914 /workspace/coverage/default/23.usbdev_endpoint_access.3209247182 May 23 03:41:48 PM PDT 24 May 23 03:42:08 PM PDT 24 10910396237 ps
T1915 /workspace/coverage/default/42.usbdev_rx_crc_err.519774502 May 23 03:43:47 PM PDT 24 May 23 03:44:09 PM PDT 24 10039643092 ps
T1916 /workspace/coverage/default/18.usbdev_enable.263087243 May 23 03:41:13 PM PDT 24 May 23 03:41:34 PM PDT 24 10103764698 ps
T1917 /workspace/coverage/default/10.usbdev_aon_wake_disconnect.4040623364 May 23 03:40:21 PM PDT 24 May 23 03:40:48 PM PDT 24 13668823525 ps
T1918 /workspace/coverage/default/1.usbdev_in_stall.3179599451 May 23 03:39:28 PM PDT 24 May 23 03:39:52 PM PDT 24 10048256894 ps
T1919 /workspace/coverage/default/28.usbdev_setup_stage.2179334184 May 23 03:42:21 PM PDT 24 May 23 03:42:43 PM PDT 24 10056518246 ps
T1920 /workspace/coverage/default/47.usbdev_out_trans_nak.1736636329 May 23 03:44:15 PM PDT 24 May 23 03:44:37 PM PDT 24 10054542252 ps
T1921 /workspace/coverage/default/38.usbdev_enable.70719521 May 23 03:43:31 PM PDT 24 May 23 03:43:50 PM PDT 24 10051488162 ps
T1922 /workspace/coverage/default/10.random_length_in_trans.2039152236 May 23 03:40:22 PM PDT 24 May 23 03:40:44 PM PDT 24 10100826539 ps
T1923 /workspace/coverage/default/40.usbdev_setup_stage.2007071456 May 23 03:43:34 PM PDT 24 May 23 03:43:56 PM PDT 24 10044084398 ps
T1924 /workspace/coverage/default/3.usbdev_rx_crc_err.2945965936 May 23 03:39:53 PM PDT 24 May 23 03:40:19 PM PDT 24 10080440352 ps
T1925 /workspace/coverage/default/27.usbdev_disconnected.1551621587 May 23 03:42:12 PM PDT 24 May 23 03:42:35 PM PDT 24 10069578441 ps
T1926 /workspace/coverage/default/27.usbdev_rx_crc_err.3468974461 May 23 03:42:13 PM PDT 24 May 23 03:42:36 PM PDT 24 10045233775 ps
T1927 /workspace/coverage/default/12.usbdev_setup_stage.20914 May 23 03:40:42 PM PDT 24 May 23 03:41:06 PM PDT 24 10044285417 ps
T1928 /workspace/coverage/default/10.usbdev_smoke.81438283 May 23 03:40:22 PM PDT 24 May 23 03:40:45 PM PDT 24 10139330502 ps
T1929 /workspace/coverage/default/40.usbdev_out_stall.280801593 May 23 03:43:34 PM PDT 24 May 23 03:43:55 PM PDT 24 10061691178 ps
T1930 /workspace/coverage/default/5.max_length_in_transaction.2446193344 May 23 03:40:06 PM PDT 24 May 23 03:40:30 PM PDT 24 10132769271 ps
T1931 /workspace/coverage/default/27.usbdev_out_stall.1390663708 May 23 03:42:14 PM PDT 24 May 23 03:42:39 PM PDT 24 10073635278 ps
T1932 /workspace/coverage/default/27.usbdev_setup_stage.161790115 May 23 03:42:15 PM PDT 24 May 23 03:42:41 PM PDT 24 10047067839 ps
T1933 /workspace/coverage/default/38.usbdev_stall_trans.3959195619 May 23 03:43:23 PM PDT 24 May 23 03:43:40 PM PDT 24 10064419884 ps
T1934 /workspace/coverage/default/0.usbdev_aon_wake_disconnect.1138957939 May 23 03:39:16 PM PDT 24 May 23 03:39:41 PM PDT 24 13366693316 ps
T1935 /workspace/coverage/default/34.usbdev_random_length_out_trans.2224088436 May 23 03:42:52 PM PDT 24 May 23 03:43:20 PM PDT 24 10066611823 ps
T1936 /workspace/coverage/default/43.usbdev_out_trans_nak.456837573 May 23 03:43:42 PM PDT 24 May 23 03:44:08 PM PDT 24 10098941770 ps
T184 /workspace/coverage/default/30.usbdev_pending_in_trans.463973476 May 23 03:42:46 PM PDT 24 May 23 03:43:14 PM PDT 24 10083626433 ps
T1937 /workspace/coverage/default/25.usbdev_min_length_out_transaction.2622588127 May 23 03:42:07 PM PDT 24 May 23 03:42:28 PM PDT 24 10054089274 ps
T1938 /workspace/coverage/default/23.usbdev_phy_config_eop_single_bit_handling.3984110533 May 23 03:41:37 PM PDT 24 May 23 03:42:01 PM PDT 24 10113727161 ps
T1939 /workspace/coverage/default/13.usbdev_out_stall.695679399 May 23 03:40:47 PM PDT 24 May 23 03:41:14 PM PDT 24 10068673734 ps
T1940 /workspace/coverage/default/29.usbdev_in_stall.2474096717 May 23 03:42:36 PM PDT 24 May 23 03:43:03 PM PDT 24 10052488738 ps
T1941 /workspace/coverage/default/48.usbdev_aon_wake_disconnect.2684203649 May 23 03:44:18 PM PDT 24 May 23 03:44:44 PM PDT 24 13999208732 ps
T1942 /workspace/coverage/default/38.usbdev_disconnected.3504787294 May 23 03:43:25 PM PDT 24 May 23 03:43:43 PM PDT 24 10112741088 ps
T1943 /workspace/coverage/default/6.usbdev_av_buffer.1991902314 May 23 03:40:04 PM PDT 24 May 23 03:40:27 PM PDT 24 10052754272 ps
T1944 /workspace/coverage/default/40.usbdev_pkt_sent.1156466579 May 23 03:43:32 PM PDT 24 May 23 03:43:51 PM PDT 24 10096315857 ps
T199 /workspace/coverage/cover_reg_top/4.usbdev_tl_intg_err.1417223755 May 23 03:31:57 PM PDT 24 May 23 03:32:04 PM PDT 24 911219161 ps
T200 /workspace/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.504194531 May 23 03:32:04 PM PDT 24 May 23 03:32:07 PM PDT 24 103016451 ps
T202 /workspace/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1297157192 May 23 03:32:08 PM PDT 24 May 23 03:32:11 PM PDT 24 229188580 ps
T99 /workspace/coverage/cover_reg_top/14.usbdev_intr_test.4267901348 May 23 03:32:30 PM PDT 24 May 23 03:32:36 PM PDT 24 31721296 ps
T267 /workspace/coverage/cover_reg_top/4.usbdev_csr_rw.850849403 May 23 03:32:10 PM PDT 24 May 23 03:32:13 PM PDT 24 53884249 ps
T240 /workspace/coverage/cover_reg_top/3.usbdev_csr_rw.1861353673 May 23 03:31:50 PM PDT 24 May 23 03:31:54 PM PDT 24 53692459 ps
T201 /workspace/coverage/cover_reg_top/17.usbdev_tl_errors.1084670039 May 23 03:32:25 PM PDT 24 May 23 03:32:28 PM PDT 24 74981977 ps
T220 /workspace/coverage/cover_reg_top/2.usbdev_tl_errors.1871199578 May 23 03:32:04 PM PDT 24 May 23 03:32:08 PM PDT 24 102158160 ps
T221 /workspace/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2404832068 May 23 03:31:55 PM PDT 24 May 23 03:32:01 PM PDT 24 899758297 ps
T225 /workspace/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.1075358165 May 23 03:32:23 PM PDT 24 May 23 03:32:27 PM PDT 24 96318579 ps
T268 /workspace/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.2879157959 May 23 03:32:09 PM PDT 24 May 23 03:32:11 PM PDT 24 214763465 ps
T251 /workspace/coverage/cover_reg_top/5.usbdev_csr_rw.836392912 May 23 03:32:09 PM PDT 24 May 23 03:32:11 PM PDT 24 45632939 ps
T223 /workspace/coverage/cover_reg_top/14.usbdev_tl_intg_err.3719364999 May 23 03:32:26 PM PDT 24 May 23 03:32:34 PM PDT 24 988841653 ps
T226 /workspace/coverage/cover_reg_top/18.usbdev_tl_errors.1236983796 May 23 03:32:28 PM PDT 24 May 23 03:32:34 PM PDT 24 185335715 ps
T233 /workspace/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2835265034 May 23 03:32:28 PM PDT 24 May 23 03:32:34 PM PDT 24 110850554 ps
T100 /workspace/coverage/cover_reg_top/18.usbdev_intr_test.3202854004 May 23 03:32:28 PM PDT 24 May 23 03:32:33 PM PDT 24 63549916 ps
T236 /workspace/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1769903468 May 23 03:31:56 PM PDT 24 May 23 03:32:01 PM PDT 24 89784343 ps
T269 /workspace/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.729742066 May 23 03:32:26 PM PDT 24 May 23 03:32:31 PM PDT 24 115751879 ps
T230 /workspace/coverage/cover_reg_top/15.usbdev_tl_errors.3133461941 May 23 03:32:26 PM PDT 24 May 23 03:32:30 PM PDT 24 185069294 ps
T241 /workspace/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.3238768742 May 23 03:32:25 PM PDT 24 May 23 03:32:29 PM PDT 24 73536663 ps
T270 /workspace/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3311411105 May 23 03:32:10 PM PDT 24 May 23 03:32:14 PM PDT 24 243638133 ps
T224 /workspace/coverage/cover_reg_top/0.usbdev_tl_intg_err.1776522349 May 23 03:31:56 PM PDT 24 May 23 03:32:02 PM PDT 24 503380055 ps
T101 /workspace/coverage/cover_reg_top/15.usbdev_intr_test.1075027991 May 23 03:32:23 PM PDT 24 May 23 03:32:26 PM PDT 24 48042953 ps
T252 /workspace/coverage/cover_reg_top/2.usbdev_csr_rw.2692040424 May 23 03:31:57 PM PDT 24 May 23 03:32:00 PM PDT 24 44496291 ps
T237 /workspace/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.605881725 May 23 03:32:26 PM PDT 24 May 23 03:32:32 PM PDT 24 148627663 ps
T271 /workspace/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.3033409561 May 23 03:31:56 PM PDT 24 May 23 03:32:00 PM PDT 24 289847640 ps
T207 /workspace/coverage/cover_reg_top/4.usbdev_csr_hw_reset.1375242781 May 23 03:32:10 PM PDT 24 May 23 03:32:13 PM PDT 24 65743189 ps
T204 /workspace/coverage/cover_reg_top/2.usbdev_intr_test.2065514369 May 23 03:32:10 PM PDT 24 May 23 03:32:14 PM PDT 24 35280167 ps
T287 /workspace/coverage/cover_reg_top/19.usbdev_tl_intg_err.3402327453 May 23 03:32:26 PM PDT 24 May 23 03:32:34 PM PDT 24 1152961123 ps
T205 /workspace/coverage/cover_reg_top/37.usbdev_intr_test.2749522121 May 23 03:32:41 PM PDT 24 May 23 03:32:45 PM PDT 24 36857508 ps
T273 /workspace/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.777976867 May 23 03:32:10 PM PDT 24 May 23 03:32:13 PM PDT 24 116928090 ps
T253 /workspace/coverage/cover_reg_top/19.usbdev_csr_rw.4123095767 May 23 03:32:28 PM PDT 24 May 23 03:32:34 PM PDT 24 58401535 ps
T290 /workspace/coverage/cover_reg_top/48.usbdev_intr_test.2949484161 May 23 03:32:40 PM PDT 24 May 23 03:32:43 PM PDT 24 38304639 ps
T235 /workspace/coverage/cover_reg_top/14.usbdev_tl_errors.1980753277 May 23 03:32:25 PM PDT 24 May 23 03:32:28 PM PDT 24 96362138 ps
T254 /workspace/coverage/cover_reg_top/0.usbdev_csr_aliasing.1003491712 May 23 03:31:54 PM PDT 24 May 23 03:31:59 PM PDT 24 389229792 ps
T278 /workspace/coverage/cover_reg_top/25.usbdev_intr_test.3870114699 May 23 03:32:28 PM PDT 24 May 23 03:32:33 PM PDT 24 105267514 ps
T206 /workspace/coverage/cover_reg_top/45.usbdev_intr_test.1924934619 May 23 03:32:45 PM PDT 24 May 23 03:32:53 PM PDT 24 39660849 ps
T1945 /workspace/coverage/cover_reg_top/9.usbdev_tl_intg_err.1276679259 May 23 03:32:11 PM PDT 24 May 23 03:32:17 PM PDT 24 565497282 ps
T1946 /workspace/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1766384191 May 23 03:31:55 PM PDT 24 May 23 03:31:57 PM PDT 24 66063169 ps
T1947 /workspace/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.3752188990 May 23 03:32:25 PM PDT 24 May 23 03:32:29 PM PDT 24 486526346 ps
T239 /workspace/coverage/cover_reg_top/16.usbdev_tl_errors.1077811862 May 23 03:32:26 PM PDT 24 May 23 03:32:30 PM PDT 24 167020881 ps
T279 /workspace/coverage/cover_reg_top/9.usbdev_intr_test.4189771361 May 23 03:32:27 PM PDT 24 May 23 03:32:31 PM PDT 24 65399797 ps
T1948 /workspace/coverage/cover_reg_top/18.usbdev_csr_rw.1875179990 May 23 03:32:27 PM PDT 24 May 23 03:32:31 PM PDT 24 104484212 ps
T288 /workspace/coverage/cover_reg_top/18.usbdev_tl_intg_err.3740359444 May 23 03:32:28 PM PDT 24 May 23 03:32:34 PM PDT 24 366816139 ps
T293 /workspace/coverage/cover_reg_top/42.usbdev_intr_test.711276686 May 23 03:32:44 PM PDT 24 May 23 03:32:50 PM PDT 24 49941194 ps
T280 /workspace/coverage/cover_reg_top/10.usbdev_intr_test.2892681128 May 23 03:32:24 PM PDT 24 May 23 03:32:26 PM PDT 24 46771539 ps
T285 /workspace/coverage/cover_reg_top/17.usbdev_tl_intg_err.3801305390 May 23 03:32:26 PM PDT 24 May 23 03:32:34 PM PDT 24 593727430 ps
T291 /workspace/coverage/cover_reg_top/8.usbdev_intr_test.3766240650 May 23 03:32:12 PM PDT 24 May 23 03:32:15 PM PDT 24 39403019 ps
T297 /workspace/coverage/cover_reg_top/33.usbdev_intr_test.3467147546 May 23 03:32:41 PM PDT 24 May 23 03:32:45 PM PDT 24 43351844 ps
T294 /workspace/coverage/cover_reg_top/43.usbdev_intr_test.2146080253 May 23 03:32:43 PM PDT 24 May 23 03:32:49 PM PDT 24 41641845 ps
T231 /workspace/coverage/cover_reg_top/12.usbdev_tl_errors.974369726 May 23 03:32:24 PM PDT 24 May 23 03:32:29 PM PDT 24 283574423 ps
T303 /workspace/coverage/cover_reg_top/41.usbdev_intr_test.1010144661 May 23 03:32:42 PM PDT 24 May 23 03:32:47 PM PDT 24 48406446 ps
T1949 /workspace/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2727327773 May 23 03:32:10 PM PDT 24 May 23 03:32:15 PM PDT 24 169135251 ps
T1950 /workspace/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.430550088 May 23 03:31:56 PM PDT 24 May 23 03:31:59 PM PDT 24 98435208 ps
T281 /workspace/coverage/cover_reg_top/6.usbdev_intr_test.821892241 May 23 03:32:08 PM PDT 24 May 23 03:32:10 PM PDT 24 54026489 ps
T1951 /workspace/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.1851128745 May 23 03:32:30 PM PDT 24 May 23 03:32:36 PM PDT 24 110275549 ps
T1952 /workspace/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.2636617955 May 23 03:32:10 PM PDT 24 May 23 03:32:14 PM PDT 24 74778698 ps
T1953 /workspace/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.3373725426 May 23 03:32:08 PM PDT 24 May 23 03:32:10 PM PDT 24 73151010 ps
T1954 /workspace/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.2861607301 May 23 03:32:05 PM PDT 24 May 23 03:32:08 PM PDT 24 76037056 ps
T1955 /workspace/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.234611321 May 23 03:32:25 PM PDT 24 May 23 03:32:28 PM PDT 24 166255389 ps
T274 /workspace/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.2671915240 May 23 03:32:27 PM PDT 24 May 23 03:32:32 PM PDT 24 108492039 ps
T232 /workspace/coverage/cover_reg_top/7.usbdev_tl_errors.2285453681 May 23 03:32:11 PM PDT 24 May 23 03:32:15 PM PDT 24 207264636 ps
T234 /workspace/coverage/cover_reg_top/13.usbdev_tl_errors.4073962348 May 23 03:32:25 PM PDT 24 May 23 03:32:29 PM PDT 24 96990659 ps
T1956 /workspace/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.305755454 May 23 03:32:12 PM PDT 24 May 23 03:32:17 PM PDT 24 103897034 ps
T275 /workspace/coverage/cover_reg_top/3.usbdev_tl_intg_err.3441364975 May 23 03:31:49 PM PDT 24 May 23 03:31:57 PM PDT 24 995691006 ps
T1957 /workspace/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.3416161399 May 23 03:32:04 PM PDT 24 May 23 03:32:07 PM PDT 24 160794510 ps
T302 /workspace/coverage/cover_reg_top/49.usbdev_intr_test.4151685777 May 23 03:32:42 PM PDT 24 May 23 03:32:48 PM PDT 24 40584438 ps
T1958 /workspace/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.3030446432 May 23 03:32:10 PM PDT 24 May 23 03:32:14 PM PDT 24 98742277 ps
T1959 /workspace/coverage/cover_reg_top/15.usbdev_csr_rw.2313111568 May 23 03:32:27 PM PDT 24 May 23 03:32:32 PM PDT 24 52597290 ps
T255 /workspace/coverage/cover_reg_top/0.usbdev_csr_bit_bash.1925099829 May 23 03:31:52 PM PDT 24 May 23 03:31:59 PM PDT 24 1180842542 ps
T1960 /workspace/coverage/cover_reg_top/47.usbdev_intr_test.2927787678 May 23 03:32:45 PM PDT 24 May 23 03:32:52 PM PDT 24 31153909 ps
T289 /workspace/coverage/cover_reg_top/1.usbdev_tl_intg_err.235061123 May 23 03:31:57 PM PDT 24 May 23 03:32:04 PM PDT 24 668977242 ps
T256 /workspace/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2382850123 May 23 03:31:58 PM PDT 24 May 23 03:32:00 PM PDT 24 54277891 ps
T282 /workspace/coverage/cover_reg_top/6.usbdev_tl_intg_err.415080947 May 23 03:32:10 PM PDT 24 May 23 03:32:15 PM PDT 24 275550372 ps
T1961 /workspace/coverage/cover_reg_top/2.usbdev_csr_bit_bash.1862010497 May 23 03:31:50 PM PDT 24 May 23 03:32:00 PM PDT 24 742988608 ps
T292 /workspace/coverage/cover_reg_top/19.usbdev_intr_test.4234190885 May 23 03:32:26 PM PDT 24 May 23 03:32:30 PM PDT 24 51897257 ps
T276 /workspace/coverage/cover_reg_top/12.usbdev_tl_intg_err.756890472 May 23 03:32:31 PM PDT 24 May 23 03:32:41 PM PDT 24 973404249 ps
T1962 /workspace/coverage/cover_reg_top/36.usbdev_intr_test.1102727925 May 23 03:32:41 PM PDT 24 May 23 03:32:44 PM PDT 24 96140267 ps
T1963 /workspace/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1893864840 May 23 03:32:29 PM PDT 24 May 23 03:32:35 PM PDT 24 123484143 ps
T304 /workspace/coverage/cover_reg_top/23.usbdev_intr_test.349791597 May 23 03:32:29 PM PDT 24 May 23 03:32:35 PM PDT 24 32854720 ps
T1964 /workspace/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.1565229043 May 23 03:32:26 PM PDT 24 May 23 03:32:31 PM PDT 24 190397240 ps
T257 /workspace/coverage/cover_reg_top/14.usbdev_csr_rw.570465416 May 23 03:32:28 PM PDT 24 May 23 03:32:33 PM PDT 24 41805929 ps
T1965 /workspace/coverage/cover_reg_top/1.usbdev_tl_errors.186969367 May 23 03:31:56 PM PDT 24 May 23 03:32:00 PM PDT 24 82124594 ps
T258 /workspace/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2950557182 May 23 03:31:53 PM PDT 24 May 23 03:32:02 PM PDT 24 1083840313 ps
T1966 /workspace/coverage/cover_reg_top/17.usbdev_intr_test.2129602554 May 23 03:32:28 PM PDT 24 May 23 03:32:33 PM PDT 24 38811879 ps
T1967 /workspace/coverage/cover_reg_top/2.usbdev_mem_walk.342358223 May 23 03:32:04 PM PDT 24 May 23 03:32:10 PM PDT 24 189496915 ps
T259 /workspace/coverage/cover_reg_top/16.usbdev_csr_rw.504640816 May 23 03:32:28 PM PDT 24 May 23 03:32:33 PM PDT 24 95853159 ps
T1968 /workspace/coverage/cover_reg_top/34.usbdev_intr_test.3407795069 May 23 03:32:41 PM PDT 24 May 23 03:32:44 PM PDT 24 35419389 ps
T266 /workspace/coverage/cover_reg_top/17.usbdev_csr_rw.3302142961 May 23 03:32:26 PM PDT 24 May 23 03:32:31 PM PDT 24 104876484 ps
T238 /workspace/coverage/cover_reg_top/6.usbdev_tl_errors.2362034711 May 23 03:32:08 PM PDT 24 May 23 03:32:12 PM PDT 24 148170438 ps
T1969 /workspace/coverage/cover_reg_top/8.usbdev_csr_rw.2132278972 May 23 03:32:09 PM PDT 24 May 23 03:32:12 PM PDT 24 66440317 ps
T1970 /workspace/coverage/cover_reg_top/38.usbdev_intr_test.1154565594 May 23 03:32:43 PM PDT 24 May 23 03:32:48 PM PDT 24 64626985 ps
T1971 /workspace/coverage/cover_reg_top/4.usbdev_mem_walk.4103364357 May 23 03:31:58 PM PDT 24 May 23 03:32:04 PM PDT 24 173568095 ps
T1972 /workspace/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1907970639 May 23 03:32:28 PM PDT 24 May 23 03:32:34 PM PDT 24 110551144 ps
T1973 /workspace/coverage/cover_reg_top/15.usbdev_tl_intg_err.3168365814 May 23 03:32:29 PM PDT 24 May 23 03:32:37 PM PDT 24 634125148 ps
T260 /workspace/coverage/cover_reg_top/3.usbdev_csr_hw_reset.3222805163 May 23 03:31:58 PM PDT 24 May 23 03:32:01 PM PDT 24 120359640 ps
T301 /workspace/coverage/cover_reg_top/35.usbdev_intr_test.622636849 May 23 03:32:44 PM PDT 24 May 23 03:32:52 PM PDT 24 51812480 ps
T1974 /workspace/coverage/cover_reg_top/19.usbdev_tl_errors.1575914365 May 23 03:32:27 PM PDT 24 May 23 03:32:33 PM PDT 24 103602433 ps
T1975 /workspace/coverage/cover_reg_top/8.usbdev_tl_intg_err.1117413282 May 23 03:32:11 PM PDT 24 May 23 03:32:16 PM PDT 24 280469301 ps
T1976 /workspace/coverage/cover_reg_top/9.usbdev_csr_rw.3761603145 May 23 03:32:25 PM PDT 24 May 23 03:32:27 PM PDT 24 53045152 ps
T1977 /workspace/coverage/cover_reg_top/4.usbdev_tl_errors.2609749392 May 23 03:31:54 PM PDT 24 May 23 03:31:58 PM PDT 24 288425037 ps
T1978 /workspace/coverage/cover_reg_top/3.usbdev_tl_errors.197941831 May 23 03:32:04 PM PDT 24 May 23 03:32:08 PM PDT 24 168738434 ps
T298 /workspace/coverage/cover_reg_top/1.usbdev_intr_test.2939666975 May 23 03:31:57 PM PDT 24 May 23 03:32:00 PM PDT 24 43858017 ps
T277 /workspace/coverage/cover_reg_top/13.usbdev_csr_rw.2664043791 May 23 03:32:23 PM PDT 24 May 23 03:32:26 PM PDT 24 76662712 ps
T1979 /workspace/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2102624777 May 23 03:32:29 PM PDT 24 May 23 03:32:35 PM PDT 24 149870672 ps
T299 /workspace/coverage/cover_reg_top/44.usbdev_intr_test.3648906726 May 23 03:32:43 PM PDT 24 May 23 03:32:49 PM PDT 24 42869120 ps
T261 /workspace/coverage/cover_reg_top/0.usbdev_mem_partial_access.11035486 May 23 03:32:10 PM PDT 24 May 23 03:32:15 PM PDT 24 169763304 ps
T283 /workspace/coverage/cover_reg_top/16.usbdev_tl_intg_err.3360185462 May 23 03:32:26 PM PDT 24 May 23 03:32:35 PM PDT 24 1763888466 ps
T262 /workspace/coverage/cover_reg_top/4.usbdev_csr_aliasing.3016027027 May 23 03:32:08 PM PDT 24 May 23 03:32:11 PM PDT 24 107408015 ps
T300 /workspace/coverage/cover_reg_top/0.usbdev_intr_test.2672970556 May 23 03:31:51 PM PDT 24 May 23 03:31:54 PM PDT 24 68028245 ps
T1980 /workspace/coverage/cover_reg_top/4.usbdev_csr_bit_bash.611322360 May 23 03:32:11 PM PDT 24 May 23 03:32:18 PM PDT 24 706813421 ps
T1981 /workspace/coverage/cover_reg_top/40.usbdev_intr_test.1957159983 May 23 03:32:41 PM PDT 24 May 23 03:32:45 PM PDT 24 37642115 ps
T1982 /workspace/coverage/cover_reg_top/9.usbdev_tl_errors.2333410229 May 23 03:32:12 PM PDT 24 May 23 03:32:17 PM PDT 24 269517305 ps
T1983 /workspace/coverage/cover_reg_top/11.usbdev_csr_rw.2203484174 May 23 03:32:23 PM PDT 24 May 23 03:32:25 PM PDT 24 48287306 ps
T1984 /workspace/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.440651480 May 23 03:32:29 PM PDT 24 May 23 03:32:35 PM PDT 24 96519769 ps
T1985 /workspace/coverage/cover_reg_top/7.usbdev_csr_rw.3297988929 May 23 03:32:09 PM PDT 24 May 23 03:32:11 PM PDT 24 69629879 ps
T1986 /workspace/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1054765990 May 23 03:32:26 PM PDT 24 May 23 03:32:32 PM PDT 24 129832532 ps
T1987 /workspace/coverage/cover_reg_top/39.usbdev_intr_test.1776742476 May 23 03:32:44 PM PDT 24 May 23 03:32:52 PM PDT 24 45176950 ps
T1988 /workspace/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3852628207 May 23 03:32:25 PM PDT 24 May 23 03:32:28 PM PDT 24 126315028 ps
T263 /workspace/coverage/cover_reg_top/10.usbdev_csr_rw.2513485136 May 23 03:32:26 PM PDT 24 May 23 03:32:31 PM PDT 24 94011134 ps
T1989 /workspace/coverage/cover_reg_top/7.usbdev_intr_test.3700094133 May 23 03:32:10 PM PDT 24 May 23 03:32:13 PM PDT 24 51017236 ps
T1990 /workspace/coverage/cover_reg_top/20.usbdev_intr_test.3490027767 May 23 03:32:27 PM PDT 24 May 23 03:32:31 PM PDT 24 35685620 ps
T1991 /workspace/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.1720444268 May 23 03:32:26 PM PDT 24 May 23 03:32:31 PM PDT 24 83053381 ps
T264 /workspace/coverage/cover_reg_top/4.usbdev_mem_partial_access.3205091161 May 23 03:32:05 PM PDT 24 May 23 03:32:08 PM PDT 24 118008247 ps
T1992 /workspace/coverage/cover_reg_top/10.usbdev_tl_intg_err.2597063092 May 23 03:32:25 PM PDT 24 May 23 03:32:33 PM PDT 24 1104747857 ps
T1993 /workspace/coverage/cover_reg_top/8.usbdev_tl_errors.1228074972 May 23 03:32:10 PM PDT 24 May 23 03:32:15 PM PDT 24 234275661 ps
T1994 /workspace/coverage/cover_reg_top/12.usbdev_csr_rw.2136926668 May 23 03:32:27 PM PDT 24 May 23 03:32:32 PM PDT 24 69080546 ps
T1995 /workspace/coverage/cover_reg_top/6.usbdev_csr_rw.3448213765 May 23 03:32:08 PM PDT 24 May 23 03:32:10 PM PDT 24 53067285 ps
T1996 /workspace/coverage/cover_reg_top/30.usbdev_intr_test.3031152187 May 23 03:32:40 PM PDT 24 May 23 03:32:43 PM PDT 24 40162083 ps
T1997 /workspace/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.2581589157 May 23 03:32:04 PM PDT 24 May 23 03:32:08 PM PDT 24 350822205 ps
T1998 /workspace/coverage/cover_reg_top/32.usbdev_intr_test.969970586 May 23 03:32:41 PM PDT 24 May 23 03:32:44 PM PDT 24 52738879 ps
T1999 /workspace/coverage/cover_reg_top/21.usbdev_intr_test.3703350578 May 23 03:32:29 PM PDT 24 May 23 03:32:34 PM PDT 24 38988387 ps
T2000 /workspace/coverage/cover_reg_top/46.usbdev_intr_test.1872548521 May 23 03:32:39 PM PDT 24 May 23 03:32:41 PM PDT 24 88899301 ps
T265 /workspace/coverage/cover_reg_top/2.usbdev_csr_aliasing.2280844422 May 23 03:31:54 PM PDT 24 May 23 03:31:57 PM PDT 24 95179237 ps
T2001 /workspace/coverage/cover_reg_top/0.usbdev_csr_rw.591129923 May 23 03:31:53 PM PDT 24 May 23 03:31:55 PM PDT 24 73543432 ps
T2002 /workspace/coverage/cover_reg_top/0.usbdev_mem_walk.265969955 May 23 03:32:10 PM PDT 24 May 23 03:32:16 PM PDT 24 108211289 ps
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