Module Definition
dashboard | hierarchy | modlist | groups | tests | asserts

Module : prim_flop
SCORELINECONDTOGGLEFSMBRANCHASSERT

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_abstract_flop_0/prim_flop.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_oe_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_d_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_se0_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_d_o_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_se0_o_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_dp_o_flop
tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_dn_o_flop
tb.dut.u_reg.u_wake_control_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_1
tb.dut.u_reg.u_wake_control_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_2
tb.dut.u_reg.u_wake_control_cdc.u_arb.gen_passthru.u_dst_to_src_ack.prim_flop_2sync.u_sync_1
tb.dut.u_reg.u_wake_control_cdc.u_arb.gen_passthru.u_dst_to_src_ack.prim_flop_2sync.u_sync_2
tb.dut.u_reg.u_wake_events_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_1
tb.dut.u_reg.u_wake_events_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_2
tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.req_sync.u_sync_1
tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.req_sync.u_sync_2
tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.ack_sync.u_sync_1
tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.ack_sync.u_sync_2
tb.dut.u_reg.u_usbctrl0_qe
tb.dut.u_reg.u_fifo_ctrl0_qe
tb.dut.i_usbdev_iomux.cdc_io_to_usb.u_sync_1
tb.dut.i_usbdev_iomux.cdc_io_to_usb.u_sync_2



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_oe_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_d_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_se0_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_d_o_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_se0_o_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_dp_o_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.usbdev_impl.u_usb_fs_nb_pe.u_usb_fs_tx.u_usb_dn_o_flop

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
87.24 95.11 91.38 58.82 90.91 100.00 u_usb_fs_tx


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_control_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_control_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_control_cdc.u_arb.gen_passthru.u_dst_to_src_ack.prim_flop_2sync.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_control_cdc.u_arb.gen_passthru.u_dst_to_src_ack.prim_flop_2sync.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_src_to_dst_req.prim_flop_2sync.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
prim_flop_2sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.req_sync.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
gen_nrz_hs_protocol.req_sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.req_sync.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
gen_nrz_hs_protocol.req_sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.ack_sync.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
gen_nrz_hs_protocol.ack_sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_wake_events_cdc.u_arb.gen_wr_req.u_dst_update_sync.gen_nrz_hs_protocol.ack_sync.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
gen_nrz_hs_protocol.ack_sync


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_usbctrl0_qe

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.52 99.76 98.32 100.00 100.00 u_reg


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.u_reg.u_fifo_ctrl0_qe

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
99.52 99.76 98.32 100.00 100.00 u_reg


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.i_usbdev_iomux.cdc_io_to_usb.u_sync_1

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
cdc_io_to_usb


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00



Module Instance : tb.dut.i_usbdev_iomux.cdc_io_to_usb.u_sync_2

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
100.00 100.00 100.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
cdc_io_to_usb


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
gen_generic.u_impl_generic 100.00 100.00 100.00

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