USBDEV Simulation Results

Friday August 02 2024 23:02:48 UTC

GitHub Revision: c8985d6745

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 75989420798843487383163268541581889763599806834398027919895759109584083292465

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.160s 276.552us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.210s 316.526us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.070s 128.164us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 10.540s 1.992ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.270s 132.873us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.800s 109.080us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.070s 128.164us 20 20 100.00
usbdev_csr_aliasing 3.270s 132.873us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.010s 162.508us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.450s 196.025us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.130s 309.403us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 1.770s 547.971us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.800s 136.118us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.990s 210.405us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 1.078m 23.786ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.120s 347.438us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 1.000s 226.800us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.170s 271.845us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 1.070s 245.025us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.040s 193.171us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.040s 208.911us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.980s 221.359us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.040s 195.365us 50 50 100.00
usbdev_stream_len_max 3.480s 1.402ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.180s 287.480us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.950s 216.573us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.020s 168.359us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.050s 231.348us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.110s 313.232us 50 50 100.00
V2 out_stall usbdev_out_stall 1.030s 232.728us 50 50 100.00
V2 in_stall usbdev_in_stall 0.900s 160.656us 50 50 100.00
V2 out_iso usbdev_out_iso 0.970s 186.509us 50 50 100.00
V2 in_iso usbdev_in_iso 1.310s 243.822us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.030s 212.497us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.110s 249.137us 50 50 100.00
V2 disconnected usbdev_disconnected 0.940s 207.319us 50 50 100.00
V2 host_lost usbdev_host_lost 10.120s 4.154ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.800s 157.380us 1 1 100.00
V2 link_suspend usbdev_link_suspend 16.100s 10.204ms 50 50 100.00
V2 link_resume usbdev_link_resume 49.680s 29.444ms 49 50 98.00
V2 av_empty usbdev_av_empty 0.940s 210.740us 5 5 100.00
V2 rx_full usbdev_rx_full 1.410s 460.837us 50 50 100.00
V2 av_overflow usbdev_av_overflow 0.840s 141.955us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.070s 250.307us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 1.010s 247.483us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.950s 197.712us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.920s 180.974us 48 50 96.00
V2 link_out_err usbdev_link_out_err 1.470s 539.686us 1 1 100.00
V2 enable usbdev_enable 0.810s 54.882us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 23.420s 20.212ms 1 1 100.00
V2 device_address usbdev_device_address 1.705m 60.730ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.400s 472.065us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.910s 157.442us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 2.850s 991.456us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 2.670s 1.252ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 2.210s 913.823us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.010s 200.377us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.980s 183.008us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.070s 212.176us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.000s 209.833us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.110s 300.478us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 1.030s 196.364us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.960s 173.432us 50 50 100.00
V2 streaming_test usbdev_streaming_out 2.032m 4.287ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.974m 113.208ms 5 5 100.00
usbdev_freq_loclk 3.428m 119.098ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 2.673m 108.415ms 5 5 100.00
usbdev_freq_loclk_max 3.525m 111.269ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.814m 104.135ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.992m 4.075ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.923m 3.978ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 47.810s 5.670ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 44.720s 1.823ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 1.078m 23.786ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.360s 427.049us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 46.400s 30.973ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 30.600s 21.020ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 15.660s 10.596ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 2.505m 5.284ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.622m 3.508ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 2.559m 5.371ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 3.027m 9.756ms 9 10 90.00
V2 rand_disconnects usbdev_rand_bus_disconnects 1.337m 6.614ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 3.113m 10.374ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.784m 3.556ms 25 25 100.00
usbdev_max_usb_traffic 1.530m 3.137ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 3.146m 6.706ms 5 5 100.00
V2 in_packet_retraction usbdev_iso_retraction 2.431m 11.481ms 46 50 92.00
V2 data_toggle_restore usbdev_data_toggle_restore 3.600s 1.245ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.510s 444.342us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.710s 316.694us 50 50 100.00
V2 intr_test usbdev_intr_test 0.830s 114.156us 50 50 100.00
V2 alert_test usbdev_alert_test 0.770s 70.054us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.780s 352.569us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.780s 352.569us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.210s 316.526us 5 5 100.00
usbdev_csr_rw 1.070s 128.164us 20 20 100.00
usbdev_csr_aliasing 3.270s 132.873us 5 5 100.00
usbdev_same_csr_outstanding 1.980s 363.795us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.210s 316.526us 5 5 100.00
usbdev_csr_rw 1.070s 128.164us 20 20 100.00
usbdev_csr_aliasing 3.270s 132.873us 5 5 100.00
usbdev_same_csr_outstanding 1.980s 363.795us 20 20 100.00
V2 TOTAL 3072 3080 99.74
V2S tl_intg_err usbdev_sec_cm 1.370s 427.914us 5 5 100.00
usbdev_tl_intg_err 5.900s 1.931ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.900s 1.931ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 2.397m 5.117ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 0.710s 91.753us 0 10 0.00
usbdev_stress_all 0.620s 0 50 0.00
TOTAL 3213 3281 97.93

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 84 84 80 95.24
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.61 97.96 93.90 97.44 81.25 96.42 98.17 90.14

Failure Buckets

Past Results