Group : usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg
dashboard | hierarchy | modlist | groups | tests | asserts

Group : usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv



Summary for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 15 15 0 0.00
Crosses 192 192 0 0.00


Variables for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_out_enable 2 2 0 0.00 100 1 1 2
cp_out_iso 2 2 0 0.00 100 1 1 2
cp_out_stall 2 2 0 0.00 100 1 1 2
cp_pid 3 3 0 0.00 100 1 1 0
cp_rxenable_out 2 2 0 0.00 100 1 1 2
cp_rxenable_setup 2 2 0 0.00 100 1 1 2
cp_set_nak_out 2 2 0 0.00 100 1 1 2


Crosses for Group usbdev_env_pkg::usbdev_env_cov::ep_out_cfg_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_pid_x_epconfig 192 192 0 0.00 100 1 1 0


Summary for Variable cp_out_enable

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_out_enable

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_out_iso

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_out_iso

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_out_stall

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_out_stall

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_pid

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 3 0 0.00


User Defined Bins for cp_pid

Uncovered bins
NAMECOUNTAT LEASTNUMBER
ignore_pre[PidTypePre] 0 1 1
pkt_types[PidTypeSetupToken] 0 1 1
pkt_types[PidTypeOutToken] 0 1 1



Summary for Variable cp_rxenable_out

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_rxenable_out

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_rxenable_setup

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_rxenable_setup

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Variable cp_set_nak_out

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_set_nak_out

Uncovered bins
NAMECOUNTAT LEASTNUMBER
[auto[0] - auto[1]] -- -- 2



Summary for Cross cr_pid_x_epconfig

Samples crossed: cp_pid cp_out_enable cp_rxenable_setup cp_rxenable_out cp_set_nak_out cp_out_iso cp_out_stall
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 192 192 0 0.00 192


Automatically Generated Cross Bins for cr_pid_x_epconfig

Uncovered bins
cp_pidcp_out_enablecp_rxenable_setupcp_rxenable_outcp_set_nak_outcp_out_isocp_out_stallCOUNTAT LEASTNUMBER
* * * * * * * -- -- 192

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%