Group : usbdev_env_pkg::usbdev_env_cov::pid_type_endp_cg
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Group : usbdev_env_pkg::usbdev_env_cov::pid_type_endp_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv



Summary for Group usbdev_env_pkg::usbdev_env_cov::pid_type_endp_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 19 19 0 0.00
Crosses 48 48 0 0.00


Variables for Group usbdev_env_pkg::usbdev_env_cov::pid_type_endp_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_endp 16 16 0 0.00 100 1 1 0
cp_pid 3 3 0 0.00 100 1 1 0


Crosses for Group usbdev_env_pkg::usbdev_env_cov::pid_type_endp_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_pid_X_endp 48 48 0 0.00 100 1 1 0


Summary for Variable cp_endp

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 16 16 0 0.00


User Defined Bins for cp_endp

Uncovered bins
NAMECOUNTAT LEASTNUMBER
invalid_ep[0xc] 0 1 1
invalid_ep[0xd] 0 1 1
invalid_ep[0xe] 0 1 1
invalid_ep[0xf] 0 1 1
endpoints[0x0] 0 1 1
endpoints[0x1] 0 1 1
endpoints[0x2] 0 1 1
endpoints[0x3] 0 1 1
endpoints[0x4] 0 1 1
endpoints[0x5] 0 1 1
endpoints[0x6] 0 1 1
endpoints[0x7] 0 1 1
endpoints[0x8] 0 1 1
endpoints[0x9] 0 1 1
endpoints[0xa] 0 1 1
endpoints[0xb] 0 1 1



Summary for Variable cp_pid

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 3 0 0.00


User Defined Bins for cp_pid

Uncovered bins
NAMECOUNTAT LEASTNUMBER
pkt_types[PidTypeSetupToken] 0 1 1
pkt_types[PidTypeOutToken] 0 1 1
pkt_types[PidTypeInToken] 0 1 1



Summary for Cross cr_pid_X_endp

Samples crossed: cp_pid cp_endp
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 48 48 0 0.00 48


Automatically Generated Cross Bins for cr_pid_X_endp

Uncovered bins
cp_pidcp_endpCOUNTAT LEASTNUMBER
* * -- -- 48

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