Group : usbdev_env_pkg::usbdev_env_cov::crc5_cg
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Group : usbdev_env_pkg::usbdev_env_cov::crc5_cg
SCOREWEIGHTGOALAT LEASTAUTO BIN MAXPRINT MISSING
0.00 1 100 1 64 64


Source File(s) :
/workspace/cover_reg_top/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv



Summary for Group usbdev_env_pkg::usbdev_env_cov::crc5_cg

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Variables 5 5 0 0.00
Crosses 6 6 0 0.00


Variables for Group usbdev_env_pkg::usbdev_env_cov::crc5_cg
VARIABLEEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTAUTO BIN MAXCOMMENT
cp_crc5 3 3 0 0.00 100 1 1 0
cp_dir 2 2 0 0.00 100 1 1 2


Crosses for Group usbdev_env_pkg::usbdev_env_cov::crc5_cg
CROSSEXPECTEDUNCOVEREDCOVEREDPERCENTGOALWEIGHTAT LEASTPRINT MISSINGCOMMENT
cr_crc5_X_dir 6 6 0 0.00 100 1 1 0


Summary for Variable cp_crc5

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
User Defined Bins 3 3 0 0.00


User Defined Bins for cp_crc5

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
all_ones 0 1 1
leading_zero 0 1 1
trailing_zero 0 1 1



Summary for Variable cp_dir

CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENT
Automatically Generated Bins 2 2 0 0.00


Automatically Generated Bins for cp_dir

Uncovered bins
NAMECOUNTAT LEASTNUMBERSTATUS
[auto[0] - auto[1]] -- -- 2



Summary for Cross cr_crc5_X_dir

Samples crossed: cp_crc5 cp_dir
CATEGORYEXPECTEDUNCOVEREDCOVEREDPERCENTMISSING
Automatically Generated Cross Bins 6 6 0 0.00 6


Automatically Generated Cross Bins for cr_crc5_X_dir

Uncovered bins
cp_crc5cp_dirCOUNTAT LEASTNUMBERSTATUS
* * -- -- 6

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%