| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.34 | 98.16 | 96.03 | 97.44 | 93.22 | 98.38 | 98.17 | 92.94 |
| T3570 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.616199266 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:17 PM UTC 24 | 484450148 ps | ||
| T3571 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.3459895878 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:17 PM UTC 24 | 625204787 ps | ||
| T3572 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1910890096 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:17 PM UTC 24 | 599289883 ps | ||
| T3573 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1346743081 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:17 PM UTC 24 | 581002735 ps | ||
| T3574 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.470719390 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 526143694 ps | ||
| T3575 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.3148116575 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 569333569 ps | ||
| T3576 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.91495259 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 529968944 ps | ||
| T3577 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.2718079136 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 474568459 ps | ||
| T3578 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.3846302075 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 613569135 ps | ||
| T3579 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.153125599 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 453928652 ps | ||
| T3580 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.3152357546 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 460837267 ps | ||
| T3581 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.978167389 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 455965752 ps | ||
| T3582 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2759546490 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 519806648 ps | ||
| T3583 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.2369455285 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 604716450 ps | ||
| T3584 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.1120595218 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:21 PM UTC 24 | 566682183 ps | ||
| T3585 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3388045833 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 469589913 ps | ||
| T3586 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.3296160172 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 668459708 ps | ||
| T3587 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.836738583 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 561547780 ps | ||
| T3588 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.1368844677 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 419702510 ps | ||
| T3589 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.1193790613 | Aug 23 11:11:18 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 592488500 ps | ||
| T3590 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1509394161 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 429037423 ps | ||
| T3591 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1071102464 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 477470625 ps | ||
| T3592 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.3737121614 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 580267633 ps | ||
| T3593 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.413956363 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 554725414 ps | ||
| T3594 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.2534573120 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 532427754 ps | ||
| T3595 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.1927199316 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 591799068 ps | ||
| T3596 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.3338778615 | Aug 23 11:11:16 PM UTC 24 | Aug 23 11:11:22 PM UTC 24 | 453891518 ps | ||
| T3597 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.451421251 | Aug 23 11:11:04 PM UTC 24 | Aug 23 11:11:24 PM UTC 24 | 530667738 ps | ||
| T3598 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.4258425470 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:24 PM UTC 24 | 434277441 ps | ||
| T3599 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.400901097 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 535767917 ps | ||
| T3600 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.2431581948 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 579180051 ps | ||
| T3601 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.2784042800 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 492429949 ps | ||
| T3602 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.983118017 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 610657451 ps | ||
| T3603 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.984712544 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 676775666 ps | ||
| T3604 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2074543797 | Aug 23 11:11:15 PM UTC 24 | Aug 23 11:11:25 PM UTC 24 | 604915670 ps | ||
| T3605 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2795418215 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 480112709 ps | ||
| T3606 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.599651438 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 506457746 ps | ||
| T232 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.4020485710 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 486367558 ps | ||
| T3607 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.3351141936 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 582554032 ps | ||
| T3608 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.4221885060 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 513099691 ps | ||
| T3609 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.1679029764 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 563596378 ps | ||
| T3610 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.659448204 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 614915883 ps | ||
| T3611 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.2635513497 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 506937314 ps | ||
| T3612 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3473775632 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 462279182 ps | ||
| T3613 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.4252844951 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 583279567 ps | ||
| T3614 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.325394767 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 463879661 ps | ||
| T3615 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.2339214449 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 516473206 ps | ||
| T3616 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.588383250 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:26 PM UTC 24 | 511154139 ps | ||
| T3617 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.3214447938 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 585260825 ps | ||
| T3618 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.769848276 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 535347023 ps | ||
| T3619 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.468253568 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 577898003 ps | ||
| T3620 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2780198767 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 626529634 ps | ||
| T3621 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3469802013 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 513902095 ps | ||
| T3622 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.3389698561 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 549701923 ps | ||
| T3623 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.4240455861 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 561105564 ps | ||
| T3624 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.42457900 | Aug 23 11:11:23 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 562410498 ps | ||
| T3625 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.3221794137 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 672908933 ps | ||
| T3626 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.1614720265 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 667156047 ps | ||
| T3627 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.157108400 | Aug 23 11:11:24 PM UTC 24 | Aug 23 11:11:27 PM UTC 24 | 637703206 ps | ||
| T3628 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3642798653 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:28 PM UTC 24 | 612987820 ps | ||
| T3629 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2805068880 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:28 PM UTC 24 | 430418146 ps | ||
| T3630 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2538766620 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:28 PM UTC 24 | 595044295 ps | ||
| T3631 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.1345022374 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:28 PM UTC 24 | 630205061 ps | ||
| T3632 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.2979475125 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:28 PM UTC 24 | 585728491 ps | ||
| T122 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1739323534 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:29 PM UTC 24 | 634484622 ps | ||
| T262 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3111675471 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:29 PM UTC 24 | 28837547 ps | ||
| T261 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.888509870 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:29 PM UTC 24 | 72239415 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3885285106 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:29 PM UTC 24 | 61658609 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2472341842 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:30 PM UTC 24 | 195534660 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2530118227 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:30 PM UTC 24 | 199079015 ps | ||
| T249 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.1310861183 | Aug 23 11:11:25 PM UTC 24 | Aug 23 11:11:30 PM UTC 24 | 112641621 ps | ||
| T302 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1626078244 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:30 PM UTC 24 | 180966668 ps | ||
| T258 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3932620895 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 64680986 ps | ||
| T303 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.913329650 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 95178250 ps | ||
| T3633 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3342848684 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 132978487 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4210316362 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 89236325 ps | ||
| T259 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1006994305 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 110209730 ps | ||
| T263 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1503511987 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 104039722 ps | ||
| T251 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.146970641 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:31 PM UTC 24 | 108098850 ps | ||
| T311 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.3351727363 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 119750883 ps | ||
| T304 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.251802559 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 102190050 ps | ||
| T285 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1542645560 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 204071699 ps | ||
| T305 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.2052505879 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 81330587 ps | ||
| T268 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.120406131 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 80872064 ps | ||
| T3634 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.126543361 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 517375124 ps | ||
| T260 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.362339483 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 69300765 ps | ||
| T3635 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2956211882 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 384596412 ps | ||
| T3636 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.648302762 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 104135296 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2747605364 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 464129227 ps | ||
| T306 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3576232609 | Aug 23 11:11:30 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 62984445 ps | ||
| T352 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3963783841 | Aug 23 11:11:31 PM UTC 24 | Aug 23 11:11:32 PM UTC 24 | 36413755 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3230312196 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:33 PM UTC 24 | 941074807 ps | ||
| T312 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2969559880 | Aug 23 11:11:30 PM UTC 24 | Aug 23 11:11:33 PM UTC 24 | 95540548 ps | ||
| T307 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3228550245 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:33 PM UTC 24 | 125263323 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.19101613 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:33 PM UTC 24 | 873576605 ps | ||
| T3637 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.882731693 | Aug 23 11:11:30 PM UTC 24 | Aug 23 11:11:34 PM UTC 24 | 161291576 ps | ||
| T289 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2065992720 | Aug 23 11:11:31 PM UTC 24 | Aug 23 11:11:34 PM UTC 24 | 93122821 ps | ||
| T308 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.3545714466 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:34 PM UTC 24 | 49262552 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.977485204 | Aug 23 11:11:31 PM UTC 24 | Aug 23 11:11:34 PM UTC 24 | 284005892 ps | ||
| T322 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2790884467 | Aug 23 11:11:29 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 999588291 ps | ||
| T309 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2420171475 | Aug 23 11:11:27 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 1128916432 ps | ||
| T284 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.589907935 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 76424776 ps | ||
| T310 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2135730901 | Aug 23 11:11:30 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 200726493 ps | ||
| T313 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.2788676406 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 192017473 ps | ||
| T3638 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3609362646 | Aug 23 11:11:31 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 205861567 ps | ||
| T3639 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2453241881 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 99771111 ps | ||
| T327 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2266980472 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:35 PM UTC 24 | 43971841 ps | ||
| T324 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3010061344 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 73911709 ps | ||
| T357 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.312623236 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 64402563 ps | ||
| T314 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.2185874036 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 52167980 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1767271363 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 205240038 ps | ||
| T315 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.4154530865 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 58709845 ps | ||
| T291 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2439544583 | Aug 23 11:11:31 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 820654996 ps | ||
| T290 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2699281686 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 85737431 ps | ||
| T3640 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.638465487 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 83112774 ps | ||
| T3641 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1909604567 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 101024608 ps | ||
| T3642 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3227134309 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:36 PM UTC 24 | 163539250 ps | ||
| T3643 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.4079242277 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 332849831 ps | ||
| T3644 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.285337779 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 100430173 ps | ||
| T323 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3936699776 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 206073921 ps | ||
| T3645 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3850047979 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 209687011 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3874758831 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 198936851 ps | ||
| T3646 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2131052203 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 340447860 ps | ||
| T353 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.886546956 | Aug 23 11:11:35 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 34156310 ps | ||
| T3647 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2448964807 | Aug 23 11:11:35 PM UTC 24 | Aug 23 11:11:37 PM UTC 24 | 55331917 ps | ||
| T508 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.126915834 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:38 PM UTC 24 | 674101068 ps | ||
| T3648 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1779979385 | Aug 23 11:11:36 PM UTC 24 | Aug 23 11:11:38 PM UTC 24 | 96206469 ps | ||
| T283 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3067519377 | Aug 23 11:11:35 PM UTC 24 | Aug 23 11:11:38 PM UTC 24 | 165261699 ps | ||
| T511 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3178878644 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:38 PM UTC 24 | 771907996 ps | ||
| T325 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.2423442634 | Aug 23 11:11:36 PM UTC 24 | Aug 23 11:11:39 PM UTC 24 | 248220241 ps | ||
| T3649 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.2135725468 | Aug 23 11:11:36 PM UTC 24 | Aug 23 11:11:39 PM UTC 24 | 193992230 ps | ||
| T505 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1495474559 | Aug 23 11:11:35 PM UTC 24 | Aug 23 11:11:39 PM UTC 24 | 1123081282 ps | ||
| T3650 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1483514804 | Aug 23 11:11:34 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 469569826 ps | ||
| T354 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1938722872 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 42392113 ps | ||
| T326 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.221236485 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 70727675 ps | ||
| T3651 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3063201145 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 59963411 ps | ||
| T358 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2582885264 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 33875545 ps | ||
| T3652 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2694103680 | Aug 23 11:11:32 PM UTC 24 | Aug 23 11:11:42 PM UTC 24 | 2009874542 ps | ||
| T361 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.28094159 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 37936270 ps | ||
| T3653 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1640147171 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 79181992 ps | ||
| T3654 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.2732671732 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 50431892 ps | ||
| T3655 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2602017234 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 48205052 ps | ||
| T3656 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1954767521 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 93771427 ps | ||
| T3657 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3118245359 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 77045060 ps | ||
| T3658 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2826118336 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 91647840 ps | ||
| T328 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.325407841 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 296622523 ps | ||
| T3659 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2849653066 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 77073686 ps | ||
| T3660 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1038086880 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 150366340 ps | ||
| T3661 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.3210029764 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 225329247 ps | ||
| T3662 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3928457565 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 130205714 ps | ||
| T3663 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2862758138 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 87367962 ps | ||
| T3664 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1796183011 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 191485066 ps | ||
| T3665 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1111927848 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:43 PM UTC 24 | 147015671 ps | ||
| T3666 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1220487265 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:44 PM UTC 24 | 376551738 ps | ||
| T3667 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.2831265291 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:44 PM UTC 24 | 137795810 ps | ||
| T3668 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.3689676182 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:44 PM UTC 24 | 93344791 ps | ||
| T3669 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3492097082 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:44 PM UTC 24 | 735535635 ps | ||
| T3670 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2376560943 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:45 PM UTC 24 | 122392098 ps | ||
| T3671 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3018896728 | Aug 23 11:11:42 PM UTC 24 | Aug 23 11:11:45 PM UTC 24 | 145056090 ps | ||
| T286 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2298922978 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:45 PM UTC 24 | 731388111 ps | ||
| T3672 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.632941138 | Aug 23 11:11:42 PM UTC 24 | Aug 23 11:11:45 PM UTC 24 | 148674645 ps | ||
| T3673 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.753581348 | Aug 23 11:11:42 PM UTC 24 | Aug 23 11:11:46 PM UTC 24 | 431488593 ps | ||
| T506 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.828464627 | Aug 23 11:11:40 PM UTC 24 | Aug 23 11:11:46 PM UTC 24 | 1089841984 ps | ||
| T3674 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.4280947757 | Aug 23 11:11:41 PM UTC 24 | Aug 23 11:11:47 PM UTC 24 | 1894347319 ps | ||
| T355 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.2853461432 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 99477112 ps | ||
| T359 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.758024085 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 52959659 ps | ||
| T3675 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.590974355 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 169296568 ps | ||
| T3676 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.927715632 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 119247212 ps | ||
| T356 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3956405677 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 36733804 ps | ||
| T3677 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.622124268 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 68671038 ps | ||
| T3678 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.885904603 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 67360403 ps | ||
| T3679 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.810907190 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 116067135 ps | ||
| T3680 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1654990624 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:04 PM UTC 24 | 364573440 ps | ||
| T3681 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.111258630 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:49 PM UTC 24 | 55544744 ps | ||
| T3682 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.479269403 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 44916806 ps | ||
| T3683 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.4018871940 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 108990015 ps | ||
| T3684 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1509855914 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 58489312 ps | ||
| T3685 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1817026727 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 173849139 ps | ||
| T3686 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1146676863 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 162695984 ps | ||
| T3687 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4031459071 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 79546948 ps | ||
| T3688 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.872892909 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 92257453 ps | ||
| T3689 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3226067725 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 129774600 ps | ||
| T3690 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.873253242 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 293395681 ps | ||
| T3691 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1661671431 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 158355340 ps | ||
| T3692 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3994464668 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:50 PM UTC 24 | 179418150 ps | ||
| T3693 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.56049536 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:51 PM UTC 24 | 167978813 ps | ||
| T3694 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2616084012 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:51 PM UTC 24 | 299298783 ps | ||
| T3695 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.1030615678 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:51 PM UTC 24 | 261324038 ps | ||
| T3696 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2533308810 | Aug 23 11:11:48 PM UTC 24 | Aug 23 11:11:51 PM UTC 24 | 81988718 ps | ||
| T3697 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.892801376 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:51 PM UTC 24 | 270968083 ps | ||
| T507 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.3904502285 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:52 PM UTC 24 | 976419448 ps | ||
| T509 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1888811439 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:52 PM UTC 24 | 635560699 ps | ||
| T3698 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.3308473804 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:53 PM UTC 24 | 752498453 ps | ||
| T513 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2756437009 | Aug 23 11:11:47 PM UTC 24 | Aug 23 11:11:55 PM UTC 24 | 2448801420 ps | ||
| T360 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.675303249 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 81190768 ps | ||
| T514 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1200209828 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:04 PM UTC 24 | 845308110 ps | ||
| T3699 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3028022396 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 76244508 ps | ||
| T3700 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2571269036 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 71185162 ps | ||
| T3701 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1841442491 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 61283607 ps | ||
| T3702 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.25980707 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 40630222 ps | ||
| T3703 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2978005959 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 37226529 ps | ||
| T3704 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.1069856561 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 74967615 ps | ||
| T3705 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2164230035 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 76567015 ps | ||
| T3706 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.2639312626 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 55627120 ps | ||
| T3707 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.815568682 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:01 PM UTC 24 | 47809622 ps | ||
| T512 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.919141222 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:05 PM UTC 24 | 1596563889 ps | ||
| T3708 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1214938402 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 62099356 ps | ||
| T3709 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.11114003 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 59740737 ps | ||
| T3710 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2756761319 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 37218131 ps | ||
| T3711 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1048210352 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 101598779 ps | ||
| T3712 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.87427714 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 55641111 ps | ||
| T3713 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.1494536714 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 50226839 ps | ||
| T3714 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.2997919222 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 189221405 ps | ||
| T3715 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.440024977 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 59308000 ps | ||
| T3716 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.94544863 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 38607406 ps | ||
| T3717 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2437429380 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 91727586 ps | ||
| T3718 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2014616875 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 92498479 ps | ||
| T3719 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1214838471 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 116710293 ps | ||
| T3720 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.1869690794 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 71613182 ps | ||
| T3721 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3749300715 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 67776314 ps | ||
| T3722 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2950300968 | Aug 23 11:12:00 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 93990265 ps | ||
| T3723 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1908449753 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 164410520 ps | ||
| T3724 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3832719309 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:02 PM UTC 24 | 112813969 ps | ||
| T510 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.3436310996 | Aug 23 11:11:59 PM UTC 24 | Aug 23 11:12:03 PM UTC 24 | 590611009 ps | ||
| T3725 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1455482720 | Aug 23 11:12:02 PM UTC 24 | Aug 23 11:12:03 PM UTC 24 | 67021949 ps | ||
| T3726 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2570197490 | Aug 23 11:12:02 PM UTC 24 | Aug 23 11:12:03 PM UTC 24 | 44188469 ps | ||
| T3727 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.1327326900 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:18 PM UTC 24 | 35937415 ps | ||
| T3728 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3341623279 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:18 PM UTC 24 | 55752518 ps | ||
| T3729 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1373428447 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:18 PM UTC 24 | 35924003 ps | ||
| T3730 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2548805169 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:18 PM UTC 24 | 107925511 ps | ||
| T3731 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2245534512 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 48556442 ps | ||
| T3732 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3048836808 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 57961939 ps | ||
| T3733 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2744092196 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 38210878 ps | ||
| T3734 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.2972553138 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 55019920 ps | ||
| T3735 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3851398533 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 78672090 ps | ||
| T3736 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.654563351 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 50712327 ps | ||
| T3737 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.439969814 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 45384327 ps | ||
| T3738 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2575327264 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 43968785 ps | ||
| T3739 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1158791972 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 45215270 ps | ||
| T3740 | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1612171378 | Aug 23 11:12:17 PM UTC 24 | Aug 23 11:12:19 PM UTC 24 | 73945098 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.170709216 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 896549590 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 10:46:05 PM UTC 24 |
| Finished | Aug 23 10:46:09 PM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=170709216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.170709216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2143678829 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 20052358996 ps |
| CPU time | 24.13 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:30 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143678829 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.2143678829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.598120315 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 738789370 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=598120315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_disable_endpoint.598120315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.418170751 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 5228730291 ps |
| CPU time | 35.82 seconds |
| Started | Aug 23 10:46:16 PM UTC 24 |
| Finished | Aug 23 10:46:54 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418170751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.418170751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3963783841 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 36413755 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:11:31 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963783841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.3963783841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1556906245 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 11726020800 ps |
| CPU time | 13.31 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:19 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556906245 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.1556906245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.1705414581 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 39848691061 ps |
| CPU time | 59.14 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:47:10 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705414581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.1705414581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1542645560 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 204071699 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542645560 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.1542645560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.2100269725 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 10545858501 ps |
| CPU time | 13.6 seconds |
| Started | Aug 23 10:50:31 PM UTC 24 |
| Finished | Aug 23 10:50:46 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100269725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.2100269725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3629789735 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 222567368 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:46:49 PM UTC 24 |
| Finished | Aug 23 10:46:51 PM UTC 24 |
| Peak memory | 250720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3629789735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.3629789735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.1072305768 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 22569532233 ps |
| CPU time | 52.08 seconds |
| Started | Aug 23 10:46:36 PM UTC 24 |
| Finished | Aug 23 10:47:30 PM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072305768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.1072305768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.3201707585 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 301630385 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 10:46:34 PM UTC 24 |
| Finished | Aug 23 10:46:36 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201707585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.3201707585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.4121692968 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 529288313 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:07 PM UTC 24 |
| Finished | Aug 23 11:09:09 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4121692968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_t x_rx_disruption.4121692968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2528703475 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 2502707026 ps |
| CPU time | 15.53 seconds |
| Started | Aug 23 10:46:21 PM UTC 24 |
| Finished | Aug 23 10:46:39 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2528703475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.2528703475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3728638171 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 90457186 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 10:48:54 PM UTC 24 |
| Finished | Aug 23 10:48:56 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728638171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3728638171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1006994305 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 110209730 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006994305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.1006994305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3885285106 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 61658609 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:29 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885285106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.3885285106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1437667722 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 20623941070 ps |
| CPU time | 26.18 seconds |
| Started | Aug 23 10:46:52 PM UTC 24 |
| Finished | Aug 23 10:47:19 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437667722 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.1437667722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2439544583 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 820654996 ps |
| CPU time | 4.42 seconds |
| Started | Aug 23 11:11:31 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439544583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.2439544583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.1616060197 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 18811385815 ps |
| CPU time | 23.94 seconds |
| Started | Aug 23 10:53:55 PM UTC 24 |
| Finished | Aug 23 10:54:20 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616060197 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.1616060197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.1204183559 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 14552404520 ps |
| CPU time | 16.67 seconds |
| Started | Aug 23 11:01:31 PM UTC 24 |
| Finished | Aug 23 11:01:49 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1204183559 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.1204183559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1679208507 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 3369225442 ps |
| CPU time | 19.76 seconds |
| Started | Aug 23 10:46:47 PM UTC 24 |
| Finished | Aug 23 10:47:08 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1679208507 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1679208507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.2470129253 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 535792017 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2470129253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.2470129253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.3278236400 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 15858320302 ps |
| CPU time | 25.23 seconds |
| Started | Aug 23 10:51:54 PM UTC 24 |
| Finished | Aug 23 10:52:21 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3278236400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.3278236400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.668664152 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 282245463 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:47:47 PM UTC 24 |
| Finished | Aug 23 10:47:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668664152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_rx_full.668664152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.4233431041 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 619338503 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 10:51:57 PM UTC 24 |
| Finished | Aug 23 10:52:00 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233431041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.4233431041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2056148235 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 462972502 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:03:27 PM UTC 24 |
| Finished | Aug 23 11:03:29 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056148235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.2056148235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3874758831 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 198936851 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874758831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.3874758831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2760752330 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 627674649 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 10:46:47 PM UTC 24 |
| Finished | Aug 23 10:46:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2760752330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx _rx_disruption.2760752330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.4047497499 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 157301233 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:47:01 PM UTC 24 |
| Finished | Aug 23 10:47:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4047497499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.4047497499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.924227720 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 586557531 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=924227720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.924227720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1707178743 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 780875002 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1707178743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1707178743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.2480418417 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 151042744 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:06 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2480418417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_bitstuff_err.2480418417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.4183487529 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 214823422 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:46:40 PM UTC 24 |
| Finished | Aug 23 10:46:43 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183487529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.4183487529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3111675471 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 28837547 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:29 PM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111675471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.3111675471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.1608826448 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 342130310 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 10:54:34 PM UTC 24 |
| Finished | Aug 23 10:54:37 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1608826448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.1608826448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.1454315259 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 474690001 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 10:56:34 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454315259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.1454315259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1519795398 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 600282388 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1519795398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.1519795398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2072575673 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 535546719 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:10 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072575673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.2072575673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2513592756 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 18034058354 ps |
| CPU time | 26.46 seconds |
| Started | Aug 23 10:54:58 PM UTC 24 |
| Finished | Aug 23 10:55:26 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513592756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.2513592756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.41997255 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 169616930 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:46:44 PM UTC 24 |
| Finished | Aug 23 10:46:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=41997255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.41997255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3836029069 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 651990246 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836029069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.3836029069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.327856779 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 675486257 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 10:55:53 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=327856779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.327856779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.2355409291 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 761184999 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355409291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.2355409291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.455034656 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 532309381 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455034656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.455034656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1631284759 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 19915562234 ps |
| CPU time | 47.89 seconds |
| Started | Aug 23 10:50:49 PM UTC 24 |
| Finished | Aug 23 10:51:39 PM UTC 24 |
| Peak memory | 232592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631284759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.1631284759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.990606162 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 458579614 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 10:46:40 PM UTC 24 |
| Finished | Aug 23 10:46:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=990606162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_setup_priority.990606162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.519869465 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 1181718917 ps |
| CPU time | 2.78 seconds |
| Started | Aug 23 10:55:49 PM UTC 24 |
| Finished | Aug 23 10:55:53 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=519869465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.519869465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.711768768 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 780257542 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:43 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=711768768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.711768768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2644027725 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 583689762 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:46 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644027725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.2644027725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.1486581177 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 495991745 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486581177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.1486581177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.2485467913 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 675533658 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 10:52:27 PM UTC 24 |
| Finished | Aug 23 10:52:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485467913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.2485467913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2636353103 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 40839767 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:46:49 PM UTC 24 |
| Finished | Aug 23 10:46:51 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636353103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.2636353103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.767295436 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 30493490411 ps |
| CPU time | 44.59 seconds |
| Started | Aug 23 10:46:57 PM UTC 24 |
| Finished | Aug 23 10:47:43 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767295436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_device_address.767295436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.2853461432 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 99477112 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 219044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853461432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.2853461432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2756437009 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 2448801420 ps |
| CPU time | 5.54 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:55 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756437009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.2756437009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1146865420 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 208130037 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:46:37 PM UTC 24 |
| Finished | Aug 23 10:46:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146865420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_pkt_received.1146865420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.913018855 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 409501597 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=913018855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.913018855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.2986109046 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 486676950 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:09:36 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 214628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2986109046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.2986109046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.4048609318 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 488906645 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 10:56:56 PM UTC 24 |
| Finished | Aug 23 10:56:59 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048609318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.4048609318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1242997206 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 486253365 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1242997206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.1242997206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.57443104 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 45617515585 ps |
| CPU time | 66.46 seconds |
| Started | Aug 23 10:49:20 PM UTC 24 |
| Finished | Aug 23 10:50:28 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57443104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_device_address.57443104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.960852321 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 618616107 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:03 PM UTC 24 |
| Finished | Aug 23 11:09:05 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=960852321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.960852321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2408087617 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 309306205 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:07 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408087617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.2408087617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2840021596 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 241846423 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:46:28 PM UTC 24 |
| Finished | Aug 23 10:46:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840021596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.2840021596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3317747082 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 551796697 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 10:53:52 PM UTC 24 |
| Finished | Aug 23 10:53:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3317747082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.3317747082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2981253866 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 133906774 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:06 PM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981253866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.2981253866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.1737213891 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 181255636 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:06 PM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1737213891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_av_empty.1737213891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3178878644 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 771907996 ps |
| CPU time | 4.24 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:38 PM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3178878644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3178878644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.1450038678 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 5112305758 ps |
| CPU time | 42.43 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:53 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450038678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.1450038678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3137874364 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 830062333 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 10:46:57 PM UTC 24 |
| Finished | Aug 23 10:47:00 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137874364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.3137874364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.1406844627 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 577465559 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406844627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.1406844627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1121605569 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 524922147 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 10:55:03 PM UTC 24 |
| Finished | Aug 23 10:55:05 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121605569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1121605569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4158892423 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 300119485 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158892423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.4158892423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2699017512 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 299119656 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 10:56:06 PM UTC 24 |
| Finished | Aug 23 10:56:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699017512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.2699017512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.2535222152 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 538320735 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535222152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.2535222152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.2440698607 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 757310129 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440698607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.2440698607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.108656596 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 450136756 ps |
| CPU time | 1.16 seconds |
| Started | Aug 23 11:07:17 PM UTC 24 |
| Finished | Aug 23 11:07:19 PM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=108656596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.108656596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.37428597 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 388710906 ps |
| CPU time | 1.17 seconds |
| Started | Aug 23 11:09:14 PM UTC 24 |
| Finished | Aug 23 11:09:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=37428597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.37428597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.424560541 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 4144423622 ps |
| CPU time | 28.55 seconds |
| Started | Aug 23 10:48:27 PM UTC 24 |
| Finished | Aug 23 10:48:57 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424560541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.424560541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.2529278661 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 10293228223 ps |
| CPU time | 58.23 seconds |
| Started | Aug 23 10:53:46 PM UTC 24 |
| Finished | Aug 23 10:54:46 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529278661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.2529278661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1654990624 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 364573440 ps |
| CPU time | 3.14 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:04 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654990624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.1654990624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3995088029 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 50759627923 ps |
| CPU time | 70.92 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:58:07 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995088029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_address.3995088029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.4186759282 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 2095074525 ps |
| CPU time | 47.66 seconds |
| Started | Aug 23 10:46:20 PM UTC 24 |
| Finished | Aug 23 10:47:10 PM UTC 24 |
| Peak memory | 234968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4186759282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.4186759282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.1012816736 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 12027373555 ps |
| CPU time | 72.09 seconds |
| Started | Aug 23 10:47:56 PM UTC 24 |
| Finished | Aug 23 10:49:10 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012816736 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.1012816736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.758024085 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 52959659 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758024085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.758024085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1888811439 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 635560699 ps |
| CPU time | 3.56 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:52 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888811439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.1888811439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.1851221289 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 157042427 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:46:44 PM UTC 24 |
| Finished | Aug 23 10:46:46 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851221289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_setup_trans_ignored.1851221289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2009977364 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 88175203415 ps |
| CPU time | 140.44 seconds |
| Started | Aug 23 10:47:06 PM UTC 24 |
| Finished | Aug 23 10:49:29 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009977364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.2009977364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3229969352 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 635889843 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 10:54:03 PM UTC 24 |
| Finished | Aug 23 10:54:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229969352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3229969352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.293310647 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 623812952 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293310647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.293310647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1953412181 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 501661465 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953412181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.1953412181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.301618525 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 504569239 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=301618525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.301618525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.2361011698 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 626608014 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361011698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.2361011698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1994734899 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 199610117 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994734899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1994734899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3351452793 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 528246105 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351452793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.3351452793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.2619090789 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 527404579 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619090789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.2619090789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.1309658252 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 751579095 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1309658252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.1309658252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.4112356601 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 92122711549 ps |
| CPU time | 128.92 seconds |
| Started | Aug 23 10:48:18 PM UTC 24 |
| Finished | Aug 23 10:50:29 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112356601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.4112356601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3115061843 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 885211601 ps |
| CPU time | 1.76 seconds |
| Started | Aug 23 11:02:42 PM UTC 24 |
| Finished | Aug 23 11:02:45 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115061843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3115061843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.581705911 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 390010349 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:05:24 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=581705911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_rx_full.581705911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.3604886834 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 3320936670 ps |
| CPU time | 22.32 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:07:24 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604886834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.3604886834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.4171802039 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 13147155498 ps |
| CPU time | 60.04 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:52:46 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4171802039 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.4171802039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.675497685 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 140697779 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:46:35 PM UTC 24 |
| Finished | Aug 23 10:46:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675497685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.675497685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3481141670 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 19703108890 ps |
| CPU time | 25.63 seconds |
| Started | Aug 23 10:55:47 PM UTC 24 |
| Finished | Aug 23 10:56:14 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481141670 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.3481141670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.1127372255 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 573191291 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:06 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1127372255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.1127372255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1371150472 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 1006948495 ps |
| CPU time | 2.61 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:13 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371150472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.1371150472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.816511746 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 141686780 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:46:55 PM UTC 24 |
| Finished | Aug 23 10:46:57 PM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=816511746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_av_overflow.816511746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2688688355 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 55162276 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:56:04 PM UTC 24 |
| Finished | Aug 23 10:56:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688688355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.2688688355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.467846439 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 8098874325 ps |
| CPU time | 49.91 seconds |
| Started | Aug 23 10:50:51 PM UTC 24 |
| Finished | Aug 23 10:51:42 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=467846439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.467846439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3880149782 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 467388369 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880149782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.3880149782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3091974502 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 4163074166 ps |
| CPU time | 9.63 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:20 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091974502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.3091974502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3678816370 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 508258668 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 10:46:11 PM UTC 24 |
| Finished | Aug 23 10:46:14 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3678816370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.3678816370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.738781895 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 192055554 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:46:15 PM UTC 24 |
| Finished | Aug 23 10:46:17 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738781895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_link_reset.738781895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.1526492686 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 190615736 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:46:40 PM UTC 24 |
| Finished | Aug 23 10:46:43 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526492686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.1526492686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3024226156 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 197941304 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:46:54 PM UTC 24 |
| Finished | Aug 23 10:46:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3024226156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.3024226156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.247087470 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 642923527 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=247087470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_t x_rx_disruption.247087470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2298922978 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 731388111 ps |
| CPU time | 3.67 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:45 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298922978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.2298922978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.921413392 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 209638672 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921413392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_fifo_rst.921413392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.444013306 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 2710336790 ps |
| CPU time | 22.57 seconds |
| Started | Aug 23 10:47:26 PM UTC 24 |
| Finished | Aug 23 10:47:50 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=444013306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.444013306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1963379765 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 254901462 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:47:33 PM UTC 24 |
| Finished | Aug 23 10:47:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963379765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_nak_trans.1963379765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.540379581 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 624094689 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 10:47:58 PM UTC 24 |
| Finished | Aug 23 10:48:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=540379581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx_ rx_disruption.540379581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.2212697022 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 218312902 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:54:16 PM UTC 24 |
| Finished | Aug 23 10:54:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212697022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_nak_trans.2212697022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.540305567 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 191645771 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:54:44 PM UTC 24 |
| Finished | Aug 23 10:54:46 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540305567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_nak_trans.540305567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.4271340006 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 471002818 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:27 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4271340006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_ tx_rx_disruption.4271340006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1943303950 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 615017917 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943303950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.1943303950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.469457008 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 210812288 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:55:10 PM UTC 24 |
| Finished | Aug 23 10:55:12 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=469457008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_nak_trans.469457008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.2820951960 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 216559946 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:55:35 PM UTC 24 |
| Finished | Aug 23 10:55:37 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820951960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.2820951960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2225573623 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 449282998 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2225573623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.2225573623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2355635113 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 215377521 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355635113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.2355635113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.235157839 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 240775397 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:57:04 PM UTC 24 |
| Finished | Aug 23 10:57:06 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=235157839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_nak_trans.235157839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.4183438852 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 201679821 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:59:04 PM UTC 24 |
| Finished | Aug 23 10:59:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183438852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.4183438852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1562048084 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 210651284 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:01:20 PM UTC 24 |
| Finished | Aug 23 11:01:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1562048084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1562048084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.456249832 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 197690853 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:02:51 PM UTC 24 |
| Finished | Aug 23 11:02:53 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456249832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_nak_trans.456249832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1697092547 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 6918408556 ps |
| CPU time | 36.96 seconds |
| Started | Aug 23 10:50:58 PM UTC 24 |
| Finished | Aug 23 10:51:36 PM UTC 24 |
| Peak memory | 235272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697092547 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.1697092547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.3088727465 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 211872697 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:51:38 PM UTC 24 |
| Finished | Aug 23 10:51:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088727465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_nak_trans.3088727465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2530118227 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 199079015 ps |
| CPU time | 1.78 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:30 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2530118227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.2530118227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2420171475 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 1128916432 ps |
| CPU time | 6.56 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420171475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.2420171475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.888509870 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 72239415 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:29 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=888509870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.888509870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4210316362 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 89236325 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 226580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210316362 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.4210316362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1626078244 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 180966668 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:30 PM UTC 24 |
| Peak memory | 227232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626078244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.1626078244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.126543361 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 517375124 ps |
| CPU time | 4.07 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126543361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.126543361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2472341842 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 195534660 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:30 PM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2472341842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.2472341842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.1310861183 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 112641621 ps |
| CPU time | 2.91 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:30 PM UTC 24 |
| Peak memory | 228468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310861183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.1310861183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3230312196 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 941074807 ps |
| CPU time | 4.35 seconds |
| Started | Aug 23 11:11:27 PM UTC 24 |
| Finished | Aug 23 11:11:33 PM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230312196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.3230312196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3228550245 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 125263323 ps |
| CPU time | 2.69 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:33 PM UTC 24 |
| Peak memory | 217908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228550245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.3228550245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2790884467 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 999588291 ps |
| CPU time | 4.52 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790884467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.2790884467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3342848684 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 132978487 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3342848684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.3342848684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.913329650 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 95178250 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=913329650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.913329650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3932620895 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 64680986 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3932620895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.3932620895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.2052505879 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 81330587 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2052505879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.2052505879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2956211882 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 384596412 ps |
| CPU time | 2.33 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956211882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.2956211882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.3351727363 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 119750883 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351727363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.3351727363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.146970641 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 108098850 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 234052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146970641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.146970641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2747605364 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 464129227 ps |
| CPU time | 2.43 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747605364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.2747605364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1111927848 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 147015671 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 235416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1111927848 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.1111927848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.2732671732 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 50431892 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732671732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.2732671732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.28094159 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 37936270 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=28094159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.28094159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1038086880 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 150366340 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038086880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.1038086880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2376560943 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 122392098 ps |
| CPU time | 2.66 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:45 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376560943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2376560943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3492097082 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 735535635 ps |
| CPU time | 2.65 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:44 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492097082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3492097082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3018896728 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 145056090 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:11:42 PM UTC 24 |
| Finished | Aug 23 11:11:45 PM UTC 24 |
| Peak memory | 229456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3018896728 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.3018896728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2602017234 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 48205052 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2602017234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2602017234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3118245359 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 77045060 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3118245359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.3118245359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2849653066 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 77073686 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849653066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.2849653066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.3689676182 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 93344791 ps |
| CPU time | 2.33 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:44 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3689676182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.3689676182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.4280947757 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 1894347319 ps |
| CPU time | 4.68 seconds |
| Started | Aug 23 11:11:41 PM UTC 24 |
| Finished | Aug 23 11:11:47 PM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280947757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.4280947757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.885904603 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 67360403 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 227432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=885904603 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.885904603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.590974355 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 169296568 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=590974355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.590974355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.927715632 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 119247212 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=927715632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.927715632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.632941138 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 148674645 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:11:42 PM UTC 24 |
| Finished | Aug 23 11:11:45 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=632941138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.632941138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.753581348 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 431488593 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 11:11:42 PM UTC 24 |
| Finished | Aug 23 11:11:46 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=753581348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.753581348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.810907190 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 116067135 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=810907190 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.810907190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.622124268 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 68671038 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=622124268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.622124268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1146676863 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 162695984 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146676863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.1146676863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2616084012 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 299298783 ps |
| CPU time | 2.68 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:51 PM UTC 24 |
| Peak memory | 232436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616084012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2616084012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.3904502285 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 976419448 ps |
| CPU time | 3.66 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:52 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3904502285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.3904502285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1661671431 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 158355340 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661671431 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.1661671431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.111258630 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 55544744 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=111258630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.111258630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.3956405677 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 36733804 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:49 PM UTC 24 |
| Peak memory | 217076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3956405677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.3956405677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.1817026727 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 173849139 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817026727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.1817026727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.1030615678 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 261324038 ps |
| CPU time | 2.51 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:51 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030615678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.1030615678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.872892909 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 92257453 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872892909 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.872892909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.4018871940 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 108990015 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 216912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018871940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.4018871940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.479269403 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 44916806 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=479269403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.479269403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.873253242 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 293395681 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 216888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=873253242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.873253242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.3994464668 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 179418150 ps |
| CPU time | 1.97 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 227320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994464668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.3994464668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.3308473804 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 752498453 ps |
| CPU time | 3.87 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:53 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3308473804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.3308473804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.56049536 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 167978813 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:51 PM UTC 24 |
| Peak memory | 227428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56049536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os _regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.56049536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.4031459071 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 79546948 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031459071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.4031459071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.1509855914 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 58489312 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509855914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.1509855914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.3226067725 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 129774600 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:50 PM UTC 24 |
| Peak memory | 217228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226067725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.3226067725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.892801376 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 270968083 ps |
| CPU time | 2.46 seconds |
| Started | Aug 23 11:11:47 PM UTC 24 |
| Finished | Aug 23 11:11:51 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892801376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.892801376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.3749300715 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 67776314 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749300715 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.3749300715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.3028022396 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 76244508 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3028022396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.3028022396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.675303249 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 81190768 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 216580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=675303249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.675303249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.2997919222 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 189221405 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2997919222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.2997919222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.2533308810 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 81988718 ps |
| CPU time | 1.85 seconds |
| Started | Aug 23 11:11:48 PM UTC 24 |
| Finished | Aug 23 11:11:51 PM UTC 24 |
| Peak memory | 217340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533308810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.2533308810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.3436310996 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 590611009 ps |
| CPU time | 2.57 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:03 PM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436310996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.3436310996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.1908449753 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 164410520 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908449753 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.1908449753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.2639312626 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 55627120 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639312626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.2639312626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.2571269036 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 71185162 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571269036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.2571269036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.1048210352 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 101598779 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048210352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.1048210352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.440024977 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 59308000 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440024977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.440024977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.1200209828 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 845308110 ps |
| CPU time | 3.58 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:04 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200209828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.1200209828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2950300968 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 93990265 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950300968 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.2950300968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2164230035 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 76567015 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 217208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164230035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.2164230035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.1841442491 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 61283607 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841442491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.1841442491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3832719309 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 112813969 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832719309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.3832719309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.919141222 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 1596563889 ps |
| CPU time | 4.38 seconds |
| Started | Aug 23 11:11:59 PM UTC 24 |
| Finished | Aug 23 11:12:05 PM UTC 24 |
| Peak memory | 217864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=919141222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.919141222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.882731693 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 161291576 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 11:11:30 PM UTC 24 |
| Finished | Aug 23 11:11:34 PM UTC 24 |
| Peak memory | 217240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882731693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.882731693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.2135730901 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 200726493 ps |
| CPU time | 3.29 seconds |
| Started | Aug 23 11:11:30 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135730901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.2135730901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.1503511987 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 104039722 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:31 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503511987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.1503511987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2065992720 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 93122821 ps |
| CPU time | 2.09 seconds |
| Started | Aug 23 11:11:31 PM UTC 24 |
| Finished | Aug 23 11:11:34 PM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2065992720 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2065992720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3576232609 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 62984445 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:11:30 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576232609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3576232609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.251802559 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 102190050 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 227408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=251802559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.251802559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.648302762 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 104135296 ps |
| CPU time | 1.97 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=648302762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.648302762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.2969559880 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 95540548 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:11:30 PM UTC 24 |
| Finished | Aug 23 11:11:33 PM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969559880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.2969559880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.120406131 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 80872064 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:32 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=120406131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.120406131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.19101613 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 873576605 ps |
| CPU time | 2.83 seconds |
| Started | Aug 23 11:11:29 PM UTC 24 |
| Finished | Aug 23 11:11:33 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=19101613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SE Q=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.19101613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.11114003 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 59740737 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=11114003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.11114003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.1069856561 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 74967615 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069856561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.1069856561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1214938402 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 62099356 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214938402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.1214938402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.2978005959 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 37226529 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978005959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.2978005959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.815568682 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 47809622 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:01 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=815568682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.815568682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.2014616875 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 92498479 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014616875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.2014616875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.87427714 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 55641111 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=87427714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.87427714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.1494536714 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 50226839 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494536714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.1494536714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2756761319 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 37218131 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756761319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.2756761319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1214838471 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 116710293 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214838471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1214838471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.4079242277 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 332849831 ps |
| CPU time | 2.96 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079242277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.4079242277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.2694103680 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 2009874542 ps |
| CPU time | 8.86 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694103680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.2694103680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2453241881 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 99771111 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2453241881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.2453241881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.589907935 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 76424776 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589907935 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.589907935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.3545714466 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 49262552 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:34 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545714466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.3545714466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.638465487 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 83112774 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=638465487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.638465487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3609362646 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 205861567 ps |
| CPU time | 3.38 seconds |
| Started | Aug 23 11:11:31 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609362646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3609362646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.2788676406 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 192017473 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788676406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.2788676406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.977485204 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 284005892 ps |
| CPU time | 2.55 seconds |
| Started | Aug 23 11:11:31 PM UTC 24 |
| Finished | Aug 23 11:11:34 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=977485204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.977485204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.2437429380 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 91727586 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2437429380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.2437429380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.94544863 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 38607406 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=94544863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.94544863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.1869690794 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 71613182 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 11:12:00 PM UTC 24 |
| Finished | Aug 23 11:12:02 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869690794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.1869690794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.2570197490 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 44188469 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:12:02 PM UTC 24 |
| Finished | Aug 23 11:12:03 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570197490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.2570197490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.1455482720 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 67021949 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:12:02 PM UTC 24 |
| Finished | Aug 23 11:12:03 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455482720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.1455482720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.3341623279 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 55752518 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:18 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3341623279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.3341623279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.1327326900 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 35937415 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:18 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327326900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.1327326900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.2548805169 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 107925511 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:18 PM UTC 24 |
| Peak memory | 216444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548805169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.2548805169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.1373428447 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 35924003 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:18 PM UTC 24 |
| Peak memory | 216720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1373428447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.1373428447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2245534512 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 48556442 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245534512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.2245534512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.285337779 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 100430173 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=285337779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.285337779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1483514804 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 469569826 ps |
| CPU time | 6.41 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1483514804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1483514804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.3010061344 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 73911709 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3010061344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.3010061344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2699281686 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 85737431 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 227184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2699281686 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.2699281686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.2185874036 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 52167980 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185874036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.2185874036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.2266980472 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 43971841 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:35 PM UTC 24 |
| Peak memory | 217104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266980472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.2266980472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3850047979 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 209687011 ps |
| CPU time | 1.91 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850047979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3850047979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.2131052203 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 340447860 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131052203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.2131052203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.3227134309 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 163539250 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3227134309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.3227134309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1767271363 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 205240038 ps |
| CPU time | 2.25 seconds |
| Started | Aug 23 11:11:32 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 235332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767271363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.1767271363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3048836808 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 57961939 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048836808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.3048836808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.654563351 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 50712327 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=654563351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.654563351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.2972553138 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 55019920 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972553138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.2972553138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.25980707 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 40630222 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=25980707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.25980707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.439969814 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 45384327 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=439969814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.439969814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.3851398533 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 78672090 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851398533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.3851398533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.2744092196 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 38210878 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 216412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744092196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.2744092196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2575327264 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 43968785 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 217048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2575327264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.2575327264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.1158791972 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 45215270 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158791972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.1158791972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.1612171378 |
| Short name | T3740 |
| Test name | |
| Test status | |
| Simulation time | 73945098 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:12:17 PM UTC 24 |
| Finished | Aug 23 11:12:19 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1612171378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.1612171378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.1909604567 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 101024608 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909604567 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.1909604567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.4154530865 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 58709845 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154530865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.4154530865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.312623236 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 64402563 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:36 PM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=312623236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.312623236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3936699776 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 206073921 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936699776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.3936699776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.126915834 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 674101068 ps |
| CPU time | 2.53 seconds |
| Started | Aug 23 11:11:34 PM UTC 24 |
| Finished | Aug 23 11:11:38 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126915834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.126915834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.2423442634 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 248220241 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 11:11:36 PM UTC 24 |
| Finished | Aug 23 11:11:39 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423442634 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.2423442634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.2448964807 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 55331917 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:11:35 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448964807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.2448964807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.886546956 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 34156310 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:11:35 PM UTC 24 |
| Finished | Aug 23 11:11:37 PM UTC 24 |
| Peak memory | 217016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=886546956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.886546956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.1779979385 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 96206469 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:11:36 PM UTC 24 |
| Finished | Aug 23 11:11:38 PM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779979385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.1779979385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3067519377 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 165261699 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:11:35 PM UTC 24 |
| Finished | Aug 23 11:11:38 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3067519377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.3067519377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.1495474559 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 1123081282 ps |
| CPU time | 2.75 seconds |
| Started | Aug 23 11:11:35 PM UTC 24 |
| Finished | Aug 23 11:11:39 PM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1495474559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.1495474559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.2826118336 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 91647840 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2826118336 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.2826118336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.221236485 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 70727675 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=221236485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.221236485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1938722872 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 42392113 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1938722872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.1938722872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.1954767521 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 93771427 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954767521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.1954767521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.2135725468 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 193992230 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 11:11:36 PM UTC 24 |
| Finished | Aug 23 11:11:39 PM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135725468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.2135725468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3928457565 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 130205714 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928457565 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.3928457565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3063201145 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 59963411 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063201145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3063201145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.362339483 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 69300765 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=362339483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.362339483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.325407841 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 296622523 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=325407841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.325407841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2862758138 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 87367962 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862758138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.2862758138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.828464627 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 1089841984 ps |
| CPU time | 4.78 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:46 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=828464627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.828464627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.1796183011 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 191485066 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796183011 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.1796183011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.1640147171 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 79181992 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640147171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.1640147171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.2582885264 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 33875545 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:42 PM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582885264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.2582885264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.3210029764 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 225329247 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:43 PM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210029764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.3210029764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.2831265291 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 137795810 ps |
| CPU time | 2.27 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:44 PM UTC 24 |
| Peak memory | 228584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831265291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.2831265291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1220487265 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 376551738 ps |
| CPU time | 1.98 seconds |
| Started | Aug 23 11:11:40 PM UTC 24 |
| Finished | Aug 23 11:11:44 PM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220487265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1220487265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1199236328 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 29341564360 ps |
| CPU time | 32.67 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:38 PM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199236328 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.1199236328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.1978807165 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 148303326 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:06 PM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978807165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.1978807165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.2048949721 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 269452599 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 10:46:04 PM UTC 24 |
| Finished | Aug 23 10:46:06 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048949721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.2048949721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2635022514 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 341623997 ps |
| CPU time | 3.91 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:14 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635022514 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.2635022514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1654876380 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 149681590 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654876380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.1654876380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2175207490 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 33179740 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175207490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.2175207490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.770262248 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 448190241 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:12 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=770262248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.770262248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1426825165 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 120186190639 ps |
| CPU time | 192.15 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:49:24 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426825165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.1426825165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.3018534230 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 86318921759 ps |
| CPU time | 133.2 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:48:25 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3018534230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.3018534230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2372839695 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 87117443512 ps |
| CPU time | 148.52 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:48:41 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372839695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.2372839695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.291728433 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 118105011770 ps |
| CPU time | 190.5 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:49:23 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=291728433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.291728433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.358127916 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 94197194909 ps |
| CPU time | 151.06 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:48:43 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=358127916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_phase.358127916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3058509280 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 191518182 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 10:46:12 PM UTC 24 |
| Finished | Aug 23 10:46:14 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3058509280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3058509280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.1522293513 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 156095093 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:46:12 PM UTC 24 |
| Finished | Aug 23 10:46:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1522293513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_stall.1522293513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2421148024 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 246935128 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:46:12 PM UTC 24 |
| Finished | Aug 23 10:46:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2421148024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.2421148024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.2454637746 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 3042293280 ps |
| CPU time | 19.47 seconds |
| Started | Aug 23 10:46:11 PM UTC 24 |
| Finished | Aug 23 10:46:32 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454637746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.2454637746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2458585112 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 9432244117 ps |
| CPU time | 52.88 seconds |
| Started | Aug 23 10:46:14 PM UTC 24 |
| Finished | Aug 23 10:47:08 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458585112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2458585112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.312500325 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 260261746 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:46:15 PM UTC 24 |
| Finished | Aug 23 10:46:17 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312500325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_in_err.312500325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.2325280765 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 508056788 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 10:46:15 PM UTC 24 |
| Finished | Aug 23 10:46:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325280765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.2325280765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.2981207032 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 10296381139 ps |
| CPU time | 15.4 seconds |
| Started | Aug 23 10:46:16 PM UTC 24 |
| Finished | Aug 23 10:46:33 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2981207032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_resume.2981207032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.532873993 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 8404053167 ps |
| CPU time | 9.97 seconds |
| Started | Aug 23 10:46:16 PM UTC 24 |
| Finished | Aug 23 10:46:28 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532873993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_suspend.532873993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.232146772 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 1999763824 ps |
| CPU time | 12.85 seconds |
| Started | Aug 23 10:46:18 PM UTC 24 |
| Finished | Aug 23 10:46:32 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=232146772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.232146772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1386613402 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 243231101 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:46:18 PM UTC 24 |
| Finished | Aug 23 10:46:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386613402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.1386613402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1561492770 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 194692405 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:46:18 PM UTC 24 |
| Finished | Aug 23 10:46:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561492770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.1561492770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1296481886 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 2636447506 ps |
| CPU time | 22.53 seconds |
| Started | Aug 23 10:46:19 PM UTC 24 |
| Finished | Aug 23 10:46:43 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296481886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1296481886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.30087331 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 144477865 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:46:21 PM UTC 24 |
| Finished | Aug 23 10:46:24 PM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=30087331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.30087331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.157835211 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 158642496 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:46:24 PM UTC 24 |
| Finished | Aug 23 10:46:26 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157835211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.157835211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.4027387930 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 488902429 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 10:46:27 PM UTC 24 |
| Finished | Aug 23 10:46:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027387930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.4027387930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.2632085836 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 182119148 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:46:31 PM UTC 24 |
| Finished | Aug 23 10:46:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632085836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_out_iso.2632085836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.605717411 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 152190533 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:46:31 PM UTC 24 |
| Finished | Aug 23 10:46:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605717411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_out_stall.605717411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.4174097937 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 231934231 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:46:32 PM UTC 24 |
| Finished | Aug 23 10:46:34 PM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174097937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.4174097937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.610576731 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 166091719 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:46:32 PM UTC 24 |
| Finished | Aug 23 10:46:34 PM UTC 24 |
| Peak memory | 217136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=610576731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_pending_in_trans.610576731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2607746783 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 163999814 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:46:33 PM UTC 24 |
| Finished | Aug 23 10:46:35 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607746783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.2607746783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.560976970 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 209160339 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:46:33 PM UTC 24 |
| Finished | Aug 23 10:46:35 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=560976970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.560976970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.1686444594 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 219868053 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:46:34 PM UTC 24 |
| Finished | Aug 23 10:46:36 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686444594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.1686444594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.3200725794 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 235147096 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:46:34 PM UTC 24 |
| Finished | Aug 23 10:46:36 PM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200725794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.3200725794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.69470305 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 252225426 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:46:35 PM UTC 24 |
| Finished | Aug 23 10:46:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69470305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.69470305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2571660033 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 31267821 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:46:36 PM UTC 24 |
| Finished | Aug 23 10:46:38 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2571660033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_pins_sense.2571660033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.1454851916 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 208915198 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:46:37 PM UTC 24 |
| Finished | Aug 23 10:46:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454851916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.1454851916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2180942802 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 6582074971 ps |
| CPU time | 81.86 seconds |
| Started | Aug 23 10:46:38 PM UTC 24 |
| Finished | Aug 23 10:48:02 PM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180942802 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.2180942802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2624557959 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 3304118588 ps |
| CPU time | 17.14 seconds |
| Started | Aug 23 10:46:38 PM UTC 24 |
| Finished | Aug 23 10:46:57 PM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2624557959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.2624557959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.1567800185 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 10036191343 ps |
| CPU time | 60.08 seconds |
| Started | Aug 23 10:46:39 PM UTC 24 |
| Finished | Aug 23 10:47:41 PM UTC 24 |
| Peak memory | 235276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567800185 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.1567800185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.2466548020 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 199785953 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:46:37 PM UTC 24 |
| Finished | Aug 23 10:46:39 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466548020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.2466548020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.211055202 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 194623016 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:46:37 PM UTC 24 |
| Finished | Aug 23 10:46:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211055202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.211055202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.1106714941 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 20168279092 ps |
| CPU time | 24.26 seconds |
| Started | Aug 23 10:46:39 PM UTC 24 |
| Finished | Aug 23 10:47:05 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106714941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.1106714941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.3981883249 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 403344128 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 10:46:40 PM UTC 24 |
| Finished | Aug 23 10:46:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981883249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.3981883249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.394703264 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 309771997 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 10:46:42 PM UTC 24 |
| Finished | Aug 23 10:46:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394703264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_sta ll_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/d efault.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.394703264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2172036066 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 148695940 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:46:44 PM UTC 24 |
| Finished | Aug 23 10:46:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172036066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.2172036066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3534916570 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 261852990 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:46:44 PM UTC 24 |
| Finished | Aug 23 10:46:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534916570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.3534916570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.3400773204 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 2437664582 ps |
| CPU time | 56.17 seconds |
| Started | Aug 23 10:46:44 PM UTC 24 |
| Finished | Aug 23 10:47:42 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400773204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.3400773204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2944492331 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 194180875 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:46:45 PM UTC 24 |
| Finished | Aug 23 10:46:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944492331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.2944492331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.734017683 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 1139973551 ps |
| CPU time | 2.67 seconds |
| Started | Aug 23 10:46:47 PM UTC 24 |
| Finished | Aug 23 10:46:51 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=734017683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_stream_len_max.734017683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.3736394104 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 3353011025 ps |
| CPU time | 27.3 seconds |
| Started | Aug 23 10:46:47 PM UTC 24 |
| Finished | Aug 23 10:47:16 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736394104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.3736394104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.3915375392 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 1041304520 ps |
| CPU time | 19.03 seconds |
| Started | Aug 23 10:46:09 PM UTC 24 |
| Finished | Aug 23 10:46:29 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3915375392 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.3915375392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.124569886 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 63641606 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:48:01 PM UTC 24 |
| Finished | Aug 23 10:48:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=124569886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.124569886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.107046907 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 5790560320 ps |
| CPU time | 7.66 seconds |
| Started | Aug 23 10:46:51 PM UTC 24 |
| Finished | Aug 23 10:46:59 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=107046907 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.107046907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1395847239 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 26098706112 ps |
| CPU time | 34.81 seconds |
| Started | Aug 23 10:46:52 PM UTC 24 |
| Finished | Aug 23 10:47:28 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395847239 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.1395847239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1772671739 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 154491123 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:46:53 PM UTC 24 |
| Finished | Aug 23 10:46:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772671739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.1772671739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2363496499 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 175824740 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:46:55 PM UTC 24 |
| Finished | Aug 23 10:46:57 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363496499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.2363496499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3406360815 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 286841443 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 10:46:56 PM UTC 24 |
| Finished | Aug 23 10:46:58 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3406360815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.3406360815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.4026960352 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 426183553 ps |
| CPU time | 6.49 seconds |
| Started | Aug 23 10:46:58 PM UTC 24 |
| Finished | Aug 23 10:47:06 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026960352 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.4026960352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.1883523025 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 974116013 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 10:47:00 PM UTC 24 |
| Finished | Aug 23 10:47:03 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883523025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_disable_endpoint.1883523025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3630628903 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 39610394 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:47:03 PM UTC 24 |
| Finished | Aug 23 10:47:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3630628903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3630628903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.2970136044 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 793086313 ps |
| CPU time | 2.08 seconds |
| Started | Aug 23 10:47:04 PM UTC 24 |
| Finished | Aug 23 10:47:07 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970136044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.2970136044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.1969595035 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 458582345 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 10:47:05 PM UTC 24 |
| Finished | Aug 23 10:47:08 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1969595035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.1969595035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.3458303500 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 188771614 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 10:47:06 PM UTC 24 |
| Finished | Aug 23 10:47:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458303500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.3458303500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.298681674 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 90221061054 ps |
| CPU time | 150.43 seconds |
| Started | Aug 23 10:47:08 PM UTC 24 |
| Finished | Aug 23 10:49:41 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=298681674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 1.usbdev_freq_hiclk_max.298681674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.634531491 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 99120334571 ps |
| CPU time | 136.8 seconds |
| Started | Aug 23 10:47:09 PM UTC 24 |
| Finished | Aug 23 10:49:28 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=634531491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.634531491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.2032242017 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 83083571106 ps |
| CPU time | 119.64 seconds |
| Started | Aug 23 10:47:09 PM UTC 24 |
| Finished | Aug 23 10:49:11 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2032242017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.2032242017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.4051380145 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 107171862929 ps |
| CPU time | 150.05 seconds |
| Started | Aug 23 10:47:09 PM UTC 24 |
| Finished | Aug 23 10:49:41 PM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051380145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.4051380145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.2350868692 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 205576534 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:47:10 PM UTC 24 |
| Finished | Aug 23 10:47:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350868692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.2350868692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.2754645214 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 159159982 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:47:11 PM UTC 24 |
| Finished | Aug 23 10:47:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754645214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.2754645214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.1896764424 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 187049712 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:47:11 PM UTC 24 |
| Finished | Aug 23 10:47:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896764424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.1896764424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.1642977730 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 4787893466 ps |
| CPU time | 40.29 seconds |
| Started | Aug 23 10:47:09 PM UTC 24 |
| Finished | Aug 23 10:47:51 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642977730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.1642977730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2668957041 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 9996767824 ps |
| CPU time | 63.54 seconds |
| Started | Aug 23 10:47:12 PM UTC 24 |
| Finished | Aug 23 10:48:17 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2668957041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2668957041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.4149364230 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 224685632 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:47:13 PM UTC 24 |
| Finished | Aug 23 10:47:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4149364230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.4149364230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2240606217 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 12343207080 ps |
| CPU time | 16.59 seconds |
| Started | Aug 23 10:47:13 PM UTC 24 |
| Finished | Aug 23 10:47:31 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2240606217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2240606217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.3007563615 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 3350986600 ps |
| CPU time | 5.28 seconds |
| Started | Aug 23 10:47:17 PM UTC 24 |
| Finished | Aug 23 10:47:23 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007563615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.3007563615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.218769931 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 3662409060 ps |
| CPU time | 87.02 seconds |
| Started | Aug 23 10:47:17 PM UTC 24 |
| Finished | Aug 23 10:48:45 PM UTC 24 |
| Peak memory | 235264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=218769931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.218769931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1510714860 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 1665709670 ps |
| CPU time | 37.8 seconds |
| Started | Aug 23 10:47:17 PM UTC 24 |
| Finished | Aug 23 10:47:56 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1510714860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.1510714860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3174457664 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 249223409 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:47:20 PM UTC 24 |
| Finished | Aug 23 10:47:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174457664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.3174457664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.216978923 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 262845310 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:47:23 PM UTC 24 |
| Finished | Aug 23 10:47:25 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=216978923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.216978923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.1663407290 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 1849626014 ps |
| CPU time | 41.88 seconds |
| Started | Aug 23 10:47:24 PM UTC 24 |
| Finished | Aug 23 10:48:07 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663407290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.1663407290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.1710174659 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 2546014128 ps |
| CPU time | 16.37 seconds |
| Started | Aug 23 10:47:28 PM UTC 24 |
| Finished | Aug 23 10:47:45 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710174659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.1710174659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2149208009 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 181296799 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:47:30 PM UTC 24 |
| Finished | Aug 23 10:47:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149208009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.2149208009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2592163318 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 171916909 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:47:33 PM UTC 24 |
| Finished | Aug 23 10:47:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592163318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.2592163318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2545461512 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 150515404 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:47:33 PM UTC 24 |
| Finished | Aug 23 10:47:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545461512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2545461512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1313914865 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 190666071 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:47:35 PM UTC 24 |
| Finished | Aug 23 10:47:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1313914865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1313914865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3922450818 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 179757280 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:47:35 PM UTC 24 |
| Finished | Aug 23 10:47:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3922450818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_out_trans_nak.3922450818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.1038248093 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 165817734 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:47:36 PM UTC 24 |
| Finished | Aug 23 10:47:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038248093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.1038248093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2398878654 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 218109707 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:47:37 PM UTC 24 |
| Finished | Aug 23 10:47:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398878654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.2398878654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.2526584951 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 191226217 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:47:37 PM UTC 24 |
| Finished | Aug 23 10:47:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2526584951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.2526584951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.466790950 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 169788781 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:47:38 PM UTC 24 |
| Finished | Aug 23 10:47:40 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466790950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.466790950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.1778560484 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 66948515 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 10:47:40 PM UTC 24 |
| Finished | Aug 23 10:47:42 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778560484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_pins_sense.1778560484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.660097497 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 13606058136 ps |
| CPU time | 31.23 seconds |
| Started | Aug 23 10:47:40 PM UTC 24 |
| Finished | Aug 23 10:48:12 PM UTC 24 |
| Peak memory | 228704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660097497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_pkt_buffer.660097497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.1469871470 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 195778279 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:47:40 PM UTC 24 |
| Finished | Aug 23 10:47:42 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469871470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_pkt_received.1469871470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2911462776 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 223541737 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:47:42 PM UTC 24 |
| Finished | Aug 23 10:47:44 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911462776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2911462776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.462591793 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 5878241198 ps |
| CPU time | 41.5 seconds |
| Started | Aug 23 10:47:43 PM UTC 24 |
| Finished | Aug 23 10:48:26 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462591793 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.462591793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.2738643448 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 3145552834 ps |
| CPU time | 15.63 seconds |
| Started | Aug 23 10:47:44 PM UTC 24 |
| Finished | Aug 23 10:48:01 PM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738643448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.2738643448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3092805583 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 5961536626 ps |
| CPU time | 62.48 seconds |
| Started | Aug 23 10:47:45 PM UTC 24 |
| Finished | Aug 23 10:48:49 PM UTC 24 |
| Peak memory | 232644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092805583 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.3092805583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.346054532 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 205865739 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:47:42 PM UTC 24 |
| Finished | Aug 23 10:47:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346054532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_random_length_in_transaction.346054532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.1450706907 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 201600896 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:47:42 PM UTC 24 |
| Finished | Aug 23 10:47:44 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1450706907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.1450706907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.4185658248 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 20146137506 ps |
| CPU time | 22.09 seconds |
| Started | Aug 23 10:47:45 PM UTC 24 |
| Finished | Aug 23 10:48:08 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4185658248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.4185658248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.983940114 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 142924718 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:47:45 PM UTC 24 |
| Finished | Aug 23 10:47:46 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983940114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_crc_err.983940114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2150234305 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 169350148 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:47:47 PM UTC 24 |
| Finished | Aug 23 10:47:48 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150234305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.2150234305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2098149237 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 320785819 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:48:01 PM UTC 24 |
| Finished | Aug 23 10:48:03 PM UTC 24 |
| Peak memory | 250720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2098149237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.2098149237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2087482188 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 450678434 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 10:47:49 PM UTC 24 |
| Finished | Aug 23 10:47:51 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2087482188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority.2087482188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.3694812582 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 314134427 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:47:50 PM UTC 24 |
| Finished | Aug 23 10:47:52 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694812582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.3694812582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.3148006468 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 153138707 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:47:51 PM UTC 24 |
| Finished | Aug 23 10:47:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148006468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.3148006468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.4015603322 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 169440907 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:47:52 PM UTC 24 |
| Finished | Aug 23 10:47:54 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015603322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.4015603322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.3890604283 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 233705518 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:47:52 PM UTC 24 |
| Finished | Aug 23 10:47:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890604283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.3890604283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.2097252847 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 2493100763 ps |
| CPU time | 21.43 seconds |
| Started | Aug 23 10:47:53 PM UTC 24 |
| Finished | Aug 23 10:48:16 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097252847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.2097252847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.4069704823 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 184136486 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:47:53 PM UTC 24 |
| Finished | Aug 23 10:47:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4069704823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.4069704823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3874823076 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 177321389 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:47:54 PM UTC 24 |
| Finished | Aug 23 10:47:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874823076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.3874823076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.1648981119 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 959344009 ps |
| CPU time | 2.33 seconds |
| Started | Aug 23 10:47:55 PM UTC 24 |
| Finished | Aug 23 10:47:59 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648981119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.1648981119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.100218343 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 1984729686 ps |
| CPU time | 13.23 seconds |
| Started | Aug 23 10:47:55 PM UTC 24 |
| Finished | Aug 23 10:48:10 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100218343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_streaming_out.100218343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2239383279 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 2571420067 ps |
| CPU time | 15.1 seconds |
| Started | Aug 23 10:46:59 PM UTC 24 |
| Finished | Aug 23 10:47:15 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239383279 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.2239383279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.943785164 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 43784594 ps |
| CPU time | 0.56 seconds |
| Started | Aug 23 10:54:27 PM UTC 24 |
| Finished | Aug 23 10:54:29 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=943785164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.943785164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.1908280250 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 10809460753 ps |
| CPU time | 13.46 seconds |
| Started | Aug 23 10:53:55 PM UTC 24 |
| Finished | Aug 23 10:54:09 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908280250 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.1908280250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.3157635569 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 28851487679 ps |
| CPU time | 36.79 seconds |
| Started | Aug 23 10:53:55 PM UTC 24 |
| Finished | Aug 23 10:54:33 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157635569 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.3157635569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.3793812671 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 195182695 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:53:56 PM UTC 24 |
| Finished | Aug 23 10:53:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793812671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_av_buffer.3793812671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2529869030 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 176830508 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:53:56 PM UTC 24 |
| Finished | Aug 23 10:53:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529869030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2529869030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.739044824 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 603851773 ps |
| CPU time | 1.76 seconds |
| Started | Aug 23 10:53:56 PM UTC 24 |
| Finished | Aug 23 10:53:59 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739044824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_data_toggle_clear.739044824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.2257486643 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 873762490 ps |
| CPU time | 2.28 seconds |
| Started | Aug 23 10:53:56 PM UTC 24 |
| Finished | Aug 23 10:54:00 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257486643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.2257486643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.1398639080 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 27113909299 ps |
| CPU time | 45.44 seconds |
| Started | Aug 23 10:53:58 PM UTC 24 |
| Finished | Aug 23 10:54:45 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398639080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_address.1398639080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.1066860476 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 501015222 ps |
| CPU time | 6.84 seconds |
| Started | Aug 23 10:53:59 PM UTC 24 |
| Finished | Aug 23 10:54:07 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066860476 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.1066860476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.1697891104 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 894254028 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 10:53:59 PM UTC 24 |
| Finished | Aug 23 10:54:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697891104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.1697891104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.2435755945 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 160933158 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:54:00 PM UTC 24 |
| Finished | Aug 23 10:54:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435755945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.2435755945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_enable.3464984185 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 58865985 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:54:00 PM UTC 24 |
| Finished | Aug 23 10:54:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464984185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.3464984185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.1988772011 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 893281279 ps |
| CPU time | 2.23 seconds |
| Started | Aug 23 10:54:01 PM UTC 24 |
| Finished | Aug 23 10:54:05 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988772011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.1988772011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.1486805255 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 201132059 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 10:54:03 PM UTC 24 |
| Finished | Aug 23 10:54:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486805255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_fifo_rst.1486805255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.2895081836 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 211522317 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:54:04 PM UTC 24 |
| Finished | Aug 23 10:54:06 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2895081836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.2895081836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.3489284395 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 157880291 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:54:05 PM UTC 24 |
| Finished | Aug 23 10:54:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489284395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.3489284395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.3683338169 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 249622645 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:54:06 PM UTC 24 |
| Finished | Aug 23 10:54:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683338169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_trans.3683338169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.758215419 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 4957475665 ps |
| CPU time | 118.81 seconds |
| Started | Aug 23 10:54:04 PM UTC 24 |
| Finished | Aug 23 10:56:05 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758215419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.758215419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.4150078669 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 9859108939 ps |
| CPU time | 59.53 seconds |
| Started | Aug 23 10:54:06 PM UTC 24 |
| Finished | Aug 23 10:55:07 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150078669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.4150078669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.2606033673 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 231018995 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:54:06 PM UTC 24 |
| Finished | Aug 23 10:54:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606033673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.2606033673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.2750485220 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 29931465187 ps |
| CPU time | 46.62 seconds |
| Started | Aug 23 10:54:07 PM UTC 24 |
| Finished | Aug 23 10:54:55 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750485220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.2750485220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.1336070815 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 10193675780 ps |
| CPU time | 11.81 seconds |
| Started | Aug 23 10:54:07 PM UTC 24 |
| Finished | Aug 23 10:54:20 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336070815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_link_suspend.1336070815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.3025174473 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 3264291833 ps |
| CPU time | 21.44 seconds |
| Started | Aug 23 10:54:08 PM UTC 24 |
| Finished | Aug 23 10:54:31 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025174473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.3025174473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.3273608819 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 2943690509 ps |
| CPU time | 71.13 seconds |
| Started | Aug 23 10:54:09 PM UTC 24 |
| Finished | Aug 23 10:55:22 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273608819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3273608819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.3736328086 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 283407377 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:54:09 PM UTC 24 |
| Finished | Aug 23 10:54:12 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3736328086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.3736328086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.3939252442 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 193943634 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:54:10 PM UTC 24 |
| Finished | Aug 23 10:54:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939252442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.3939252442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.16948285 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 2201575655 ps |
| CPU time | 49.54 seconds |
| Started | Aug 23 10:54:13 PM UTC 24 |
| Finished | Aug 23 10:55:04 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16948285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.16948285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.3180286890 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 3116390041 ps |
| CPU time | 23.93 seconds |
| Started | Aug 23 10:54:13 PM UTC 24 |
| Finished | Aug 23 10:54:38 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180286890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.3180286890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.829541171 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 2472082110 ps |
| CPU time | 21.66 seconds |
| Started | Aug 23 10:54:14 PM UTC 24 |
| Finished | Aug 23 10:54:37 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=829541171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.829541171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.1431542663 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 167736921 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:14 PM UTC 24 |
| Finished | Aug 23 10:54:16 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431542663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.1431542663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.3048391869 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 165852169 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:54:14 PM UTC 24 |
| Finished | Aug 23 10:54:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048391869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.3048391869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.2955694826 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 191248179 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:54:17 PM UTC 24 |
| Finished | Aug 23 10:54:19 PM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955694826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.2955694826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.737284780 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 165179475 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:17 PM UTC 24 |
| Finished | Aug 23 10:54:19 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737284780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_out_stall.737284780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.2695152321 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 222058545 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:54:19 PM UTC 24 |
| Finished | Aug 23 10:54:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2695152321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.2695152321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.955849220 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 145634759 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:19 PM UTC 24 |
| Finished | Aug 23 10:54:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=955849220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_pending_in_trans.955849220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2888425411 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 218172192 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:54:21 PM UTC 24 |
| Finished | Aug 23 10:54:22 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2888425411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2888425411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.1877026163 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 154253701 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:54:21 PM UTC 24 |
| Finished | Aug 23 10:54:22 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1877026163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.1877026163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.1668598996 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 36964342 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:54:21 PM UTC 24 |
| Finished | Aug 23 10:54:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668598996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.1668598996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.1387598689 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 21389012955 ps |
| CPU time | 50.9 seconds |
| Started | Aug 23 10:54:21 PM UTC 24 |
| Finished | Aug 23 10:55:13 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387598689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_pkt_buffer.1387598689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.399417863 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 160698930 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:22 PM UTC 24 |
| Finished | Aug 23 10:54:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=399417863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_pkt_received.399417863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.3082038644 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 208058625 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:54:22 PM UTC 24 |
| Finished | Aug 23 10:54:24 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082038644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.3082038644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.1503876656 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 188851571 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:54:22 PM UTC 24 |
| Finished | Aug 23 10:54:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503876656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.1503876656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.3627365143 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 189272162 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:54:23 PM UTC 24 |
| Finished | Aug 23 10:54:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627365143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.3627365143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.744173189 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 20175245279 ps |
| CPU time | 27.06 seconds |
| Started | Aug 23 10:54:23 PM UTC 24 |
| Finished | Aug 23 10:54:51 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744173189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_resume_link_active.744173189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.3083485500 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 147878203 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:54:23 PM UTC 24 |
| Finished | Aug 23 10:54:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083485500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 10.usbdev_rx_crc_err.3083485500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.4049879408 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 422451260 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 10:54:24 PM UTC 24 |
| Finished | Aug 23 10:54:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049879408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_rx_full.4049879408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.2138872810 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 160102444 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:54:24 PM UTC 24 |
| Finished | Aug 23 10:54:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138872810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.2138872810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.1127257121 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 144637461 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:54:24 PM UTC 24 |
| Finished | Aug 23 10:54:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127257121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.1127257121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.4173189001 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 196099689 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:54:26 PM UTC 24 |
| Finished | Aug 23 10:54:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173189001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.4173189001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.812989209 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 2751618938 ps |
| CPU time | 63.29 seconds |
| Started | Aug 23 10:54:26 PM UTC 24 |
| Finished | Aug 23 10:55:31 PM UTC 24 |
| Peak memory | 230732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=812989209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.812989209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.2347876280 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 188369860 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:54:26 PM UTC 24 |
| Finished | Aug 23 10:54:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347876280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.2347876280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.1274771066 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 242136421 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:54:26 PM UTC 24 |
| Finished | Aug 23 10:54:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1274771066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.1274771066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.2030749952 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 549128924 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 10:54:27 PM UTC 24 |
| Finished | Aug 23 10:54:30 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2030749952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.2030749952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1951326543 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 2056090838 ps |
| CPU time | 14 seconds |
| Started | Aug 23 10:54:27 PM UTC 24 |
| Finished | Aug 23 10:54:42 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951326543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1951326543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.1954739184 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 5221704927 ps |
| CPU time | 39.73 seconds |
| Started | Aug 23 10:53:59 PM UTC 24 |
| Finished | Aug 23 10:54:41 PM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954739184 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.1954739184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.2650221499 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 463139055 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 10:54:27 PM UTC 24 |
| Finished | Aug 23 10:54:30 PM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2650221499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.2650221499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.2533638734 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 191734917 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533638734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.2533638734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.795079834 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 581988356 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=795079834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_t x_rx_disruption.795079834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.3123574198 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 603608434 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3123574198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.3123574198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.964261373 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 610158888 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=964261373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_t x_rx_disruption.964261373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.887618433 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 522512627 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=887618433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_t x_rx_disruption.887618433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.3944721492 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 168050852 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944721492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.3944721492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3065324834 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 614866307 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3065324834 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.3065324834 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.2161345692 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 529967713 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2161345692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.2161345692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.420211208 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 504163350 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=420211208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_t x_rx_disruption.420211208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.2684055942 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 270187981 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2684055942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.2684055942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.1850381261 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 575871798 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1850381261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.1850381261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.2787612497 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 635152009 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2787612497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_ tx_rx_disruption.2787612497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2723896750 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 787421464 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723896750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2723896750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.568573357 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 583596668 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:29 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=568573357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_t x_rx_disruption.568573357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.654728944 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 304411147 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=654728944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.654728944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.3999856542 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 533689574 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:29 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3999856542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.3999856542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.252463354 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 69390748 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 10:54:55 PM UTC 24 |
| Finished | Aug 23 10:54:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=252463354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.252463354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.2483336318 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 12082471161 ps |
| CPU time | 16.83 seconds |
| Started | Aug 23 10:54:28 PM UTC 24 |
| Finished | Aug 23 10:54:47 PM UTC 24 |
| Peak memory | 217880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483336318 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.2483336318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.2374661694 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 20492383454 ps |
| CPU time | 24.23 seconds |
| Started | Aug 23 10:54:28 PM UTC 24 |
| Finished | Aug 23 10:54:54 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374661694 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.2374661694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.4268823009 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 29901376036 ps |
| CPU time | 36.36 seconds |
| Started | Aug 23 10:54:28 PM UTC 24 |
| Finished | Aug 23 10:55:06 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268823009 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.4268823009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.1585753466 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 169886633 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:54:29 PM UTC 24 |
| Finished | Aug 23 10:54:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585753466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.1585753466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.2616107053 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 147111803 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:54:30 PM UTC 24 |
| Finished | Aug 23 10:54:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2616107053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_bitstuff_err.2616107053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.852101728 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 635695299 ps |
| CPU time | 1.9 seconds |
| Started | Aug 23 10:54:30 PM UTC 24 |
| Finished | Aug 23 10:54:33 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852101728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_data_toggle_clear.852101728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.2361751042 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 638050387 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 10:54:31 PM UTC 24 |
| Finished | Aug 23 10:54:34 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361751042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.2361751042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.2607923831 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 30222259464 ps |
| CPU time | 50.51 seconds |
| Started | Aug 23 10:54:31 PM UTC 24 |
| Finished | Aug 23 10:55:23 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607923831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_address.2607923831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.769050808 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 6325425812 ps |
| CPU time | 35.03 seconds |
| Started | Aug 23 10:54:31 PM UTC 24 |
| Finished | Aug 23 10:55:07 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=769050808 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.769050808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.860105060 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 442375639 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 10:54:32 PM UTC 24 |
| Finished | Aug 23 10:54:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=860105060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_disable_endpoint.860105060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.3944667325 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 181823445 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:54:33 PM UTC 24 |
| Finished | Aug 23 10:54:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944667325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.3944667325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_enable.2610832335 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 54290066 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 10:54:34 PM UTC 24 |
| Finished | Aug 23 10:54:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2610832335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.2610832335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.2442830091 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 928233070 ps |
| CPU time | 2.35 seconds |
| Started | Aug 23 10:54:34 PM UTC 24 |
| Finished | Aug 23 10:54:38 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442830091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.2442830091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.2810275036 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 205985354 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 10:54:35 PM UTC 24 |
| Finished | Aug 23 10:54:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2810275036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.2810275036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.2585953478 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 216983716 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:54:36 PM UTC 24 |
| Finished | Aug 23 10:54:39 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585953478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.2585953478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.1853304394 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 178878064 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:54:38 PM UTC 24 |
| Finished | Aug 23 10:54:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853304394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.1853304394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.2367031371 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 218691880 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:54:38 PM UTC 24 |
| Finished | Aug 23 10:54:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367031371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.2367031371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.2892981633 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 2368753659 ps |
| CPU time | 19.5 seconds |
| Started | Aug 23 10:54:35 PM UTC 24 |
| Finished | Aug 23 10:54:56 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892981633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.2892981633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.3648948158 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 7389320516 ps |
| CPU time | 72.22 seconds |
| Started | Aug 23 10:54:38 PM UTC 24 |
| Finished | Aug 23 10:55:52 PM UTC 24 |
| Peak memory | 218320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648948158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.3648948158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.3475635941 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 185853930 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:54:39 PM UTC 24 |
| Finished | Aug 23 10:54:41 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475635941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_in_err.3475635941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.3505607712 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 23796856429 ps |
| CPU time | 36.11 seconds |
| Started | Aug 23 10:54:39 PM UTC 24 |
| Finished | Aug 23 10:55:16 PM UTC 24 |
| Peak memory | 228028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3505607712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.3505607712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.1263043687 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 10871175133 ps |
| CPU time | 13.54 seconds |
| Started | Aug 23 10:54:39 PM UTC 24 |
| Finished | Aug 23 10:54:54 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263043687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.1263043687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.1190314103 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 2608138390 ps |
| CPU time | 21.76 seconds |
| Started | Aug 23 10:54:39 PM UTC 24 |
| Finished | Aug 23 10:55:02 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190314103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.1190314103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1844686196 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 2793335114 ps |
| CPU time | 17.61 seconds |
| Started | Aug 23 10:54:40 PM UTC 24 |
| Finished | Aug 23 10:54:59 PM UTC 24 |
| Peak memory | 228308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1844686196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1844686196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.2023588794 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 236243169 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:54:40 PM UTC 24 |
| Finished | Aug 23 10:54:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023588794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.2023588794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.2949181891 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 232244840 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:54:41 PM UTC 24 |
| Finished | Aug 23 10:54:43 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949181891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.2949181891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.3167720134 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 2878574263 ps |
| CPU time | 23.89 seconds |
| Started | Aug 23 10:54:41 PM UTC 24 |
| Finished | Aug 23 10:55:06 PM UTC 24 |
| Peak memory | 235292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167720134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.3167720134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.3162286383 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 2625275634 ps |
| CPU time | 18.24 seconds |
| Started | Aug 23 10:54:41 PM UTC 24 |
| Finished | Aug 23 10:55:01 PM UTC 24 |
| Peak memory | 235340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162286383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.3162286383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.2937738575 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 2424947885 ps |
| CPU time | 54.48 seconds |
| Started | Aug 23 10:54:42 PM UTC 24 |
| Finished | Aug 23 10:55:39 PM UTC 24 |
| Peak memory | 228192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937738575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2937738575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.3847565204 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 163042437 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:54:43 PM UTC 24 |
| Finished | Aug 23 10:54:44 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847565204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.3847565204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.3574140143 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 154006297 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:44 PM UTC 24 |
| Finished | Aug 23 10:54:46 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574140143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.3574140143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.3706402009 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 202157439 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:54:45 PM UTC 24 |
| Finished | Aug 23 10:54:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706402009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.3706402009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2237743011 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 173722639 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:54:46 PM UTC 24 |
| Finished | Aug 23 10:54:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237743011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2237743011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.3104833524 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 208514092 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:54:46 PM UTC 24 |
| Finished | Aug 23 10:54:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104833524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.3104833524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2057940537 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 146557085 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:54:46 PM UTC 24 |
| Finished | Aug 23 10:54:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057940537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2057940537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.4214287707 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 189409885 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:54:47 PM UTC 24 |
| Finished | Aug 23 10:54:49 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214287707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.4214287707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.3275363403 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 149700812 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:54:47 PM UTC 24 |
| Finished | Aug 23 10:54:49 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275363403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.3275363403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.3122207655 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 35756460 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:54:47 PM UTC 24 |
| Finished | Aug 23 10:54:49 PM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122207655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.3122207655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.3154821257 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 6697749590 ps |
| CPU time | 17.64 seconds |
| Started | Aug 23 10:54:49 PM UTC 24 |
| Finished | Aug 23 10:55:07 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154821257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.3154821257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.3651558234 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 170053922 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:54:49 PM UTC 24 |
| Finished | Aug 23 10:54:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3651558234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.3651558234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.3202242835 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 193935773 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:54:49 PM UTC 24 |
| Finished | Aug 23 10:54:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202242835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.3202242835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.964147634 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 243091567 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:54:50 PM UTC 24 |
| Finished | Aug 23 10:54:52 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=964147634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_random_length_in_transaction.964147634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.2322152358 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 209662414 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:54:50 PM UTC 24 |
| Finished | Aug 23 10:54:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322152358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.2322152358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1123331031 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 20175260701 ps |
| CPU time | 27.34 seconds |
| Started | Aug 23 10:54:50 PM UTC 24 |
| Finished | Aug 23 10:55:18 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123331031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.1123331031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.177617493 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 167523525 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:54:51 PM UTC 24 |
| Finished | Aug 23 10:54:53 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177617493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_rx_crc_err.177617493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.828052426 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 397276558 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 10:54:51 PM UTC 24 |
| Finished | Aug 23 10:54:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=828052426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_rx_full.828052426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1966757776 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 153289435 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:54:52 PM UTC 24 |
| Finished | Aug 23 10:54:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966757776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.1966757776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.1857828555 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 159562268 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:54:52 PM UTC 24 |
| Finished | Aug 23 10:54:54 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1857828555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.1857828555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.1739250411 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 274387212 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 10:54:52 PM UTC 24 |
| Finished | Aug 23 10:54:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1739250411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.1739250411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.758185747 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 3032619365 ps |
| CPU time | 71.79 seconds |
| Started | Aug 23 10:54:52 PM UTC 24 |
| Finished | Aug 23 10:56:06 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=758185747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.758185747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.3929483872 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 220389799 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:54:53 PM UTC 24 |
| Finished | Aug 23 10:54:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929483872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.3929483872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.2533732775 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 155592068 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:54:54 PM UTC 24 |
| Finished | Aug 23 10:54:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2533732775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_stall_trans.2533732775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.139585015 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 909589237 ps |
| CPU time | 2.2 seconds |
| Started | Aug 23 10:54:55 PM UTC 24 |
| Finished | Aug 23 10:54:58 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=139585015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_stream_len_max.139585015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.2541653370 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 4033091026 ps |
| CPU time | 28.57 seconds |
| Started | Aug 23 10:54:54 PM UTC 24 |
| Finished | Aug 23 10:55:24 PM UTC 24 |
| Peak memory | 230504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541653370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.2541653370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.3083031041 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 149998680 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:54:32 PM UTC 24 |
| Finished | Aug 23 10:54:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3083031041 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.3083031041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.6484720 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 511071039 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 10:54:55 PM UTC 24 |
| Finished | Aug 23 10:54:57 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=6484720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_tx_r x_disruption.6484720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.280923882 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 216673428 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:09:26 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280923882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.280923882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.1708623869 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 535482362 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:09:27 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 214584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708623869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.1708623869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.1730425171 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 472407575 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:27 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 217064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1730425171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_ tx_rx_disruption.1730425171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.1745538065 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 505181250 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:27 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1745538065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.1745538065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.1000340076 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 486134015 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:27 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1000340076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.1000340076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.3732852539 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 329948271 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732852539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.3732852539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.759278695 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 610725723 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=759278695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.759278695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.2020079358 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 314001728 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020079358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.2020079358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.3072713764 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 586480414 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3072713764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_ tx_rx_disruption.3072713764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.2727870965 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 514237325 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:31 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2727870965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.2727870965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.2802879370 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 252222322 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2802879370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.2802879370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.3610231174 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 659285086 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:31 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3610231174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_ tx_rx_disruption.3610231174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2999917070 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 263444123 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:09:28 PM UTC 24 |
| Finished | Aug 23 11:09:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999917070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.2999917070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.633783621 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 585347219 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=633783621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_t x_rx_disruption.633783621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.215769905 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 358317998 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=215769905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.215769905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.276725624 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 551115298 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=276725624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_t x_rx_disruption.276725624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.2343006070 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 641479368 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2343006070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.2343006070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2529787419 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 60359896 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 10:55:20 PM UTC 24 |
| Finished | Aug 23 10:55:22 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529787419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2529787419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.4131313458 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 11506500476 ps |
| CPU time | 15.23 seconds |
| Started | Aug 23 10:54:56 PM UTC 24 |
| Finished | Aug 23 10:55:12 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4131313458 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.4131313458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.100738629 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 13427120723 ps |
| CPU time | 16.21 seconds |
| Started | Aug 23 10:54:56 PM UTC 24 |
| Finished | Aug 23 10:55:13 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=100738629 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.100738629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.3116285945 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 25435070978 ps |
| CPU time | 37.25 seconds |
| Started | Aug 23 10:54:57 PM UTC 24 |
| Finished | Aug 23 10:55:35 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116285945 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.3116285945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.2331550620 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 256144879 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:54:57 PM UTC 24 |
| Finished | Aug 23 10:54:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331550620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.2331550620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.948062604 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 182674974 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:54:57 PM UTC 24 |
| Finished | Aug 23 10:54:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=948062604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_bitstuff_err.948062604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.3266074963 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 452474527 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 10:54:57 PM UTC 24 |
| Finished | Aug 23 10:54:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266074963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.3266074963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.1081610844 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 684685037 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 10:54:58 PM UTC 24 |
| Finished | Aug 23 10:55:01 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081610844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.1081610844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.1732792964 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 589055366 ps |
| CPU time | 9.51 seconds |
| Started | Aug 23 10:54:59 PM UTC 24 |
| Finished | Aug 23 10:55:10 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732792964 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.1732792964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.642482793 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 807387149 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 10:54:59 PM UTC 24 |
| Finished | Aug 23 10:55:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=642482793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_disable_endpoint.642482793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.983759200 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 139252494 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:55:00 PM UTC 24 |
| Finished | Aug 23 10:55:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983759200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_disconnected.983759200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_enable.3718549958 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 41063412 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:55:02 PM UTC 24 |
| Finished | Aug 23 10:55:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718549958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.3718549958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.2332522279 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 1032161479 ps |
| CPU time | 2.32 seconds |
| Started | Aug 23 10:55:02 PM UTC 24 |
| Finished | Aug 23 10:55:05 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332522279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.2332522279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.3405614937 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 257391561 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 10:55:03 PM UTC 24 |
| Finished | Aug 23 10:55:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405614937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.3405614937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.1266139340 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 239295886 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:55:04 PM UTC 24 |
| Finished | Aug 23 10:55:06 PM UTC 24 |
| Peak memory | 225984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266139340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.1266139340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.1768550362 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 143417204 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:55:04 PM UTC 24 |
| Finished | Aug 23 10:55:06 PM UTC 24 |
| Peak memory | 215684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768550362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_stall.1768550362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.13378223 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 188514275 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:55:05 PM UTC 24 |
| Finished | Aug 23 10:55:07 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=13378223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_in_trans.13378223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.2614420584 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 2931665125 ps |
| CPU time | 65.97 seconds |
| Started | Aug 23 10:55:03 PM UTC 24 |
| Finished | Aug 23 10:56:10 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614420584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.2614420584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.3321382426 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 7392269987 ps |
| CPU time | 45.55 seconds |
| Started | Aug 23 10:55:06 PM UTC 24 |
| Finished | Aug 23 10:55:53 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3321382426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.3321382426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.2897755916 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 235555345 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:55:06 PM UTC 24 |
| Finished | Aug 23 10:55:08 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2897755916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.2897755916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.3230071497 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 24974152909 ps |
| CPU time | 36.74 seconds |
| Started | Aug 23 10:55:06 PM UTC 24 |
| Finished | Aug 23 10:55:44 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230071497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.3230071497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.1347539461 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 3469292117 ps |
| CPU time | 5.04 seconds |
| Started | Aug 23 10:55:06 PM UTC 24 |
| Finished | Aug 23 10:55:12 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1347539461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.1347539461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.1587761840 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 5011986173 ps |
| CPU time | 36.06 seconds |
| Started | Aug 23 10:55:07 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587761840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.1587761840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.3273158587 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 1569885114 ps |
| CPU time | 10.02 seconds |
| Started | Aug 23 10:55:08 PM UTC 24 |
| Finished | Aug 23 10:55:19 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273158587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.3273158587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.16269868 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 244322244 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:55:08 PM UTC 24 |
| Finished | Aug 23 10:55:10 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16269868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.16269868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.1998203335 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 208819354 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:55:08 PM UTC 24 |
| Finished | Aug 23 10:55:09 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1998203335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.1998203335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.1152909181 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 2207941060 ps |
| CPU time | 18.28 seconds |
| Started | Aug 23 10:55:09 PM UTC 24 |
| Finished | Aug 23 10:55:29 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152909181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.1152909181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.1838774680 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 2353244615 ps |
| CPU time | 17.61 seconds |
| Started | Aug 23 10:55:09 PM UTC 24 |
| Finished | Aug 23 10:55:28 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1838774680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.1838774680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.3502614830 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 2834221551 ps |
| CPU time | 68.4 seconds |
| Started | Aug 23 10:55:09 PM UTC 24 |
| Finished | Aug 23 10:56:19 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502614830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.3502614830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.3331552714 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 241373289 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:55:09 PM UTC 24 |
| Finished | Aug 23 10:55:11 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331552714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.3331552714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.1285658076 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 194163545 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:55:10 PM UTC 24 |
| Finished | Aug 23 10:55:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285658076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.1285658076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.55324929 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 228670124 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:55:11 PM UTC 24 |
| Finished | Aug 23 10:55:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=55324929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_out_iso.55324929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.4044681933 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 200143257 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:12 PM UTC 24 |
| Finished | Aug 23 10:55:14 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4044681933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_out_stall.4044681933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1713136419 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 194055594 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:12 PM UTC 24 |
| Finished | Aug 23 10:55:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713136419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1713136419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.1573182756 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 165087537 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:12 PM UTC 24 |
| Finished | Aug 23 10:55:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1573182756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_pending_in_trans.1573182756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.2394107801 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 252570874 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 10:55:14 PM UTC 24 |
| Finished | Aug 23 10:55:16 PM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394107801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.2394107801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.4150949325 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 153343356 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:55:14 PM UTC 24 |
| Finished | Aug 23 10:55:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150949325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.4150949325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.1162899682 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 35583257 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:55:14 PM UTC 24 |
| Finished | Aug 23 10:55:16 PM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162899682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.1162899682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.372439405 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 11470067804 ps |
| CPU time | 29.31 seconds |
| Started | Aug 23 10:55:14 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372439405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_pkt_buffer.372439405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.3535273183 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 156201109 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:55:14 PM UTC 24 |
| Finished | Aug 23 10:55:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535273183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.3535273183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.2984896050 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 208449983 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:15 PM UTC 24 |
| Finished | Aug 23 10:55:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2984896050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.2984896050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.2078736244 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 166048594 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:15 PM UTC 24 |
| Finished | Aug 23 10:55:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078736244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.2078736244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.3894156756 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 176557394 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:55:15 PM UTC 24 |
| Finished | Aug 23 10:55:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894156756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.3894156756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.1043265052 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 20167791015 ps |
| CPU time | 24.31 seconds |
| Started | Aug 23 10:55:16 PM UTC 24 |
| Finished | Aug 23 10:55:42 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1043265052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.1043265052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.1146586089 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 167508141 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:55:16 PM UTC 24 |
| Finished | Aug 23 10:55:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146586089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.1146586089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.2650037131 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 250155451 ps |
| CPU time | 1 seconds |
| Started | Aug 23 10:55:16 PM UTC 24 |
| Finished | Aug 23 10:55:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650037131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.2650037131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.2976020021 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 160874650 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976020021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.2976020021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.2478811179 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 158115384 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478811179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.2478811179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.493859290 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 256552576 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:20 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=493859290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.493859290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.903867108 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 2113766538 ps |
| CPU time | 13.4 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:32 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=903867108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.903867108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.3486911750 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 185837981 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486911750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.3486911750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.1494225351 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 186613652 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:55:18 PM UTC 24 |
| Finished | Aug 23 10:55:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494225351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_stall_trans.1494225351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.214818702 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 1014166894 ps |
| CPU time | 2.56 seconds |
| Started | Aug 23 10:55:19 PM UTC 24 |
| Finished | Aug 23 10:55:22 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=214818702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_stream_len_max.214818702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.1384851605 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 2044504016 ps |
| CPU time | 48.29 seconds |
| Started | Aug 23 10:55:19 PM UTC 24 |
| Finished | Aug 23 10:56:09 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384851605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.1384851605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.1944869387 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 1563769776 ps |
| CPU time | 29.39 seconds |
| Started | Aug 23 10:54:59 PM UTC 24 |
| Finished | Aug 23 10:55:30 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944869387 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.1944869387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.1057459250 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 571618728 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 10:55:19 PM UTC 24 |
| Finished | Aug 23 10:55:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1057459250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.1057459250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2139350712 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 295118238 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139350712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2139350712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.2053205030 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 574684782 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2053205030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.2053205030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.4076639729 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 338749091 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4076639729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.4076639729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.2330287265 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 560367393 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2330287265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_ tx_rx_disruption.2330287265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.337902897 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 472108342 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:09:29 PM UTC 24 |
| Finished | Aug 23 11:09:32 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=337902897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.337902897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.2692221599 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 628140840 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2692221599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.2692221599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.2290880689 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 209690115 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290880689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.2290880689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.1485900078 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 596708034 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1485900078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.1485900078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.3890131340 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 500482489 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3890131340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_ tx_rx_disruption.3890131340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3943206420 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 225230173 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3943206420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3943206420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.1109590657 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 638888500 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1109590657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.1109590657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.2385111547 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 164069609 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385111547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.2385111547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.3462531761 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 521482972 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3462531761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.3462531761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.780908357 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 388919533 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=780908357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.780908357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.3095854655 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 529711657 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3095854655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_ tx_rx_disruption.3095854655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.3858542715 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 193213532 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:33 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3858542715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.3858542715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.3914940110 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 489826547 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:31 PM UTC 24 |
| Finished | Aug 23 11:09:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3914940110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_ tx_rx_disruption.3914940110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.3477054841 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 35094261 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:55:47 PM UTC 24 |
| Finished | Aug 23 10:55:48 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477054841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.3477054841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.2160661329 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 9509143364 ps |
| CPU time | 12.34 seconds |
| Started | Aug 23 10:55:20 PM UTC 24 |
| Finished | Aug 23 10:55:34 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160661329 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.2160661329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.1150210481 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 19113279561 ps |
| CPU time | 23.92 seconds |
| Started | Aug 23 10:55:20 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1150210481 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.1150210481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1863096255 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 30598072001 ps |
| CPU time | 44.52 seconds |
| Started | Aug 23 10:55:20 PM UTC 24 |
| Finished | Aug 23 10:56:06 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863096255 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1863096255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.1393659504 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 173424659 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:20 PM UTC 24 |
| Finished | Aug 23 10:55:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1393659504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.1393659504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.2726670308 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 179404800 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:22 PM UTC 24 |
| Finished | Aug 23 10:55:24 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726670308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_bitstuff_err.2726670308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.2712169362 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 480562866 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:55:22 PM UTC 24 |
| Finished | Aug 23 10:55:25 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2712169362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.2712169362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.1069123352 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 413827039 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 10:55:22 PM UTC 24 |
| Finished | Aug 23 10:55:25 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1069123352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.1069123352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.187164911 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 21131103586 ps |
| CPU time | 32.35 seconds |
| Started | Aug 23 10:55:22 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=187164911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.187164911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.1811913289 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 4389317189 ps |
| CPU time | 25.4 seconds |
| Started | Aug 23 10:55:24 PM UTC 24 |
| Finished | Aug 23 10:55:51 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811913289 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1811913289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1215696422 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 594049914 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 10:55:24 PM UTC 24 |
| Finished | Aug 23 10:55:26 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215696422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1215696422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.2386596848 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 140694846 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:55:25 PM UTC 24 |
| Finished | Aug 23 10:55:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386596848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.2386596848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_enable.3564302034 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 40643587 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:55:25 PM UTC 24 |
| Finished | Aug 23 10:55:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3564302034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.3564302034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.416935285 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 917447302 ps |
| CPU time | 2.11 seconds |
| Started | Aug 23 10:55:25 PM UTC 24 |
| Finished | Aug 23 10:55:28 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=416935285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.416935285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.163453467 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 159593958 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:55:25 PM UTC 24 |
| Finished | Aug 23 10:55:27 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163453467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.163453467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.548762554 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 185462684 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 10:55:26 PM UTC 24 |
| Finished | Aug 23 10:55:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=548762554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_fifo_rst.548762554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.921489511 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 214849425 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:55:28 PM UTC 24 |
| Finished | Aug 23 10:55:30 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=921489511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.921489511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.448835908 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 188755459 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:55:28 PM UTC 24 |
| Finished | Aug 23 10:55:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448835908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_in_stall.448835908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.2555971894 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 201457821 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:55:28 PM UTC 24 |
| Finished | Aug 23 10:55:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555971894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.2555971894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.1289160224 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 3542979121 ps |
| CPU time | 29.72 seconds |
| Started | Aug 23 10:55:26 PM UTC 24 |
| Finished | Aug 23 10:55:58 PM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289160224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.1289160224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1870527286 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 4838498040 ps |
| CPU time | 45.21 seconds |
| Started | Aug 23 10:55:28 PM UTC 24 |
| Finished | Aug 23 10:56:14 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870527286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1870527286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.372045863 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 223222035 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:55:29 PM UTC 24 |
| Finished | Aug 23 10:55:31 PM UTC 24 |
| Peak memory | 215488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=372045863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_in_err.372045863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.3197241330 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 11598441295 ps |
| CPU time | 13.92 seconds |
| Started | Aug 23 10:55:29 PM UTC 24 |
| Finished | Aug 23 10:55:44 PM UTC 24 |
| Peak memory | 217764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3197241330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.3197241330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.2170477423 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 9114343595 ps |
| CPU time | 12.74 seconds |
| Started | Aug 23 10:55:30 PM UTC 24 |
| Finished | Aug 23 10:55:44 PM UTC 24 |
| Peak memory | 217652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170477423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.2170477423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.1213655585 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 3400031983 ps |
| CPU time | 79.06 seconds |
| Started | Aug 23 10:55:30 PM UTC 24 |
| Finished | Aug 23 10:56:51 PM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213655585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.1213655585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.3494152231 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 2074337660 ps |
| CPU time | 16.98 seconds |
| Started | Aug 23 10:55:30 PM UTC 24 |
| Finished | Aug 23 10:55:49 PM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494152231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.3494152231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.414479069 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 261566535 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:55:30 PM UTC 24 |
| Finished | Aug 23 10:55:32 PM UTC 24 |
| Peak memory | 217484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=414479069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.414479069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.2788341359 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 205842818 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:55:31 PM UTC 24 |
| Finished | Aug 23 10:55:33 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788341359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.2788341359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.4032666840 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 2278874423 ps |
| CPU time | 18.86 seconds |
| Started | Aug 23 10:55:31 PM UTC 24 |
| Finished | Aug 23 10:55:51 PM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032666840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.4032666840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.3122245339 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 1887837196 ps |
| CPU time | 42.11 seconds |
| Started | Aug 23 10:55:31 PM UTC 24 |
| Finished | Aug 23 10:56:15 PM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3122245339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.3122245339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.394848490 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 2000941780 ps |
| CPU time | 16.75 seconds |
| Started | Aug 23 10:55:31 PM UTC 24 |
| Finished | Aug 23 10:55:50 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=394848490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.394848490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.2625244289 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 183325625 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:55:33 PM UTC 24 |
| Finished | Aug 23 10:55:35 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625244289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.2625244289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.113763130 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 148761984 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:55:34 PM UTC 24 |
| Finished | Aug 23 10:55:36 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113763130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.113763130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.234554153 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 226370944 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:55:35 PM UTC 24 |
| Finished | Aug 23 10:55:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=234554153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_out_iso.234554153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.1824062700 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 163048795 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:55:36 PM UTC 24 |
| Finished | Aug 23 10:55:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824062700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.1824062700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.3519944998 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 201706559 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:55:36 PM UTC 24 |
| Finished | Aug 23 10:55:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519944998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_out_trans_nak.3519944998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.3553305463 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 159002273 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:37 PM UTC 24 |
| Finished | Aug 23 10:55:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3553305463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_pending_in_trans.3553305463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.3961960659 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 225998132 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:55:38 PM UTC 24 |
| Finished | Aug 23 10:55:40 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961960659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.3961960659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2977025013 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 221722546 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:55:38 PM UTC 24 |
| Finished | Aug 23 10:55:40 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977025013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2977025013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.4000627350 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 37572290 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:55:39 PM UTC 24 |
| Finished | Aug 23 10:55:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000627350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_pins_sense.4000627350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.1011248627 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 18208371795 ps |
| CPU time | 48.83 seconds |
| Started | Aug 23 10:55:39 PM UTC 24 |
| Finished | Aug 23 10:56:30 PM UTC 24 |
| Peak memory | 228372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011248627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.1011248627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.444545571 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 174624344 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:55:39 PM UTC 24 |
| Finished | Aug 23 10:55:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=444545571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_pkt_received.444545571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.2455601816 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 223564454 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:55:39 PM UTC 24 |
| Finished | Aug 23 10:55:41 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2455601816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_pkt_sent.2455601816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.2115849794 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 209938083 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:55:40 PM UTC 24 |
| Finished | Aug 23 10:55:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115849794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.2115849794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.260617414 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 192715768 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:41 PM UTC 24 |
| Finished | Aug 23 10:55:42 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260617414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.260617414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.641263606 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 20164004697 ps |
| CPU time | 25.65 seconds |
| Started | Aug 23 10:55:42 PM UTC 24 |
| Finished | Aug 23 10:56:09 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=641263606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_resume_link_active.641263606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.3185244690 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 181533510 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:55:42 PM UTC 24 |
| Finished | Aug 23 10:55:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185244690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.3185244690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.4049943269 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 263779582 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:55:43 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049943269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.4049943269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.1662339145 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 187002496 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:55:43 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662339145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_setup_stage.1662339145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.3248720935 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 192160256 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:55:43 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248720935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.3248720935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.194572673 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 227599530 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:55:43 PM UTC 24 |
| Finished | Aug 23 10:55:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=194572673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.194572673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.1721577243 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 3727711859 ps |
| CPU time | 23.19 seconds |
| Started | Aug 23 10:55:45 PM UTC 24 |
| Finished | Aug 23 10:56:10 PM UTC 24 |
| Peak memory | 234872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721577243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.1721577243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.4159804993 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 163885708 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:55:45 PM UTC 24 |
| Finished | Aug 23 10:55:47 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159804993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.4159804993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.1532935378 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 175653836 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:55:45 PM UTC 24 |
| Finished | Aug 23 10:55:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532935378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.1532935378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.271050090 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 314997244 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 10:55:45 PM UTC 24 |
| Finished | Aug 23 10:55:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271050090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_stream_len_max.271050090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.1033823805 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 2948132106 ps |
| CPU time | 23.99 seconds |
| Started | Aug 23 10:55:45 PM UTC 24 |
| Finished | Aug 23 10:56:11 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033823805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.1033823805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.1237321631 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 157577427 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:55:24 PM UTC 24 |
| Finished | Aug 23 10:55:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237321631 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.1237321631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.437635839 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 448097108 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 10:55:47 PM UTC 24 |
| Finished | Aug 23 10:55:49 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=437635839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_tx _rx_disruption.437635839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1537354725 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 263569865 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:35 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1537354725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1537354725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.2477481661 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 457925062 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2477481661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.2477481661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.323154434 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 537063969 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=323154434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.323154434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.870021852 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 521799063 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=870021852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_t x_rx_disruption.870021852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.13642146 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 601507945 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=13642146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_tx _rx_disruption.13642146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.2776614618 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 481274129 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2776614618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.2776614618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1629968757 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 515328694 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629968757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1629968757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.2580403564 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 631593693 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2580403564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.2580403564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.3428772099 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 166807364 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:35 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428772099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.3428772099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.1266050083 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 323932341 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266050083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.1266050083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.855722319 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 669171356 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 11:09:33 PM UTC 24 |
| Finished | Aug 23 11:09:37 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=855722319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_t x_rx_disruption.855722319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.3990783809 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 665839700 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990783809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.3990783809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.2957475215 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 575524226 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2957475215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.2957475215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.1054645564 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 611367855 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054645564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.1054645564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.1447688275 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 660078836 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:39 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1447688275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.1447688275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.2163204475 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 570961396 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2163204475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_ tx_rx_disruption.2163204475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.3431128155 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 39645527 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:56:10 PM UTC 24 |
| Finished | Aug 23 10:56:12 PM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3431128155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.3431128155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3123607610 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 9339132915 ps |
| CPU time | 12.97 seconds |
| Started | Aug 23 10:55:47 PM UTC 24 |
| Finished | Aug 23 10:56:01 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123607610 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3123607610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.176936810 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 26311622505 ps |
| CPU time | 31.75 seconds |
| Started | Aug 23 10:55:47 PM UTC 24 |
| Finished | Aug 23 10:56:20 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=176936810 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.176936810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.1633078796 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 186184404 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:55:48 PM UTC 24 |
| Finished | Aug 23 10:55:50 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633078796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.1633078796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.3947214640 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 160026166 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:55:48 PM UTC 24 |
| Finished | Aug 23 10:55:50 PM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947214640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_bitstuff_err.3947214640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.3480094029 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 375134454 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 10:55:49 PM UTC 24 |
| Finished | Aug 23 10:55:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480094029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.3480094029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.2754870913 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 15671485281 ps |
| CPU time | 25.42 seconds |
| Started | Aug 23 10:55:49 PM UTC 24 |
| Finished | Aug 23 10:56:17 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754870913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.2754870913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.972067669 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 533061006 ps |
| CPU time | 9.58 seconds |
| Started | Aug 23 10:55:49 PM UTC 24 |
| Finished | Aug 23 10:56:00 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972067669 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.972067669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.3560861412 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 772881170 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 10:55:50 PM UTC 24 |
| Finished | Aug 23 10:55:53 PM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3560861412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.3560861412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.201030023 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 191766544 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:55:50 PM UTC 24 |
| Finished | Aug 23 10:55:52 PM UTC 24 |
| Peak memory | 215692 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201030023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_disconnected.201030023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_enable.462992253 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 80680406 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 10:55:50 PM UTC 24 |
| Finished | Aug 23 10:55:52 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462992253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.462992253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3444194797 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 819014156 ps |
| CPU time | 2.21 seconds |
| Started | Aug 23 10:55:51 PM UTC 24 |
| Finished | Aug 23 10:55:55 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3444194797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3444194797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.971505223 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 172838645 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 10:55:53 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=971505223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_fifo_rst.971505223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.3002154472 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 215712815 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:55:53 PM UTC 24 |
| Finished | Aug 23 10:55:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002154472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.3002154472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.3643917870 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 137755603 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:55:53 PM UTC 24 |
| Finished | Aug 23 10:55:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3643917870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.3643917870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.2019816494 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 234379883 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:55:54 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2019816494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.2019816494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1754699038 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 3716451874 ps |
| CPU time | 23.45 seconds |
| Started | Aug 23 10:55:53 PM UTC 24 |
| Finished | Aug 23 10:56:18 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1754699038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1754699038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.1952505414 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 7037515223 ps |
| CPU time | 71.45 seconds |
| Started | Aug 23 10:55:54 PM UTC 24 |
| Finished | Aug 23 10:57:07 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952505414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.1952505414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.2918808854 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 212693692 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:55:54 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918808854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.2918808854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.56786271 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 30866920497 ps |
| CPU time | 40.99 seconds |
| Started | Aug 23 10:55:55 PM UTC 24 |
| Finished | Aug 23 10:56:38 PM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=56786271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_link_resume.56786271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.1631607242 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 5861394685 ps |
| CPU time | 7.81 seconds |
| Started | Aug 23 10:55:55 PM UTC 24 |
| Finished | Aug 23 10:56:04 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1631607242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.1631607242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.3515424219 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 3474332549 ps |
| CPU time | 30.17 seconds |
| Started | Aug 23 10:55:55 PM UTC 24 |
| Finished | Aug 23 10:56:27 PM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515424219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.3515424219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.454081245 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 2505888201 ps |
| CPU time | 16.42 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:56:14 PM UTC 24 |
| Peak memory | 228172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454081245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.454081245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.644945700 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 273063367 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:55:59 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644945700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.644945700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.688949302 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 193043118 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:55:59 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=688949302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.688949302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.1325582979 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 3060245117 ps |
| CPU time | 24.92 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:56:23 PM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325582979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.1325582979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.309051048 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 1954996150 ps |
| CPU time | 17.05 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:56:15 PM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=309051048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.309051048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.1500009722 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 2899324082 ps |
| CPU time | 66.59 seconds |
| Started | Aug 23 10:55:57 PM UTC 24 |
| Finished | Aug 23 10:57:05 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500009722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.1500009722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1760553007 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 158232277 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:55:59 PM UTC 24 |
| Finished | Aug 23 10:56:01 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760553007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1760553007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.3872838104 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 145545192 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:55:59 PM UTC 24 |
| Finished | Aug 23 10:56:01 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872838104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.3872838104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.3980930165 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 202699309 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:56:00 PM UTC 24 |
| Finished | Aug 23 10:56:02 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980930165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_nak_trans.3980930165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.1589981169 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 163710684 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:56:00 PM UTC 24 |
| Finished | Aug 23 10:56:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589981169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.1589981169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.1738104831 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 161468184 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:01 PM UTC 24 |
| Finished | Aug 23 10:56:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738104831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.1738104831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.1431035372 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 166086684 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:56:02 PM UTC 24 |
| Finished | Aug 23 10:56:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1431035372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.1431035372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.4157865439 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 162410914 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:56:02 PM UTC 24 |
| Finished | Aug 23 10:56:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157865439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.4157865439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.3023008662 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 207430811 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:56:02 PM UTC 24 |
| Finished | Aug 23 10:56:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023008662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.3023008662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.2438142487 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 144395113 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:56:02 PM UTC 24 |
| Finished | Aug 23 10:56:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2438142487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.2438142487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.3381064221 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 8679039600 ps |
| CPU time | 21.62 seconds |
| Started | Aug 23 10:56:04 PM UTC 24 |
| Finished | Aug 23 10:56:27 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3381064221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_pkt_buffer.3381064221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2688367610 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 173094703 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:56:05 PM UTC 24 |
| Finished | Aug 23 10:56:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688367610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2688367610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.4032601474 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 243336565 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:56:05 PM UTC 24 |
| Finished | Aug 23 10:56:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032601474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.4032601474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2768504623 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 232039908 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:56:05 PM UTC 24 |
| Finished | Aug 23 10:56:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768504623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2768504623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.922598119 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 172107927 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:56:06 PM UTC 24 |
| Finished | Aug 23 10:56:08 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922598119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.922598119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.3994151192 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 20167644345 ps |
| CPU time | 25.21 seconds |
| Started | Aug 23 10:56:06 PM UTC 24 |
| Finished | Aug 23 10:56:33 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994151192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.3994151192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.1672377949 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 145653110 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:06 PM UTC 24 |
| Finished | Aug 23 10:56:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672377949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.1672377949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.3958449198 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 147986212 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:06 PM UTC 24 |
| Finished | Aug 23 10:56:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958449198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.3958449198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.1292608237 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 203190515 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:56:07 PM UTC 24 |
| Finished | Aug 23 10:56:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292608237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 14.usbdev_setup_trans_ignored.1292608237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.3062725093 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 225133318 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:56:07 PM UTC 24 |
| Finished | Aug 23 10:56:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062725093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.3062725093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.79907187 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 3608172431 ps |
| CPU time | 28.81 seconds |
| Started | Aug 23 10:56:07 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79907187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_ traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.79907187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.2541589533 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 206401422 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:56:07 PM UTC 24 |
| Finished | Aug 23 10:56:09 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541589533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.2541589533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.2217268453 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 177117534 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:56:09 PM UTC 24 |
| Finished | Aug 23 10:56:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217268453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.2217268453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.1280357088 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 736447276 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 10:56:09 PM UTC 24 |
| Finished | Aug 23 10:56:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280357088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.1280357088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.2473102659 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 2547082884 ps |
| CPU time | 61.27 seconds |
| Started | Aug 23 10:56:09 PM UTC 24 |
| Finished | Aug 23 10:57:12 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2473102659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.2473102659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.2404228789 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 519770278 ps |
| CPU time | 6.73 seconds |
| Started | Aug 23 10:55:50 PM UTC 24 |
| Finished | Aug 23 10:55:58 PM UTC 24 |
| Peak memory | 217644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404228789 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.2404228789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.728709336 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 610695477 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 10:56:10 PM UTC 24 |
| Finished | Aug 23 10:56:12 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=728709336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_tx _rx_disruption.728709336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.692908842 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 469018231 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=692908842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_t x_rx_disruption.692908842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.3779373829 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 284252709 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779373829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.3779373829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.1533657636 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 550447328 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1533657636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.1533657636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.3880694252 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 157386459 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880694252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3880694252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.644577356 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 427737955 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:38 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=644577356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_t x_rx_disruption.644577356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.2918974915 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 691955845 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:09:35 PM UTC 24 |
| Finished | Aug 23 11:09:39 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918974915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.2918974915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.3460923800 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 504973904 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:09:36 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 214940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3460923800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.3460923800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.2721625913 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 490083764 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:36 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2721625913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_ tx_rx_disruption.2721625913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.3597899900 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 417224167 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:09:36 PM UTC 24 |
| Finished | Aug 23 11:09:39 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3597899900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.3597899900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.4311783 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 438401086 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4311783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_tx_ rx_disruption.4311783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.2599110379 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 367597687 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599110379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.2599110379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.69105907 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 437022006 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=69105907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_tx _rx_disruption.69105907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.45682857 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 666293431 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=45682857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.45682857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.3952936975 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 532447916 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3952936975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_ tx_rx_disruption.3952936975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.3210976080 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 333431235 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3210976080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.3210976080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.3514581192 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 560674386 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3514581192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.3514581192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.63965453 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 264091945 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 217132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=63965453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.63965453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.1209161216 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 525687302 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:41 PM UTC 24 |
| Peak memory | 216296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1209161216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.1209161216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.69574508 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 40347829 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:56:28 PM UTC 24 |
| Finished | Aug 23 10:56:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=69574508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.69574508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.1926663070 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 4919564216 ps |
| CPU time | 6.87 seconds |
| Started | Aug 23 10:56:10 PM UTC 24 |
| Finished | Aug 23 10:56:18 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926663070 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.1926663070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.3211915797 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 14950495309 ps |
| CPU time | 18.09 seconds |
| Started | Aug 23 10:56:10 PM UTC 24 |
| Finished | Aug 23 10:56:29 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3211915797 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.3211915797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.379710649 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 29327042848 ps |
| CPU time | 33.55 seconds |
| Started | Aug 23 10:56:10 PM UTC 24 |
| Finished | Aug 23 10:56:45 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=379710649 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.379710649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.1023575338 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 156059610 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:56:11 PM UTC 24 |
| Finished | Aug 23 10:56:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023575338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.1023575338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.3755792190 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 173563443 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:56:11 PM UTC 24 |
| Finished | Aug 23 10:56:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755792190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_bitstuff_err.3755792190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.3851518621 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 144977893 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:56:11 PM UTC 24 |
| Finished | Aug 23 10:56:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851518621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 15.usbdev_data_toggle_clear.3851518621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.1398916336 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 462490477 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 10:56:11 PM UTC 24 |
| Finished | Aug 23 10:56:14 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398916336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.1398916336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.870828484 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 16891940017 ps |
| CPU time | 27.52 seconds |
| Started | Aug 23 10:56:12 PM UTC 24 |
| Finished | Aug 23 10:56:41 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=870828484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_device_address.870828484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.4133297044 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 1274217926 ps |
| CPU time | 24.3 seconds |
| Started | Aug 23 10:56:12 PM UTC 24 |
| Finished | Aug 23 10:56:38 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133297044 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.4133297044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.3826425068 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 585904178 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 10:56:14 PM UTC 24 |
| Finished | Aug 23 10:56:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3826425068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.3826425068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.2062203917 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 172488872 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:56:14 PM UTC 24 |
| Finished | Aug 23 10:56:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062203917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.2062203917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_enable.1598342863 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 32012103 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:56:14 PM UTC 24 |
| Finished | Aug 23 10:56:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1598342863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.1598342863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.3590614473 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 1112111012 ps |
| CPU time | 2.57 seconds |
| Started | Aug 23 10:56:14 PM UTC 24 |
| Finished | Aug 23 10:56:17 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590614473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.3590614473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.2803305657 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 362651424 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 10:56:15 PM UTC 24 |
| Finished | Aug 23 10:56:17 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2803305657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.2803305657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.131035241 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 291557080 ps |
| CPU time | 1.91 seconds |
| Started | Aug 23 10:56:15 PM UTC 24 |
| Finished | Aug 23 10:56:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=131035241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_fifo_rst.131035241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.1526570890 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 220024576 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:56:15 PM UTC 24 |
| Finished | Aug 23 10:56:17 PM UTC 24 |
| Peak memory | 234048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526570890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.1526570890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3113935941 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 168735147 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:56:15 PM UTC 24 |
| Finished | Aug 23 10:56:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113935941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3113935941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.4269180298 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 218080406 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:56:16 PM UTC 24 |
| Finished | Aug 23 10:56:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269180298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.4269180298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2809244335 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 3355425758 ps |
| CPU time | 83.13 seconds |
| Started | Aug 23 10:56:15 PM UTC 24 |
| Finished | Aug 23 10:57:40 PM UTC 24 |
| Peak memory | 230748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809244335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2809244335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.455827391 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 6167863643 ps |
| CPU time | 38.19 seconds |
| Started | Aug 23 10:56:16 PM UTC 24 |
| Finished | Aug 23 10:56:56 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=455827391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.455827391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.3955319738 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 186148210 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:56:16 PM UTC 24 |
| Finished | Aug 23 10:56:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955319738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.3955319738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.212956984 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 6996994177 ps |
| CPU time | 9.11 seconds |
| Started | Aug 23 10:56:16 PM UTC 24 |
| Finished | Aug 23 10:56:27 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212956984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_link_resume.212956984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.2175173522 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 8998417908 ps |
| CPU time | 11.36 seconds |
| Started | Aug 23 10:56:18 PM UTC 24 |
| Finished | Aug 23 10:56:30 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175173522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.2175173522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.2788141013 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 2889151755 ps |
| CPU time | 65.55 seconds |
| Started | Aug 23 10:56:18 PM UTC 24 |
| Finished | Aug 23 10:57:25 PM UTC 24 |
| Peak memory | 230284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788141013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.2788141013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.3647952783 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 2405875656 ps |
| CPU time | 20.65 seconds |
| Started | Aug 23 10:56:18 PM UTC 24 |
| Finished | Aug 23 10:56:40 PM UTC 24 |
| Peak memory | 234828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647952783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.3647952783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.80419008 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 242619397 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:56:18 PM UTC 24 |
| Finished | Aug 23 10:56:20 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80419008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.80419008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.249862926 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 213977682 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:56:18 PM UTC 24 |
| Finished | Aug 23 10:56:20 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249862926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.249862926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.2071972362 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 2318511266 ps |
| CPU time | 16.09 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:36 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2071972362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.2071972362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.3996848549 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 3898383394 ps |
| CPU time | 33.57 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:54 PM UTC 24 |
| Peak memory | 230248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3996848549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.3996848549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.3618451283 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 165596325 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618451283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.3618451283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.61496168 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 197454795 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:21 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=61496168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.61496168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.2908593146 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 162364940 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:56:19 PM UTC 24 |
| Finished | Aug 23 10:56:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908593146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.2908593146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.717112420 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 174882440 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:56:20 PM UTC 24 |
| Finished | Aug 23 10:56:22 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=717112420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_out_stall.717112420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.2132684722 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 180164499 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:56:20 PM UTC 24 |
| Finished | Aug 23 10:56:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132684722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.2132684722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.4237429231 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 156518737 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:56:20 PM UTC 24 |
| Finished | Aug 23 10:56:22 PM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237429231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.4237429231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.1432130175 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 196932793 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:20 PM UTC 24 |
| Finished | Aug 23 10:56:22 PM UTC 24 |
| Peak memory | 216004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432130175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.1432130175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.1535811567 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 171746226 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:56:22 PM UTC 24 |
| Finished | Aug 23 10:56:23 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535811567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.1535811567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.2563796705 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 40485265 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:56:22 PM UTC 24 |
| Finished | Aug 23 10:56:23 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563796705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.2563796705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.1145145362 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 8440548056 ps |
| CPU time | 19.75 seconds |
| Started | Aug 23 10:56:22 PM UTC 24 |
| Finished | Aug 23 10:56:43 PM UTC 24 |
| Peak memory | 232660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145145362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_pkt_buffer.1145145362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.4110031219 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 192090753 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:22 PM UTC 24 |
| Finished | Aug 23 10:56:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110031219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.4110031219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.3436771746 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 167721446 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:56:23 PM UTC 24 |
| Finished | Aug 23 10:56:25 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436771746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.3436771746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.1531677596 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 227328445 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:56:23 PM UTC 24 |
| Finished | Aug 23 10:56:25 PM UTC 24 |
| Peak memory | 216512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531677596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.1531677596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.3416117695 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 164133802 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:56:23 PM UTC 24 |
| Finished | Aug 23 10:56:25 PM UTC 24 |
| Peak memory | 216964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416117695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.3416117695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.3887915741 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 20210516039 ps |
| CPU time | 23.48 seconds |
| Started | Aug 23 10:56:23 PM UTC 24 |
| Finished | Aug 23 10:56:48 PM UTC 24 |
| Peak memory | 218280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3887915741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.3887915741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.1830927889 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 169496809 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:56:24 PM UTC 24 |
| Finished | Aug 23 10:56:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830927889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.1830927889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.2706137425 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 242029892 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:56:24 PM UTC 24 |
| Finished | Aug 23 10:56:26 PM UTC 24 |
| Peak memory | 215908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706137425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_rx_full.2706137425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2235381862 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 165834924 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:56:24 PM UTC 24 |
| Finished | Aug 23 10:56:26 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235381862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2235381862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.1669248074 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 149629309 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:56:24 PM UTC 24 |
| Finished | Aug 23 10:56:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669248074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.1669248074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.2741104447 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 286006692 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:56:25 PM UTC 24 |
| Finished | Aug 23 10:56:27 PM UTC 24 |
| Peak memory | 215124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2741104447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_smoke.2741104447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.583735978 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 3079006615 ps |
| CPU time | 73.3 seconds |
| Started | Aug 23 10:56:25 PM UTC 24 |
| Finished | Aug 23 10:57:40 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583735978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.583735978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.4008401111 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 165514037 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:25 PM UTC 24 |
| Finished | Aug 23 10:56:27 PM UTC 24 |
| Peak memory | 215136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008401111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.4008401111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.3885855773 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 151668849 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:56:27 PM UTC 24 |
| Finished | Aug 23 10:56:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3885855773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.3885855773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.324024174 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 958128624 ps |
| CPU time | 2.27 seconds |
| Started | Aug 23 10:56:27 PM UTC 24 |
| Finished | Aug 23 10:56:30 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=324024174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_stream_len_max.324024174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.1647616287 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 1838266943 ps |
| CPU time | 15.78 seconds |
| Started | Aug 23 10:56:27 PM UTC 24 |
| Finished | Aug 23 10:56:44 PM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647616287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_streaming_out.1647616287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.3132026528 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 6998795510 ps |
| CPU time | 38.84 seconds |
| Started | Aug 23 10:56:13 PM UTC 24 |
| Finished | Aug 23 10:56:53 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132026528 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.3132026528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.3994711222 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 680088806 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 10:56:27 PM UTC 24 |
| Finished | Aug 23 10:56:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3994711222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_t x_rx_disruption.3994711222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.2849343525 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 262491506 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:09:38 PM UTC 24 |
| Finished | Aug 23 11:09:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849343525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.2849343525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.12857783 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 529244480 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=12857783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_tx _rx_disruption.12857783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.2599147496 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 239525661 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599147496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.2599147496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.1969120848 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 554301443 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1969120848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_ tx_rx_disruption.1969120848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.4290243638 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 553444681 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4290243638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.4290243638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.1894843053 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 498384305 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:39 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1894843053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.1894843053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.2429628972 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 561038524 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2429628972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_ tx_rx_disruption.2429628972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.1053774186 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 485686006 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053774186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.1053774186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.3353528131 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 514129387 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3353528131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_ tx_rx_disruption.3353528131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.762056888 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 621926869 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:43 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=762056888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_t x_rx_disruption.762056888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.4138331912 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 573862338 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:40 PM UTC 24 |
| Finished | Aug 23 11:09:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4138331912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_ tx_rx_disruption.4138331912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.720629491 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 565011274 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=720629491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_t x_rx_disruption.720629491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.3600707931 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 531759326 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3600707931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.3600707931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.591366384 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 180013699 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:43 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=591366384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.591366384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.2592633142 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 470132402 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2592633142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.2592633142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1677150158 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 40925749 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:56:51 PM UTC 24 |
| Finished | Aug 23 10:56:53 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1677150158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1677150158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.3522066586 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 5685824063 ps |
| CPU time | 7.88 seconds |
| Started | Aug 23 10:56:28 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3522066586 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.3522066586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.16381641 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 20943466067 ps |
| CPU time | 25.52 seconds |
| Started | Aug 23 10:56:28 PM UTC 24 |
| Finished | Aug 23 10:56:55 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=16381641 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.16381641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.4250466550 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 23532832562 ps |
| CPU time | 30.68 seconds |
| Started | Aug 23 10:56:28 PM UTC 24 |
| Finished | Aug 23 10:57:00 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4250466550 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.4250466550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.2950863037 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 215321750 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:56:29 PM UTC 24 |
| Finished | Aug 23 10:56:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950863037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.2950863037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.3995173307 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 156570999 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:56:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995173307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.3995173307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.4089170799 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 418889349 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:56:33 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089170799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.4089170799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.503541983 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 592903661 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:56:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=503541983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.503541983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.719962779 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 34032431760 ps |
| CPU time | 53.85 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:57:26 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=719962779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_device_address.719962779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.2075811534 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 2577295631 ps |
| CPU time | 18.46 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:56:50 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075811534 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.2075811534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.1444375293 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 738534415 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 10:56:32 PM UTC 24 |
| Finished | Aug 23 10:56:35 PM UTC 24 |
| Peak memory | 215872 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1444375293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.1444375293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.1267667104 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 143654634 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:56:32 PM UTC 24 |
| Finished | Aug 23 10:56:34 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267667104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.1267667104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_enable.1940846630 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 35168861 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:56:33 PM UTC 24 |
| Finished | Aug 23 10:56:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940846630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.1940846630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.193194662 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 797038910 ps |
| CPU time | 2.02 seconds |
| Started | Aug 23 10:56:33 PM UTC 24 |
| Finished | Aug 23 10:56:36 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=193194662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.193194662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.3347452088 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 260187737 ps |
| CPU time | 1.76 seconds |
| Started | Aug 23 10:56:34 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347452088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.3347452088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.400214107 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 182120003 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:56:35 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=400214107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.400214107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.242005499 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 140749021 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:56:35 PM UTC 24 |
| Finished | Aug 23 10:56:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=242005499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_in_stall.242005499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.4217544954 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 211477214 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:56:37 PM UTC 24 |
| Finished | Aug 23 10:56:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4217544954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.4217544954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.2651298537 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 2858586230 ps |
| CPU time | 66.22 seconds |
| Started | Aug 23 10:56:34 PM UTC 24 |
| Finished | Aug 23 10:57:42 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651298537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.2651298537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.2913315504 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 12822355892 ps |
| CPU time | 79.1 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:57:59 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913315504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.2913315504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.140466620 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 283534318 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:56:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140466620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_link_in_err.140466620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.2302087921 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 33596756742 ps |
| CPU time | 47.88 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:57:27 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302087921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.2302087921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.2150575164 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 11050127730 ps |
| CPU time | 13.64 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:56:53 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150575164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.2150575164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.184446447 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 3860370943 ps |
| CPU time | 93.54 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184446447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.184446447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.770409902 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 3142507086 ps |
| CPU time | 21.01 seconds |
| Started | Aug 23 10:56:38 PM UTC 24 |
| Finished | Aug 23 10:57:00 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=770409902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.770409902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.740653313 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 258896078 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:56:39 PM UTC 24 |
| Finished | Aug 23 10:56:41 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=740653313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.740653313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.1120910962 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 197164085 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:56:39 PM UTC 24 |
| Finished | Aug 23 10:56:41 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1120910962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.1120910962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.1471512932 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 2452709775 ps |
| CPU time | 55.75 seconds |
| Started | Aug 23 10:56:39 PM UTC 24 |
| Finished | Aug 23 10:57:36 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471512932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.1471512932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.475266169 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 1925871794 ps |
| CPU time | 12.54 seconds |
| Started | Aug 23 10:56:39 PM UTC 24 |
| Finished | Aug 23 10:56:53 PM UTC 24 |
| Peak memory | 230332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475266169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.475266169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.3839721717 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 192883059 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:56:40 PM UTC 24 |
| Finished | Aug 23 10:56:42 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839721717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.3839721717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.271372737 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 142054753 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:56:40 PM UTC 24 |
| Finished | Aug 23 10:56:42 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271372737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.271372737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.53027367 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 199232296 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:56:41 PM UTC 24 |
| Finished | Aug 23 10:56:43 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=53027367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_nak_trans.53027367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.539155441 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 193217910 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:56:42 PM UTC 24 |
| Finished | Aug 23 10:56:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539155441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_out_iso.539155441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.1046496820 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 190516188 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:43 PM UTC 24 |
| Finished | Aug 23 10:56:45 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046496820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.1046496820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.923065546 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 195490449 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:56:43 PM UTC 24 |
| Finished | Aug 23 10:56:45 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=923065546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.923065546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.2547792314 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 193406047 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:56:43 PM UTC 24 |
| Finished | Aug 23 10:56:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547792314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_pending_in_trans.2547792314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.3489498707 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 232995397 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:56:44 PM UTC 24 |
| Finished | Aug 23 10:56:46 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489498707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.3489498707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.275906601 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 163890486 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:44 PM UTC 24 |
| Finished | Aug 23 10:56:46 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=275906601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.275906601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.2470099198 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 41350667 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:56:44 PM UTC 24 |
| Finished | Aug 23 10:56:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470099198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.2470099198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.2113876790 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 8478226586 ps |
| CPU time | 21.91 seconds |
| Started | Aug 23 10:56:44 PM UTC 24 |
| Finished | Aug 23 10:57:07 PM UTC 24 |
| Peak memory | 235416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113876790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.2113876790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.4282656184 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 193072910 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:56:45 PM UTC 24 |
| Finished | Aug 23 10:56:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282656184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.4282656184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.3154852714 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 229582161 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:56:45 PM UTC 24 |
| Finished | Aug 23 10:56:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154852714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.3154852714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.3744518940 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 192826783 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:45 PM UTC 24 |
| Finished | Aug 23 10:56:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744518940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.3744518940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.2548617185 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 217937796 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:56:45 PM UTC 24 |
| Finished | Aug 23 10:56:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548617185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.2548617185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.961886031 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 20170333322 ps |
| CPU time | 24.87 seconds |
| Started | Aug 23 10:56:47 PM UTC 24 |
| Finished | Aug 23 10:57:13 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=961886031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_resume_link_active.961886031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.496553176 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 137902930 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:56:47 PM UTC 24 |
| Finished | Aug 23 10:56:48 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496553176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_rx_crc_err.496553176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.3740648752 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 341281292 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 10:56:47 PM UTC 24 |
| Finished | Aug 23 10:56:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3740648752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_rx_full.3740648752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.3551543251 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 192596675 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:56:48 PM UTC 24 |
| Finished | Aug 23 10:56:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3551543251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.3551543251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.3939693010 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 157455108 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:56:48 PM UTC 24 |
| Finished | Aug 23 10:56:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939693010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3939693010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.4169139457 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 268028957 ps |
| CPU time | 1 seconds |
| Started | Aug 23 10:56:48 PM UTC 24 |
| Finished | Aug 23 10:56:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4169139457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.4169139457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.1176549963 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 2430895578 ps |
| CPU time | 16.17 seconds |
| Started | Aug 23 10:56:48 PM UTC 24 |
| Finished | Aug 23 10:57:05 PM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176549963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1176549963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.749221568 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 189333996 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:49 PM UTC 24 |
| Finished | Aug 23 10:56:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749221568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.749221568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.1232419440 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 185180105 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:56:49 PM UTC 24 |
| Finished | Aug 23 10:56:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232419440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_stall_trans.1232419440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.259705614 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 382602476 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 10:56:50 PM UTC 24 |
| Finished | Aug 23 10:56:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=259705614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_stream_len_max.259705614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.2012519652 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 3251189443 ps |
| CPU time | 26.34 seconds |
| Started | Aug 23 10:56:50 PM UTC 24 |
| Finished | Aug 23 10:57:18 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012519652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.2012519652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.2058947503 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 1287296604 ps |
| CPU time | 24.2 seconds |
| Started | Aug 23 10:56:31 PM UTC 24 |
| Finished | Aug 23 10:56:56 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058947503 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.2058947503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.1780750344 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 513803142 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 10:56:50 PM UTC 24 |
| Finished | Aug 23 10:56:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1780750344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.1780750344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1127623420 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 204188766 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:43 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127623420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1127623420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.3547293188 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 529710756 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3547293188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.3547293188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.1089241777 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 279606828 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1089241777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.1089241777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.3429699681 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 634215376 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:41 PM UTC 24 |
| Finished | Aug 23 11:09:44 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3429699681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.3429699681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.644071885 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 450269363 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 215544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=644071885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.644071885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.3780989695 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 581835246 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:46 PM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3780989695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.3780989695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.3593454892 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 355386732 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593454892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.3593454892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.1076108426 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 506019460 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1076108426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.1076108426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.2528806489 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 661030247 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:46 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2528806489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.2528806489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.2245078914 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 249752908 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245078914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.2245078914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.3322129846 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 674418075 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:46 PM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3322129846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.3322129846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.1006257518 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 161638833 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006257518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.1006257518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2804011726 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 451325573 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:09:43 PM UTC 24 |
| Finished | Aug 23 11:09:45 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2804011726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2804011726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.1946404935 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 335242868 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946404935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.1946404935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.3190785172 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 447153846 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3190785172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.3190785172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.2318887960 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 792283277 ps |
| CPU time | 1.93 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318887960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.2318887960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.2394268235 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 615621521 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2394268235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.2394268235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.2686425438 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 328568542 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686425438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.2686425438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.2016185392 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 569967106 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2016185392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.2016185392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.2977993469 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 43916436 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:57:15 PM UTC 24 |
| Finished | Aug 23 10:57:16 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977993469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.2977993469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.1372425972 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 4548743454 ps |
| CPU time | 6.32 seconds |
| Started | Aug 23 10:56:51 PM UTC 24 |
| Finished | Aug 23 10:56:59 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372425972 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.1372425972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.3672526265 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 14021006205 ps |
| CPU time | 19.32 seconds |
| Started | Aug 23 10:56:52 PM UTC 24 |
| Finished | Aug 23 10:57:12 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672526265 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.3672526265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.610393804 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 25132649495 ps |
| CPU time | 34.52 seconds |
| Started | Aug 23 10:56:52 PM UTC 24 |
| Finished | Aug 23 10:57:27 PM UTC 24 |
| Peak memory | 228240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=610393804 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.610393804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.2998517149 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 246712978 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:56:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998517149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.2998517149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.3683124470 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 159850796 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:56:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3683124470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_bitstuff_err.3683124470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.3441277778 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 243520499 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:56:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3441277778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 17.usbdev_data_toggle_clear.3441277778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.3405655214 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 1342639563 ps |
| CPU time | 3.19 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:56:58 PM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405655214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.3405655214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.2164402539 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 880287649 ps |
| CPU time | 16.1 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:57:11 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164402539 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.2164402539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.3589299297 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 801334716 ps |
| CPU time | 1.77 seconds |
| Started | Aug 23 10:56:55 PM UTC 24 |
| Finished | Aug 23 10:56:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589299297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.3589299297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.601280930 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 180882202 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:56:56 PM UTC 24 |
| Finished | Aug 23 10:56:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601280930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_disconnected.601280930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_enable.3399863870 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 32206665 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:56:56 PM UTC 24 |
| Finished | Aug 23 10:56:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3399863870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.3399863870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.2129255989 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 842413173 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 10:56:56 PM UTC 24 |
| Finished | Aug 23 10:56:59 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129255989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.2129255989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.4032144965 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 172610838 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 10:56:57 PM UTC 24 |
| Finished | Aug 23 10:57:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032144965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.4032144965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.2855450288 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 223383678 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 10:56:59 PM UTC 24 |
| Finished | Aug 23 10:57:01 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855450288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.2855450288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.942841156 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 136551514 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:56:59 PM UTC 24 |
| Finished | Aug 23 10:57:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942841156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_stall.942841156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.172415568 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 214279970 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:56:59 PM UTC 24 |
| Finished | Aug 23 10:57:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172415568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_in_trans.172415568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.3946729251 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 3442746370 ps |
| CPU time | 28.09 seconds |
| Started | Aug 23 10:56:58 PM UTC 24 |
| Finished | Aug 23 10:57:27 PM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946729251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.3946729251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.1953164458 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 8832881370 ps |
| CPU time | 50.8 seconds |
| Started | Aug 23 10:56:59 PM UTC 24 |
| Finished | Aug 23 10:57:51 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953164458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.1953164458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.689764056 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 235442291 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:57:00 PM UTC 24 |
| Finished | Aug 23 10:57:02 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=689764056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_in_err.689764056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.2123271944 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 30610169331 ps |
| CPU time | 43.42 seconds |
| Started | Aug 23 10:57:00 PM UTC 24 |
| Finished | Aug 23 10:57:45 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123271944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_resume.2123271944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.3163999641 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 4810552248 ps |
| CPU time | 7.39 seconds |
| Started | Aug 23 10:57:00 PM UTC 24 |
| Finished | Aug 23 10:57:08 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3163999641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.3163999641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.2282363935 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 4308057386 ps |
| CPU time | 35.27 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:57:38 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2282363935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.2282363935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.468766774 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 2496048175 ps |
| CPU time | 17.01 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:57:19 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468766774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.468766774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.1548027596 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 248957431 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:57:03 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548027596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.1548027596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.928589641 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 192794589 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:57:03 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=928589641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.928589641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.200968678 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 2170238733 ps |
| CPU time | 50.82 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:57:54 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=200968678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.200968678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.2207790393 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 3989972571 ps |
| CPU time | 96.53 seconds |
| Started | Aug 23 10:57:01 PM UTC 24 |
| Finished | Aug 23 10:58:40 PM UTC 24 |
| Peak memory | 228764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207790393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.2207790393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.2140182089 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 165343159 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:02 PM UTC 24 |
| Finished | Aug 23 10:57:04 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140182089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.2140182089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.1070669652 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 163949194 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:57:04 PM UTC 24 |
| Finished | Aug 23 10:57:05 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1070669652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.1070669652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.1501473868 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 190915460 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:57:05 PM UTC 24 |
| Finished | Aug 23 10:57:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501473868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_out_iso.1501473868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.3004655018 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 207489329 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:57:06 PM UTC 24 |
| Finished | Aug 23 10:57:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004655018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.3004655018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.3520783737 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 146335813 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:57:06 PM UTC 24 |
| Finished | Aug 23 10:57:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520783737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_out_trans_nak.3520783737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.3071675303 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 173304057 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:57:06 PM UTC 24 |
| Finished | Aug 23 10:57:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3071675303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.3071675303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.771478293 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 241860663 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:57:06 PM UTC 24 |
| Finished | Aug 23 10:57:08 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771478293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.771478293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.3467454959 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 208644598 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:57:07 PM UTC 24 |
| Finished | Aug 23 10:57:09 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3467454959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.3467454959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.271618408 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 41656329 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:57:08 PM UTC 24 |
| Finished | Aug 23 10:57:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=271618408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_phy_pins_sense.271618408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.978385622 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 7888510078 ps |
| CPU time | 18.05 seconds |
| Started | Aug 23 10:57:08 PM UTC 24 |
| Finished | Aug 23 10:57:28 PM UTC 24 |
| Peak memory | 228444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=978385622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_pkt_buffer.978385622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.1746079682 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 198244006 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:57:08 PM UTC 24 |
| Finished | Aug 23 10:57:11 PM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746079682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.1746079682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.3161638959 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 236966025 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:57:09 PM UTC 24 |
| Finished | Aug 23 10:57:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161638959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_pkt_sent.3161638959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.1555033345 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 209531482 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:57:09 PM UTC 24 |
| Finished | Aug 23 10:57:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1555033345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.1555033345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.114345912 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 242819369 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:57:09 PM UTC 24 |
| Finished | Aug 23 10:57:11 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=114345912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.114345912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.2029048043 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 20171685341 ps |
| CPU time | 23.82 seconds |
| Started | Aug 23 10:57:10 PM UTC 24 |
| Finished | Aug 23 10:57:35 PM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029048043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.2029048043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.327929232 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 178091114 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:57:10 PM UTC 24 |
| Finished | Aug 23 10:57:12 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327929232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_rx_crc_err.327929232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.1931136935 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 410055652 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 10:57:11 PM UTC 24 |
| Finished | Aug 23 10:57:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1931136935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.1931136935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.2861153983 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 154913451 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861153983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_setup_stage.2861153983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.1876384323 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 171002776 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1876384323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.1876384323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.3187866090 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 210848090 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3187866090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.3187866090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2565978006 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 3586587908 ps |
| CPU time | 32.46 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:46 PM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2565978006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2565978006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.2094074963 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 175780471 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2094074963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.2094074963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.4133372783 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 175110299 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133372783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.4133372783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.814485029 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 1081056093 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 10:57:13 PM UTC 24 |
| Finished | Aug 23 10:57:17 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814485029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_stream_len_max.814485029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.2320350214 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 3394127430 ps |
| CPU time | 21.41 seconds |
| Started | Aug 23 10:57:12 PM UTC 24 |
| Finished | Aug 23 10:57:35 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320350214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_streaming_out.2320350214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.3356137019 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 3591689528 ps |
| CPU time | 19.32 seconds |
| Started | Aug 23 10:56:54 PM UTC 24 |
| Finished | Aug 23 10:57:14 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356137019 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.3356137019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.3500955159 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 508915459 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 10:57:13 PM UTC 24 |
| Finished | Aug 23 10:57:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3500955159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.3500955159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.3755157654 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 400927344 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755157654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.3755157654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.2359924172 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 496255968 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2359924172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.2359924172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.668638478 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 383605745 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=668638478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.668638478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.3158368077 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 488795799 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3158368077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.3158368077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.1867234307 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 505320341 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867234307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.1867234307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.456134278 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 542953768 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=456134278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_t x_rx_disruption.456134278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.3559963324 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 374327120 ps |
| CPU time | 1.08 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559963324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.3559963324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.2272589683 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 629864432 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2272589683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.2272589683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.1270756512 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 203016020 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1270756512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.1270756512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.2819208007 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 566022995 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2819208007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.2819208007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.2835585671 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 505712999 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835585671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.2835585671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.2424384701 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 593455148 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:45 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2424384701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.2424384701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.3568119322 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 635460915 ps |
| CPU time | 1.73 seconds |
| Started | Aug 23 11:09:46 PM UTC 24 |
| Finished | Aug 23 11:09:50 PM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3568119322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.3568119322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.783234496 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 146477579 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=783234496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.783234496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.2587743177 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 613270797 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2587743177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.2587743177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1046035976 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 414622354 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046035976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1046035976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.1923533286 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 528747767 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1923533286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.1923533286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.3851595927 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 368796657 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851595927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.3851595927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.2742490114 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 662053808 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:50 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2742490114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.2742490114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.3460389828 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 74640488 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:57:40 PM UTC 24 |
| Finished | Aug 23 10:57:42 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3460389828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.3460389828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.2544006213 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 10786878720 ps |
| CPU time | 13.34 seconds |
| Started | Aug 23 10:57:15 PM UTC 24 |
| Finished | Aug 23 10:57:29 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544006213 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.2544006213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.2779004411 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 19187957470 ps |
| CPU time | 22.47 seconds |
| Started | Aug 23 10:57:15 PM UTC 24 |
| Finished | Aug 23 10:57:38 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779004411 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.2779004411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_resume.1508310587 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 31260806489 ps |
| CPU time | 37.4 seconds |
| Started | Aug 23 10:57:15 PM UTC 24 |
| Finished | Aug 23 10:57:53 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508310587 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_resume.1508310587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.2216806167 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 157295298 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:15 PM UTC 24 |
| Finished | Aug 23 10:57:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216806167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.2216806167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.3983379507 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 156346343 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:57:16 PM UTC 24 |
| Finished | Aug 23 10:57:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983379507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.3983379507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.2460563376 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 499918709 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 10:57:16 PM UTC 24 |
| Finished | Aug 23 10:57:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460563376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.2460563376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.1547781771 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 405253607 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 10:57:17 PM UTC 24 |
| Finished | Aug 23 10:57:19 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547781771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.1547781771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.1772362080 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 25418154805 ps |
| CPU time | 41.48 seconds |
| Started | Aug 23 10:57:17 PM UTC 24 |
| Finished | Aug 23 10:58:00 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772362080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.1772362080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.3527033196 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 849678186 ps |
| CPU time | 4.86 seconds |
| Started | Aug 23 10:57:17 PM UTC 24 |
| Finished | Aug 23 10:57:23 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527033196 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.3527033196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.3835010447 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 497694956 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 10:57:18 PM UTC 24 |
| Finished | Aug 23 10:57:21 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835010447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.3835010447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.3514680921 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 155553253 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:57:18 PM UTC 24 |
| Finished | Aug 23 10:57:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514680921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.3514680921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_enable.157248471 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 34546617 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:57:19 PM UTC 24 |
| Finished | Aug 23 10:57:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=157248471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_enable.157248471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.3603867543 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 907190109 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 10:57:20 PM UTC 24 |
| Finished | Aug 23 10:57:24 PM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603867543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.3603867543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.3759285305 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 661193123 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 10:57:21 PM UTC 24 |
| Finished | Aug 23 10:57:23 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759285305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.3759285305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.3757016356 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 271882548 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 10:57:21 PM UTC 24 |
| Finished | Aug 23 10:57:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757016356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_fifo_rst.3757016356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.278059315 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 256647150 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 10:57:22 PM UTC 24 |
| Finished | Aug 23 10:57:24 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=278059315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.278059315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.1315272798 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 141099387 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:57:24 PM UTC 24 |
| Finished | Aug 23 10:57:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315272798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.1315272798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.687447413 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 176906752 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:57:24 PM UTC 24 |
| Finished | Aug 23 10:57:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=687447413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_in_trans.687447413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.2840623124 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 5480291751 ps |
| CPU time | 35.32 seconds |
| Started | Aug 23 10:57:22 PM UTC 24 |
| Finished | Aug 23 10:57:58 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840623124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.2840623124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.1385414151 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 10219599947 ps |
| CPU time | 63.78 seconds |
| Started | Aug 23 10:57:24 PM UTC 24 |
| Finished | Aug 23 10:58:29 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385414151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.1385414151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.1882159534 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 207732947 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:57:25 PM UTC 24 |
| Finished | Aug 23 10:57:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1882159534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.1882159534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.2185759970 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 28956604659 ps |
| CPU time | 46.35 seconds |
| Started | Aug 23 10:57:25 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185759970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.2185759970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1661961650 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 11156270243 ps |
| CPU time | 14.72 seconds |
| Started | Aug 23 10:57:26 PM UTC 24 |
| Finished | Aug 23 10:57:42 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661961650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1661961650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.3356676638 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 6054689116 ps |
| CPU time | 52.05 seconds |
| Started | Aug 23 10:57:26 PM UTC 24 |
| Finished | Aug 23 10:58:20 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3356676638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.3356676638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.4225473801 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 2357243992 ps |
| CPU time | 56.4 seconds |
| Started | Aug 23 10:57:26 PM UTC 24 |
| Finished | Aug 23 10:58:24 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225473801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.4225473801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.507049639 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 237637391 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:57:28 PM UTC 24 |
| Finished | Aug 23 10:57:30 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507049639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.507049639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.455393042 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 189312587 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:57:28 PM UTC 24 |
| Finished | Aug 23 10:57:30 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=455393042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.455393042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.1530748217 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 2932031961 ps |
| CPU time | 68.84 seconds |
| Started | Aug 23 10:57:28 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1530748217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.1530748217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.1033218981 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 1738544528 ps |
| CPU time | 10.87 seconds |
| Started | Aug 23 10:57:28 PM UTC 24 |
| Finished | Aug 23 10:57:40 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033218981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.1033218981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.2308149696 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 170251625 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:57:29 PM UTC 24 |
| Finished | Aug 23 10:57:31 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308149696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.2308149696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.1696995844 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 139883055 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:57:29 PM UTC 24 |
| Finished | Aug 23 10:57:31 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696995844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.1696995844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.475779695 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 221324510 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:57:30 PM UTC 24 |
| Finished | Aug 23 10:57:32 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=475779695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_nak_trans.475779695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.3989406334 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 197225166 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:57:30 PM UTC 24 |
| Finished | Aug 23 10:57:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989406334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_out_iso.3989406334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.2940542439 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 179446810 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:57:30 PM UTC 24 |
| Finished | Aug 23 10:57:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940542439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.2940542439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.136395544 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 200217329 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:31 PM UTC 24 |
| Finished | Aug 23 10:57:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=136395544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_out_trans_nak.136395544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.2756352752 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 209731782 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:57:31 PM UTC 24 |
| Finished | Aug 23 10:57:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2756352752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.2756352752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.3196686953 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 215138386 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:57:32 PM UTC 24 |
| Finished | Aug 23 10:57:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3196686953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.3196686953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.92381601 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 145738341 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:57:34 PM UTC 24 |
| Finished | Aug 23 10:57:36 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92381601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disab le_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.92381601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.965515521 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 29168207 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:57:34 PM UTC 24 |
| Finished | Aug 23 10:57:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965515521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_phy_pins_sense.965515521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3767161513 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 24398058648 ps |
| CPU time | 57.81 seconds |
| Started | Aug 23 10:57:34 PM UTC 24 |
| Finished | Aug 23 10:58:33 PM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767161513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3767161513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.98517288 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 147820898 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:34 PM UTC 24 |
| Finished | Aug 23 10:57:36 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=98517288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_received.98517288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.838431971 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 210962045 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:35 PM UTC 24 |
| Finished | Aug 23 10:57:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838431971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_pkt_sent.838431971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.2701889614 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 199464558 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:35 PM UTC 24 |
| Finished | Aug 23 10:57:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2701889614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.2701889614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.3061908888 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 180084437 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:36 PM UTC 24 |
| Finished | Aug 23 10:57:38 PM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061908888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.3061908888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.3661816744 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 20168345229 ps |
| CPU time | 21.74 seconds |
| Started | Aug 23 10:57:36 PM UTC 24 |
| Finished | Aug 23 10:57:59 PM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661816744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 18.usbdev_resume_link_active.3661816744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.1356383965 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 150896239 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:57:36 PM UTC 24 |
| Finished | Aug 23 10:57:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356383965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.1356383965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.660250528 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 462119718 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 10:57:36 PM UTC 24 |
| Finished | Aug 23 10:57:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=660250528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_rx_full.660250528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.1717149281 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 159911715 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:57:36 PM UTC 24 |
| Finished | Aug 23 10:57:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1717149281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.1717149281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.2254799488 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 155681041 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:37 PM UTC 24 |
| Finished | Aug 23 10:57:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254799488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.2254799488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.1509085961 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 236297339 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:57:37 PM UTC 24 |
| Finished | Aug 23 10:57:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509085961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.1509085961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.762731039 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 2751150254 ps |
| CPU time | 17.99 seconds |
| Started | Aug 23 10:57:37 PM UTC 24 |
| Finished | Aug 23 10:57:57 PM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=762731039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.762731039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.1435522052 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 166022554 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:57:39 PM UTC 24 |
| Finished | Aug 23 10:57:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435522052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.1435522052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.2778573396 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 184322846 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:57:39 PM UTC 24 |
| Finished | Aug 23 10:57:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778573396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_stall_trans.2778573396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.3114920285 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 1300125310 ps |
| CPU time | 2.61 seconds |
| Started | Aug 23 10:57:39 PM UTC 24 |
| Finished | Aug 23 10:57:42 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114920285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.3114920285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.3131686010 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 3981152352 ps |
| CPU time | 26.61 seconds |
| Started | Aug 23 10:57:39 PM UTC 24 |
| Finished | Aug 23 10:58:06 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131686010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_streaming_out.3131686010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.1362593424 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 2534803431 ps |
| CPU time | 14.22 seconds |
| Started | Aug 23 10:57:18 PM UTC 24 |
| Finished | Aug 23 10:57:34 PM UTC 24 |
| Peak memory | 217928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1362593424 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.1362593424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.1501377435 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 473857420 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:57:40 PM UTC 24 |
| Finished | Aug 23 10:57:42 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1501377435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.1501377435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.2102620545 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 364828067 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2102620545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.2102620545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.2364163503 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 571459036 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:09:47 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2364163503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_ tx_rx_disruption.2364163503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.2147647803 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 250213499 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:50 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147647803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.2147647803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.1348823261 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 560284821 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1348823261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.1348823261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.1151314484 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 485026749 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1151314484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.1151314484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.4111444509 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 250140880 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111444509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.4111444509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.4104596605 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 450146605 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4104596605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.4104596605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2222894403 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 322942080 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222894403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2222894403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.3819285939 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 624975298 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3819285939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_ tx_rx_disruption.3819285939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.2665150690 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 566406329 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:48 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2665150690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.2665150690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.3595439663 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 464959615 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3595439663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.3595439663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.3081217861 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 579565562 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:52 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3081217861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_ tx_rx_disruption.3081217861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.1117056464 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 466730519 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117056464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.1117056464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.1074839657 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 671233371 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:52 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1074839657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.1074839657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.1867348273 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 273479757 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1867348273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.1867348273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.2369273533 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 586201586 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:09:49 PM UTC 24 |
| Finished | Aug 23 11:09:52 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2369273533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.2369273533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.3624182130 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 404139246 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3624182130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_ tx_rx_disruption.3624182130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.574666412 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 41636269 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:58:06 PM UTC 24 |
| Finished | Aug 23 10:58:08 PM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=574666412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.574666412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.468041153 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 11361340003 ps |
| CPU time | 14.13 seconds |
| Started | Aug 23 10:57:40 PM UTC 24 |
| Finished | Aug 23 10:57:55 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=468041153 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.468041153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.2388613798 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 19167735946 ps |
| CPU time | 26.61 seconds |
| Started | Aug 23 10:57:41 PM UTC 24 |
| Finished | Aug 23 10:58:09 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388613798 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.2388613798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.1953308178 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 29923387542 ps |
| CPU time | 40.67 seconds |
| Started | Aug 23 10:57:41 PM UTC 24 |
| Finished | Aug 23 10:58:23 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1953308178 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.1953308178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.948612715 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 226872663 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:57:41 PM UTC 24 |
| Finished | Aug 23 10:57:43 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=948612715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_av_buffer.948612715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.1410993561 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 201842891 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:57:41 PM UTC 24 |
| Finished | Aug 23 10:57:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410993561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_bitstuff_err.1410993561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.2529008358 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 226541284 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:57:41 PM UTC 24 |
| Finished | Aug 23 10:57:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529008358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.2529008358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.1245004127 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 860353045 ps |
| CPU time | 2.38 seconds |
| Started | Aug 23 10:57:42 PM UTC 24 |
| Finished | Aug 23 10:57:46 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245004127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.1245004127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.3734980632 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 40801718750 ps |
| CPU time | 67.18 seconds |
| Started | Aug 23 10:57:42 PM UTC 24 |
| Finished | Aug 23 10:58:51 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3734980632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_address.3734980632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.3725149897 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 3884578200 ps |
| CPU time | 27.54 seconds |
| Started | Aug 23 10:57:42 PM UTC 24 |
| Finished | Aug 23 10:58:11 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725149897 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.3725149897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.215282796 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 725486947 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:57:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=215282796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_disable_endpoint.215282796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.1047846904 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 160937734 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:57:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047846904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.1047846904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3317594019 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 37016101 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:57:46 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317594019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3317594019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.3609544804 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 853703269 ps |
| CPU time | 2.21 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:57:47 PM UTC 24 |
| Peak memory | 217724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3609544804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.3609544804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.3151381546 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 328842771 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:57:46 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151381546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.3151381546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.49442482 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 174374557 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 10:57:46 PM UTC 24 |
| Finished | Aug 23 10:57:49 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=49442482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_fifo_rst.49442482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.2034419722 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 212218275 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:57:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034419722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.2034419722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.744946922 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 143915076 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:57:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744946922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_in_stall.744946922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.3066847844 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 188739982 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:57:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066847844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.3066847844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.2527156323 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 2649105431 ps |
| CPU time | 16.73 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527156323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.2527156323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.1391848945 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 7406638722 ps |
| CPU time | 45.9 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:58:35 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391848945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.1391848945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.1452709547 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 205565104 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:57:47 PM UTC 24 |
| Finished | Aug 23 10:57:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452709547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_in_err.1452709547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.506910868 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 29020672189 ps |
| CPU time | 43.18 seconds |
| Started | Aug 23 10:57:48 PM UTC 24 |
| Finished | Aug 23 10:58:33 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506910868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_resume.506910868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.642982903 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 10528602682 ps |
| CPU time | 14.35 seconds |
| Started | Aug 23 10:57:50 PM UTC 24 |
| Finished | Aug 23 10:58:06 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=642982903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_suspend.642982903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.2429210271 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 3921083074 ps |
| CPU time | 25.94 seconds |
| Started | Aug 23 10:57:50 PM UTC 24 |
| Finished | Aug 23 10:58:18 PM UTC 24 |
| Peak memory | 230496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429210271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.2429210271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.847441269 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 2144487442 ps |
| CPU time | 17.08 seconds |
| Started | Aug 23 10:57:50 PM UTC 24 |
| Finished | Aug 23 10:58:09 PM UTC 24 |
| Peak memory | 227836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=847441269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.847441269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.1888150346 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 243272385 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:57:50 PM UTC 24 |
| Finished | Aug 23 10:57:52 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1888150346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1888150346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.3590415114 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 212104806 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:57:50 PM UTC 24 |
| Finished | Aug 23 10:57:52 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3590415114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.3590415114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.3538062420 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 3297497256 ps |
| CPU time | 22.7 seconds |
| Started | Aug 23 10:57:52 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3538062420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.3538062420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.2207708601 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 2645905069 ps |
| CPU time | 17.4 seconds |
| Started | Aug 23 10:57:53 PM UTC 24 |
| Finished | Aug 23 10:58:12 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2207708601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.2207708601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.3570524408 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 149726928 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:57:53 PM UTC 24 |
| Finished | Aug 23 10:57:55 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570524408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3570524408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.2849470381 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 146209445 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:57:54 PM UTC 24 |
| Finished | Aug 23 10:57:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2849470381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.2849470381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.2107802345 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 214801060 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:57:54 PM UTC 24 |
| Finished | Aug 23 10:57:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107802345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.2107802345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.267312328 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 185659512 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:57:56 PM UTC 24 |
| Finished | Aug 23 10:57:58 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=267312328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_out_iso.267312328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.3268323885 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 187970819 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:57:56 PM UTC 24 |
| Finished | Aug 23 10:57:58 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268323885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.3268323885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.1221083417 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 216906802 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:57:56 PM UTC 24 |
| Finished | Aug 23 10:57:58 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221083417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.1221083417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.3300224028 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 168910566 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:57:57 PM UTC 24 |
| Finished | Aug 23 10:57:59 PM UTC 24 |
| Peak memory | 215808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300224028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.3300224028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.2734626406 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 255921150 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:57:58 PM UTC 24 |
| Finished | Aug 23 10:58:00 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734626406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.2734626406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.3481133195 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 164075491 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481133195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.3481133195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.2657593081 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 39016703 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657593081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.2657593081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.3019840081 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 15190025958 ps |
| CPU time | 38.45 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:40 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019840081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.3019840081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.3291695678 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 151724507 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291695678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.3291695678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.1241433608 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 242178666 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241433608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.1241433608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.959458575 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 233258449 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=959458575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_random_length_in_transaction.959458575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.1052686465 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 147275947 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1052686465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.1052686465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.954769787 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 20165434597 ps |
| CPU time | 26.03 seconds |
| Started | Aug 23 10:58:00 PM UTC 24 |
| Finished | Aug 23 10:58:28 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=954769787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_resume_link_active.954769787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.3267809014 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 161142226 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:01 PM UTC 24 |
| Finished | Aug 23 10:58:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267809014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.3267809014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.2251046391 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 366621338 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2251046391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.2251046391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.2652830461 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 185655157 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652830461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_setup_stage.2652830461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.3751984778 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 163315757 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751984778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.3751984778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.92164672 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 202423152 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92164672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 19.usbdev_smoke.92164672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.151961434 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 2684427796 ps |
| CPU time | 63.99 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:59:09 PM UTC 24 |
| Peak memory | 230756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=151961434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.151961434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.3014432620 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 173466308 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:58:03 PM UTC 24 |
| Finished | Aug 23 10:58:05 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014432620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.3014432620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.529082187 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 208204269 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:58:04 PM UTC 24 |
| Finished | Aug 23 10:58:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=529082187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_stall_trans.529082187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.3050895984 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 610446929 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 10:58:05 PM UTC 24 |
| Finished | Aug 23 10:58:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3050895984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.3050895984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.3876806072 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 2709522944 ps |
| CPU time | 61.49 seconds |
| Started | Aug 23 10:58:05 PM UTC 24 |
| Finished | Aug 23 10:59:08 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3876806072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.3876806072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.446129463 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 3823117699 ps |
| CPU time | 28.22 seconds |
| Started | Aug 23 10:57:44 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=446129463 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.446129463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.2256918957 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 610039538 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 10:58:06 PM UTC 24 |
| Finished | Aug 23 10:58:09 PM UTC 24 |
| Peak memory | 215352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2256918957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.2256918957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.1528072193 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 602419688 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528072193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.1528072193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.3098574807 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 495573287 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3098574807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_ tx_rx_disruption.3098574807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.18997457 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 345056701 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18997457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.18997457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.1512741988 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 598913552 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 215340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1512741988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.1512741988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.4259409677 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 440130890 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259409677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.4259409677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2989414769 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 402182961 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2989414769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2989414769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.3271184300 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 451384538 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3271184300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.3271184300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.2495298735 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 589364872 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2495298735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.2495298735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.3820664728 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 570512093 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3820664728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_ tx_rx_disruption.3820664728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.4077856438 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 248434851 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:09:50 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4077856438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.4077856438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.3903512628 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 422521872 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3903512628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.3903512628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.2062999777 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 356518081 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062999777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.2062999777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.3708485156 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 512528382 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3708485156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.3708485156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.1428934320 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 717749776 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428934320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.1428934320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.3306079798 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 538246348 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3306079798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.3306079798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.2903404146 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 257472734 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:54 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903404146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.2903404146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3182434954 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 503993166 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3182434954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3182434954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.4096504239 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 772560669 ps |
| CPU time | 1.81 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096504239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.4096504239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.1121262249 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 484444205 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1121262249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.1121262249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.246844110 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 45063629 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:49:14 PM UTC 24 |
| Finished | Aug 23 10:49:16 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=246844110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.246844110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.524000398 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 6060177255 ps |
| CPU time | 8.22 seconds |
| Started | Aug 23 10:48:03 PM UTC 24 |
| Finished | Aug 23 10:48:12 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=524000398 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.524000398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3306613846 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 15162489305 ps |
| CPU time | 18.69 seconds |
| Started | Aug 23 10:48:03 PM UTC 24 |
| Finished | Aug 23 10:48:22 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306613846 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.3306613846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2899465909 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 24109292450 ps |
| CPU time | 28.22 seconds |
| Started | Aug 23 10:48:04 PM UTC 24 |
| Finished | Aug 23 10:48:33 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899465909 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.2899465909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.3395489849 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 203382615 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:48:05 PM UTC 24 |
| Finished | Aug 23 10:48:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3395489849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.3395489849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2278460912 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 163226989 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:48:07 PM UTC 24 |
| Finished | Aug 23 10:48:09 PM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278460912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.2278460912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1577240106 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 169053691 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:48:07 PM UTC 24 |
| Finished | Aug 23 10:48:10 PM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577240106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.1577240106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2454832091 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 168387467 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:48:08 PM UTC 24 |
| Finished | Aug 23 10:48:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2454832091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.2454832091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1762439987 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 264105740 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:48:09 PM UTC 24 |
| Finished | Aug 23 10:48:11 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762439987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.1762439987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.2924112541 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 1071808104 ps |
| CPU time | 2.67 seconds |
| Started | Aug 23 10:48:10 PM UTC 24 |
| Finished | Aug 23 10:48:14 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924112541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.2924112541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.419044601 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 41398209835 ps |
| CPU time | 69.45 seconds |
| Started | Aug 23 10:48:10 PM UTC 24 |
| Finished | Aug 23 10:49:21 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419044601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_device_address.419044601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1954309185 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 2019462925 ps |
| CPU time | 14.74 seconds |
| Started | Aug 23 10:48:10 PM UTC 24 |
| Finished | Aug 23 10:48:26 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1954309185 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1954309185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.4006063500 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 620554976 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 10:48:12 PM UTC 24 |
| Finished | Aug 23 10:48:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006063500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_disable_endpoint.4006063500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.3244327240 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 146116947 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:48:12 PM UTC 24 |
| Finished | Aug 23 10:48:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3244327240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.3244327240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_enable.1531357201 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 27463668 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:48:14 PM UTC 24 |
| Finished | Aug 23 10:48:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1531357201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_enable.1531357201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.3723632824 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 1025688946 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 10:48:15 PM UTC 24 |
| Finished | Aug 23 10:48:19 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3723632824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.3723632824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1210457809 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 423622855 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 10:48:15 PM UTC 24 |
| Finished | Aug 23 10:48:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210457809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.1210457809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.1856501332 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 404420059 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 10:48:16 PM UTC 24 |
| Finished | Aug 23 10:48:19 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856501332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.1856501332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.1945337760 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 101180094940 ps |
| CPU time | 167.28 seconds |
| Started | Aug 23 10:48:16 PM UTC 24 |
| Finished | Aug 23 10:51:06 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945337760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.1945337760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.247374166 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 97259715236 ps |
| CPU time | 159.76 seconds |
| Started | Aug 23 10:48:17 PM UTC 24 |
| Finished | Aug 23 10:50:59 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=247374166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_hiclk_max.247374166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.470436078 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 117161222003 ps |
| CPU time | 188.94 seconds |
| Started | Aug 23 10:48:18 PM UTC 24 |
| Finished | Aug 23 10:51:30 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=470436078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_loclk_max.470436078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.1696369489 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 89165973230 ps |
| CPU time | 143.9 seconds |
| Started | Aug 23 10:48:19 PM UTC 24 |
| Finished | Aug 23 10:50:46 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696369489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.1696369489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3469220232 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 240344747 ps |
| CPU time | 1 seconds |
| Started | Aug 23 10:48:20 PM UTC 24 |
| Finished | Aug 23 10:48:22 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469220232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3469220232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.1232933172 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 145699896 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:48:23 PM UTC 24 |
| Finished | Aug 23 10:48:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232933172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.1232933172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.2332462863 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 195680321 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:48:23 PM UTC 24 |
| Finished | Aug 23 10:48:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332462863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.2332462863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1698755651 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 3682872631 ps |
| CPU time | 32.21 seconds |
| Started | Aug 23 10:48:20 PM UTC 24 |
| Finished | Aug 23 10:48:54 PM UTC 24 |
| Peak memory | 235372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1698755651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.1698755651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.242709524 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 12779651805 ps |
| CPU time | 131.02 seconds |
| Started | Aug 23 10:48:26 PM UTC 24 |
| Finished | Aug 23 10:50:39 PM UTC 24 |
| Peak memory | 217924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=242709524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.242709524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.1343971712 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 206503733 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:48:26 PM UTC 24 |
| Finished | Aug 23 10:48:28 PM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343971712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_in_err.1343971712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.59276510 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 28770933564 ps |
| CPU time | 38.07 seconds |
| Started | Aug 23 10:48:26 PM UTC 24 |
| Finished | Aug 23 10:49:05 PM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=59276510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_link_resume.59276510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.230935016 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 9329308782 ps |
| CPU time | 11.23 seconds |
| Started | Aug 23 10:48:27 PM UTC 24 |
| Finished | Aug 23 10:48:39 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=230935016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_suspend.230935016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.2277381819 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 3052822657 ps |
| CPU time | 72.95 seconds |
| Started | Aug 23 10:48:29 PM UTC 24 |
| Finished | Aug 23 10:49:43 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277381819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.2277381819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2386606611 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 269103189 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:48:34 PM UTC 24 |
| Finished | Aug 23 10:48:36 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386606611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.2386606611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.4109353471 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 205219342 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:48:37 PM UTC 24 |
| Finished | Aug 23 10:48:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109353471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.4109353471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.1571261425 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 3513131989 ps |
| CPU time | 30.14 seconds |
| Started | Aug 23 10:48:40 PM UTC 24 |
| Finished | Aug 23 10:49:11 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571261425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.1571261425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.4036702943 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 3129397076 ps |
| CPU time | 28.7 seconds |
| Started | Aug 23 10:48:40 PM UTC 24 |
| Finished | Aug 23 10:49:10 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4036702943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.4036702943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.3846238418 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 3211475530 ps |
| CPU time | 77.75 seconds |
| Started | Aug 23 10:48:41 PM UTC 24 |
| Finished | Aug 23 10:50:01 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846238418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.3846238418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.43298225 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 146970885 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:48:45 PM UTC 24 |
| Finished | Aug 23 10:48:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43298225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.43298225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.2148508540 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 146160585 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:48:47 PM UTC 24 |
| Finished | Aug 23 10:48:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2148508540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.2148508540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.4285083739 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 242554293 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:48:47 PM UTC 24 |
| Finished | Aug 23 10:48:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285083739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.4285083739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.941812725 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 177804525 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:48:49 PM UTC 24 |
| Finished | Aug 23 10:48:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941812725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_out_iso.941812725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.65339010 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 185212190 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:48:50 PM UTC 24 |
| Finished | Aug 23 10:48:52 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=65339010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_stall.65339010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.1781495907 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 171481203 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:48:50 PM UTC 24 |
| Finished | Aug 23 10:48:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781495907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.1781495907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.3911030911 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 148005083 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:48:51 PM UTC 24 |
| Finished | Aug 23 10:48:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911030911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.3911030911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1898395652 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 194251941 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:48:52 PM UTC 24 |
| Finished | Aug 23 10:48:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898395652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.1898395652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.44741861 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 237138408 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:48:53 PM UTC 24 |
| Finished | Aug 23 10:48:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=44741861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_type _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.44741861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1942550372 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 146386088 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:48:53 PM UTC 24 |
| Finished | Aug 23 10:48:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942550372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.1942550372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2935137270 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 7690211181 ps |
| CPU time | 18.92 seconds |
| Started | Aug 23 10:48:54 PM UTC 24 |
| Finished | Aug 23 10:49:14 PM UTC 24 |
| Peak memory | 228432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935137270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.2935137270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.3049152204 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 195551538 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:48:54 PM UTC 24 |
| Finished | Aug 23 10:48:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049152204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.3049152204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3259288070 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 159781162 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:48:55 PM UTC 24 |
| Finished | Aug 23 10:48:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259288070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3259288070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.126865950 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 2107950074 ps |
| CPU time | 11.88 seconds |
| Started | Aug 23 10:48:57 PM UTC 24 |
| Finished | Aug 23 10:49:10 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=126865950 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.126865950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.2023922075 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 6757767066 ps |
| CPU time | 50.33 seconds |
| Started | Aug 23 10:48:58 PM UTC 24 |
| Finished | Aug 23 10:49:49 PM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023922075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.2023922075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.2582100775 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 13485678669 ps |
| CPU time | 87.03 seconds |
| Started | Aug 23 10:48:58 PM UTC 24 |
| Finished | Aug 23 10:50:27 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582100775 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.2582100775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3779203700 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 150195026 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:48:55 PM UTC 24 |
| Finished | Aug 23 10:48:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3779203700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.3779203700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.1023281270 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 188508150 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:48:57 PM UTC 24 |
| Finished | Aug 23 10:48:58 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1023281270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.1023281270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2320739947 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 20149215583 ps |
| CPU time | 24.41 seconds |
| Started | Aug 23 10:48:58 PM UTC 24 |
| Finished | Aug 23 10:49:23 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320739947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.2320739947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.3618416956 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 207565264 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:48:59 PM UTC 24 |
| Finished | Aug 23 10:49:01 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618416956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.3618416956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.238455018 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 259722945 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 10:49:02 PM UTC 24 |
| Finished | Aug 23 10:49:04 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=238455018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 2.usbdev_rx_full.238455018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.54940985 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 221494610 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:49:02 PM UTC 24 |
| Finished | Aug 23 10:49:04 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54940985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_rx_pid_err.54940985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.2505590441 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 694601310 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 10:49:13 PM UTC 24 |
| Finished | Aug 23 10:49:16 PM UTC 24 |
| Peak memory | 250720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505590441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.2505590441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2070370233 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 459699365 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 10:49:05 PM UTC 24 |
| Finished | Aug 23 10:49:08 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070370233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2070370233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.4178687133 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 207529598 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:49:05 PM UTC 24 |
| Finished | Aug 23 10:49:07 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178687133 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.4178687133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1863462937 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 167037112 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:49:06 PM UTC 24 |
| Finished | Aug 23 10:49:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863462937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.1863462937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1978015227 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 194092864 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:49:07 PM UTC 24 |
| Finished | Aug 23 10:49:09 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1978015227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1978015227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.1988357553 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 234285400 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:49:08 PM UTC 24 |
| Finished | Aug 23 10:49:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988357553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.1988357553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.4063537510 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 3221137777 ps |
| CPU time | 21.77 seconds |
| Started | Aug 23 10:49:08 PM UTC 24 |
| Finished | Aug 23 10:49:32 PM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063537510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.4063537510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.112466812 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 158336160 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:49:09 PM UTC 24 |
| Finished | Aug 23 10:49:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=112466812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.112466812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.984763387 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 146800363 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:49:11 PM UTC 24 |
| Finished | Aug 23 10:49:12 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=984763387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_stall_trans.984763387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.2179877103 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 1396690099 ps |
| CPU time | 2.97 seconds |
| Started | Aug 23 10:49:11 PM UTC 24 |
| Finished | Aug 23 10:49:15 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179877103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stream_len_max.2179877103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.2415502288 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 2812951445 ps |
| CPU time | 18.71 seconds |
| Started | Aug 23 10:49:11 PM UTC 24 |
| Finished | Aug 23 10:49:31 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415502288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.2415502288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.620201405 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 6533415578 ps |
| CPU time | 23.69 seconds |
| Started | Aug 23 10:49:12 PM UTC 24 |
| Finished | Aug 23 10:49:37 PM UTC 24 |
| Peak memory | 232652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=620201405 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_2 2/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.620201405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3603712494 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 464910044 ps |
| CPU time | 6.93 seconds |
| Started | Aug 23 10:48:11 PM UTC 24 |
| Finished | Aug 23 10:48:19 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603712494 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.3603712494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3553345330 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 588563037 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 10:49:12 PM UTC 24 |
| Finished | Aug 23 10:49:15 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3553345330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.3553345330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.254850769 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 36396800 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:58:28 PM UTC 24 |
| Finished | Aug 23 10:58:29 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=254850769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.254850769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.2375366505 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 11875391760 ps |
| CPU time | 13.95 seconds |
| Started | Aug 23 10:58:06 PM UTC 24 |
| Finished | Aug 23 10:58:22 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2375366505 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.2375366505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.1467849080 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 18902279097 ps |
| CPU time | 23.57 seconds |
| Started | Aug 23 10:58:06 PM UTC 24 |
| Finished | Aug 23 10:58:32 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467849080 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.1467849080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.3929004506 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 29341822299 ps |
| CPU time | 36.44 seconds |
| Started | Aug 23 10:58:06 PM UTC 24 |
| Finished | Aug 23 10:58:45 PM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3929004506 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.3929004506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.3490169877 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 150397980 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:08 PM UTC 24 |
| Finished | Aug 23 10:58:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490169877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.3490169877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.4034339349 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 152384745 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:08 PM UTC 24 |
| Finished | Aug 23 10:58:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4034339349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.4034339349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.3335382225 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 297101206 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 10:58:09 PM UTC 24 |
| Finished | Aug 23 10:58:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3335382225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 20.usbdev_data_toggle_clear.3335382225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.2818545534 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 980254926 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 10:58:09 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818545534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.2818545534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.932295493 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 24659519118 ps |
| CPU time | 37.71 seconds |
| Started | Aug 23 10:58:09 PM UTC 24 |
| Finished | Aug 23 10:58:49 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932295493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_device_address.932295493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1481000771 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 4746101821 ps |
| CPU time | 35.38 seconds |
| Started | Aug 23 10:58:09 PM UTC 24 |
| Finished | Aug 23 10:58:47 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1481000771 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1481000771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.2249704486 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 492495952 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 10:58:10 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2249704486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_disable_endpoint.2249704486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.987084020 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 131357357 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:58:12 PM UTC 24 |
| Finished | Aug 23 10:58:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=987084020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_disconnected.987084020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_enable.1635805609 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 50421757 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:58:12 PM UTC 24 |
| Finished | Aug 23 10:58:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1635805609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.1635805609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.3688709666 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 797452455 ps |
| CPU time | 1.98 seconds |
| Started | Aug 23 10:58:13 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688709666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.3688709666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.1955187513 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 556052976 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 10:58:13 PM UTC 24 |
| Finished | Aug 23 10:58:15 PM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955187513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.1955187513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.2239110528 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 232151959 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 10:58:13 PM UTC 24 |
| Finished | Aug 23 10:58:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2239110528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.2239110528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.4230845309 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 278568252 ps |
| CPU time | 1 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 226212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230845309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.4230845309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.2947634373 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 152286298 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947634373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_stall.2947634373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.2969438695 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 271233883 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2969438695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.2969438695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.3880306880 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 3524678285 ps |
| CPU time | 82.8 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:59:39 PM UTC 24 |
| Peak memory | 230748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880306880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.3880306880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.1187250707 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 10398487385 ps |
| CPU time | 103.27 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 11:00:00 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1187250707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.1187250707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.285199607 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 197537657 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:58:16 PM UTC 24 |
| Peak memory | 215936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285199607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_link_in_err.285199607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.2010078530 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 34097157603 ps |
| CPU time | 52.31 seconds |
| Started | Aug 23 10:58:14 PM UTC 24 |
| Finished | Aug 23 10:59:08 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010078530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_resume.2010078530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1113925686 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 4628237770 ps |
| CPU time | 6.53 seconds |
| Started | Aug 23 10:58:16 PM UTC 24 |
| Finished | Aug 23 10:58:24 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113925686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1113925686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.3383214295 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 3222696339 ps |
| CPU time | 27.49 seconds |
| Started | Aug 23 10:58:16 PM UTC 24 |
| Finished | Aug 23 10:58:45 PM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3383214295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.3383214295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.184675720 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 3921154106 ps |
| CPU time | 94.11 seconds |
| Started | Aug 23 10:58:17 PM UTC 24 |
| Finished | Aug 23 10:59:53 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184675720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.184675720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.3527017916 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 257312006 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 10:58:17 PM UTC 24 |
| Finished | Aug 23 10:58:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527017916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.3527017916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.3911675067 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 187626254 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:58:18 PM UTC 24 |
| Finished | Aug 23 10:58:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911675067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.3911675067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.1516634587 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 3028416624 ps |
| CPU time | 19.25 seconds |
| Started | Aug 23 10:58:18 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1516634587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.1516634587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.2585784652 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 2280027832 ps |
| CPU time | 54.81 seconds |
| Started | Aug 23 10:58:18 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585784652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.2585784652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.1749478423 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 213790349 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:18 PM UTC 24 |
| Finished | Aug 23 10:58:20 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749478423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.1749478423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.1726041309 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 160463287 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:58:19 PM UTC 24 |
| Finished | Aug 23 10:58:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726041309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.1726041309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.3868206537 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 247857461 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:58:20 PM UTC 24 |
| Finished | Aug 23 10:58:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3868206537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.3868206537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.3113170671 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 180892340 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:20 PM UTC 24 |
| Finished | Aug 23 10:58:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113170671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.3113170671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.2171157965 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 167911123 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:58:20 PM UTC 24 |
| Finished | Aug 23 10:58:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2171157965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.2171157965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.1398063357 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 169652333 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:21 PM UTC 24 |
| Finished | Aug 23 10:58:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398063357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.1398063357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.242731256 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 151788678 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:58:21 PM UTC 24 |
| Finished | Aug 23 10:58:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=242731256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_pending_in_trans.242731256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.2180052579 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 209129355 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:58:22 PM UTC 24 |
| Finished | Aug 23 10:58:24 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180052579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.2180052579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2004032758 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 181633833 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:23 PM UTC 24 |
| Finished | Aug 23 10:58:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004032758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2004032758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.1336898279 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 81193327 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 10:58:23 PM UTC 24 |
| Finished | Aug 23 10:58:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1336898279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_pins_sense.1336898279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.2726876157 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 20541858602 ps |
| CPU time | 45.81 seconds |
| Started | Aug 23 10:58:23 PM UTC 24 |
| Finished | Aug 23 10:59:10 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726876157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.2726876157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.3891955156 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 191273696 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:58:24 PM UTC 24 |
| Finished | Aug 23 10:58:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3891955156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.3891955156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.1925159920 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 211728152 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:58:24 PM UTC 24 |
| Finished | Aug 23 10:58:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1925159920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.1925159920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.3713882307 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 190891001 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:24 PM UTC 24 |
| Finished | Aug 23 10:58:26 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713882307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.3713882307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.2278658455 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 171865338 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:25 PM UTC 24 |
| Finished | Aug 23 10:58:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278658455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.2278658455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.4285228911 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 144833756 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:25 PM UTC 24 |
| Finished | Aug 23 10:58:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285228911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.4285228911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.2219617567 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 336952206 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 10:58:25 PM UTC 24 |
| Finished | Aug 23 10:58:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219617567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.2219617567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2465925694 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 155148907 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:58:25 PM UTC 24 |
| Finished | Aug 23 10:58:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465925694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.2465925694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2079688885 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 157320975 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:25 PM UTC 24 |
| Finished | Aug 23 10:58:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2079688885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2079688885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.3223322561 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 272325950 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 10:58:26 PM UTC 24 |
| Finished | Aug 23 10:58:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3223322561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.3223322561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.2351855150 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 2022101891 ps |
| CPU time | 16.97 seconds |
| Started | Aug 23 10:58:26 PM UTC 24 |
| Finished | Aug 23 10:58:44 PM UTC 24 |
| Peak memory | 235124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351855150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.2351855150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.2933538586 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 150324813 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:26 PM UTC 24 |
| Finished | Aug 23 10:58:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933538586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2933538586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.559223288 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 187190118 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:58:26 PM UTC 24 |
| Finished | Aug 23 10:58:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559223288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_stall_trans.559223288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.2360681929 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 1203138221 ps |
| CPU time | 2.64 seconds |
| Started | Aug 23 10:58:28 PM UTC 24 |
| Finished | Aug 23 10:58:31 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360681929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.2360681929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.3427115842 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 2185524170 ps |
| CPU time | 50.96 seconds |
| Started | Aug 23 10:58:28 PM UTC 24 |
| Finished | Aug 23 10:59:20 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427115842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_streaming_out.3427115842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.3764503538 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 724195417 ps |
| CPU time | 13.11 seconds |
| Started | Aug 23 10:58:10 PM UTC 24 |
| Finished | Aug 23 10:58:25 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764503538 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.3764503538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.1067877015 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 693725117 ps |
| CPU time | 1.77 seconds |
| Started | Aug 23 10:58:28 PM UTC 24 |
| Finished | Aug 23 10:58:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1067877015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_t x_rx_disruption.1067877015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.4182319520 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 522391876 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4182319520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_ tx_rx_disruption.4182319520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.458756267 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 475573987 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=458756267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_t x_rx_disruption.458756267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.4289965247 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 644213736 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4289965247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.4289965247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.3979511760 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 656447775 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215736 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3979511760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.3979511760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.2345903761 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 519924076 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2345903761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.2345903761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.3631448164 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 504979872 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:52 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3631448164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.3631448164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3675618006 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 488821875 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:53 PM UTC 24 |
| Finished | Aug 23 11:09:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3675618006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3675618006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.1038789218 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 445044346 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1038789218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_ tx_rx_disruption.1038789218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1036358169 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 597831664 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1036358169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1036358169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.1891138282 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 495740066 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1891138282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.1891138282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.2722064536 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 46824443 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:58:50 PM UTC 24 |
| Finished | Aug 23 10:58:52 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2722064536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.2722064536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.2599725518 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 9445048655 ps |
| CPU time | 12.76 seconds |
| Started | Aug 23 10:58:29 PM UTC 24 |
| Finished | Aug 23 10:58:43 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599725518 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.2599725518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1774556650 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 21492515007 ps |
| CPU time | 27.33 seconds |
| Started | Aug 23 10:58:29 PM UTC 24 |
| Finished | Aug 23 10:58:57 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774556650 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1774556650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.117951417 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 28797444698 ps |
| CPU time | 31.89 seconds |
| Started | Aug 23 10:58:29 PM UTC 24 |
| Finished | Aug 23 10:59:02 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117951417 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.117951417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.3198099699 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 159094172 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:29 PM UTC 24 |
| Finished | Aug 23 10:58:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198099699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_av_buffer.3198099699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.965037700 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 144547404 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:30 PM UTC 24 |
| Finished | Aug 23 10:58:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=965037700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_bitstuff_err.965037700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.711848622 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 402565985 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 10:58:30 PM UTC 24 |
| Finished | Aug 23 10:58:33 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711848622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_data_toggle_clear.711848622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.3198358663 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 648712147 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 10:58:30 PM UTC 24 |
| Finished | Aug 23 10:58:33 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198358663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.3198358663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.4249925424 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 29427117309 ps |
| CPU time | 42.89 seconds |
| Started | Aug 23 10:58:31 PM UTC 24 |
| Finished | Aug 23 10:59:16 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249925424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.4249925424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.4202559871 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 1253925558 ps |
| CPU time | 24.42 seconds |
| Started | Aug 23 10:58:31 PM UTC 24 |
| Finished | Aug 23 10:58:57 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202559871 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.4202559871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.3955869885 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 845661891 ps |
| CPU time | 2.08 seconds |
| Started | Aug 23 10:58:32 PM UTC 24 |
| Finished | Aug 23 10:58:36 PM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955869885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.3955869885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.4235902780 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 152492772 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:32 PM UTC 24 |
| Finished | Aug 23 10:58:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4235902780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.4235902780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_enable.1033772953 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 48832053 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 10:58:34 PM UTC 24 |
| Finished | Aug 23 10:58:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033772953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.1033772953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.3575954216 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 1027890549 ps |
| CPU time | 2.55 seconds |
| Started | Aug 23 10:58:34 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3575954216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.3575954216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.346994505 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 148512759 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:34 PM UTC 24 |
| Finished | Aug 23 10:58:36 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346994505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.346994505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.2020227154 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 347933063 ps |
| CPU time | 2.32 seconds |
| Started | Aug 23 10:58:34 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2020227154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_fifo_rst.2020227154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.2938080169 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 240684936 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 10:58:35 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938080169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.2938080169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.243293286 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 184140456 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:36 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243293286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_stall.243293286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.1162172855 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 203261523 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:58:36 PM UTC 24 |
| Finished | Aug 23 10:58:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162172855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.1162172855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.2688070021 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 3572673141 ps |
| CPU time | 85.41 seconds |
| Started | Aug 23 10:58:35 PM UTC 24 |
| Finished | Aug 23 11:00:03 PM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688070021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.2688070021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.2478717115 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 3741050793 ps |
| CPU time | 22.21 seconds |
| Started | Aug 23 10:58:36 PM UTC 24 |
| Finished | Aug 23 10:59:00 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478717115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.2478717115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.830523225 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 170974290 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 10:58:40 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=830523225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_link_in_err.830523225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.1211512690 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 12320374845 ps |
| CPU time | 17.72 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 10:58:58 PM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211512690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.1211512690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.3076772681 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 4841045349 ps |
| CPU time | 6.28 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 10:58:46 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076772681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_link_suspend.3076772681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.1124856339 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 3876009463 ps |
| CPU time | 91.22 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 11:00:12 PM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1124856339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.1124856339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.1585508186 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 2285699470 ps |
| CPU time | 14.73 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 10:58:55 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585508186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.1585508186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.279414940 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 275859327 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:58:39 PM UTC 24 |
| Finished | Aug 23 10:58:41 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=279414940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.279414940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.1589741643 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 202675117 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:58:40 PM UTC 24 |
| Finished | Aug 23 10:58:42 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589741643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.1589741643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.3043652856 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 2591482638 ps |
| CPU time | 57.69 seconds |
| Started | Aug 23 10:58:40 PM UTC 24 |
| Finished | Aug 23 10:59:39 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3043652856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.3043652856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.603063659 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 1944663926 ps |
| CPU time | 13.18 seconds |
| Started | Aug 23 10:58:41 PM UTC 24 |
| Finished | Aug 23 10:58:56 PM UTC 24 |
| Peak memory | 228140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=603063659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.603063659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.3577189333 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 148755314 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:41 PM UTC 24 |
| Finished | Aug 23 10:58:43 PM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3577189333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.3577189333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.92937365 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 145876061 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:41 PM UTC 24 |
| Finished | Aug 23 10:58:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92937365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.92937365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.1897021071 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 234360307 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:58:41 PM UTC 24 |
| Finished | Aug 23 10:58:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897021071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.1897021071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.1390782929 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 151169070 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:58:42 PM UTC 24 |
| Finished | Aug 23 10:58:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390782929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.1390782929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.3753576582 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 172664813 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:44 PM UTC 24 |
| Finished | Aug 23 10:58:45 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753576582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.3753576582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.1620950809 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 201400037 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:58:44 PM UTC 24 |
| Finished | Aug 23 10:58:46 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620950809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_out_trans_nak.1620950809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.2036158082 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 198118593 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:44 PM UTC 24 |
| Finished | Aug 23 10:58:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2036158082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.2036158082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.2110649717 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 211927357 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:58:44 PM UTC 24 |
| Finished | Aug 23 10:58:46 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2110649717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.2110649717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.401436416 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 149000640 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:58:45 PM UTC 24 |
| Finished | Aug 23 10:58:47 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=401436416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.401436416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.3604966269 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 55464111 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:58:45 PM UTC 24 |
| Finished | Aug 23 10:58:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604966269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.3604966269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.2046695897 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 10032010451 ps |
| CPU time | 24.99 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:59:12 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2046695897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.2046695897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.1498557219 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 205685670 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:58:48 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498557219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_pkt_received.1498557219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.576135862 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 235494592 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:58:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576135862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_pkt_sent.576135862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.1846994316 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 237724437 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:58:48 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846994316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 21.usbdev_random_length_in_transaction.1846994316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.531978335 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 163120421 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:58:48 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=531978335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.531978335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.3158456871 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 161860826 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:58:46 PM UTC 24 |
| Finished | Aug 23 10:58:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3158456871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.3158456871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.148909958 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 332638284 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 10:58:47 PM UTC 24 |
| Finished | Aug 23 10:58:50 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=148909958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_rx_full.148909958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.2006264114 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 208928642 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:58:47 PM UTC 24 |
| Finished | Aug 23 10:58:49 PM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2006264114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_setup_stage.2006264114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3737382518 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 161034317 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:58:47 PM UTC 24 |
| Finished | Aug 23 10:58:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737382518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3737382518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.2294401228 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 181174735 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:58:47 PM UTC 24 |
| Finished | Aug 23 10:58:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294401228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.2294401228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.1637752165 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 2736602922 ps |
| CPU time | 21.62 seconds |
| Started | Aug 23 10:58:49 PM UTC 24 |
| Finished | Aug 23 10:59:12 PM UTC 24 |
| Peak memory | 235312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637752165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.1637752165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.4270774199 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 148263736 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:58:49 PM UTC 24 |
| Finished | Aug 23 10:58:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270774199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.4270774199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.1908095934 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 154975509 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:49 PM UTC 24 |
| Finished | Aug 23 10:58:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1908095934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_stall_trans.1908095934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.2342333737 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 1330351033 ps |
| CPU time | 2.81 seconds |
| Started | Aug 23 10:58:49 PM UTC 24 |
| Finished | Aug 23 10:58:53 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342333737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.2342333737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.1453438581 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 4238580162 ps |
| CPU time | 35.32 seconds |
| Started | Aug 23 10:58:49 PM UTC 24 |
| Finished | Aug 23 10:59:25 PM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1453438581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.1453438581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.3645718935 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 269680222 ps |
| CPU time | 3.77 seconds |
| Started | Aug 23 10:58:32 PM UTC 24 |
| Finished | Aug 23 10:58:37 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645718935 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.3645718935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.3423829333 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 476292976 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:58:50 PM UTC 24 |
| Finished | Aug 23 10:58:53 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3423829333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_t x_rx_disruption.3423829333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.794525481 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 506944589 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=794525481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_t x_rx_disruption.794525481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.2152880465 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 629415254 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2152880465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.2152880465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.3587501724 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 560659046 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 215536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3587501724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.3587501724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.1597192499 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 511079955 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1597192499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.1597192499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.1924092995 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 530872994 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1924092995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_ tx_rx_disruption.1924092995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.21354442 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 656693590 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=21354442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_tx _rx_disruption.21354442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.3173488051 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 636010568 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:58 PM UTC 24 |
| Peak memory | 215752 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3173488051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.3173488051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.3950809091 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 420951426 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 215056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3950809091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_ tx_rx_disruption.3950809091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.2003569402 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 539876823 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 215076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2003569402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.2003569402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.1033507548 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 475142867 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1033507548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.1033507548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1452571673 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 37152757 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 10:59:15 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452571673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1452571673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.50866054 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 7109814212 ps |
| CPU time | 8.66 seconds |
| Started | Aug 23 10:58:50 PM UTC 24 |
| Finished | Aug 23 10:59:00 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=50866054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.50866054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.3878991204 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 14591293040 ps |
| CPU time | 16.66 seconds |
| Started | Aug 23 10:58:51 PM UTC 24 |
| Finished | Aug 23 10:59:09 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3878991204 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.3878991204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.1497614063 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 30495876557 ps |
| CPU time | 34.13 seconds |
| Started | Aug 23 10:58:51 PM UTC 24 |
| Finished | Aug 23 10:59:27 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497614063 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.1497614063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.1265922188 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 167580358 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:58:51 PM UTC 24 |
| Finished | Aug 23 10:58:53 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265922188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.1265922188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.1085312197 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 138454314 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:58:53 PM UTC 24 |
| Finished | Aug 23 10:58:54 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085312197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.1085312197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.354392656 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 350200683 ps |
| CPU time | 1.12 seconds |
| Started | Aug 23 10:58:53 PM UTC 24 |
| Finished | Aug 23 10:58:55 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=354392656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_data_toggle_clear.354392656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.882013676 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 865982541 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 10:58:53 PM UTC 24 |
| Finished | Aug 23 10:58:56 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882013676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.882013676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.3780376674 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 37800323109 ps |
| CPU time | 58.5 seconds |
| Started | Aug 23 10:58:54 PM UTC 24 |
| Finished | Aug 23 10:59:54 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3780376674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_address.3780376674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.1058078468 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 1973291597 ps |
| CPU time | 14.49 seconds |
| Started | Aug 23 10:58:54 PM UTC 24 |
| Finished | Aug 23 10:59:10 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058078468 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.1058078468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.1992881577 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 635650297 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 10:58:55 PM UTC 24 |
| Finished | Aug 23 10:58:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992881577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.1992881577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.3485364528 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 150894321 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:58:55 PM UTC 24 |
| Finished | Aug 23 10:58:57 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485364528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.3485364528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_enable.2848605593 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 42507447 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:58:56 PM UTC 24 |
| Finished | Aug 23 10:58:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848605593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.2848605593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.1703636302 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 987535263 ps |
| CPU time | 2.24 seconds |
| Started | Aug 23 10:58:56 PM UTC 24 |
| Finished | Aug 23 10:59:00 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1703636302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.1703636302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.3976302801 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 667206069 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 10:58:57 PM UTC 24 |
| Finished | Aug 23 10:59:00 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976302801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.3976302801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.1960975921 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 349832193 ps |
| CPU time | 2.41 seconds |
| Started | Aug 23 10:58:57 PM UTC 24 |
| Finished | Aug 23 10:59:01 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1960975921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.1960975921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.732336575 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 182993872 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:58:59 PM UTC 24 |
| Finished | Aug 23 10:59:01 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=732336575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.732336575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.1301446745 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 176449716 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:58:59 PM UTC 24 |
| Finished | Aug 23 10:59:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301446745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.1301446745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.1834088914 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 191267806 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:58:59 PM UTC 24 |
| Finished | Aug 23 10:59:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834088914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.1834088914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.2841832304 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 2354919043 ps |
| CPU time | 15.75 seconds |
| Started | Aug 23 10:58:59 PM UTC 24 |
| Finished | Aug 23 10:59:16 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841832304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.2841832304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.3620672108 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 6414822519 ps |
| CPU time | 64.33 seconds |
| Started | Aug 23 10:58:59 PM UTC 24 |
| Finished | Aug 23 11:00:05 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620672108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.3620672108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.725017629 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 224407268 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725017629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_link_in_err.725017629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.3002392370 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 29286092619 ps |
| CPU time | 47.91 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:50 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002392370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.3002392370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.4150397252 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 5324207883 ps |
| CPU time | 6.52 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:09 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150397252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_link_suspend.4150397252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.3401569257 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 2660804678 ps |
| CPU time | 64.1 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 11:00:07 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401569257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.3401569257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.1331307454 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 2326230259 ps |
| CPU time | 51.28 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:54 PM UTC 24 |
| Peak memory | 235108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331307454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.1331307454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.189696893 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 243592943 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:03 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=189696893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.189696893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.2780266026 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 191690042 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:59:01 PM UTC 24 |
| Finished | Aug 23 10:59:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2780266026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.2780266026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.1832823958 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 1842549641 ps |
| CPU time | 15.6 seconds |
| Started | Aug 23 10:59:02 PM UTC 24 |
| Finished | Aug 23 10:59:19 PM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1832823958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.1832823958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.84263852 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 1662419248 ps |
| CPU time | 10.57 seconds |
| Started | Aug 23 10:59:02 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=84263852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.84263852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1154023890 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 187344049 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:59:04 PM UTC 24 |
| Finished | Aug 23 10:59:05 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1154023890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1154023890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.2142127449 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 143186907 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:59:04 PM UTC 24 |
| Finished | Aug 23 10:59:05 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2142127449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.2142127449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.901963578 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 159985566 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:06 PM UTC 24 |
| Finished | Aug 23 10:59:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901963578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_out_iso.901963578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.513843087 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 153255749 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:06 PM UTC 24 |
| Finished | Aug 23 10:59:07 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=513843087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_out_stall.513843087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3642609044 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 170258638 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:06 PM UTC 24 |
| Finished | Aug 23 10:59:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642609044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3642609044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.3471389338 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 159145054 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:08 PM UTC 24 |
| Finished | Aug 23 10:59:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471389338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_pending_in_trans.3471389338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.605751686 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 213990480 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:59:08 PM UTC 24 |
| Finished | Aug 23 10:59:10 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=605751686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.605751686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.2460727108 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 169016478 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:59:08 PM UTC 24 |
| Finished | Aug 23 10:59:10 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460727108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.2460727108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.2922320532 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 36420785 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:59:09 PM UTC 24 |
| Finished | Aug 23 10:59:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2922320532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.2922320532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.2314347755 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 11735078789 ps |
| CPU time | 29.33 seconds |
| Started | Aug 23 10:59:09 PM UTC 24 |
| Finished | Aug 23 10:59:40 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2314347755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.2314347755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.272545905 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 184398357 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:59:09 PM UTC 24 |
| Finished | Aug 23 10:59:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272545905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.272545905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.1260262155 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 194522411 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:59:09 PM UTC 24 |
| Finished | Aug 23 10:59:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260262155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_pkt_sent.1260262155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.3153570410 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 230781263 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153570410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.3153570410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.3142155871 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 180482769 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142155871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3142155871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.1229229084 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 238999280 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229229084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.1229229084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.130376226 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 410804619 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130376226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_rx_full.130376226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.643239657 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 158427904 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643239657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_setup_stage.643239657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.1065868682 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 186926050 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:59:11 PM UTC 24 |
| Finished | Aug 23 10:59:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1065868682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.1065868682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.4091049552 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 217489110 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:59:12 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 216028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4091049552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.4091049552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.1138306568 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 3250301368 ps |
| CPU time | 78.23 seconds |
| Started | Aug 23 10:59:12 PM UTC 24 |
| Finished | Aug 23 11:00:32 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1138306568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.1138306568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.3488119535 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 185353200 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:12 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3488119535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3488119535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.1639608033 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 167220348 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:59:12 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639608033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.1639608033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.2773772955 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 618335483 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 10:59:16 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773772955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.2773772955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.2352267495 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 2926470355 ps |
| CPU time | 66.14 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 11:00:21 PM UTC 24 |
| Peak memory | 230300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352267495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_streaming_out.2352267495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.1847632840 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 1001577632 ps |
| CPU time | 18.85 seconds |
| Started | Aug 23 10:58:54 PM UTC 24 |
| Finished | Aug 23 10:59:14 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847632840 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.1847632840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.3654130393 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 439476280 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 10:59:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3654130393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.3654130393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.1809941055 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 499608504 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:09:54 PM UTC 24 |
| Finished | Aug 23 11:09:57 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1809941055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.1809941055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.3705046698 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 689138780 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3705046698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_ tx_rx_disruption.3705046698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.3795880442 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 491039221 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3795880442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_ tx_rx_disruption.3795880442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.2116007012 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 531484789 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:05 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2116007012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_ tx_rx_disruption.2116007012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1669465754 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 571167876 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1669465754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1669465754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.4209664216 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 663323940 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4209664216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.4209664216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.3106716626 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 481886410 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3106716626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.3106716626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.3595500778 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 575342518 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3595500778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.3595500778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.2873289913 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 453718201 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2873289913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.2873289913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.1157453625 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 461022832 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1157453625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.1157453625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.1285486519 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 66705346 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:59:39 PM UTC 24 |
| Finished | Aug 23 10:59:41 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285486519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.1285486519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.3394933633 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 4407992246 ps |
| CPU time | 6.6 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 10:59:21 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394933633 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.3394933633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.1286456792 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 19699384030 ps |
| CPU time | 24.04 seconds |
| Started | Aug 23 10:59:14 PM UTC 24 |
| Finished | Aug 23 10:59:39 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286456792 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.1286456792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.3137927217 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 29010643213 ps |
| CPU time | 38.13 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:54 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137927217 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.3137927217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.2719092970 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 209855311 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719092970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.2719092970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.461322986 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 205423787 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461322986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_bitstuff_err.461322986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.1662442607 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 542165067 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662442607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_data_toggle_clear.1662442607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.3947637764 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 939182025 ps |
| CPU time | 2.32 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:18 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947637764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.3947637764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.4028028077 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 19085491322 ps |
| CPU time | 28.81 seconds |
| Started | Aug 23 10:59:15 PM UTC 24 |
| Finished | Aug 23 10:59:45 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4028028077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.4028028077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.3672433307 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 6743220062 ps |
| CPU time | 39.01 seconds |
| Started | Aug 23 10:59:17 PM UTC 24 |
| Finished | Aug 23 10:59:57 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672433307 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.3672433307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.3547411780 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 538073839 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 10:59:17 PM UTC 24 |
| Finished | Aug 23 10:59:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547411780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_disable_endpoint.3547411780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.2939867644 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 140406935 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:59:17 PM UTC 24 |
| Finished | Aug 23 10:59:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939867644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.2939867644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_enable.2845313728 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 36498103 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:59:17 PM UTC 24 |
| Finished | Aug 23 10:59:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2845313728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.2845313728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.1227236997 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 1018704067 ps |
| CPU time | 2.62 seconds |
| Started | Aug 23 10:59:18 PM UTC 24 |
| Finished | Aug 23 10:59:21 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227236997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.1227236997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.3657500802 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 394969250 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 10:59:18 PM UTC 24 |
| Finished | Aug 23 10:59:20 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657500802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.3657500802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1907066591 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 150654366 ps |
| CPU time | 1.17 seconds |
| Started | Aug 23 10:59:18 PM UTC 24 |
| Finished | Aug 23 10:59:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907066591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1907066591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.2011539376 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 217397092 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:59:19 PM UTC 24 |
| Finished | Aug 23 10:59:21 PM UTC 24 |
| Peak memory | 234852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011539376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.2011539376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.1207194071 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 178387037 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:59:19 PM UTC 24 |
| Finished | Aug 23 10:59:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207194071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_stall.1207194071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.1285123842 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 183335258 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:59:19 PM UTC 24 |
| Finished | Aug 23 10:59:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285123842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_in_trans.1285123842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.1190613708 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 4087412024 ps |
| CPU time | 32.48 seconds |
| Started | Aug 23 10:59:19 PM UTC 24 |
| Finished | Aug 23 10:59:53 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1190613708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.1190613708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2232563938 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 9822040658 ps |
| CPU time | 56.35 seconds |
| Started | Aug 23 10:59:20 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232563938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2232563938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.806831670 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 200775724 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:20 PM UTC 24 |
| Finished | Aug 23 10:59:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=806831670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_in_err.806831670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.545979801 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 28773619866 ps |
| CPU time | 44.5 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 11:00:07 PM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=545979801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_link_resume.545979801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.899166439 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 5579170678 ps |
| CPU time | 8.07 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 10:59:31 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=899166439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_suspend.899166439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.117021919 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 2263780671 ps |
| CPU time | 54.76 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=117021919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.117021919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.3774943700 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 2907462047 ps |
| CPU time | 69.46 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 11:00:33 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774943700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.3774943700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.1126235756 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 249707028 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 10:59:24 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1126235756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.1126235756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.3240250785 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 200727632 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:59:22 PM UTC 24 |
| Finished | Aug 23 10:59:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240250785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.3240250785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1169108333 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 2373173650 ps |
| CPU time | 19.38 seconds |
| Started | Aug 23 10:59:23 PM UTC 24 |
| Finished | Aug 23 10:59:43 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169108333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1169108333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.1284259742 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 2800349006 ps |
| CPU time | 22.6 seconds |
| Started | Aug 23 10:59:23 PM UTC 24 |
| Finished | Aug 23 10:59:47 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1284259742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.1284259742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.2919128538 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 170109893 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:23 PM UTC 24 |
| Finished | Aug 23 10:59:25 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2919128538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.2919128538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.2918438378 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 166541531 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:59:24 PM UTC 24 |
| Finished | Aug 23 10:59:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2918438378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.2918438378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.739157219 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 206414337 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:59:24 PM UTC 24 |
| Finished | Aug 23 10:59:26 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=739157219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_nak_trans.739157219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.1597741557 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 206095353 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:59:25 PM UTC 24 |
| Finished | Aug 23 10:59:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597741557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.1597741557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1321624233 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 167948215 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:26 PM UTC 24 |
| Finished | Aug 23 10:59:28 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1321624233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1321624233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.1342349620 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 172923941 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:59:26 PM UTC 24 |
| Finished | Aug 23 10:59:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342349620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.1342349620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.1750450666 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 173560741 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:59:26 PM UTC 24 |
| Finished | Aug 23 10:59:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750450666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.1750450666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.4290007583 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 228810306 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:59:27 PM UTC 24 |
| Finished | Aug 23 10:59:29 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4290007583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.4290007583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.743280849 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 146759861 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:59:27 PM UTC 24 |
| Finished | Aug 23 10:59:29 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743280849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.743280849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.2341519094 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 34264750 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:59:29 PM UTC 24 |
| Finished | Aug 23 10:59:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341519094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.2341519094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.3728831387 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 13917108360 ps |
| CPU time | 31.16 seconds |
| Started | Aug 23 10:59:29 PM UTC 24 |
| Finished | Aug 23 11:00:01 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3728831387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.3728831387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.1027088414 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 189110701 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:59:29 PM UTC 24 |
| Finished | Aug 23 10:59:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027088414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.1027088414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.435677221 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 237330549 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:59:30 PM UTC 24 |
| Finished | Aug 23 10:59:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=435677221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_pkt_sent.435677221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1549064493 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 191928275 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:59:30 PM UTC 24 |
| Finished | Aug 23 10:59:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549064493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1549064493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.3972298815 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 213423488 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:59:31 PM UTC 24 |
| Finished | Aug 23 10:59:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3972298815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.3972298815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.1644795612 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 143542608 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:59:31 PM UTC 24 |
| Finished | Aug 23 10:59:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644795612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.1644795612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.1281742934 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 315448860 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 10:59:32 PM UTC 24 |
| Finished | Aug 23 10:59:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281742934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.1281742934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.1869006813 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 167498502 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:59:32 PM UTC 24 |
| Finished | Aug 23 10:59:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869006813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_setup_stage.1869006813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.2642400423 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 146691613 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:59:32 PM UTC 24 |
| Finished | Aug 23 10:59:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2642400423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 23.usbdev_setup_trans_ignored.2642400423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.3201431994 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 273876766 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:59:33 PM UTC 24 |
| Finished | Aug 23 10:59:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201431994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.3201431994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.2729979869 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 2219705949 ps |
| CPU time | 18.87 seconds |
| Started | Aug 23 10:59:33 PM UTC 24 |
| Finished | Aug 23 10:59:53 PM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729979869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.2729979869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.3694179060 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 168690698 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:59:34 PM UTC 24 |
| Finished | Aug 23 10:59:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694179060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.3694179060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.1890998795 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 182498309 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:59:34 PM UTC 24 |
| Finished | Aug 23 10:59:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1890998795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.1890998795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.3289358930 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 842941814 ps |
| CPU time | 1.91 seconds |
| Started | Aug 23 10:59:36 PM UTC 24 |
| Finished | Aug 23 10:59:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289358930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.3289358930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.3939043417 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 4178335038 ps |
| CPU time | 26.86 seconds |
| Started | Aug 23 10:59:35 PM UTC 24 |
| Finished | Aug 23 11:00:04 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3939043417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.3939043417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.1909598991 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 4263453299 ps |
| CPU time | 24.51 seconds |
| Started | Aug 23 10:59:17 PM UTC 24 |
| Finished | Aug 23 10:59:42 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1909598991 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.1909598991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2463742873 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 612554482 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 10:59:37 PM UTC 24 |
| Finished | Aug 23 10:59:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2463742873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2463742873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.3842475388 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 539146501 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3842475388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.3842475388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.2133423386 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 569565905 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2133423386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.2133423386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.416519665 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 558722891 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=416519665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_t x_rx_disruption.416519665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.2677761729 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 631725427 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2677761729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.2677761729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.2892938344 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 543945576 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2892938344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_ tx_rx_disruption.2892938344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.2552551068 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 498681017 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:56 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2552551068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.2552551068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.733501275 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 469726600 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=733501275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_t x_rx_disruption.733501275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.3084008177 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 602875257 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3084008177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.3084008177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.3670818976 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 519323792 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3670818976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_ tx_rx_disruption.3670818976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.30558561 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 550543132 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=30558561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_tx _rx_disruption.30558561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.4241593721 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 68258625 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:14 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4241593721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.4241593721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.1382322055 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 11500642530 ps |
| CPU time | 14.85 seconds |
| Started | Aug 23 10:59:40 PM UTC 24 |
| Finished | Aug 23 10:59:56 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382322055 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.1382322055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.1232709466 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 20629865852 ps |
| CPU time | 29.07 seconds |
| Started | Aug 23 10:59:40 PM UTC 24 |
| Finished | Aug 23 11:00:10 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232709466 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.1232709466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.2786319452 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 28948784576 ps |
| CPU time | 34.39 seconds |
| Started | Aug 23 10:59:40 PM UTC 24 |
| Finished | Aug 23 11:00:16 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786319452 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.2786319452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.1341306340 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 179921581 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:59:40 PM UTC 24 |
| Finished | Aug 23 10:59:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1341306340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_av_buffer.1341306340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.2773184740 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 169409918 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:59:40 PM UTC 24 |
| Finished | Aug 23 10:59:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2773184740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_bitstuff_err.2773184740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.3385221910 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 443410504 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 10:59:41 PM UTC 24 |
| Finished | Aug 23 10:59:44 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385221910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.3385221910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.692985923 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 445068428 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 10:59:41 PM UTC 24 |
| Finished | Aug 23 10:59:44 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=692985923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.692985923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.300916182 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 32369459662 ps |
| CPU time | 52.25 seconds |
| Started | Aug 23 10:59:43 PM UTC 24 |
| Finished | Aug 23 11:00:37 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=300916182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_device_address.300916182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.875299443 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 9754335108 ps |
| CPU time | 53.05 seconds |
| Started | Aug 23 10:59:43 PM UTC 24 |
| Finished | Aug 23 11:00:37 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875299443 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.875299443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.763506710 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 671765118 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 10:59:45 PM UTC 24 |
| Finished | Aug 23 10:59:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763506710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_disable_endpoint.763506710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.2866294066 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 132414950 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:59:45 PM UTC 24 |
| Finished | Aug 23 10:59:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866294066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.2866294066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_enable.40687370 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 38444578 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:59:45 PM UTC 24 |
| Finished | Aug 23 10:59:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40687370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_enable.40687370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.643578767 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 875227118 ps |
| CPU time | 2.08 seconds |
| Started | Aug 23 10:59:46 PM UTC 24 |
| Finished | Aug 23 10:59:50 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=643578767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.643578767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.1244073218 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 725208448 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 10:59:47 PM UTC 24 |
| Finished | Aug 23 10:59:50 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244073218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.1244073218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.1590726296 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 271726174 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 10:59:47 PM UTC 24 |
| Finished | Aug 23 10:59:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1590726296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.1590726296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.76462075 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 214832366 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:59:48 PM UTC 24 |
| Finished | Aug 23 10:59:50 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=76462075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.76462075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.3930605030 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 169777222 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:51 PM UTC 24 |
| Finished | Aug 23 10:59:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930605030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_stall.3930605030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.1528356629 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 193844362 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:59:51 PM UTC 24 |
| Finished | Aug 23 10:59:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528356629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_in_trans.1528356629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.475482355 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 4555385576 ps |
| CPU time | 36.59 seconds |
| Started | Aug 23 10:59:48 PM UTC 24 |
| Finished | Aug 23 11:00:26 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=475482355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.475482355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.3921657738 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 12971829537 ps |
| CPU time | 133.35 seconds |
| Started | Aug 23 10:59:51 PM UTC 24 |
| Finished | Aug 23 11:02:06 PM UTC 24 |
| Peak memory | 219880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921657738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.3921657738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.292099602 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 193664955 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:59:52 PM UTC 24 |
| Finished | Aug 23 10:59:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=292099602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_link_in_err.292099602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.3936138173 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 10730365742 ps |
| CPU time | 12.37 seconds |
| Started | Aug 23 10:59:52 PM UTC 24 |
| Finished | Aug 23 11:00:05 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936138173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.3936138173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.2205588090 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 5235238249 ps |
| CPU time | 6.39 seconds |
| Started | Aug 23 10:59:53 PM UTC 24 |
| Finished | Aug 23 11:00:00 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205588090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_link_suspend.2205588090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.206095962 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 2894771249 ps |
| CPU time | 23.61 seconds |
| Started | Aug 23 10:59:53 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=206095962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.206095962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.1939525414 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 2094983550 ps |
| CPU time | 13.27 seconds |
| Started | Aug 23 10:59:54 PM UTC 24 |
| Finished | Aug 23 11:00:09 PM UTC 24 |
| Peak memory | 235048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939525414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.1939525414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1072989732 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 268110324 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:59:54 PM UTC 24 |
| Finished | Aug 23 10:59:56 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072989732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1072989732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.1094063738 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 235169504 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:59:54 PM UTC 24 |
| Finished | Aug 23 10:59:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094063738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.1094063738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.2033976203 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 2547685777 ps |
| CPU time | 61.2 seconds |
| Started | Aug 23 10:59:54 PM UTC 24 |
| Finished | Aug 23 11:00:57 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033976203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.2033976203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.3057649548 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 3357759636 ps |
| CPU time | 28.46 seconds |
| Started | Aug 23 10:59:56 PM UTC 24 |
| Finished | Aug 23 11:00:25 PM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057649548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.3057649548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.3861641589 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 191649730 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:59:56 PM UTC 24 |
| Finished | Aug 23 10:59:57 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861641589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.3861641589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.510279947 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 176214646 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:59:56 PM UTC 24 |
| Finished | Aug 23 10:59:58 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=510279947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.510279947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.289751281 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 180033453 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:57 PM UTC 24 |
| Finished | Aug 23 10:59:59 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=289751281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_nak_trans.289751281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.3952363064 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 201477622 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:59:57 PM UTC 24 |
| Finished | Aug 23 10:59:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3952363064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.3952363064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.3316628195 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 186232031 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:59:57 PM UTC 24 |
| Finished | Aug 23 10:59:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316628195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.3316628195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.4136094344 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 164931945 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:59:58 PM UTC 24 |
| Finished | Aug 23 11:00:00 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136094344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.4136094344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.476812824 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 151607039 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:59:58 PM UTC 24 |
| Finished | Aug 23 11:00:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476812824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_pending_in_trans.476812824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.3787350573 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 285176958 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:59:58 PM UTC 24 |
| Finished | Aug 23 11:00:00 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787350573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.3787350573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.1160703177 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 192967303 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:59:59 PM UTC 24 |
| Finished | Aug 23 11:00:01 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1160703177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.1160703177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.2884045106 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 47572437 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:59:59 PM UTC 24 |
| Finished | Aug 23 11:00:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884045106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.2884045106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.3331314898 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 8464327096 ps |
| CPU time | 19.6 seconds |
| Started | Aug 23 11:00:00 PM UTC 24 |
| Finished | Aug 23 11:00:30 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3331314898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.3331314898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.1011160194 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 243306896 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:00:00 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1011160194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_pkt_received.1011160194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.3894682514 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 203890961 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:00:01 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894682514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.3894682514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.1304107920 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 267985529 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 11:00:01 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304107920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.1304107920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.1326690171 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 250899681 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:01 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326690171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1326690171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.397312420 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 171347539 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:02 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397312420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_rx_crc_err.397312420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.91499266 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 250568228 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:00:02 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=91499266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_rx_full.91499266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.110254229 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 152945839 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:02 PM UTC 24 |
| Finished | Aug 23 11:00:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=110254229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_setup_stage.110254229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.2257132599 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 188648032 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:09 PM UTC 24 |
| Finished | Aug 23 11:00:12 PM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257132599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.2257132599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.2290501373 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 229170506 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:00:09 PM UTC 24 |
| Finished | Aug 23 11:00:12 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2290501373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.2290501373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.3137744713 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 3003069686 ps |
| CPU time | 20 seconds |
| Started | Aug 23 11:00:09 PM UTC 24 |
| Finished | Aug 23 11:00:32 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137744713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.3137744713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.2982356431 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 171699994 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:11 PM UTC 24 |
| Finished | Aug 23 11:00:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982356431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.2982356431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.3080132869 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 192932278 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:11 PM UTC 24 |
| Finished | Aug 23 11:00:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080132869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.3080132869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.355990953 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 1435479115 ps |
| CPU time | 3.05 seconds |
| Started | Aug 23 11:00:11 PM UTC 24 |
| Finished | Aug 23 11:00:15 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355990953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_stream_len_max.355990953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.1144621922 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 2309633361 ps |
| CPU time | 19.84 seconds |
| Started | Aug 23 11:00:11 PM UTC 24 |
| Finished | Aug 23 11:00:32 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144621922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.1144621922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.3194882224 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 6745663114 ps |
| CPU time | 40.23 seconds |
| Started | Aug 23 10:59:44 PM UTC 24 |
| Finished | Aug 23 11:00:26 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194882224 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.3194882224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1980526176 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 460443697 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:00:11 PM UTC 24 |
| Finished | Aug 23 11:00:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1980526176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1980526176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.2928696707 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 499932576 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2928696707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.2928696707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.979032231 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 574018488 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=979032231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_t x_rx_disruption.979032231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.3451428038 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 590919423 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3451428038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.3451428038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.1106889902 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 540183529 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:01 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1106889902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_ tx_rx_disruption.1106889902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.2558227752 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 547282429 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2558227752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.2558227752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.767206446 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 515782362 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:01 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=767206446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_t x_rx_disruption.767206446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.1371484055 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 583069737 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1371484055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.1371484055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.2695555001 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 456804178 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:09:58 PM UTC 24 |
| Finished | Aug 23 11:10:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2695555001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.2695555001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1114507581 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 694315041 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:59 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1114507581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1114507581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.4115915510 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 646123471 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:59 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4115915510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.4115915510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.2914599099 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 40656016 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:00:28 PM UTC 24 |
| Finished | Aug 23 11:00:29 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914599099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.2914599099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.3002371650 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 9042672079 ps |
| CPU time | 11.33 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:25 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002371650 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.3002371650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.796314155 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 19674300215 ps |
| CPU time | 24.32 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:38 PM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=796314155 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.796314155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.4084286024 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 28769492509 ps |
| CPU time | 36.3 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:50 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4084286024 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.4084286024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.2693102061 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 201218108 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693102061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.2693102061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.3673981980 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 160349764 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3673981980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_bitstuff_err.3673981980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.864247433 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 463657471 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:00:12 PM UTC 24 |
| Finished | Aug 23 11:00:15 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864247433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_data_toggle_clear.864247433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.4090985775 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 734798340 ps |
| CPU time | 1.84 seconds |
| Started | Aug 23 11:00:13 PM UTC 24 |
| Finished | Aug 23 11:00:16 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090985775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.4090985775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.3938064320 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 28437788674 ps |
| CPU time | 41.18 seconds |
| Started | Aug 23 11:00:13 PM UTC 24 |
| Finished | Aug 23 11:00:56 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3938064320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_address.3938064320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.721676531 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 2511551931 ps |
| CPU time | 17.46 seconds |
| Started | Aug 23 11:00:13 PM UTC 24 |
| Finished | Aug 23 11:00:32 PM UTC 24 |
| Peak memory | 218432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=721676531 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.721676531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.4106795036 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 471161357 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:00:13 PM UTC 24 |
| Finished | Aug 23 11:00:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106795036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.4106795036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.3313816511 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 142171637 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:00:15 PM UTC 24 |
| Finished | Aug 23 11:00:17 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313816511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_disconnected.3313816511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_enable.2994600981 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 43049242 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:00:15 PM UTC 24 |
| Finished | Aug 23 11:00:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994600981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.2994600981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.2960660967 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 1032056732 ps |
| CPU time | 2.49 seconds |
| Started | Aug 23 11:00:15 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2960660967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.2960660967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.3364729234 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 479312587 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:00:15 PM UTC 24 |
| Finished | Aug 23 11:00:17 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3364729234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.3364729234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.3269957274 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 208018237 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 11:00:15 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269957274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_fifo_rst.3269957274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1437499929 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 204569270 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:00:16 PM UTC 24 |
| Finished | Aug 23 11:00:18 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437499929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1437499929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.2982105037 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 139953920 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:00:17 PM UTC 24 |
| Finished | Aug 23 11:00:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982105037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.2982105037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.1382218213 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 246854097 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:00:17 PM UTC 24 |
| Finished | Aug 23 11:00:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382218213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_trans.1382218213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.3290837923 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 4717555386 ps |
| CPU time | 31.65 seconds |
| Started | Aug 23 11:00:16 PM UTC 24 |
| Finished | Aug 23 11:00:49 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290837923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.3290837923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.3492289419 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 6877971676 ps |
| CPU time | 71.43 seconds |
| Started | Aug 23 11:00:17 PM UTC 24 |
| Finished | Aug 23 11:01:30 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492289419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.3492289419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.1455173000 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 176743224 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:00:17 PM UTC 24 |
| Finished | Aug 23 11:00:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455173000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_in_err.1455173000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3579981306 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 31667372412 ps |
| CPU time | 46.04 seconds |
| Started | Aug 23 11:00:17 PM UTC 24 |
| Finished | Aug 23 11:01:05 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3579981306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3579981306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.2812420211 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 8550485127 ps |
| CPU time | 10.37 seconds |
| Started | Aug 23 11:00:18 PM UTC 24 |
| Finished | Aug 23 11:00:30 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812420211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.2812420211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.892355211 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 5060858244 ps |
| CPU time | 32.6 seconds |
| Started | Aug 23 11:00:18 PM UTC 24 |
| Finished | Aug 23 11:00:52 PM UTC 24 |
| Peak memory | 235276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892355211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.892355211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.1422310074 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 3698521461 ps |
| CPU time | 87.34 seconds |
| Started | Aug 23 11:00:18 PM UTC 24 |
| Finished | Aug 23 11:01:48 PM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1422310074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.1422310074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.2831891905 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 247972790 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:00:19 PM UTC 24 |
| Finished | Aug 23 11:00:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831891905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.2831891905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.2675164359 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 228761186 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:00:19 PM UTC 24 |
| Finished | Aug 23 11:00:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675164359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.2675164359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.134639276 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 2968820433 ps |
| CPU time | 24.17 seconds |
| Started | Aug 23 11:00:20 PM UTC 24 |
| Finished | Aug 23 11:00:45 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=134639276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.134639276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.3484849434 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 192780322 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:00:20 PM UTC 24 |
| Finished | Aug 23 11:00:22 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484849434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.3484849434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.496675154 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 141579170 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:20 PM UTC 24 |
| Finished | Aug 23 11:00:22 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496675154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.496675154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.2233339243 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 260459254 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:00:20 PM UTC 24 |
| Finished | Aug 23 11:00:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2233339243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.2233339243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.3125152880 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 149588323 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:20 PM UTC 24 |
| Finished | Aug 23 11:00:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125152880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.3125152880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.1297063732 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 164489168 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:21 PM UTC 24 |
| Finished | Aug 23 11:00:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297063732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.1297063732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.3788306612 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 192466066 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:21 PM UTC 24 |
| Finished | Aug 23 11:00:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3788306612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.3788306612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.460918552 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 223589218 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:24 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=460918552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_pending_in_trans.460918552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.1165345986 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 189293649 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:24 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165345986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.1165345986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3959895670 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 150013653 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959895670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3959895670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.3183822402 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 127808121 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183822402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.3183822402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.1009693392 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 9445276870 ps |
| CPU time | 22.81 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:46 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009693392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_pkt_buffer.1009693392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.3636208611 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 198272550 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:22 PM UTC 24 |
| Finished | Aug 23 11:00:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636208611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.3636208611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.3978317802 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 218262208 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:00:24 PM UTC 24 |
| Finished | Aug 23 11:00:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3978317802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.3978317802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.2716976130 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 224051971 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:00:24 PM UTC 24 |
| Finished | Aug 23 11:00:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716976130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.2716976130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.745360181 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 228837928 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:00:25 PM UTC 24 |
| Finished | Aug 23 11:00:27 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745360181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.745360181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.3759766004 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 155298798 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:25 PM UTC 24 |
| Finished | Aug 23 11:00:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3759766004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.3759766004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.1252319721 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 258437573 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:00:25 PM UTC 24 |
| Finished | Aug 23 11:00:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1252319721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.1252319721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.3670494454 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 181900345 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:25 PM UTC 24 |
| Finished | Aug 23 11:00:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670494454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_setup_stage.3670494454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.1637532727 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 207373518 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:00:25 PM UTC 24 |
| Finished | Aug 23 11:00:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637532727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.1637532727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.3986896280 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 213020465 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:00:26 PM UTC 24 |
| Finished | Aug 23 11:00:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986896280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.3986896280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.4260331320 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 2533294656 ps |
| CPU time | 20.78 seconds |
| Started | Aug 23 11:00:26 PM UTC 24 |
| Finished | Aug 23 11:00:48 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4260331320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.4260331320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.2441289526 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 200485823 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:26 PM UTC 24 |
| Finished | Aug 23 11:00:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2441289526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2441289526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.229074669 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 179168094 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:00:26 PM UTC 24 |
| Finished | Aug 23 11:00:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=229074669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_stall_trans.229074669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.134095231 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 930181033 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 11:00:27 PM UTC 24 |
| Finished | Aug 23 11:00:31 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=134095231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_stream_len_max.134095231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.2573346605 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 3993088286 ps |
| CPU time | 25.27 seconds |
| Started | Aug 23 11:00:27 PM UTC 24 |
| Finished | Aug 23 11:00:54 PM UTC 24 |
| Peak memory | 230456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573346605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_streaming_out.2573346605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.2651369510 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 409138905 ps |
| CPU time | 6.68 seconds |
| Started | Aug 23 11:00:13 PM UTC 24 |
| Finished | Aug 23 11:00:21 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651369510 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.2651369510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.1340904181 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 491738987 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:00:27 PM UTC 24 |
| Finished | Aug 23 11:00:30 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1340904181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.1340904181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.845226388 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 645737115 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:09:59 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=845226388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_t x_rx_disruption.845226388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.497643810 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 475789431 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:10:01 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=497643810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_t x_rx_disruption.497643810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.2795202758 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 649758929 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:10:02 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2795202758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.2795202758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.3845467394 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 657823617 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 11:10:02 PM UTC 24 |
| Finished | Aug 23 11:10:18 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3845467394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_ tx_rx_disruption.3845467394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.2675224174 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 590776185 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:02 PM UTC 24 |
| Finished | Aug 23 11:10:18 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2675224174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.2675224174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.2310677317 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 409757944 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 11:10:02 PM UTC 24 |
| Finished | Aug 23 11:10:18 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2310677317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.2310677317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.3865129002 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 647020317 ps |
| CPU time | 1.64 seconds |
| Started | Aug 23 11:10:06 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3865129002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.3865129002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.160750632 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 601436364 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:10:06 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=160750632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_t x_rx_disruption.160750632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.3282856259 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 429539230 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:10:06 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3282856259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_ tx_rx_disruption.3282856259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.792514776 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 653703478 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:06 PM UTC 24 |
| Finished | Aug 23 11:10:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=792514776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_t x_rx_disruption.792514776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.3188524240 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 37408550 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:00:46 PM UTC 24 |
| Finished | Aug 23 11:00:47 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188524240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.3188524240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.2176315483 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 4694863272 ps |
| CPU time | 6.76 seconds |
| Started | Aug 23 11:00:28 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176315483 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.2176315483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.3080309521 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 21096176320 ps |
| CPU time | 25.57 seconds |
| Started | Aug 23 11:00:28 PM UTC 24 |
| Finished | Aug 23 11:00:55 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080309521 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.3080309521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.1883777854 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 24625583550 ps |
| CPU time | 27.85 seconds |
| Started | Aug 23 11:00:29 PM UTC 24 |
| Finished | Aug 23 11:00:58 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1883777854 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.1883777854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.2237214762 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 151415931 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:00:29 PM UTC 24 |
| Finished | Aug 23 11:00:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237214762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.2237214762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.462616503 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 163928897 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:29 PM UTC 24 |
| Finished | Aug 23 11:00:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=462616503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_bitstuff_err.462616503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.281383111 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 208817457 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:00:30 PM UTC 24 |
| Finished | Aug 23 11:00:32 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281383111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_data_toggle_clear.281383111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3486236436 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 1040319477 ps |
| CPU time | 2.52 seconds |
| Started | Aug 23 11:00:30 PM UTC 24 |
| Finished | Aug 23 11:00:34 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486236436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3486236436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.1687151864 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 15065825162 ps |
| CPU time | 23.7 seconds |
| Started | Aug 23 11:00:30 PM UTC 24 |
| Finished | Aug 23 11:00:55 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687151864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.1687151864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.3793476837 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 1677651906 ps |
| CPU time | 33.5 seconds |
| Started | Aug 23 11:00:31 PM UTC 24 |
| Finished | Aug 23 11:01:06 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793476837 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.3793476837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.2485577308 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 999930506 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 11:00:31 PM UTC 24 |
| Finished | Aug 23 11:00:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485577308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.2485577308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.1563956857 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 171746167 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:31 PM UTC 24 |
| Finished | Aug 23 11:00:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1563956857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_disconnected.1563956857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_enable.366480571 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 60742469 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:00:31 PM UTC 24 |
| Finished | Aug 23 11:00:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366480571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_enable.366480571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.3646728545 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 1030858709 ps |
| CPU time | 2.51 seconds |
| Started | Aug 23 11:00:33 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3646728545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.3646728545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.1721501319 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 532584666 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:00:33 PM UTC 24 |
| Finished | Aug 23 11:00:35 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721501319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.1721501319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.1571594761 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 242825669 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:00:33 PM UTC 24 |
| Finished | Aug 23 11:00:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1571594761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.1571594761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.1663897691 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 182116513 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:00:34 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 225772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663897691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1663897691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.2615689258 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 140403774 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:00:34 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615689258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.2615689258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.3421589649 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 226917858 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:00:34 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421589649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.3421589649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.3833733102 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 2972076888 ps |
| CPU time | 66.4 seconds |
| Started | Aug 23 11:00:33 PM UTC 24 |
| Finished | Aug 23 11:01:41 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833733102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.3833733102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.3131116001 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 6901002749 ps |
| CPU time | 42.59 seconds |
| Started | Aug 23 11:00:34 PM UTC 24 |
| Finished | Aug 23 11:01:18 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131116001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.3131116001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.2298813730 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 275370297 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:00:34 PM UTC 24 |
| Finished | Aug 23 11:00:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298813730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.2298813730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.3638294460 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 9216127603 ps |
| CPU time | 12.87 seconds |
| Started | Aug 23 11:00:35 PM UTC 24 |
| Finished | Aug 23 11:00:49 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638294460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_resume.3638294460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.906142526 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 3947369952 ps |
| CPU time | 4.95 seconds |
| Started | Aug 23 11:00:35 PM UTC 24 |
| Finished | Aug 23 11:00:41 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=906142526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_suspend.906142526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.2123374061 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 3646958432 ps |
| CPU time | 84.93 seconds |
| Started | Aug 23 11:00:35 PM UTC 24 |
| Finished | Aug 23 11:02:02 PM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123374061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.2123374061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.2350363649 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 2438041982 ps |
| CPU time | 56.14 seconds |
| Started | Aug 23 11:00:35 PM UTC 24 |
| Finished | Aug 23 11:01:33 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350363649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.2350363649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.60286482 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 237091019 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:00:37 PM UTC 24 |
| Finished | Aug 23 11:00:39 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=60286482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.60286482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.2728912207 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 185144096 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:37 PM UTC 24 |
| Finished | Aug 23 11:00:39 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2728912207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.2728912207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.764737951 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 2166274596 ps |
| CPU time | 54.59 seconds |
| Started | Aug 23 11:00:37 PM UTC 24 |
| Finished | Aug 23 11:01:33 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764737951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.764737951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.1370978993 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 155748954 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:37 PM UTC 24 |
| Finished | Aug 23 11:00:39 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370978993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.1370978993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.4285571916 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 152503626 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:00:37 PM UTC 24 |
| Finished | Aug 23 11:00:38 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285571916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.4285571916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.2847863673 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 187187725 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:38 PM UTC 24 |
| Finished | Aug 23 11:00:40 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847863673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.2847863673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.2462805333 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 160642268 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:00:38 PM UTC 24 |
| Finished | Aug 23 11:00:40 PM UTC 24 |
| Peak memory | 215288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462805333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.2462805333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.4094684319 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 227812062 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:38 PM UTC 24 |
| Finished | Aug 23 11:00:40 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4094684319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_out_stall.4094684319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.2672726806 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 148776035 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:00:38 PM UTC 24 |
| Finished | Aug 23 11:00:40 PM UTC 24 |
| Peak memory | 215232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672726806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_out_trans_nak.2672726806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.3884420472 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 148018533 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:00:39 PM UTC 24 |
| Finished | Aug 23 11:00:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884420472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_pending_in_trans.3884420472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.2805981671 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 277937911 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:00:39 PM UTC 24 |
| Finished | Aug 23 11:00:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805981671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.2805981671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.153872533 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 149549578 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:00:39 PM UTC 24 |
| Finished | Aug 23 11:00:41 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153872533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.153872533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.3141903672 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 48701410 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:00:39 PM UTC 24 |
| Finished | Aug 23 11:00:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141903672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.3141903672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1287714290 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 21516196544 ps |
| CPU time | 52.98 seconds |
| Started | Aug 23 11:00:41 PM UTC 24 |
| Finished | Aug 23 11:01:35 PM UTC 24 |
| Peak memory | 227816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287714290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1287714290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1318308758 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 193768855 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:00:41 PM UTC 24 |
| Finished | Aug 23 11:00:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318308758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.1318308758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.1897936826 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 197127633 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:00:41 PM UTC 24 |
| Finished | Aug 23 11:00:43 PM UTC 24 |
| Peak memory | 215304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1897936826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_pkt_sent.1897936826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.3870161806 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 174039637 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:41 PM UTC 24 |
| Finished | Aug 23 11:00:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870161806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.3870161806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.2688424304 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 230855763 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:00:42 PM UTC 24 |
| Finished | Aug 23 11:00:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2688424304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.2688424304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.2009779399 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 184679989 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:00:42 PM UTC 24 |
| Finished | Aug 23 11:00:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2009779399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.2009779399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.2561171888 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 265719308 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:00:42 PM UTC 24 |
| Finished | Aug 23 11:00:44 PM UTC 24 |
| Peak memory | 215728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561171888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_rx_full.2561171888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.2005901040 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 158952595 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:42 PM UTC 24 |
| Finished | Aug 23 11:00:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005901040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.2005901040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.1199550016 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 149295275 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:00:43 PM UTC 24 |
| Finished | Aug 23 11:00:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199550016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.1199550016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.1783297983 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 282515641 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:00:43 PM UTC 24 |
| Finished | Aug 23 11:00:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783297983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.1783297983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.2278522584 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 3620688413 ps |
| CPU time | 30.03 seconds |
| Started | Aug 23 11:00:43 PM UTC 24 |
| Finished | Aug 23 11:01:15 PM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278522584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.2278522584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.3896900769 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 141325247 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:00:43 PM UTC 24 |
| Finished | Aug 23 11:00:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3896900769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.3896900769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.725794639 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 220226035 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:00:44 PM UTC 24 |
| Finished | Aug 23 11:00:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725794639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_stall_trans.725794639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.3143731189 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 1271665854 ps |
| CPU time | 2.73 seconds |
| Started | Aug 23 11:00:44 PM UTC 24 |
| Finished | Aug 23 11:00:48 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143731189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stream_len_max.3143731189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.3446091065 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 1858166787 ps |
| CPU time | 15.73 seconds |
| Started | Aug 23 11:00:44 PM UTC 24 |
| Finished | Aug 23 11:01:01 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446091065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.3446091065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.908788534 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 146680150 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:00:31 PM UTC 24 |
| Finished | Aug 23 11:00:33 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=908788534 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.908788534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.3511576586 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 471958971 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:00:46 PM UTC 24 |
| Finished | Aug 23 11:00:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3511576586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.3511576586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.1054028841 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 523146883 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:10:07 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1054028841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.1054028841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.2070931299 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 518703191 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:07 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 215600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2070931299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.2070931299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.3708474558 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 589791375 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:07 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3708474558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.3708474558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.3872373876 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 559918425 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:10:07 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3872373876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.3872373876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.4054554304 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 488868435 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:10:07 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4054554304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.4054554304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.1376737576 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 535597131 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:08 PM UTC 24 |
| Finished | Aug 23 11:10:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1376737576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_ tx_rx_disruption.1376737576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2108894179 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 543365323 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:17 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2108894179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2108894179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.491159296 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 675541800 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:18 PM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=491159296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_t x_rx_disruption.491159296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.1520116654 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 644198407 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1520116654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.1520116654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.1116985693 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 37579913 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:01:07 PM UTC 24 |
| Finished | Aug 23 11:01:09 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116985693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.1116985693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.4108623897 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 11164037622 ps |
| CPU time | 14.55 seconds |
| Started | Aug 23 11:00:46 PM UTC 24 |
| Finished | Aug 23 11:01:01 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4108623897 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.4108623897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.3814416017 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 18818949688 ps |
| CPU time | 21.63 seconds |
| Started | Aug 23 11:00:47 PM UTC 24 |
| Finished | Aug 23 11:01:10 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3814416017 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.3814416017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.4155365689 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 24312611410 ps |
| CPU time | 30.25 seconds |
| Started | Aug 23 11:00:47 PM UTC 24 |
| Finished | Aug 23 11:01:18 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155365689 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.4155365689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.3790809344 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 171664420 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:47 PM UTC 24 |
| Finished | Aug 23 11:00:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790809344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.3790809344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.896360395 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 169630242 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:00:48 PM UTC 24 |
| Finished | Aug 23 11:00:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=896360395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_bitstuff_err.896360395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.1970842593 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 420477900 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:00:48 PM UTC 24 |
| Finished | Aug 23 11:00:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970842593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.1970842593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.3608854145 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 268400637 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:00:49 PM UTC 24 |
| Finished | Aug 23 11:00:51 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608854145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.3608854145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.1894314 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 18985286498 ps |
| CPU time | 33.12 seconds |
| Started | Aug 23 11:00:49 PM UTC 24 |
| Finished | Aug 23 11:01:24 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1894314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_device_address.1894314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3502867226 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 4805149347 ps |
| CPU time | 34.14 seconds |
| Started | Aug 23 11:00:49 PM UTC 24 |
| Finished | Aug 23 11:01:25 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502867226 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3502867226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.265399322 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 947652174 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 11:00:51 PM UTC 24 |
| Finished | Aug 23 11:00:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=265399322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_disable_endpoint.265399322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.2911158602 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 155862774 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:00:51 PM UTC 24 |
| Finished | Aug 23 11:00:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911158602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.2911158602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_enable.2118482115 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 35200161 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:00:51 PM UTC 24 |
| Finished | Aug 23 11:00:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118482115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.2118482115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2710968095 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 765411296 ps |
| CPU time | 1.87 seconds |
| Started | Aug 23 11:00:51 PM UTC 24 |
| Finished | Aug 23 11:00:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710968095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2710968095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.964014940 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 475402372 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:00:52 PM UTC 24 |
| Finished | Aug 23 11:00:54 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=964014940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.964014940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.19766690 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 287579385 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:00:52 PM UTC 24 |
| Finished | Aug 23 11:00:55 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=19766690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_fifo_rst.19766690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.4205180720 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 154979594 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:53 PM UTC 24 |
| Finished | Aug 23 11:00:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4205180720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.4205180720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.4118139503 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 141327886 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:00:53 PM UTC 24 |
| Finished | Aug 23 11:00:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4118139503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.4118139503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.2414239283 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 242597701 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:00:54 PM UTC 24 |
| Finished | Aug 23 11:00:56 PM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414239283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.2414239283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.1705227483 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 2746259422 ps |
| CPU time | 61.68 seconds |
| Started | Aug 23 11:00:53 PM UTC 24 |
| Finished | Aug 23 11:01:56 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705227483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.1705227483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.3354590848 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 12055416445 ps |
| CPU time | 130.09 seconds |
| Started | Aug 23 11:00:54 PM UTC 24 |
| Finished | Aug 23 11:03:07 PM UTC 24 |
| Peak memory | 219880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354590848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.3354590848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.879791674 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 183526999 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:00:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=879791674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_link_in_err.879791674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.2669354002 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 9336632679 ps |
| CPU time | 14.07 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:01:11 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2669354002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.2669354002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.569942467 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 5906135086 ps |
| CPU time | 7.18 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:01:04 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569942467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_suspend.569942467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.19465331 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 4524756673 ps |
| CPU time | 105.38 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:02:43 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=19465331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.19465331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.4242063143 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 2272981771 ps |
| CPU time | 14.24 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:01:11 PM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242063143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.4242063143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.2501014225 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 232239447 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:00:58 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501014225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.2501014225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.3613359676 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 243298385 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:00:56 PM UTC 24 |
| Finished | Aug 23 11:00:58 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613359676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.3613359676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.1561072340 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 2480974679 ps |
| CPU time | 20.68 seconds |
| Started | Aug 23 11:00:57 PM UTC 24 |
| Finished | Aug 23 11:01:19 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1561072340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.1561072340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.4124683267 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 205409935 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:57 PM UTC 24 |
| Finished | Aug 23 11:00:59 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124683267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.4124683267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.2978300353 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 180729263 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:00:58 PM UTC 24 |
| Finished | Aug 23 11:01:00 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2978300353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.2978300353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.2291668852 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 230454168 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:00:58 PM UTC 24 |
| Finished | Aug 23 11:01:00 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291668852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.2291668852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.4181560197 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 178387618 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:00:58 PM UTC 24 |
| Finished | Aug 23 11:01:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181560197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_out_iso.4181560197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.3754158125 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 161566226 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:00:58 PM UTC 24 |
| Finished | Aug 23 11:01:00 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754158125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.3754158125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.1858216543 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 156798429 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:00:58 PM UTC 24 |
| Finished | Aug 23 11:01:00 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858216543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_out_trans_nak.1858216543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.2355845976 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 172205983 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:00 PM UTC 24 |
| Finished | Aug 23 11:01:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355845976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.2355845976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.1950212824 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 254454736 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:01:01 PM UTC 24 |
| Finished | Aug 23 11:01:03 PM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1950212824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.1950212824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.1493108083 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 144556092 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:01:01 PM UTC 24 |
| Finished | Aug 23 11:01:02 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493108083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.1493108083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.1763181486 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 51200530 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:01:01 PM UTC 24 |
| Finished | Aug 23 11:01:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763181486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.1763181486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.3457130588 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 15403719517 ps |
| CPU time | 38.79 seconds |
| Started | Aug 23 11:01:01 PM UTC 24 |
| Finished | Aug 23 11:01:41 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457130588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.3457130588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.363763825 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 159343852 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:01:01 PM UTC 24 |
| Finished | Aug 23 11:01:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=363763825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_pkt_received.363763825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.3738101998 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 259090798 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:01:02 PM UTC 24 |
| Finished | Aug 23 11:01:04 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738101998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_pkt_sent.3738101998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.3435883250 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 248805533 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:01:02 PM UTC 24 |
| Finished | Aug 23 11:01:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3435883250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_random_length_in_transaction.3435883250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.3894323958 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 255254744 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:01:02 PM UTC 24 |
| Finished | Aug 23 11:01:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3894323958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.3894323958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.3754828690 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 188493738 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:03 PM UTC 24 |
| Finished | Aug 23 11:01:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754828690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.3754828690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.3748485372 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 401642824 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:01:03 PM UTC 24 |
| Finished | Aug 23 11:01:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748485372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.3748485372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.1179484306 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 172199031 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:01:03 PM UTC 24 |
| Finished | Aug 23 11:01:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179484306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.1179484306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3937795131 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 168473097 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:03 PM UTC 24 |
| Finished | Aug 23 11:01:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937795131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3937795131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.448530412 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 246143457 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:01:04 PM UTC 24 |
| Finished | Aug 23 11:01:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448530412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.448530412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.944479394 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 1769124887 ps |
| CPU time | 40.65 seconds |
| Started | Aug 23 11:01:05 PM UTC 24 |
| Finished | Aug 23 11:01:47 PM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=944479394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.944479394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.2811682396 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 158471828 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:05 PM UTC 24 |
| Finished | Aug 23 11:01:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811682396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2811682396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.2297528250 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 148980751 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:01:05 PM UTC 24 |
| Finished | Aug 23 11:01:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297528250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.2297528250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.3962710688 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 449560266 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:01:06 PM UTC 24 |
| Finished | Aug 23 11:01:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962710688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.3962710688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.2291088884 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 1859999825 ps |
| CPU time | 42.86 seconds |
| Started | Aug 23 11:01:06 PM UTC 24 |
| Finished | Aug 23 11:01:50 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2291088884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.2291088884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.2206560438 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 3794620611 ps |
| CPU time | 21.49 seconds |
| Started | Aug 23 11:00:49 PM UTC 24 |
| Finished | Aug 23 11:01:12 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206560438 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.2206560438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.144510075 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 628599026 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 11:01:06 PM UTC 24 |
| Finished | Aug 23 11:01:09 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=144510075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_tx _rx_disruption.144510075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.3790894862 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 526579231 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3790894862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_ tx_rx_disruption.3790894862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.2296941052 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 548088555 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2296941052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.2296941052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.3932251869 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 585707184 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:10:12 PM UTC 24 |
| Finished | Aug 23 11:10:18 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3932251869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.3932251869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.3153023515 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 532780111 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:10:13 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3153023515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.3153023515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.42728672 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 462356062 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:10:13 PM UTC 24 |
| Finished | Aug 23 11:10:16 PM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42728672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_tx _rx_disruption.42728672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.1810212479 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 531623148 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1810212479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.1810212479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.703540664 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 500808160 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=703540664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_t x_rx_disruption.703540664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.2164920446 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 529468983 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2164920446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.2164920446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.1457429416 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 498160930 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1457429416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.1457429416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.1691839870 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 561756837 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1691839870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.1691839870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.1260655152 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 74793457 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:01:31 PM UTC 24 |
| Finished | Aug 23 11:01:33 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260655152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.1260655152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1132035700 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 10295669219 ps |
| CPU time | 11.54 seconds |
| Started | Aug 23 11:01:07 PM UTC 24 |
| Finished | Aug 23 11:01:20 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132035700 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1132035700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.1940388300 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 20448541262 ps |
| CPU time | 26.47 seconds |
| Started | Aug 23 11:01:07 PM UTC 24 |
| Finished | Aug 23 11:01:35 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940388300 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.1940388300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.3280285788 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 25040144494 ps |
| CPU time | 32.49 seconds |
| Started | Aug 23 11:01:07 PM UTC 24 |
| Finished | Aug 23 11:01:41 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280285788 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.3280285788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.1851081191 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 176182068 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:07 PM UTC 24 |
| Finished | Aug 23 11:01:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851081191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.1851081191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.3546772871 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 240938988 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:01:08 PM UTC 24 |
| Finished | Aug 23 11:01:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546772871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.3546772871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.2342178100 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 471337958 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:01:09 PM UTC 24 |
| Finished | Aug 23 11:01:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342178100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.2342178100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.132103820 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 963717425 ps |
| CPU time | 2.36 seconds |
| Started | Aug 23 11:01:09 PM UTC 24 |
| Finished | Aug 23 11:01:13 PM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=132103820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.132103820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.2103445320 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 27363874163 ps |
| CPU time | 41.08 seconds |
| Started | Aug 23 11:01:10 PM UTC 24 |
| Finished | Aug 23 11:01:52 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103445320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.2103445320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.3291538528 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 1503115439 ps |
| CPU time | 8.44 seconds |
| Started | Aug 23 11:01:10 PM UTC 24 |
| Finished | Aug 23 11:01:19 PM UTC 24 |
| Peak memory | 218160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291538528 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.3291538528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.850968720 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 751682066 ps |
| CPU time | 1.73 seconds |
| Started | Aug 23 11:01:11 PM UTC 24 |
| Finished | Aug 23 11:01:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850968720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.850968720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.1315906151 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 141124541 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:01:12 PM UTC 24 |
| Finished | Aug 23 11:01:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1315906151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.1315906151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_enable.3057976874 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 44623196 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:01:12 PM UTC 24 |
| Finished | Aug 23 11:01:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057976874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.3057976874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.3125128490 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 838565845 ps |
| CPU time | 2 seconds |
| Started | Aug 23 11:01:13 PM UTC 24 |
| Finished | Aug 23 11:01:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125128490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.3125128490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.667783182 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 354647774 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:01:13 PM UTC 24 |
| Finished | Aug 23 11:01:15 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667783182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.667783182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.1055214362 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 235712052 ps |
| CPU time | 1.95 seconds |
| Started | Aug 23 11:01:14 PM UTC 24 |
| Finished | Aug 23 11:01:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055214362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.1055214362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1759419373 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 213628922 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:01:14 PM UTC 24 |
| Finished | Aug 23 11:01:16 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759419373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1759419373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.3748881480 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 165114929 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:01:14 PM UTC 24 |
| Finished | Aug 23 11:01:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748881480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.3748881480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.917620325 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 175113702 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:15 PM UTC 24 |
| Finished | Aug 23 11:01:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=917620325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_in_trans.917620325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.1940575115 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 3200659368 ps |
| CPU time | 21.35 seconds |
| Started | Aug 23 11:01:14 PM UTC 24 |
| Finished | Aug 23 11:01:37 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1940575115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.1940575115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.1667963880 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 14293299581 ps |
| CPU time | 80.74 seconds |
| Started | Aug 23 11:01:17 PM UTC 24 |
| Finished | Aug 23 11:02:39 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667963880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.1667963880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.342940279 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 219613440 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:01:17 PM UTC 24 |
| Finished | Aug 23 11:01:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=342940279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_link_in_err.342940279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.1326418769 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 27867150449 ps |
| CPU time | 40.66 seconds |
| Started | Aug 23 11:01:17 PM UTC 24 |
| Finished | Aug 23 11:01:59 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1326418769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.1326418769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.4188974967 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 11410730932 ps |
| CPU time | 13.67 seconds |
| Started | Aug 23 11:01:17 PM UTC 24 |
| Finished | Aug 23 11:01:31 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188974967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.4188974967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.1886829016 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 4513942284 ps |
| CPU time | 107.04 seconds |
| Started | Aug 23 11:01:18 PM UTC 24 |
| Finished | Aug 23 11:03:07 PM UTC 24 |
| Peak memory | 235332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1886829016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.1886829016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.4154133780 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 2574143260 ps |
| CPU time | 58.62 seconds |
| Started | Aug 23 11:01:18 PM UTC 24 |
| Finished | Aug 23 11:02:18 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154133780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.4154133780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.2553410410 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 249140723 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:01:19 PM UTC 24 |
| Finished | Aug 23 11:01:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553410410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.2553410410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.467884863 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 212276428 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:01:19 PM UTC 24 |
| Finished | Aug 23 11:01:21 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=467884863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.467884863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.1117825094 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 3998974147 ps |
| CPU time | 24.7 seconds |
| Started | Aug 23 11:01:19 PM UTC 24 |
| Finished | Aug 23 11:01:45 PM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1117825094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.1117825094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.441427947 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 176982283 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:20 PM UTC 24 |
| Finished | Aug 23 11:01:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=441427947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.441427947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.3170666224 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 184323270 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:20 PM UTC 24 |
| Finished | Aug 23 11:01:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3170666224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.3170666224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.3998556929 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 166935109 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:21 PM UTC 24 |
| Finished | Aug 23 11:01:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998556929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.3998556929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.550615706 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 170482637 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:21 PM UTC 24 |
| Finished | Aug 23 11:01:23 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=550615706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_out_stall.550615706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.2558223937 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 190382783 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:23 PM UTC 24 |
| Finished | Aug 23 11:01:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558223937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.2558223937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.3874226194 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 197163659 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:23 PM UTC 24 |
| Finished | Aug 23 11:01:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3874226194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.3874226194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.1451974535 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 319719982 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:01:23 PM UTC 24 |
| Finished | Aug 23 11:01:25 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451974535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.1451974535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.2646994791 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 196460890 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:01:24 PM UTC 24 |
| Finished | Aug 23 11:01:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646994791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2646994791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.2229758906 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 29891098 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:01:24 PM UTC 24 |
| Finished | Aug 23 11:01:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2229758906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_pins_sense.2229758906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.2477877378 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 15115255079 ps |
| CPU time | 34.45 seconds |
| Started | Aug 23 11:01:25 PM UTC 24 |
| Finished | Aug 23 11:02:01 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477877378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_pkt_buffer.2477877378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.2121238830 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 162720178 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:01:25 PM UTC 24 |
| Finished | Aug 23 11:01:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2121238830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.2121238830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.3681292 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 161286788 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:25 PM UTC 24 |
| Finished | Aug 23 11:01:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3681292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_pkt_sent.3681292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2617280476 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 222441242 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:01:25 PM UTC 24 |
| Finished | Aug 23 11:01:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617280476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2617280476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.3563430725 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 200416048 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:01:26 PM UTC 24 |
| Finished | Aug 23 11:01:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3563430725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.3563430725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.2903593394 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 173535622 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:26 PM UTC 24 |
| Finished | Aug 23 11:01:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903593394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.2903593394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.962712802 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 329560793 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:01:26 PM UTC 24 |
| Finished | Aug 23 11:01:28 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962712802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_rx_full.962712802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.198438451 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 185846632 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:01:27 PM UTC 24 |
| Finished | Aug 23 11:01:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198438451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_setup_stage.198438451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.3054322849 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 150109001 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:28 PM UTC 24 |
| Finished | Aug 23 11:01:29 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054322849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.3054322849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3234817443 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 276958386 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:01:28 PM UTC 24 |
| Finished | Aug 23 11:01:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234817443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3234817443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.3450397566 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 2718141469 ps |
| CPU time | 24.44 seconds |
| Started | Aug 23 11:01:28 PM UTC 24 |
| Finished | Aug 23 11:01:53 PM UTC 24 |
| Peak memory | 235260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3450397566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.3450397566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.1322292273 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 153408957 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:01:29 PM UTC 24 |
| Finished | Aug 23 11:01:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322292273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.1322292273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2415394577 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 182436367 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:29 PM UTC 24 |
| Finished | Aug 23 11:01:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2415394577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2415394577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3981705334 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 799825518 ps |
| CPU time | 1.93 seconds |
| Started | Aug 23 11:01:30 PM UTC 24 |
| Finished | Aug 23 11:01:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981705334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3981705334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.2262464958 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 1612722261 ps |
| CPU time | 34.76 seconds |
| Started | Aug 23 11:01:30 PM UTC 24 |
| Finished | Aug 23 11:02:06 PM UTC 24 |
| Peak memory | 235040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262464958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.2262464958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.2381128325 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 2046950701 ps |
| CPU time | 15.27 seconds |
| Started | Aug 23 11:01:11 PM UTC 24 |
| Finished | Aug 23 11:01:27 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381128325 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.2381128325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.3300361848 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 599112728 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:01:31 PM UTC 24 |
| Finished | Aug 23 11:01:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3300361848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.3300361848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.2327184407 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 600291945 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2327184407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.2327184407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.4015667487 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 590092328 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4015667487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.4015667487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.2071919378 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 612459349 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:10:17 PM UTC 24 |
| Finished | Aug 23 11:10:20 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2071919378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.2071919378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.728216722 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 581244921 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=728216722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_t x_rx_disruption.728216722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.365010506 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 589769670 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=365010506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_t x_rx_disruption.365010506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.3678908158 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 641006695 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3678908158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_ tx_rx_disruption.3678908158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.1993836829 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 677826453 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1993836829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.1993836829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.310149971 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 446143507 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=310149971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.310149971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.1962994878 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 476218412 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1962994878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.1962994878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.4212651306 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 518324108 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4212651306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.4212651306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.4175680619 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 44324351 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:01:55 PM UTC 24 |
| Finished | Aug 23 11:01:56 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175680619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.4175680619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.4143784000 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 4581969739 ps |
| CPU time | 6.16 seconds |
| Started | Aug 23 11:01:31 PM UTC 24 |
| Finished | Aug 23 11:01:39 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143784000 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.4143784000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.343516165 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 23872498871 ps |
| CPU time | 31.4 seconds |
| Started | Aug 23 11:01:32 PM UTC 24 |
| Finished | Aug 23 11:02:05 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=343516165 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.343516165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.1813391607 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 210947583 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:01:34 PM UTC 24 |
| Finished | Aug 23 11:01:35 PM UTC 24 |
| Peak memory | 215688 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813391607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.1813391607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.474822709 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 170130599 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:01:34 PM UTC 24 |
| Finished | Aug 23 11:01:35 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=474822709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_bitstuff_err.474822709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.3655312114 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 236958242 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:01:34 PM UTC 24 |
| Finished | Aug 23 11:01:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655312114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.3655312114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.1293805036 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 858460630 ps |
| CPU time | 2.11 seconds |
| Started | Aug 23 11:01:34 PM UTC 24 |
| Finished | Aug 23 11:01:37 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293805036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.1293805036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.4054320376 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 17360165232 ps |
| CPU time | 27.08 seconds |
| Started | Aug 23 11:01:34 PM UTC 24 |
| Finished | Aug 23 11:02:02 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4054320376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.4054320376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.2857705464 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 1540324571 ps |
| CPU time | 11.05 seconds |
| Started | Aug 23 11:01:35 PM UTC 24 |
| Finished | Aug 23 11:01:47 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857705464 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.2857705464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.1249105206 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 771794740 ps |
| CPU time | 1.79 seconds |
| Started | Aug 23 11:01:36 PM UTC 24 |
| Finished | Aug 23 11:01:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249105206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.1249105206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2548058743 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 179216283 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:36 PM UTC 24 |
| Finished | Aug 23 11:01:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548058743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2548058743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_enable.94806905 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 63116240 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:01:36 PM UTC 24 |
| Finished | Aug 23 11:01:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=94806905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_enable.94806905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.3425178651 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 856760500 ps |
| CPU time | 2.2 seconds |
| Started | Aug 23 11:01:36 PM UTC 24 |
| Finished | Aug 23 11:01:40 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425178651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.3425178651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.3090690649 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 154926808 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:01:37 PM UTC 24 |
| Finished | Aug 23 11:01:40 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090690649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.3090690649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.1432410850 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 179299769 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:01:37 PM UTC 24 |
| Finished | Aug 23 11:01:41 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1432410850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.1432410850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1767814640 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 271274252 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 11:01:40 PM UTC 24 |
| Finished | Aug 23 11:01:42 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767814640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1767814640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.4112024756 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 176070384 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:01:40 PM UTC 24 |
| Finished | Aug 23 11:01:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112024756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.4112024756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.32475188 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 224456253 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:01:40 PM UTC 24 |
| Finished | Aug 23 11:01:42 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=32475188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_in_trans.32475188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.2311864578 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 3112766923 ps |
| CPU time | 71.62 seconds |
| Started | Aug 23 11:01:39 PM UTC 24 |
| Finished | Aug 23 11:02:52 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311864578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2311864578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.2720427825 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 5910461008 ps |
| CPU time | 36.86 seconds |
| Started | Aug 23 11:01:41 PM UTC 24 |
| Finished | Aug 23 11:02:19 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2720427825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.2720427825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.3701580081 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 242719156 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:01:41 PM UTC 24 |
| Finished | Aug 23 11:01:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701580081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.3701580081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.3764159316 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 23130903776 ps |
| CPU time | 31.33 seconds |
| Started | Aug 23 11:01:41 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3764159316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.3764159316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.856476573 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 4974523610 ps |
| CPU time | 7.71 seconds |
| Started | Aug 23 11:01:42 PM UTC 24 |
| Finished | Aug 23 11:01:52 PM UTC 24 |
| Peak memory | 218016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=856476573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_suspend.856476573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3833725358 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 3380964200 ps |
| CPU time | 22.84 seconds |
| Started | Aug 23 11:01:42 PM UTC 24 |
| Finished | Aug 23 11:02:07 PM UTC 24 |
| Peak memory | 228300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833725358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3833725358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.859790906 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 2035751452 ps |
| CPU time | 16.95 seconds |
| Started | Aug 23 11:01:42 PM UTC 24 |
| Finished | Aug 23 11:02:01 PM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=859790906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.859790906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3453826696 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 236893617 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:01:42 PM UTC 24 |
| Finished | Aug 23 11:01:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453826696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3453826696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.1005415502 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 183544248 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:01:43 PM UTC 24 |
| Finished | Aug 23 11:01:45 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005415502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1005415502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.553691596 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 2417207168 ps |
| CPU time | 57.91 seconds |
| Started | Aug 23 11:01:43 PM UTC 24 |
| Finished | Aug 23 11:02:42 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=553691596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.553691596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.2732848193 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 146390501 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:44 PM UTC 24 |
| Finished | Aug 23 11:01:46 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732848193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2732848193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.287811675 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 159873260 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:01:46 PM UTC 24 |
| Finished | Aug 23 11:01:48 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=287811675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.287811675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.92199833 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 185969516 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:01:46 PM UTC 24 |
| Finished | Aug 23 11:01:48 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92199833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_nak_trans.92199833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.2541718983 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 167669785 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:46 PM UTC 24 |
| Finished | Aug 23 11:01:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541718983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.2541718983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.2346547436 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 165474774 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:47 PM UTC 24 |
| Finished | Aug 23 11:01:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2346547436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.2346547436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.2344970071 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 185904373 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:01:47 PM UTC 24 |
| Finished | Aug 23 11:01:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2344970071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.2344970071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.2398977858 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 214492439 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:01:48 PM UTC 24 |
| Finished | Aug 23 11:01:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398977858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.2398977858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.3548813961 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 192738174 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:01:48 PM UTC 24 |
| Finished | Aug 23 11:01:51 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548813961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.3548813961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.3567764294 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 142265555 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:48 PM UTC 24 |
| Finished | Aug 23 11:01:50 PM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567764294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.3567764294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.4136821417 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 47945181 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:01:48 PM UTC 24 |
| Finished | Aug 23 11:01:50 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4136821417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.4136821417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.487666455 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 16539892046 ps |
| CPU time | 43.61 seconds |
| Started | Aug 23 11:01:48 PM UTC 24 |
| Finished | Aug 23 11:02:34 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=487666455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_pkt_buffer.487666455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.607713280 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 211341786 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:01:49 PM UTC 24 |
| Finished | Aug 23 11:01:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=607713280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_pkt_received.607713280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.1311435919 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 203123215 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:01:49 PM UTC 24 |
| Finished | Aug 23 11:01:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311435919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.1311435919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.1485103124 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 151763041 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:51 PM UTC 24 |
| Finished | Aug 23 11:01:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485103124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_random_length_in_transaction.1485103124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.1092830783 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 188932851 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:01:51 PM UTC 24 |
| Finished | Aug 23 11:01:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092830783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.1092830783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.1399627983 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 196887112 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:01:51 PM UTC 24 |
| Finished | Aug 23 11:01:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399627983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_rx_crc_err.1399627983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2723046120 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 247935840 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:01:52 PM UTC 24 |
| Finished | Aug 23 11:01:54 PM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2723046120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2723046120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.3639873622 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 214183796 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:01:52 PM UTC 24 |
| Finished | Aug 23 11:01:54 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3639873622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.3639873622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.109207248 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 223229618 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:01:52 PM UTC 24 |
| Finished | Aug 23 11:01:54 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=109207248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 29.usbdev_setup_trans_ignored.109207248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.3091405280 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 216537268 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:01:52 PM UTC 24 |
| Finished | Aug 23 11:01:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091405280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.3091405280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.1540516312 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 2086831372 ps |
| CPU time | 17.16 seconds |
| Started | Aug 23 11:01:52 PM UTC 24 |
| Finished | Aug 23 11:02:10 PM UTC 24 |
| Peak memory | 230480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1540516312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.1540516312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.1199197494 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 166418548 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:01:53 PM UTC 24 |
| Finished | Aug 23 11:01:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199197494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1199197494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.1654514037 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 173934984 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:01:53 PM UTC 24 |
| Finished | Aug 23 11:01:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654514037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_stall_trans.1654514037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.2842938113 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 999708089 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 11:01:54 PM UTC 24 |
| Finished | Aug 23 11:01:57 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842938113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stream_len_max.2842938113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.4086913289 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 4258067370 ps |
| CPU time | 29.28 seconds |
| Started | Aug 23 11:01:53 PM UTC 24 |
| Finished | Aug 23 11:02:24 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4086913289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.4086913289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.1962917696 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 4275573010 ps |
| CPU time | 31.17 seconds |
| Started | Aug 23 11:01:36 PM UTC 24 |
| Finished | Aug 23 11:02:09 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1962917696 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.1962917696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.3107848623 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 492123652 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 11:01:54 PM UTC 24 |
| Finished | Aug 23 11:01:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3107848623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.3107848623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.1443725570 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 486302722 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:19 PM UTC 24 |
| Finished | Aug 23 11:10:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1443725570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.1443725570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.1548727088 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 546630745 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 217280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1548727088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_ tx_rx_disruption.1548727088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.3936584202 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 711083687 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3936584202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.3936584202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.1274561997 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 563206849 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1274561997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.1274561997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.3444423179 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 647892361 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3444423179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_ tx_rx_disruption.3444423179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.4098407995 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 491079864 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4098407995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_ tx_rx_disruption.4098407995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.325318686 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 647442213 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=325318686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_t x_rx_disruption.325318686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.301513807 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 467132202 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=301513807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_t x_rx_disruption.301513807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.1053443755 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 556562105 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1053443755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_ tx_rx_disruption.1053443755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.1414334549 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 490107132 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1414334549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.1414334549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.2857405372 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 61385382 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:50:09 PM UTC 24 |
| Finished | Aug 23 10:50:11 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2857405372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.2857405372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.1343612942 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 9209533676 ps |
| CPU time | 12.13 seconds |
| Started | Aug 23 10:49:14 PM UTC 24 |
| Finished | Aug 23 10:49:28 PM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343612942 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.1343612942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.2108168946 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 19059420508 ps |
| CPU time | 22.62 seconds |
| Started | Aug 23 10:49:15 PM UTC 24 |
| Finished | Aug 23 10:49:39 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108168946 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.2108168946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.810007601 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 24789385776 ps |
| CPU time | 32.89 seconds |
| Started | Aug 23 10:49:15 PM UTC 24 |
| Finished | Aug 23 10:49:50 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=810007601 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.810007601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1098045365 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 148069003 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:49:15 PM UTC 24 |
| Finished | Aug 23 10:49:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098045365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.1098045365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.1074772947 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 186111336 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:49:17 PM UTC 24 |
| Finished | Aug 23 10:49:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074772947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_av_empty.1074772947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.1575700301 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 145922734 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:49:17 PM UTC 24 |
| Finished | Aug 23 10:49:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1575700301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.1575700301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2561626938 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 142185039 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:49:18 PM UTC 24 |
| Finished | Aug 23 10:49:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2561626938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.2561626938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.506737904 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 694640573 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 10:49:19 PM UTC 24 |
| Finished | Aug 23 10:49:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=506737904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_data_toggle_clear.506737904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.2427197551 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 370414459 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 10:49:19 PM UTC 24 |
| Finished | Aug 23 10:49:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427197551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.2427197551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.1958890424 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 1134595700 ps |
| CPU time | 21.96 seconds |
| Started | Aug 23 10:49:22 PM UTC 24 |
| Finished | Aug 23 10:49:45 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1958890424 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.1958890424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1148035722 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 979477910 ps |
| CPU time | 2.02 seconds |
| Started | Aug 23 10:49:22 PM UTC 24 |
| Finished | Aug 23 10:49:25 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148035722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.1148035722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.1684624228 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 152345844 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:49:24 PM UTC 24 |
| Finished | Aug 23 10:49:25 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684624228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_disconnected.1684624228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1916634302 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 38622754 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:49:24 PM UTC 24 |
| Finished | Aug 23 10:49:25 PM UTC 24 |
| Peak memory | 215724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916634302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 3.usbdev_enable.1916634302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.3700078887 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 808967985 ps |
| CPU time | 2.06 seconds |
| Started | Aug 23 10:49:26 PM UTC 24 |
| Finished | Aug 23 10:49:29 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3700078887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.3700078887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.1239922994 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 485356134 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 10:49:26 PM UTC 24 |
| Finished | Aug 23 10:49:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239922994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.1239922994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.1395826129 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 324259932 ps |
| CPU time | 2.21 seconds |
| Started | Aug 23 10:49:26 PM UTC 24 |
| Finished | Aug 23 10:49:29 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1395826129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_fifo_rst.1395826129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.1333267046 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 95191752095 ps |
| CPU time | 145.68 seconds |
| Started | Aug 23 10:49:26 PM UTC 24 |
| Finished | Aug 23 10:51:54 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333267046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.1333267046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.546094979 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 86138934506 ps |
| CPU time | 137.99 seconds |
| Started | Aug 23 10:49:27 PM UTC 24 |
| Finished | Aug 23 10:51:48 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=546094979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 3.usbdev_freq_hiclk_max.546094979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.804826381 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 107094534559 ps |
| CPU time | 173.07 seconds |
| Started | Aug 23 10:49:29 PM UTC 24 |
| Finished | Aug 23 10:52:25 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=804826381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.804826381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.3396700283 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 103166251701 ps |
| CPU time | 162.13 seconds |
| Started | Aug 23 10:49:29 PM UTC 24 |
| Finished | Aug 23 10:52:14 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3396700283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.3396700283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.87507334 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 83174669684 ps |
| CPU time | 135.25 seconds |
| Started | Aug 23 10:49:29 PM UTC 24 |
| Finished | Aug 23 10:51:47 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87507334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_phase.87507334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.2875475426 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 223450359 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 10:49:30 PM UTC 24 |
| Finished | Aug 23 10:49:33 PM UTC 24 |
| Peak memory | 226356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875475426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.2875475426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.4181975764 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 167705457 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:49:30 PM UTC 24 |
| Finished | Aug 23 10:49:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181975764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.4181975764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.3926117064 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 155645900 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:49:32 PM UTC 24 |
| Finished | Aug 23 10:49:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926117064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.3926117064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.33937416 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 4257366160 ps |
| CPU time | 26.84 seconds |
| Started | Aug 23 10:49:30 PM UTC 24 |
| Finished | Aug 23 10:49:59 PM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=33937416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.33937416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.3927675775 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 10039878371 ps |
| CPU time | 56.09 seconds |
| Started | Aug 23 10:49:33 PM UTC 24 |
| Finished | Aug 23 10:50:30 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927675775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.3927675775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.162720073 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 189749772 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:49:33 PM UTC 24 |
| Finished | Aug 23 10:49:35 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=162720073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_link_in_err.162720073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.2398697144 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 29635704587 ps |
| CPU time | 47.61 seconds |
| Started | Aug 23 10:49:34 PM UTC 24 |
| Finished | Aug 23 10:50:23 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398697144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.2398697144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.3184434298 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 3943537580 ps |
| CPU time | 5.62 seconds |
| Started | Aug 23 10:49:34 PM UTC 24 |
| Finished | Aug 23 10:49:41 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184434298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.3184434298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.3812497981 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 5200733066 ps |
| CPU time | 34.5 seconds |
| Started | Aug 23 10:49:34 PM UTC 24 |
| Finished | Aug 23 10:50:10 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3812497981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.3812497981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.241630355 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 1676047922 ps |
| CPU time | 10.61 seconds |
| Started | Aug 23 10:49:36 PM UTC 24 |
| Finished | Aug 23 10:49:48 PM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=241630355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.241630355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1629188680 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 246616451 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:49:38 PM UTC 24 |
| Finished | Aug 23 10:49:40 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629188680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1629188680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.325234241 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 187388747 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:49:40 PM UTC 24 |
| Finished | Aug 23 10:49:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=325234241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.325234241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.189045905 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 2614287872 ps |
| CPU time | 17.92 seconds |
| Started | Aug 23 10:49:42 PM UTC 24 |
| Finished | Aug 23 10:50:01 PM UTC 24 |
| Peak memory | 230216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=189045905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.189045905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.227023027 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 3581225682 ps |
| CPU time | 32.94 seconds |
| Started | Aug 23 10:49:42 PM UTC 24 |
| Finished | Aug 23 10:50:16 PM UTC 24 |
| Peak memory | 234860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=227023027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.227023027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.2152593522 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 2446795981 ps |
| CPU time | 20.56 seconds |
| Started | Aug 23 10:49:42 PM UTC 24 |
| Finished | Aug 23 10:50:03 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2152593522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.2152593522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.702345284 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 167909695 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:49:43 PM UTC 24 |
| Finished | Aug 23 10:49:45 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=702345284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.702345284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.2219547691 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 160808776 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:49:43 PM UTC 24 |
| Finished | Aug 23 10:49:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219547691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.2219547691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1715003696 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 182064348 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:49:44 PM UTC 24 |
| Finished | Aug 23 10:49:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715003696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.1715003696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.1753532780 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 183239160 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:49:45 PM UTC 24 |
| Finished | Aug 23 10:49:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753532780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.1753532780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2541766265 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 165280979 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:49:45 PM UTC 24 |
| Finished | Aug 23 10:49:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541766265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2541766265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.761970059 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 161992489 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:49:46 PM UTC 24 |
| Finished | Aug 23 10:49:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=761970059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_out_trans_nak.761970059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.3930559464 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 146887325 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:49:46 PM UTC 24 |
| Finished | Aug 23 10:49:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930559464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_pending_in_trans.3930559464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.41699989 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 201097604 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:49:47 PM UTC 24 |
| Finished | Aug 23 10:49:49 PM UTC 24 |
| Peak memory | 214908 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=41699989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.41699989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.752968589 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 288851366 ps |
| CPU time | 1 seconds |
| Started | Aug 23 10:49:48 PM UTC 24 |
| Finished | Aug 23 10:49:50 PM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=752968589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.752968589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.1055050256 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 146414738 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:49:49 PM UTC 24 |
| Finished | Aug 23 10:49:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055050256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.1055050256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3409833206 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 78756461 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 10:49:49 PM UTC 24 |
| Finished | Aug 23 10:49:50 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3409833206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3409833206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.3270349608 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 16378151937 ps |
| CPU time | 39.31 seconds |
| Started | Aug 23 10:49:49 PM UTC 24 |
| Finished | Aug 23 10:50:29 PM UTC 24 |
| Peak memory | 228496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270349608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.3270349608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.464582050 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 185555580 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:49:50 PM UTC 24 |
| Finished | Aug 23 10:49:52 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=464582050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.464582050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.3626545874 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 155612795 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:49:50 PM UTC 24 |
| Finished | Aug 23 10:49:52 PM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626545874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.3626545874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.321070691 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 6021030054 ps |
| CPU time | 33.21 seconds |
| Started | Aug 23 10:49:51 PM UTC 24 |
| Finished | Aug 23 10:50:26 PM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=321070691 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.321070691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.4138872939 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 7540636647 ps |
| CPU time | 28.35 seconds |
| Started | Aug 23 10:49:51 PM UTC 24 |
| Finished | Aug 23 10:50:21 PM UTC 24 |
| Peak memory | 230632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138872939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.4138872939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.1479934838 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 6080450193 ps |
| CPU time | 53.37 seconds |
| Started | Aug 23 10:49:52 PM UTC 24 |
| Finished | Aug 23 10:50:47 PM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479934838 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.1479934838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.1733235274 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 229306773 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:49:50 PM UTC 24 |
| Finished | Aug 23 10:49:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1733235274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.1733235274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.2191413190 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 172721255 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:49:51 PM UTC 24 |
| Finished | Aug 23 10:49:53 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191413190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.2191413190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.1328215550 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 20154325700 ps |
| CPU time | 25.78 seconds |
| Started | Aug 23 10:49:52 PM UTC 24 |
| Finished | Aug 23 10:50:19 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1328215550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.1328215550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.3046875117 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 236557276 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:49:52 PM UTC 24 |
| Finished | Aug 23 10:49:54 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3046875117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_crc_err.3046875117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3768503404 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 401588249 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 10:49:53 PM UTC 24 |
| Finished | Aug 23 10:49:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768503404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3768503404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.3279993839 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 204459014 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:49:54 PM UTC 24 |
| Finished | Aug 23 10:49:56 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279993839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.3279993839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.892302242 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 325764732 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:50:08 PM UTC 24 |
| Finished | Aug 23 10:50:10 PM UTC 24 |
| Peak memory | 250788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=892302242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.892302242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.4166066561 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 450317235 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 10:49:57 PM UTC 24 |
| Finished | Aug 23 10:49:59 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166066561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.4166066561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.2704221541 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 303691734 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:49:58 PM UTC 24 |
| Finished | Aug 23 10:50:00 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704221541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2704221541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.2250570065 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 165822107 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:50:00 PM UTC 24 |
| Finished | Aug 23 10:50:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250570065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_setup_stage.2250570065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.1845595489 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 154751758 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:50:00 PM UTC 24 |
| Finished | Aug 23 10:50:02 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845595489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.1845595489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.1155234147 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 245044304 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:50:01 PM UTC 24 |
| Finished | Aug 23 10:50:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155234147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.1155234147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.1872027070 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 3325374848 ps |
| CPU time | 21.8 seconds |
| Started | Aug 23 10:50:02 PM UTC 24 |
| Finished | Aug 23 10:50:25 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872027070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.1872027070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.2368746479 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 189267212 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:50:02 PM UTC 24 |
| Finished | Aug 23 10:50:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368746479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.2368746479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.3776938347 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 157880830 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:50:02 PM UTC 24 |
| Finished | Aug 23 10:50:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776938347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.3776938347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.2589988553 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 1244005351 ps |
| CPU time | 3.08 seconds |
| Started | Aug 23 10:50:03 PM UTC 24 |
| Finished | Aug 23 10:50:07 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589988553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.2589988553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.864037760 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 2717776352 ps |
| CPU time | 64.7 seconds |
| Started | Aug 23 10:50:02 PM UTC 24 |
| Finished | Aug 23 10:51:09 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=864037760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_streaming_out.864037760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.2228351707 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 8103873694 ps |
| CPU time | 32.39 seconds |
| Started | Aug 23 10:50:05 PM UTC 24 |
| Finished | Aug 23 10:50:38 PM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228351707 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.2228351707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.1168874331 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 614982518 ps |
| CPU time | 9.98 seconds |
| Started | Aug 23 10:49:22 PM UTC 24 |
| Finished | Aug 23 10:49:33 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1168874331 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.1168874331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.2523061928 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 475579534 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 10:50:05 PM UTC 24 |
| Finished | Aug 23 10:50:07 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2523061928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx _rx_disruption.2523061928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.4103232774 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 39292689 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:17 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103232774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.4103232774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.454142340 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 12102609725 ps |
| CPU time | 13.54 seconds |
| Started | Aug 23 11:01:55 PM UTC 24 |
| Finished | Aug 23 11:02:10 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454142340 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.454142340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3482823591 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 19376864408 ps |
| CPU time | 23.9 seconds |
| Started | Aug 23 11:01:55 PM UTC 24 |
| Finished | Aug 23 11:02:20 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482823591 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3482823591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.2626222627 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 23647187956 ps |
| CPU time | 26.54 seconds |
| Started | Aug 23 11:01:55 PM UTC 24 |
| Finished | Aug 23 11:02:23 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626222627 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.2626222627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.3482282487 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 170255467 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:01:56 PM UTC 24 |
| Finished | Aug 23 11:01:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482282487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.3482282487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.605015545 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 154531170 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:01:56 PM UTC 24 |
| Finished | Aug 23 11:01:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605015545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_bitstuff_err.605015545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.1348813557 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 432922785 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:01:57 PM UTC 24 |
| Finished | Aug 23 11:02:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1348813557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.1348813557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.992255579 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 699637364 ps |
| CPU time | 1.95 seconds |
| Started | Aug 23 11:01:57 PM UTC 24 |
| Finished | Aug 23 11:02:00 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=992255579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.992255579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.1338619352 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 21893269629 ps |
| CPU time | 32.05 seconds |
| Started | Aug 23 11:01:57 PM UTC 24 |
| Finished | Aug 23 11:02:31 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1338619352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.1338619352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.3044844690 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 3393766833 ps |
| CPU time | 26.53 seconds |
| Started | Aug 23 11:01:57 PM UTC 24 |
| Finished | Aug 23 11:02:25 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3044844690 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.3044844690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.3661902759 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 509232824 ps |
| CPU time | 1.82 seconds |
| Started | Aug 23 11:01:58 PM UTC 24 |
| Finished | Aug 23 11:02:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661902759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_disable_endpoint.3661902759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.1955171491 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 163777640 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:01:58 PM UTC 24 |
| Finished | Aug 23 11:02:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955171491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.1955171491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_enable.2932425684 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 76649637 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:02:00 PM UTC 24 |
| Finished | Aug 23 11:02:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932425684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.2932425684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.2929493621 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 948847462 ps |
| CPU time | 2.39 seconds |
| Started | Aug 23 11:02:01 PM UTC 24 |
| Finished | Aug 23 11:02:04 PM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929493621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.2929493621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.754331516 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 267470142 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:02:01 PM UTC 24 |
| Finished | Aug 23 11:02:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=754331516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.754331516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.4067494801 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 180499382 ps |
| CPU time | 1.77 seconds |
| Started | Aug 23 11:02:02 PM UTC 24 |
| Finished | Aug 23 11:02:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067494801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.4067494801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.2914298090 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 206756738 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:02:02 PM UTC 24 |
| Finished | Aug 23 11:02:05 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2914298090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.2914298090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.2004255900 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 139722478 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:02:02 PM UTC 24 |
| Finished | Aug 23 11:02:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004255900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.2004255900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.126742560 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 231634235 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:02:02 PM UTC 24 |
| Finished | Aug 23 11:02:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=126742560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_in_trans.126742560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.3617159940 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 5492188764 ps |
| CPU time | 36.36 seconds |
| Started | Aug 23 11:02:02 PM UTC 24 |
| Finished | Aug 23 11:02:40 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3617159940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.3617159940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.321194265 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 13611506123 ps |
| CPU time | 83.08 seconds |
| Started | Aug 23 11:02:03 PM UTC 24 |
| Finished | Aug 23 11:03:29 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=321194265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.321194265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.355251775 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 238459942 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:02:04 PM UTC 24 |
| Finished | Aug 23 11:02:06 PM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=355251775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_link_in_err.355251775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.737442835 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 23578625308 ps |
| CPU time | 34.41 seconds |
| Started | Aug 23 11:02:04 PM UTC 24 |
| Finished | Aug 23 11:02:39 PM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737442835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_link_resume.737442835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3446292954 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 5355733595 ps |
| CPU time | 6.69 seconds |
| Started | Aug 23 11:02:05 PM UTC 24 |
| Finished | Aug 23 11:02:13 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446292954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3446292954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.234972748 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 3429097677 ps |
| CPU time | 29.38 seconds |
| Started | Aug 23 11:02:06 PM UTC 24 |
| Finished | Aug 23 11:02:37 PM UTC 24 |
| Peak memory | 235256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=234972748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.234972748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.1471344441 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 3276620648 ps |
| CPU time | 28.8 seconds |
| Started | Aug 23 11:02:06 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471344441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.1471344441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.3232018366 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 240927725 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:02:06 PM UTC 24 |
| Finished | Aug 23 11:02:08 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232018366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.3232018366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.2599330690 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 198872036 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:02:06 PM UTC 24 |
| Finished | Aug 23 11:02:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599330690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.2599330690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1047519868 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 2625573870 ps |
| CPU time | 19.16 seconds |
| Started | Aug 23 11:02:06 PM UTC 24 |
| Finished | Aug 23 11:02:27 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047519868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1047519868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.2296708195 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 163578478 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:07 PM UTC 24 |
| Finished | Aug 23 11:02:09 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296708195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.2296708195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.108402588 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 152965473 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:02:07 PM UTC 24 |
| Finished | Aug 23 11:02:09 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108402588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.108402588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.2466703585 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 213077051 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:02:07 PM UTC 24 |
| Finished | Aug 23 11:02:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2466703585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.2466703585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.869490235 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 169333717 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:02:08 PM UTC 24 |
| Finished | Aug 23 11:02:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869490235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_out_iso.869490235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.2603309894 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 195138075 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603309894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.2603309894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.2283503988 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 185261094 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283503988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.2283503988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.2404782354 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 158011358 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404782354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.2404782354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.3757466603 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 206964975 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:12 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3757466603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.3757466603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.2205872199 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 146187552 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2205872199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.2205872199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.1673255895 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 31229100 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:02:10 PM UTC 24 |
| Finished | Aug 23 11:02:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673255895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.1673255895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.795136829 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 22059828190 ps |
| CPU time | 53.47 seconds |
| Started | Aug 23 11:02:11 PM UTC 24 |
| Finished | Aug 23 11:03:06 PM UTC 24 |
| Peak memory | 228700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=795136829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_pkt_buffer.795136829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.3240361721 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 158883617 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:11 PM UTC 24 |
| Finished | Aug 23 11:02:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240361721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.3240361721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.419234629 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 220356305 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:02:11 PM UTC 24 |
| Finished | Aug 23 11:02:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419234629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_pkt_sent.419234629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.2350565040 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 258057745 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350565040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_random_length_in_transaction.2350565040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.4055000765 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 183349219 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055000765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.4055000765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.1805073165 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 181549227 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805073165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_rx_crc_err.1805073165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.2145533919 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 246392794 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145533919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.2145533919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.2666564528 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 154412943 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2666564528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.2666564528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2350219073 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 158081084 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:02:12 PM UTC 24 |
| Finished | Aug 23 11:02:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350219073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2350219073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.3167758121 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 199342148 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:02:13 PM UTC 24 |
| Finished | Aug 23 11:02:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167758121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.3167758121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.3872362379 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 2346351567 ps |
| CPU time | 55.75 seconds |
| Started | Aug 23 11:02:13 PM UTC 24 |
| Finished | Aug 23 11:03:11 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872362379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.3872362379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.4195484809 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 200747762 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:02:13 PM UTC 24 |
| Finished | Aug 23 11:02:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4195484809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.4195484809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.418000515 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 188883580 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:17 PM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418000515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_stall_trans.418000515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.2326240354 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 268493103 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326240354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stream_len_max.2326240354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.3903841310 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 1842734204 ps |
| CPU time | 15.43 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:31 PM UTC 24 |
| Peak memory | 228012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3903841310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.3903841310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.1037239354 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 1178547085 ps |
| CPU time | 20.87 seconds |
| Started | Aug 23 11:01:58 PM UTC 24 |
| Finished | Aug 23 11:02:21 PM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1037239354 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.1037239354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.852754620 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 629891360 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:17 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=852754620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_tx _rx_disruption.852754620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.914182674 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 512339919 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=914182674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_t x_rx_disruption.914182674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.3308657949 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 461544514 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3308657949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.3308657949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.3875687043 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 610971914 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 217040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3875687043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.3875687043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.897602273 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 626802872 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=897602273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_t x_rx_disruption.897602273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.2618498959 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 502126278 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2618498959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_ tx_rx_disruption.2618498959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.3927846371 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 568096228 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3927846371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.3927846371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.1930079310 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 667834274 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:10:21 PM UTC 24 |
| Finished | Aug 23 11:10:31 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1930079310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.1930079310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.2929662358 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 624009323 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2929662358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.2929662358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.784505738 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 492908460 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:33 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=784505738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_t x_rx_disruption.784505738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.3726685580 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 551869360 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:33 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3726685580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.3726685580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.1392020466 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 40424396 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:02:38 PM UTC 24 |
| Finished | Aug 23 11:02:40 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1392020466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.1392020466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.2675309307 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 11110625865 ps |
| CPU time | 14.52 seconds |
| Started | Aug 23 11:02:15 PM UTC 24 |
| Finished | Aug 23 11:02:31 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675309307 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.2675309307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.1462016887 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 14447507349 ps |
| CPU time | 17.51 seconds |
| Started | Aug 23 11:02:16 PM UTC 24 |
| Finished | Aug 23 11:02:35 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462016887 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.1462016887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.3377115784 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 31437277671 ps |
| CPU time | 39.68 seconds |
| Started | Aug 23 11:02:16 PM UTC 24 |
| Finished | Aug 23 11:02:57 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377115784 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.3377115784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.1267021016 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 206819509 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:02:17 PM UTC 24 |
| Finished | Aug 23 11:02:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267021016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.1267021016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.728330630 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 180849181 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:17 PM UTC 24 |
| Finished | Aug 23 11:02:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=728330630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_bitstuff_err.728330630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.3656219001 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 217126351 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:02:17 PM UTC 24 |
| Finished | Aug 23 11:02:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656219001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.3656219001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.3712832626 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 657154721 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 11:02:17 PM UTC 24 |
| Finished | Aug 23 11:02:20 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712832626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.3712832626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.1304976576 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 39995387562 ps |
| CPU time | 60.85 seconds |
| Started | Aug 23 11:02:18 PM UTC 24 |
| Finished | Aug 23 11:03:21 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1304976576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_address.1304976576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.3624240306 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 2029830531 ps |
| CPU time | 14.99 seconds |
| Started | Aug 23 11:02:18 PM UTC 24 |
| Finished | Aug 23 11:02:35 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624240306 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.3624240306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.2118911388 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 744273713 ps |
| CPU time | 1.77 seconds |
| Started | Aug 23 11:02:20 PM UTC 24 |
| Finished | Aug 23 11:02:23 PM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118911388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.2118911388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.714982401 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 138163264 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:02:20 PM UTC 24 |
| Finished | Aug 23 11:02:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=714982401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_disconnected.714982401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_enable.1396014600 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 34312882 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:02:20 PM UTC 24 |
| Finished | Aug 23 11:02:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396014600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.1396014600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.2338170741 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 985367319 ps |
| CPU time | 2.3 seconds |
| Started | Aug 23 11:02:21 PM UTC 24 |
| Finished | Aug 23 11:02:24 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2338170741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.2338170741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.1194915300 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 310837379 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:02:21 PM UTC 24 |
| Finished | Aug 23 11:02:23 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194915300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.1194915300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2309571970 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 311683959 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:02:22 PM UTC 24 |
| Finished | Aug 23 11:02:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2309571970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2309571970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.1922692666 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 191048766 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:02:22 PM UTC 24 |
| Finished | Aug 23 11:02:24 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922692666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.1922692666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.4160847527 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 176055595 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:23 PM UTC 24 |
| Finished | Aug 23 11:02:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160847527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.4160847527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.1720364100 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 214237676 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:02:23 PM UTC 24 |
| Finished | Aug 23 11:02:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720364100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_trans.1720364100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3362590466 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 3794045992 ps |
| CPU time | 89.84 seconds |
| Started | Aug 23 11:02:22 PM UTC 24 |
| Finished | Aug 23 11:03:54 PM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362590466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3362590466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3042184269 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 11475671746 ps |
| CPU time | 120.73 seconds |
| Started | Aug 23 11:02:23 PM UTC 24 |
| Finished | Aug 23 11:04:26 PM UTC 24 |
| Peak memory | 218404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042184269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3042184269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.2176672301 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 207857863 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:02:24 PM UTC 24 |
| Finished | Aug 23 11:02:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176672301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.2176672301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.4079266675 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 26134545307 ps |
| CPU time | 41.74 seconds |
| Started | Aug 23 11:02:24 PM UTC 24 |
| Finished | Aug 23 11:03:08 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4079266675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.4079266675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.4148650838 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 4301580109 ps |
| CPU time | 6.06 seconds |
| Started | Aug 23 11:02:26 PM UTC 24 |
| Finished | Aug 23 11:02:33 PM UTC 24 |
| Peak memory | 228388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4148650838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_link_suspend.4148650838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.266294220 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 1953275884 ps |
| CPU time | 17.05 seconds |
| Started | Aug 23 11:02:26 PM UTC 24 |
| Finished | Aug 23 11:02:44 PM UTC 24 |
| Peak memory | 230220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=266294220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.266294220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.2585796308 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 3636189845 ps |
| CPU time | 23.57 seconds |
| Started | Aug 23 11:02:26 PM UTC 24 |
| Finished | Aug 23 11:02:51 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2585796308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.2585796308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.1352049683 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 244907527 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:02:26 PM UTC 24 |
| Finished | Aug 23 11:02:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1352049683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.1352049683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.2084207053 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 232057955 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:02:26 PM UTC 24 |
| Finished | Aug 23 11:02:28 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084207053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.2084207053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.690161126 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 2887276215 ps |
| CPU time | 67.23 seconds |
| Started | Aug 23 11:02:27 PM UTC 24 |
| Finished | Aug 23 11:03:36 PM UTC 24 |
| Peak memory | 228300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=690161126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.690161126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.279258051 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 165353537 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:02:27 PM UTC 24 |
| Finished | Aug 23 11:02:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=279258051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.279258051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.1919839983 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 146177317 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:02:28 PM UTC 24 |
| Finished | Aug 23 11:02:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1919839983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.1919839983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.3963603779 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 206427986 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:02:29 PM UTC 24 |
| Finished | Aug 23 11:02:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963603779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.3963603779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.2718200027 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 152377128 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:29 PM UTC 24 |
| Finished | Aug 23 11:02:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2718200027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.2718200027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.3062128902 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 196653251 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:02:30 PM UTC 24 |
| Finished | Aug 23 11:02:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062128902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.3062128902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.3005225436 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 177772277 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:02:32 PM UTC 24 |
| Finished | Aug 23 11:02:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3005225436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.3005225436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.3489848907 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 193720458 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:02:32 PM UTC 24 |
| Finished | Aug 23 11:02:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3489848907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.3489848907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.731739915 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 237342751 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:02:32 PM UTC 24 |
| Finished | Aug 23 11:02:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=731739915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.731739915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.2105030174 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 138523053 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:02:33 PM UTC 24 |
| Finished | Aug 23 11:02:35 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105030174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.2105030174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.3332669261 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 38108726 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:02:33 PM UTC 24 |
| Finished | Aug 23 11:02:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3332669261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.3332669261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.4249592969 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 6402054005 ps |
| CPU time | 15.23 seconds |
| Started | Aug 23 11:02:33 PM UTC 24 |
| Finished | Aug 23 11:02:49 PM UTC 24 |
| Peak memory | 235160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249592969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.4249592969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.2029331230 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 178497396 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:02:34 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2029331230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.2029331230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.3198699361 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 201394870 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:02:34 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198699361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.3198699361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.2064774642 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 198555284 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:02:34 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064774642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.2064774642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.3810619950 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 200152231 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:02:34 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3810619950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.3810619950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.3627029258 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 165165104 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:02:34 PM UTC 24 |
| Finished | Aug 23 11:02:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3627029258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.3627029258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.3762287923 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 266204897 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:02:36 PM UTC 24 |
| Finished | Aug 23 11:02:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762287923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.3762287923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.3126383980 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 177418667 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:36 PM UTC 24 |
| Finished | Aug 23 11:02:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3126383980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.3126383980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.2180764563 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 155453757 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:36 PM UTC 24 |
| Finished | Aug 23 11:02:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180764563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.2180764563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2876547883 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 205069476 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:02:36 PM UTC 24 |
| Finished | Aug 23 11:02:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876547883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2876547883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.464334022 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 2232878163 ps |
| CPU time | 17.94 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:56 PM UTC 24 |
| Peak memory | 235124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=464334022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.464334022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1206267423 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 176077395 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1206267423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1206267423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.1103014055 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 163017213 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:39 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103014055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.1103014055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.1965708830 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 764893953 ps |
| CPU time | 2.02 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:40 PM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1965708830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stream_len_max.1965708830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.4210189138 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 2279566303 ps |
| CPU time | 14.37 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:53 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210189138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.4210189138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.2257854206 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 5230352290 ps |
| CPU time | 37.05 seconds |
| Started | Aug 23 11:02:20 PM UTC 24 |
| Finished | Aug 23 11:02:58 PM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257854206 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.2257854206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.3549973900 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 629506967 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:02:37 PM UTC 24 |
| Finished | Aug 23 11:02:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3549973900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.3549973900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.576605858 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 535253331 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=576605858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.576605858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.2149899576 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 644671196 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2149899576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.2149899576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.2470368227 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 587747170 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2470368227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.2470368227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.3796556090 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 544232615 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3796556090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_ tx_rx_disruption.3796556090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.3275329040 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 524052726 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3275329040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.3275329040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.3799749110 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 549693348 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 217012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3799749110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.3799749110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.1121267348 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 541666611 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 215800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1121267348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_ tx_rx_disruption.1121267348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.2845448918 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 561200577 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2845448918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.2845448918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.2607463598 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 484196745 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2607463598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_ tx_rx_disruption.2607463598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.1385288144 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 70911231 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:02:59 PM UTC 24 |
| Finished | Aug 23 11:03:01 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1385288144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.1385288144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.3062053936 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 9415296859 ps |
| CPU time | 11.87 seconds |
| Started | Aug 23 11:02:38 PM UTC 24 |
| Finished | Aug 23 11:02:51 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3062053936 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.3062053936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.2169903694 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 20111701921 ps |
| CPU time | 26.47 seconds |
| Started | Aug 23 11:02:38 PM UTC 24 |
| Finished | Aug 23 11:03:06 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169903694 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.2169903694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.1532258572 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 24358551449 ps |
| CPU time | 35.03 seconds |
| Started | Aug 23 11:02:38 PM UTC 24 |
| Finished | Aug 23 11:03:15 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532258572 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.1532258572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.4015176908 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 190811075 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:02:40 PM UTC 24 |
| Finished | Aug 23 11:02:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015176908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.4015176908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.1848570334 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 163007790 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:02:40 PM UTC 24 |
| Finished | Aug 23 11:02:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848570334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_bitstuff_err.1848570334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.2057984796 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 232752269 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:02:40 PM UTC 24 |
| Finished | Aug 23 11:02:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057984796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.2057984796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.2864290457 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 1229570628 ps |
| CPU time | 3.04 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:02:45 PM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864290457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.2864290457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.1279373433 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 22850666523 ps |
| CPU time | 42.07 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:03:25 PM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1279373433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_address.1279373433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.2643589640 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 1157177033 ps |
| CPU time | 20.36 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:03:03 PM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643589640 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.2643589640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.451604824 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 923507314 ps |
| CPU time | 1.93 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:02:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=451604824 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_disable_endpoint.451604824 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3909336506 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 165809730 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:02:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909336506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3909336506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_enable.1873501437 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 40557485 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:02:42 PM UTC 24 |
| Finished | Aug 23 11:02:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873501437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.1873501437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.1866584000 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 982716588 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 11:02:42 PM UTC 24 |
| Finished | Aug 23 11:02:45 PM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866584000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.1866584000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.4273179159 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 340718538 ps |
| CPU time | 1.76 seconds |
| Started | Aug 23 11:02:44 PM UTC 24 |
| Finished | Aug 23 11:02:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4273179159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.4273179159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.856151401 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 179285513 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:02:44 PM UTC 24 |
| Finished | Aug 23 11:02:45 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=856151401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.856151401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.1009338878 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 146199845 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:02:45 PM UTC 24 |
| Finished | Aug 23 11:02:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009338878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.1009338878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.1904354036 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 203522079 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:02:45 PM UTC 24 |
| Finished | Aug 23 11:02:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1904354036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.1904354036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.3002784685 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 4172584493 ps |
| CPU time | 26.51 seconds |
| Started | Aug 23 11:02:44 PM UTC 24 |
| Finished | Aug 23 11:03:11 PM UTC 24 |
| Peak memory | 228616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002784685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.3002784685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.1542492789 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 9774136695 ps |
| CPU time | 100.76 seconds |
| Started | Aug 23 11:02:45 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542492789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.1542492789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.2531052947 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 214404626 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:02:46 PM UTC 24 |
| Finished | Aug 23 11:02:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531052947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_in_err.2531052947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2811578290 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 32858932960 ps |
| CPU time | 46.92 seconds |
| Started | Aug 23 11:02:46 PM UTC 24 |
| Finished | Aug 23 11:03:35 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811578290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2811578290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.3562054232 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 11285469965 ps |
| CPU time | 13.06 seconds |
| Started | Aug 23 11:02:46 PM UTC 24 |
| Finished | Aug 23 11:03:00 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3562054232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_link_suspend.3562054232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.482232358 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 5066328391 ps |
| CPU time | 34.67 seconds |
| Started | Aug 23 11:02:46 PM UTC 24 |
| Finished | Aug 23 11:03:22 PM UTC 24 |
| Peak memory | 235144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=482232358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.482232358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.2537712742 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 2067166219 ps |
| CPU time | 13.12 seconds |
| Started | Aug 23 11:02:47 PM UTC 24 |
| Finished | Aug 23 11:03:02 PM UTC 24 |
| Peak memory | 235116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537712742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.2537712742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.2776904195 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 240806528 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:02:47 PM UTC 24 |
| Finished | Aug 23 11:02:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776904195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.2776904195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.2979216164 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 202355071 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:02:47 PM UTC 24 |
| Finished | Aug 23 11:02:49 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2979216164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.2979216164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.2023535952 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 2119815241 ps |
| CPU time | 17.31 seconds |
| Started | Aug 23 11:02:48 PM UTC 24 |
| Finished | Aug 23 11:03:07 PM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2023535952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.2023535952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.4014882847 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 167196652 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:02:50 PM UTC 24 |
| Finished | Aug 23 11:02:51 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4014882847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.4014882847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3818486763 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 147242707 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:02:50 PM UTC 24 |
| Finished | Aug 23 11:02:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818486763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3818486763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.2380705241 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 163797635 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:52 PM UTC 24 |
| Finished | Aug 23 11:02:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380705241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_out_iso.2380705241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.3959512726 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 151365228 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:52 PM UTC 24 |
| Finished | Aug 23 11:02:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959512726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.3959512726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.3156092651 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 180649895 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:02:52 PM UTC 24 |
| Finished | Aug 23 11:02:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3156092651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.3156092651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.1559598031 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 149570230 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:52 PM UTC 24 |
| Finished | Aug 23 11:02:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559598031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.1559598031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.3473292381 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 266919854 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:02:53 PM UTC 24 |
| Finished | Aug 23 11:02:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3473292381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.3473292381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.2206010459 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 151544003 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:02:53 PM UTC 24 |
| Finished | Aug 23 11:02:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2206010459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.2206010459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1511158074 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 52051534 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:02:53 PM UTC 24 |
| Finished | Aug 23 11:02:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1511158074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1511158074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.1196184047 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 17497464510 ps |
| CPU time | 43.98 seconds |
| Started | Aug 23 11:02:54 PM UTC 24 |
| Finished | Aug 23 11:03:40 PM UTC 24 |
| Peak memory | 232596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196184047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.1196184047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.2555750686 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 191808532 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:02:54 PM UTC 24 |
| Finished | Aug 23 11:02:56 PM UTC 24 |
| Peak memory | 217128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555750686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.2555750686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.253289304 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 240452050 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:02:54 PM UTC 24 |
| Finished | Aug 23 11:02:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253289304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_pkt_sent.253289304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.3354244090 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 229746247 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:02:54 PM UTC 24 |
| Finished | Aug 23 11:02:56 PM UTC 24 |
| Peak memory | 217060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354244090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_random_length_in_transaction.3354244090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.558823600 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 240523154 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:02:56 PM UTC 24 |
| Finished | Aug 23 11:02:58 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558823600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.558823600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.1579001852 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 146037852 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:02:56 PM UTC 24 |
| Finished | Aug 23 11:02:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579001852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_rx_crc_err.1579001852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.3557479082 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 417954622 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:02:56 PM UTC 24 |
| Finished | Aug 23 11:02:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3557479082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.3557479082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.4156837718 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 163990495 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:02:57 PM UTC 24 |
| Finished | Aug 23 11:02:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156837718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.4156837718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.3676266313 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 191202288 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:02:57 PM UTC 24 |
| Finished | Aug 23 11:02:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676266313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3676266313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.1143029482 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 226474092 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:02:57 PM UTC 24 |
| Finished | Aug 23 11:02:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143029482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.1143029482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.1685642449 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 2427659873 ps |
| CPU time | 56.28 seconds |
| Started | Aug 23 11:02:57 PM UTC 24 |
| Finished | Aug 23 11:03:55 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685642449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.1685642449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.1529673988 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 189435970 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:02:58 PM UTC 24 |
| Finished | Aug 23 11:03:00 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1529673988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.1529673988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.906164823 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 255020049 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:02:58 PM UTC 24 |
| Finished | Aug 23 11:03:00 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=906164823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_stall_trans.906164823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.3051466422 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 720018833 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 11:02:58 PM UTC 24 |
| Finished | Aug 23 11:03:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051466422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.3051466422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.3909720245 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 1835435000 ps |
| CPU time | 43.4 seconds |
| Started | Aug 23 11:02:58 PM UTC 24 |
| Finished | Aug 23 11:03:43 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909720245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.3909720245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.3905615092 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 2047722898 ps |
| CPU time | 15.3 seconds |
| Started | Aug 23 11:02:41 PM UTC 24 |
| Finished | Aug 23 11:02:58 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3905615092 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.3905615092 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.1418238966 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 529153665 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:02:59 PM UTC 24 |
| Finished | Aug 23 11:03:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1418238966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.1418238966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.127177203 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 541599872 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=127177203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_t x_rx_disruption.127177203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.656022632 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 546305782 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=656022632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_t x_rx_disruption.656022632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.1697052692 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 576509795 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:23 PM UTC 24 |
| Finished | Aug 23 11:10:32 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1697052692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.1697052692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.2767902690 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 484428466 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2767902690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.2767902690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.3982402702 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 587370938 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3982402702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_ tx_rx_disruption.3982402702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.1971677062 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 488325298 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1971677062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.1971677062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.2944281393 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 597006619 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2944281393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.2944281393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.1981624522 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 667864056 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1981624522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.1981624522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.3450266522 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 493454000 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:31 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3450266522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_ tx_rx_disruption.3450266522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.3711383521 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 533792452 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3711383521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.3711383521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.338698430 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 36573685 ps |
| CPU time | 0.56 seconds |
| Started | Aug 23 11:03:21 PM UTC 24 |
| Finished | Aug 23 11:03:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=338698430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.338698430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.2042671169 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 4971812464 ps |
| CPU time | 7.11 seconds |
| Started | Aug 23 11:02:59 PM UTC 24 |
| Finished | Aug 23 11:03:08 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2042671169 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.2042671169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.2510277025 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 19032190851 ps |
| CPU time | 25.07 seconds |
| Started | Aug 23 11:03:00 PM UTC 24 |
| Finished | Aug 23 11:03:26 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510277025 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.2510277025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.584362978 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 29465726958 ps |
| CPU time | 37.45 seconds |
| Started | Aug 23 11:03:01 PM UTC 24 |
| Finished | Aug 23 11:03:39 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=584362978 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.584362978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.1846990661 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 232091220 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:03:01 PM UTC 24 |
| Finished | Aug 23 11:03:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846990661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.1846990661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.3841059545 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 158565677 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:03:01 PM UTC 24 |
| Finished | Aug 23 11:03:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3841059545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.3841059545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.3151566677 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 453832093 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:03:02 PM UTC 24 |
| Finished | Aug 23 11:03:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151566677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.3151566677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.963567996 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 746873136 ps |
| CPU time | 1.79 seconds |
| Started | Aug 23 11:03:02 PM UTC 24 |
| Finished | Aug 23 11:03:05 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=963567996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.963567996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.1212238799 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 51296177868 ps |
| CPU time | 87.22 seconds |
| Started | Aug 23 11:03:02 PM UTC 24 |
| Finished | Aug 23 11:04:31 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1212238799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1212238799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.1688377592 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 2919607357 ps |
| CPU time | 16.43 seconds |
| Started | Aug 23 11:03:03 PM UTC 24 |
| Finished | Aug 23 11:03:21 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688377592 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.1688377592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.1955376089 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 513091136 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:03:03 PM UTC 24 |
| Finished | Aug 23 11:03:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1955376089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.1955376089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.2297439886 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 171033049 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:03 PM UTC 24 |
| Finished | Aug 23 11:03:05 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297439886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_disconnected.2297439886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_enable.207948587 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 102860310 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:03:03 PM UTC 24 |
| Finished | Aug 23 11:03:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=207948587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_enable.207948587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.1795248002 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 870585849 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 11:03:05 PM UTC 24 |
| Finished | Aug 23 11:03:09 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795248002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.1795248002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.41957819 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 668911103 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:03:06 PM UTC 24 |
| Finished | Aug 23 11:03:08 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=41957819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.41957819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.3410734511 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 197007432 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:03:06 PM UTC 24 |
| Finished | Aug 23 11:03:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3410734511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.3410734511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.4099564748 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 213370155 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:03:07 PM UTC 24 |
| Finished | Aug 23 11:03:09 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4099564748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.4099564748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.3624247793 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 144963342 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:07 PM UTC 24 |
| Finished | Aug 23 11:03:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3624247793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.3624247793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.2039198352 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 164426954 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:03:07 PM UTC 24 |
| Finished | Aug 23 11:03:09 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2039198352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.2039198352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.79504661 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 4530307052 ps |
| CPU time | 37.2 seconds |
| Started | Aug 23 11:03:06 PM UTC 24 |
| Finished | Aug 23 11:03:44 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=79504661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.79504661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2391884339 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 7977154801 ps |
| CPU time | 53.15 seconds |
| Started | Aug 23 11:03:07 PM UTC 24 |
| Finished | Aug 23 11:04:02 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391884339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2391884339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.3705971304 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 211445547 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:03:07 PM UTC 24 |
| Finished | Aug 23 11:03:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705971304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.3705971304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.2093918956 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 25808678171 ps |
| CPU time | 40.82 seconds |
| Started | Aug 23 11:03:08 PM UTC 24 |
| Finished | Aug 23 11:03:51 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2093918956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_resume.2093918956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.880475275 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 3706114301 ps |
| CPU time | 6.07 seconds |
| Started | Aug 23 11:03:08 PM UTC 24 |
| Finished | Aug 23 11:03:16 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880475275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_suspend.880475275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.1542248298 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 5776230895 ps |
| CPU time | 145.61 seconds |
| Started | Aug 23 11:03:09 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 232232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542248298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.1542248298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.556468000 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 2556917701 ps |
| CPU time | 61.27 seconds |
| Started | Aug 23 11:03:09 PM UTC 24 |
| Finished | Aug 23 11:04:12 PM UTC 24 |
| Peak memory | 228144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=556468000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.556468000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.2599793258 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 282036821 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:03:09 PM UTC 24 |
| Finished | Aug 23 11:03:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599793258 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.2599793258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.2270580621 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 198133268 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:03:10 PM UTC 24 |
| Finished | Aug 23 11:03:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270580621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.2270580621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.2646126007 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 2123746012 ps |
| CPU time | 18.38 seconds |
| Started | Aug 23 11:03:10 PM UTC 24 |
| Finished | Aug 23 11:03:29 PM UTC 24 |
| Peak memory | 228260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2646126007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.2646126007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.2562354055 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 158262297 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:10 PM UTC 24 |
| Finished | Aug 23 11:03:12 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562354055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.2562354055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.1939170769 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 148743520 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:10 PM UTC 24 |
| Finished | Aug 23 11:03:12 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939170769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.1939170769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.2864264205 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 189687857 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:03:10 PM UTC 24 |
| Finished | Aug 23 11:03:12 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2864264205 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.2864264205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.1318826701 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 212060504 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1318826701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.1318826701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.775334679 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 214104571 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775334679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_out_stall.775334679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.517409622 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 165619648 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517409622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_out_trans_nak.517409622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.3845161969 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 174894999 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845161969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.3845161969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.14334860 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 274708046 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=14334860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.14334860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.1107441946 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 138770206 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1107441946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.1107441946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.1202667519 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 40558383 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:03:12 PM UTC 24 |
| Finished | Aug 23 11:03:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1202667519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.1202667519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.1623594007 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 6058134928 ps |
| CPU time | 14.08 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:30 PM UTC 24 |
| Peak memory | 228064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1623594007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.1623594007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.1732858014 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 178709128 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:16 PM UTC 24 |
| Peak memory | 215484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732858014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_pkt_received.1732858014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2674577463 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 250275027 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674577463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2674577463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.492750767 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 216507143 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:17 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=492750767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_random_length_in_transaction.492750767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1798521632 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 161685311 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798521632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1798521632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.169498437 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 176911192 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:03:15 PM UTC 24 |
| Finished | Aug 23 11:03:17 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=169498437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.169498437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.3405554411 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 252701191 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:03:16 PM UTC 24 |
| Finished | Aug 23 11:03:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405554411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.3405554411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.3981475913 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 168989025 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:03:16 PM UTC 24 |
| Finished | Aug 23 11:03:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981475913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.3981475913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.4060304891 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 162514906 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:19 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4060304891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.4060304891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.2975051448 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 206808515 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:20 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975051448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_smoke.2975051448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.3133291333 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 1912349281 ps |
| CPU time | 16.04 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:35 PM UTC 24 |
| Peak memory | 230328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3133291333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.3133291333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.406729333 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 213227707 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406729333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.406729333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.1762188916 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 156882217 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:19 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762188916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.1762188916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.2994826906 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 1064830078 ps |
| CPU time | 2.74 seconds |
| Started | Aug 23 11:03:18 PM UTC 24 |
| Finished | Aug 23 11:03:22 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2994826906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.2994826906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.3781093771 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 3694452777 ps |
| CPU time | 29.92 seconds |
| Started | Aug 23 11:03:17 PM UTC 24 |
| Finished | Aug 23 11:03:49 PM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3781093771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.3781093771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.4216630629 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 3450344604 ps |
| CPU time | 26.36 seconds |
| Started | Aug 23 11:03:03 PM UTC 24 |
| Finished | Aug 23 11:03:31 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4216630629 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.4216630629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.2964255071 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 571211540 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:03:18 PM UTC 24 |
| Finished | Aug 23 11:03:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2964255071 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_t x_rx_disruption.2964255071 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.200236981 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 557764162 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=200236981 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_t x_rx_disruption.200236981 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.1441172763 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 640237297 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1441172763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.1441172763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.2497218606 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 479754848 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2497218606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.2497218606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.1150127727 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 449306819 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1150127727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.1150127727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.771497200 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 531298565 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=771497200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_t x_rx_disruption.771497200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.1410796634 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 466278733 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:10:32 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1410796634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_ tx_rx_disruption.1410796634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.2060464189 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 478274194 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:10:33 PM UTC 24 |
| Finished | Aug 23 11:10:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2060464189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_ tx_rx_disruption.2060464189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.4109573825 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 560060275 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:10:34 PM UTC 24 |
| Finished | Aug 23 11:10:37 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4109573825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.4109573825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.1272345031 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 477087750 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:34 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1272345031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_ tx_rx_disruption.1272345031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.1726266093 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 493056862 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:34 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1726266093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_ tx_rx_disruption.1726266093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.3189802211 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 64822446 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:03:43 PM UTC 24 |
| Finished | Aug 23 11:03:45 PM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189802211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3189802211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.1406447087 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 11257023297 ps |
| CPU time | 15.14 seconds |
| Started | Aug 23 11:03:21 PM UTC 24 |
| Finished | Aug 23 11:03:37 PM UTC 24 |
| Peak memory | 217332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406447087 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.1406447087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.768697392 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 19969458688 ps |
| CPU time | 24.38 seconds |
| Started | Aug 23 11:03:21 PM UTC 24 |
| Finished | Aug 23 11:03:46 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768697392 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.768697392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.2366170015 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 24727333815 ps |
| CPU time | 28.75 seconds |
| Started | Aug 23 11:03:22 PM UTC 24 |
| Finished | Aug 23 11:03:53 PM UTC 24 |
| Peak memory | 227992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2366170015 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.2366170015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.4090698763 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 168431169 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:03:22 PM UTC 24 |
| Finished | Aug 23 11:03:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4090698763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.4090698763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.289364606 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 149451998 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:03:22 PM UTC 24 |
| Finished | Aug 23 11:03:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=289364606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.289364606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.3001817380 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 381013421 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:03:23 PM UTC 24 |
| Finished | Aug 23 11:03:26 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3001817380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.3001817380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.3504258435 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 331929308 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:03:23 PM UTC 24 |
| Finished | Aug 23 11:03:26 PM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504258435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.3504258435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.130383766 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 15460924010 ps |
| CPU time | 23.2 seconds |
| Started | Aug 23 11:03:23 PM UTC 24 |
| Finished | Aug 23 11:03:49 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=130383766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_device_address.130383766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.163965535 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 163467594 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:03:23 PM UTC 24 |
| Finished | Aug 23 11:03:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=163965535 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.163965535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.2301236250 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 835292601 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 11:03:26 PM UTC 24 |
| Finished | Aug 23 11:03:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301236250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.2301236250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.4037500662 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 160615373 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:26 PM UTC 24 |
| Finished | Aug 23 11:03:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037500662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_disconnected.4037500662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_enable.3094473171 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 36642716 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:03:27 PM UTC 24 |
| Finished | Aug 23 11:03:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094473171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.3094473171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.2168668682 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 854494668 ps |
| CPU time | 2.07 seconds |
| Started | Aug 23 11:03:27 PM UTC 24 |
| Finished | Aug 23 11:03:30 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2168668682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_access.2168668682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.2154565410 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 316180205 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:03:27 PM UTC 24 |
| Finished | Aug 23 11:03:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2154565410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.2154565410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.1296167711 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 194109927 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:28 PM UTC 24 |
| Finished | Aug 23 11:03:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296167711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.1296167711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.3195205772 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 147060482 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:29 PM UTC 24 |
| Finished | Aug 23 11:03:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3195205772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.3195205772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.789429093 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 214500350 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:03:29 PM UTC 24 |
| Finished | Aug 23 11:03:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=789429093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_in_trans.789429093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.839548329 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 4098585093 ps |
| CPU time | 34.31 seconds |
| Started | Aug 23 11:03:28 PM UTC 24 |
| Finished | Aug 23 11:04:04 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=839548329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.839548329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.4006275530 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 7527371768 ps |
| CPU time | 42.05 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:04:14 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006275530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.4006275530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.2621323855 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 212155618 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:03:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2621323855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.2621323855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.4287296772 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 31538371843 ps |
| CPU time | 48.04 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:04:20 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287296772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.4287296772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.2652593898 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 5409773111 ps |
| CPU time | 7.48 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:03:40 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652593898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.2652593898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.722301978 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 3278741165 ps |
| CPU time | 28.15 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:04:00 PM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=722301978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.722301978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.666574491 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 3220357023 ps |
| CPU time | 76.17 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:04:49 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=666574491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.666574491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.533738382 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 255928940 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:03:31 PM UTC 24 |
| Finished | Aug 23 11:03:33 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=533738382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.533738382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2881738458 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 188635519 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:32 PM UTC 24 |
| Finished | Aug 23 11:03:34 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2881738458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2881738458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.1301149385 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 2037191233 ps |
| CPU time | 46.35 seconds |
| Started | Aug 23 11:03:32 PM UTC 24 |
| Finished | Aug 23 11:04:20 PM UTC 24 |
| Peak memory | 230328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301149385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.1301149385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.535073046 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 149913057 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:32 PM UTC 24 |
| Finished | Aug 23 11:03:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=535073046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.535073046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.92842147 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 190884093 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:33 PM UTC 24 |
| Finished | Aug 23 11:03:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92842147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.92842147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.3023763273 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 208147401 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:03:33 PM UTC 24 |
| Finished | Aug 23 11:03:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023763273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_nak_trans.3023763273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.3337951152 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 169255998 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:03:34 PM UTC 24 |
| Finished | Aug 23 11:03:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337951152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.3337951152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.2159550715 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 212124411 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:34 PM UTC 24 |
| Finished | Aug 23 11:03:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159550715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_out_stall.2159550715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.1683622698 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 168429717 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:36 PM UTC 24 |
| Finished | Aug 23 11:03:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683622698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.1683622698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.3584289485 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 156728666 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:36 PM UTC 24 |
| Finished | Aug 23 11:03:38 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584289485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.3584289485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.3486256584 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 221413195 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:03:36 PM UTC 24 |
| Finished | Aug 23 11:03:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3486256584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.3486256584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.3951005731 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 144399227 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:03:37 PM UTC 24 |
| Finished | Aug 23 11:03:39 PM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3951005731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.3951005731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.517101901 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 40993326 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:03:37 PM UTC 24 |
| Finished | Aug 23 11:03:39 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=517101901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_phy_pins_sense.517101901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.1851864797 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 12839247575 ps |
| CPU time | 33.88 seconds |
| Started | Aug 23 11:03:38 PM UTC 24 |
| Finished | Aug 23 11:04:14 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851864797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.1851864797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.2202752846 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 193906602 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:03:38 PM UTC 24 |
| Finished | Aug 23 11:03:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2202752846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.2202752846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.2785188330 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 159745332 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:38 PM UTC 24 |
| Finished | Aug 23 11:03:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2785188330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.2785188330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.3128458091 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 238082874 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:03:38 PM UTC 24 |
| Finished | Aug 23 11:03:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3128458091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.3128458091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.2388548856 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 159218713 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:38 PM UTC 24 |
| Finished | Aug 23 11:03:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388548856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.2388548856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1738786933 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 152570372 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:03:39 PM UTC 24 |
| Finished | Aug 23 11:03:41 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738786933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1738786933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.783506742 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 355698148 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 11:03:39 PM UTC 24 |
| Finished | Aug 23 11:03:42 PM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=783506742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_rx_full.783506742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.1541772262 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 148018508 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:03:39 PM UTC 24 |
| Finished | Aug 23 11:03:42 PM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1541772262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_setup_stage.1541772262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.2135101389 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 153362971 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:41 PM UTC 24 |
| Finished | Aug 23 11:03:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135101389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 34.usbdev_setup_trans_ignored.2135101389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.337755341 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 188435379 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:03:41 PM UTC 24 |
| Finished | Aug 23 11:03:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337755341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.337755341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.1049983796 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 2052319879 ps |
| CPU time | 17.1 seconds |
| Started | Aug 23 11:03:41 PM UTC 24 |
| Finished | Aug 23 11:03:59 PM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1049983796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.1049983796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.3012254293 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 149483080 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:03:42 PM UTC 24 |
| Finished | Aug 23 11:03:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3012254293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.3012254293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.1899573607 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 172219529 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:03:42 PM UTC 24 |
| Finished | Aug 23 11:03:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1899573607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.1899573607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.1271853108 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 324238669 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:03:42 PM UTC 24 |
| Finished | Aug 23 11:03:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271853108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1271853108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.2909066527 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 1824601195 ps |
| CPU time | 41.93 seconds |
| Started | Aug 23 11:03:42 PM UTC 24 |
| Finished | Aug 23 11:04:26 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909066527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_streaming_out.2909066527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.1907242636 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 144434370 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:03:26 PM UTC 24 |
| Finished | Aug 23 11:03:28 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907242636 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.1907242636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.432091421 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 536126480 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:03:42 PM UTC 24 |
| Finished | Aug 23 11:03:45 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=432091421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_tx _rx_disruption.432091421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.1619532428 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 457964823 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:10:34 PM UTC 24 |
| Finished | Aug 23 11:10:46 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1619532428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.1619532428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.986028648 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 490563794 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=986028648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_t x_rx_disruption.986028648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.1713473555 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 623777171 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713473555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.1713473555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.2531503109 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 446212504 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2531503109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.2531503109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.441000519 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 511431492 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=441000519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.441000519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.1382644377 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 660974253 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1382644377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.1382644377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2696185791 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 471861857 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2696185791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2696185791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.1662377422 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 584582152 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1662377422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.1662377422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.3054388220 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 411064978 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3054388220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.3054388220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.2223011303 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 545314181 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223011303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_ tx_rx_disruption.2223011303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.662472475 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 61463043 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:04:04 PM UTC 24 |
| Finished | Aug 23 11:04:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=662472475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.662472475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.3611458477 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 11705361282 ps |
| CPU time | 13.27 seconds |
| Started | Aug 23 11:03:43 PM UTC 24 |
| Finished | Aug 23 11:03:58 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611458477 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.3611458477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.872671913 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 16286183813 ps |
| CPU time | 17.33 seconds |
| Started | Aug 23 11:03:43 PM UTC 24 |
| Finished | Aug 23 11:04:02 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=872671913 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.872671913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1685530422 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 26002491563 ps |
| CPU time | 34.07 seconds |
| Started | Aug 23 11:03:43 PM UTC 24 |
| Finished | Aug 23 11:04:19 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685530422 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1685530422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.2629642040 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 176581770 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:03:45 PM UTC 24 |
| Finished | Aug 23 11:03:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629642040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_av_buffer.2629642040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.1218921048 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 148590431 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:45 PM UTC 24 |
| Finished | Aug 23 11:03:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218921048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_bitstuff_err.1218921048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.2113273327 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 435133650 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:03:45 PM UTC 24 |
| Finished | Aug 23 11:03:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113273327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 35.usbdev_data_toggle_clear.2113273327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.1201185190 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 550436270 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:03:45 PM UTC 24 |
| Finished | Aug 23 11:03:48 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201185190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.1201185190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.3872929879 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 39868270180 ps |
| CPU time | 60.55 seconds |
| Started | Aug 23 11:03:46 PM UTC 24 |
| Finished | Aug 23 11:04:48 PM UTC 24 |
| Peak memory | 218440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872929879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.3872929879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.3832797625 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 173221028 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:03:46 PM UTC 24 |
| Finished | Aug 23 11:03:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832797625 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.3832797625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.3289684147 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 853538992 ps |
| CPU time | 1.8 seconds |
| Started | Aug 23 11:03:47 PM UTC 24 |
| Finished | Aug 23 11:03:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3289684147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.3289684147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.2680161004 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 133922846 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:03:47 PM UTC 24 |
| Finished | Aug 23 11:03:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680161004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.2680161004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_enable.3770903242 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 48132599 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:03:47 PM UTC 24 |
| Finished | Aug 23 11:03:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3770903242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_enable.3770903242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.608283064 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 803501848 ps |
| CPU time | 2.14 seconds |
| Started | Aug 23 11:03:48 PM UTC 24 |
| Finished | Aug 23 11:03:51 PM UTC 24 |
| Peak memory | 217524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608283064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.608283064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3199499135 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 436870650 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:03:48 PM UTC 24 |
| Finished | Aug 23 11:03:51 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199499135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3199499135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.2547178809 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 186381886 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:03:50 PM UTC 24 |
| Finished | Aug 23 11:03:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2547178809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.2547178809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.1332190265 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 238190721 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:03:50 PM UTC 24 |
| Finished | Aug 23 11:03:52 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332190265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.1332190265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.845628124 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 139920313 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:50 PM UTC 24 |
| Finished | Aug 23 11:03:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=845628124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_in_stall.845628124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.4046667240 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 251869492 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:03:50 PM UTC 24 |
| Finished | Aug 23 11:03:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046667240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.4046667240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.3854996259 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 4590335108 ps |
| CPU time | 30.73 seconds |
| Started | Aug 23 11:03:50 PM UTC 24 |
| Finished | Aug 23 11:04:22 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854996259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.3854996259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.2593137840 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 7305710454 ps |
| CPU time | 78.8 seconds |
| Started | Aug 23 11:03:51 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2593137840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.2593137840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.2320742644 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 204628144 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:03:52 PM UTC 24 |
| Finished | Aug 23 11:03:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320742644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.2320742644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.570912324 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 26324167040 ps |
| CPU time | 32.82 seconds |
| Started | Aug 23 11:03:52 PM UTC 24 |
| Finished | Aug 23 11:04:26 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=570912324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_resume.570912324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.2378462102 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 5194872802 ps |
| CPU time | 7.14 seconds |
| Started | Aug 23 11:03:52 PM UTC 24 |
| Finished | Aug 23 11:04:00 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378462102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_link_suspend.2378462102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.810725285 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 2971378282 ps |
| CPU time | 69.45 seconds |
| Started | Aug 23 11:03:52 PM UTC 24 |
| Finished | Aug 23 11:05:03 PM UTC 24 |
| Peak memory | 235396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=810725285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.810725285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.29757025 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 2916127777 ps |
| CPU time | 69.55 seconds |
| Started | Aug 23 11:03:53 PM UTC 24 |
| Finished | Aug 23 11:05:04 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=29757025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.29757025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.3725108331 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 238898718 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:03:53 PM UTC 24 |
| Finished | Aug 23 11:03:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725108331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.3725108331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.3753596706 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 230143141 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:03:53 PM UTC 24 |
| Finished | Aug 23 11:03:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3753596706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.3753596706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.3252713218 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 2199778643 ps |
| CPU time | 18.36 seconds |
| Started | Aug 23 11:03:54 PM UTC 24 |
| Finished | Aug 23 11:04:14 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252713218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.3252713218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.3110424752 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 174313341 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:03:54 PM UTC 24 |
| Finished | Aug 23 11:03:56 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3110424752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.3110424752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.3796594827 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 145053533 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:03:54 PM UTC 24 |
| Finished | Aug 23 11:03:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796594827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.3796594827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.807645449 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 236438597 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:03:56 PM UTC 24 |
| Finished | Aug 23 11:03:57 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=807645449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_nak_trans.807645449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.380423088 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 145463900 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:03:56 PM UTC 24 |
| Finished | Aug 23 11:03:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380423088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_out_iso.380423088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.3100933936 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 216720328 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:57 PM UTC 24 |
| Finished | Aug 23 11:03:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100933936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.3100933936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.4035833402 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 181297441 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:03:57 PM UTC 24 |
| Finished | Aug 23 11:03:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4035833402 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.4035833402 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.2817922809 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 144868274 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:03:57 PM UTC 24 |
| Finished | Aug 23 11:03:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2817922809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_pending_in_trans.2817922809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.2478089830 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 222615876 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:03:58 PM UTC 24 |
| Finished | Aug 23 11:04:00 PM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2478089830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.2478089830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.2750947259 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 182665692 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:03:58 PM UTC 24 |
| Finished | Aug 23 11:04:00 PM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2750947259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.2750947259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.2232312809 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 30333786 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:03:59 PM UTC 24 |
| Finished | Aug 23 11:04:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2232312809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_pins_sense.2232312809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.2423277003 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 13758787180 ps |
| CPU time | 32.73 seconds |
| Started | Aug 23 11:03:59 PM UTC 24 |
| Finished | Aug 23 11:04:33 PM UTC 24 |
| Peak memory | 232668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423277003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.2423277003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.471466065 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 186374604 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:03:59 PM UTC 24 |
| Finished | Aug 23 11:04:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471466065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_pkt_received.471466065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.3474573659 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 205855626 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:03:59 PM UTC 24 |
| Finished | Aug 23 11:04:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474573659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.3474573659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.626743316 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 178136749 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:04:00 PM UTC 24 |
| Finished | Aug 23 11:04:02 PM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=626743316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_random_length_in_transaction.626743316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.564358863 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 183305277 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:00 PM UTC 24 |
| Finished | Aug 23 11:04:02 PM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564358863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.564358863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.3947192322 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 165035088 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:00 PM UTC 24 |
| Finished | Aug 23 11:04:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947192322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.3947192322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.2853890005 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 363153938 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:04:02 PM UTC 24 |
| Finished | Aug 23 11:04:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853890005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.2853890005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1655230036 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 155897613 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:04:02 PM UTC 24 |
| Finished | Aug 23 11:04:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655230036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1655230036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.1287452815 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 160058260 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:04:02 PM UTC 24 |
| Finished | Aug 23 11:04:04 PM UTC 24 |
| Peak memory | 215452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287452815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 35.usbdev_setup_trans_ignored.1287452815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.3483478699 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 232436029 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:04:02 PM UTC 24 |
| Finished | Aug 23 11:04:04 PM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483478699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.3483478699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.3866856078 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 3089899351 ps |
| CPU time | 25.18 seconds |
| Started | Aug 23 11:04:02 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3866856078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.3866856078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.2692785911 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 227625500 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:04:03 PM UTC 24 |
| Finished | Aug 23 11:04:05 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2692785911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.2692785911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.1685367850 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 181293281 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:04:03 PM UTC 24 |
| Finished | Aug 23 11:04:05 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685367850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.1685367850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.3003096902 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 698196124 ps |
| CPU time | 1.81 seconds |
| Started | Aug 23 11:04:03 PM UTC 24 |
| Finished | Aug 23 11:04:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3003096902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.3003096902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.2468311798 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 2170541711 ps |
| CPU time | 13.84 seconds |
| Started | Aug 23 11:04:03 PM UTC 24 |
| Finished | Aug 23 11:04:18 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468311798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.2468311798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.1443051987 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 1031373280 ps |
| CPU time | 18.9 seconds |
| Started | Aug 23 11:03:46 PM UTC 24 |
| Finished | Aug 23 11:04:06 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443051987 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.1443051987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.2492325909 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 500567297 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:04:03 PM UTC 24 |
| Finished | Aug 23 11:04:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2492325909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.2492325909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.529272446 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 495914489 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=529272446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_t x_rx_disruption.529272446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.3829697290 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 658032594 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3829697290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_ tx_rx_disruption.3829697290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.2638853962 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 585591147 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2638853962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.2638853962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.3334431877 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 399685005 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:40 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3334431877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.3334431877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.1277232687 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 568390460 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1277232687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.1277232687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.1936196647 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 458156228 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1936196647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_ tx_rx_disruption.1936196647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.1167677700 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 443443931 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 11:10:38 PM UTC 24 |
| Finished | Aug 23 11:10:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1167677700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.1167677700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.2047204808 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 435977729 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2047204808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.2047204808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.1602832774 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 538860667 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1602832774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_ tx_rx_disruption.1602832774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.3510188376 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 499664710 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3510188376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.3510188376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.3216778132 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 40424241 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:04:27 PM UTC 24 |
| Finished | Aug 23 11:04:29 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216778132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.3216778132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.1640303039 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 12325403704 ps |
| CPU time | 14.88 seconds |
| Started | Aug 23 11:04:04 PM UTC 24 |
| Finished | Aug 23 11:04:20 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1640303039 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.1640303039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.757730974 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 18597212207 ps |
| CPU time | 22.79 seconds |
| Started | Aug 23 11:04:04 PM UTC 24 |
| Finished | Aug 23 11:04:29 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=757730974 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.757730974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.429359348 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 29950141052 ps |
| CPU time | 37.03 seconds |
| Started | Aug 23 11:04:05 PM UTC 24 |
| Finished | Aug 23 11:04:43 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=429359348 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.429359348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.1441626256 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 182080527 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:06 PM UTC 24 |
| Finished | Aug 23 11:04:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1441626256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_av_buffer.1441626256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.317859353 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 177967533 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:04:06 PM UTC 24 |
| Finished | Aug 23 11:04:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=317859353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_bitstuff_err.317859353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.3063727739 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 232022822 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:04:07 PM UTC 24 |
| Finished | Aug 23 11:04:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3063727739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 36.usbdev_data_toggle_clear.3063727739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.3313715512 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 1239315260 ps |
| CPU time | 2.93 seconds |
| Started | Aug 23 11:04:07 PM UTC 24 |
| Finished | Aug 23 11:04:11 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313715512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.3313715512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.2059309804 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 15875308887 ps |
| CPU time | 25.51 seconds |
| Started | Aug 23 11:04:07 PM UTC 24 |
| Finished | Aug 23 11:04:34 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2059309804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.2059309804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.3787415702 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 1074301528 ps |
| CPU time | 7.7 seconds |
| Started | Aug 23 11:04:07 PM UTC 24 |
| Finished | Aug 23 11:04:16 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3787415702 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.3787415702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.2645468548 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 740049596 ps |
| CPU time | 1.78 seconds |
| Started | Aug 23 11:04:08 PM UTC 24 |
| Finished | Aug 23 11:04:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645468548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.2645468548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.1083828242 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 152433802 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:04:08 PM UTC 24 |
| Finished | Aug 23 11:04:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1083828242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_disconnected.1083828242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_enable.1667011187 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 44262390 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:04:10 PM UTC 24 |
| Finished | Aug 23 11:04:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1667011187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.1667011187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.468792309 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 951604384 ps |
| CPU time | 2.24 seconds |
| Started | Aug 23 11:04:10 PM UTC 24 |
| Finished | Aug 23 11:04:13 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=468792309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.468792309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.513455176 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 492167502 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:04:11 PM UTC 24 |
| Finished | Aug 23 11:04:14 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=513455176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.513455176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2613782887 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 468417600 ps |
| CPU time | 2.55 seconds |
| Started | Aug 23 11:04:11 PM UTC 24 |
| Finished | Aug 23 11:04:15 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2613782887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2613782887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.3088007167 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 165742810 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:04:13 PM UTC 24 |
| Finished | Aug 23 11:04:14 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3088007167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.3088007167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.4016066442 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 182000449 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:04:15 PM UTC 24 |
| Finished | Aug 23 11:04:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016066442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.4016066442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.1769968265 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 228090806 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:04:15 PM UTC 24 |
| Finished | Aug 23 11:04:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1769968265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.1769968265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.3570012069 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 4230581557 ps |
| CPU time | 35.52 seconds |
| Started | Aug 23 11:04:13 PM UTC 24 |
| Finished | Aug 23 11:04:49 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570012069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.3570012069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.977812351 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 11307773033 ps |
| CPU time | 118.88 seconds |
| Started | Aug 23 11:04:15 PM UTC 24 |
| Finished | Aug 23 11:06:16 PM UTC 24 |
| Peak memory | 219816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=977812351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.977812351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.3959137601 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 154870013 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:15 PM UTC 24 |
| Finished | Aug 23 11:04:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959137601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.3959137601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.2562384163 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 12832170579 ps |
| CPU time | 16.99 seconds |
| Started | Aug 23 11:04:15 PM UTC 24 |
| Finished | Aug 23 11:04:33 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562384163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.2562384163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.2159110073 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 9870965421 ps |
| CPU time | 11.11 seconds |
| Started | Aug 23 11:04:16 PM UTC 24 |
| Finished | Aug 23 11:04:29 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159110073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.2159110073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.4040187698 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 3735039966 ps |
| CPU time | 25.57 seconds |
| Started | Aug 23 11:04:16 PM UTC 24 |
| Finished | Aug 23 11:04:43 PM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040187698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.4040187698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.3008380786 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 2988557811 ps |
| CPU time | 68.91 seconds |
| Started | Aug 23 11:04:16 PM UTC 24 |
| Finished | Aug 23 11:05:27 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3008380786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.3008380786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.1893277225 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 232170633 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:04:17 PM UTC 24 |
| Finished | Aug 23 11:04:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893277225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.1893277225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.2119955352 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 193060065 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:04:17 PM UTC 24 |
| Finished | Aug 23 11:04:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119955352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.2119955352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.2865307517 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 1843875645 ps |
| CPU time | 15.19 seconds |
| Started | Aug 23 11:04:17 PM UTC 24 |
| Finished | Aug 23 11:04:34 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2865307517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.2865307517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.3181433151 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 147338020 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:04:19 PM UTC 24 |
| Finished | Aug 23 11:04:20 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3181433151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.3181433151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.2374413005 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 150332195 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:04:20 PM UTC 24 |
| Finished | Aug 23 11:04:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374413005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.2374413005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.2328237168 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 197054325 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328237168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.2328237168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.2832184546 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 194517176 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2832184546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.2832184546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.3194825932 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 154465723 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 215944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3194825932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.3194825932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.1545441287 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 199042136 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545441287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.1545441287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.1179421201 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 152272026 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1179421201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.1179421201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.3893435329 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 215342110 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:04:21 PM UTC 24 |
| Finished | Aug 23 11:04:23 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893435329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.3893435329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.2531722035 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 156849069 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:04:22 PM UTC 24 |
| Finished | Aug 23 11:04:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531722035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.2531722035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.3541516202 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 37686248 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:04:22 PM UTC 24 |
| Finished | Aug 23 11:04:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541516202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.3541516202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.605865744 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 18444904348 ps |
| CPU time | 40.73 seconds |
| Started | Aug 23 11:04:23 PM UTC 24 |
| Finished | Aug 23 11:05:06 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605865744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_pkt_buffer.605865744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.4267641339 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 174838191 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:04:23 PM UTC 24 |
| Finished | Aug 23 11:04:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267641339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.4267641339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.3226493977 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 160325776 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:04:23 PM UTC 24 |
| Finished | Aug 23 11:04:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226493977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.3226493977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.2231301178 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 218684318 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:04:23 PM UTC 24 |
| Finished | Aug 23 11:04:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231301178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.2231301178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.3601298883 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 196116845 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:24 PM UTC 24 |
| Finished | Aug 23 11:04:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601298883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.3601298883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.1287555262 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 161809436 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:04:24 PM UTC 24 |
| Finished | Aug 23 11:04:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1287555262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.1287555262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.1887016627 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 244220999 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:04:25 PM UTC 24 |
| Finished | Aug 23 11:04:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1887016627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.1887016627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.1692647026 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 148086929 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:04:25 PM UTC 24 |
| Finished | Aug 23 11:04:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692647026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_setup_stage.1692647026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.404293958 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 156190190 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:26 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=404293958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 36.usbdev_setup_trans_ignored.404293958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.1814363743 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 269813121 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:04:26 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814363743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.1814363743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.3141983763 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 3128999240 ps |
| CPU time | 26.59 seconds |
| Started | Aug 23 11:04:26 PM UTC 24 |
| Finished | Aug 23 11:04:54 PM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141983763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.3141983763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.3580844342 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 200683084 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:04:26 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3580844342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.3580844342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.1404563914 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 167382951 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:26 PM UTC 24 |
| Finished | Aug 23 11:04:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1404563914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.1404563914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.393681538 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 772097163 ps |
| CPU time | 1.86 seconds |
| Started | Aug 23 11:04:27 PM UTC 24 |
| Finished | Aug 23 11:04:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=393681538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_stream_len_max.393681538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.1377813801 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 2004446635 ps |
| CPU time | 12.48 seconds |
| Started | Aug 23 11:04:27 PM UTC 24 |
| Finished | Aug 23 11:04:41 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1377813801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.1377813801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1983534838 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 1344025638 ps |
| CPU time | 24.96 seconds |
| Started | Aug 23 11:04:07 PM UTC 24 |
| Finished | Aug 23 11:04:33 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1983534838 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1983534838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.414990159 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 686730127 ps |
| CPU time | 1.84 seconds |
| Started | Aug 23 11:04:27 PM UTC 24 |
| Finished | Aug 23 11:04:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=414990159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_tx _rx_disruption.414990159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.728652355 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 479711744 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=728652355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_t x_rx_disruption.728652355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.3851037429 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 485182973 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3851037429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.3851037429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.3739025674 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 530556537 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3739025674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.3739025674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.3911120112 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 471222991 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:10:41 PM UTC 24 |
| Finished | Aug 23 11:10:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3911120112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.3911120112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.145603072 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 478404548 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=145603072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_t x_rx_disruption.145603072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.1815812632 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 583515338 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1815812632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_ tx_rx_disruption.1815812632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.2933141316 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 460985355 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:50 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2933141316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_ tx_rx_disruption.2933141316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.1227003073 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 527751587 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1227003073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.1227003073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.2895202746 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 416955950 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2895202746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_ tx_rx_disruption.2895202746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.2075570482 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 490535681 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2075570482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.2075570482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.2930214202 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 50506930 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:04:47 PM UTC 24 |
| Finished | Aug 23 11:04:48 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930214202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.2930214202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.3290007679 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 5274293451 ps |
| CPU time | 6.62 seconds |
| Started | Aug 23 11:04:29 PM UTC 24 |
| Finished | Aug 23 11:04:36 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290007679 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.3290007679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.1234857190 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 16387360438 ps |
| CPU time | 21.08 seconds |
| Started | Aug 23 11:04:29 PM UTC 24 |
| Finished | Aug 23 11:04:51 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1234857190 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.1234857190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3509931093 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 28525253466 ps |
| CPU time | 34.55 seconds |
| Started | Aug 23 11:04:29 PM UTC 24 |
| Finished | Aug 23 11:05:05 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509931093 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3509931093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.1578131920 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 180780691 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:29 PM UTC 24 |
| Finished | Aug 23 11:04:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578131920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.1578131920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.1364235460 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 214243948 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:04:29 PM UTC 24 |
| Finished | Aug 23 11:04:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364235460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.1364235460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.2946199382 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 423124877 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:04:30 PM UTC 24 |
| Finished | Aug 23 11:04:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946199382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.2946199382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3259315203 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 395154659 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 11:04:30 PM UTC 24 |
| Finished | Aug 23 11:04:32 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259315203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3259315203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.762133411 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 48887237181 ps |
| CPU time | 66.92 seconds |
| Started | Aug 23 11:04:30 PM UTC 24 |
| Finished | Aug 23 11:05:39 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762133411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_device_address.762133411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.1819601512 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 4791884079 ps |
| CPU time | 35.72 seconds |
| Started | Aug 23 11:04:30 PM UTC 24 |
| Finished | Aug 23 11:05:07 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819601512 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.1819601512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.250922713 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 717176165 ps |
| CPU time | 1.69 seconds |
| Started | Aug 23 11:04:32 PM UTC 24 |
| Finished | Aug 23 11:04:35 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=250922713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_disable_endpoint.250922713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.3188047345 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 137972035 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:32 PM UTC 24 |
| Finished | Aug 23 11:04:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3188047345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.3188047345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_enable.1010975083 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 55863794 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:04:32 PM UTC 24 |
| Finished | Aug 23 11:04:34 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010975083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.1010975083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.794053636 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 835614773 ps |
| CPU time | 2.14 seconds |
| Started | Aug 23 11:04:32 PM UTC 24 |
| Finished | Aug 23 11:04:35 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794053636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.794053636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.1195563451 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 315163982 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 11:04:32 PM UTC 24 |
| Finished | Aug 23 11:04:34 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195563451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.1195563451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.1172243229 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 181738238 ps |
| CPU time | 1.91 seconds |
| Started | Aug 23 11:04:33 PM UTC 24 |
| Finished | Aug 23 11:04:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172243229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.1172243229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.407651185 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 280416442 ps |
| CPU time | 1.16 seconds |
| Started | Aug 23 11:04:34 PM UTC 24 |
| Finished | Aug 23 11:04:37 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407651185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.407651185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.1228156186 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 198441496 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:04:34 PM UTC 24 |
| Finished | Aug 23 11:04:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1228156186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_stall.1228156186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.3806903623 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 260129406 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:04:34 PM UTC 24 |
| Finished | Aug 23 11:04:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806903623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.3806903623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.1977307806 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 5007708426 ps |
| CPU time | 118.33 seconds |
| Started | Aug 23 11:04:34 PM UTC 24 |
| Finished | Aug 23 11:06:35 PM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1977307806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.1977307806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.1802569332 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 11852746010 ps |
| CPU time | 63.11 seconds |
| Started | Aug 23 11:04:34 PM UTC 24 |
| Finished | Aug 23 11:05:39 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802569332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.1802569332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.1369780941 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 212545746 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:04:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369780941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_in_err.1369780941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.2150742431 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 6827364722 ps |
| CPU time | 8.78 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:04:46 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150742431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.2150742431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.3074015946 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 9314554361 ps |
| CPU time | 13.03 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:04:50 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3074015946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.3074015946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.1076821548 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 3880288280 ps |
| CPU time | 25.96 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:05:03 PM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1076821548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.1076821548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.2862704636 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 2618118382 ps |
| CPU time | 17.5 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:04:55 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2862704636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.2862704636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.3670876110 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 240964358 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:04:36 PM UTC 24 |
| Finished | Aug 23 11:04:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670876110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.3670876110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.209976497 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 206566785 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:04:37 PM UTC 24 |
| Finished | Aug 23 11:04:39 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=209976497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.209976497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.4154197872 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 1634204467 ps |
| CPU time | 35.62 seconds |
| Started | Aug 23 11:04:37 PM UTC 24 |
| Finished | Aug 23 11:05:14 PM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154197872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.4154197872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3291652663 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 159283249 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:04:37 PM UTC 24 |
| Finished | Aug 23 11:04:39 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291652663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3291652663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3546583804 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 166796095 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:04:37 PM UTC 24 |
| Finished | Aug 23 11:04:39 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546583804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.3546583804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.3095805791 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 196749297 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:37 PM UTC 24 |
| Finished | Aug 23 11:04:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095805791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.3095805791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.1855931999 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 165157312 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:04:38 PM UTC 24 |
| Finished | Aug 23 11:04:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1855931999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.1855931999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.671760190 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 181293386 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:04:39 PM UTC 24 |
| Finished | Aug 23 11:04:41 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=671760190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_out_stall.671760190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.2117857941 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 190538617 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:04:40 PM UTC 24 |
| Finished | Aug 23 11:04:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117857941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.2117857941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.3182417592 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 157068148 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:04:40 PM UTC 24 |
| Finished | Aug 23 11:04:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182417592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_pending_in_trans.3182417592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.2558820939 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 213729434 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:04:41 PM UTC 24 |
| Finished | Aug 23 11:04:42 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2558820939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.2558820939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.2230011959 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 204774848 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:04:41 PM UTC 24 |
| Finished | Aug 23 11:04:42 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2230011959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.2230011959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.3465027234 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 91499047 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:04:41 PM UTC 24 |
| Finished | Aug 23 11:04:42 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3465027234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.3465027234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.1122646142 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 19301218362 ps |
| CPU time | 43.04 seconds |
| Started | Aug 23 11:04:42 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122646142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_pkt_buffer.1122646142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.1032052997 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 173548320 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:04:42 PM UTC 24 |
| Finished | Aug 23 11:04:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032052997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_pkt_received.1032052997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.3358523214 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 212278150 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:04:43 PM UTC 24 |
| Finished | Aug 23 11:04:45 PM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358523214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.3358523214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.186589113 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 180592735 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:04:43 PM UTC 24 |
| Finished | Aug 23 11:04:45 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=186589113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_random_length_in_transaction.186589113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.3582225958 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 178713065 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:04:43 PM UTC 24 |
| Finished | Aug 23 11:04:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3582225958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.3582225958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.2078943793 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 137103975 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:04:43 PM UTC 24 |
| Finished | Aug 23 11:04:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078943793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.2078943793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.1343144820 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 375902924 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:04:43 PM UTC 24 |
| Finished | Aug 23 11:04:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343144820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.1343144820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.180098952 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 154669453 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:04:44 PM UTC 24 |
| Finished | Aug 23 11:04:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=180098952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_setup_stage.180098952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.3895717811 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 154908793 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:04:44 PM UTC 24 |
| Finished | Aug 23 11:04:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895717811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 37.usbdev_setup_trans_ignored.3895717811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.2508894233 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 240672169 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:04:44 PM UTC 24 |
| Finished | Aug 23 11:04:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508894233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.2508894233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.2822522135 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 3598515868 ps |
| CPU time | 23.83 seconds |
| Started | Aug 23 11:04:45 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822522135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.2822522135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.1250628684 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 165010100 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:04:45 PM UTC 24 |
| Finished | Aug 23 11:04:47 PM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1250628684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.1250628684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.278722763 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 192078271 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:04:45 PM UTC 24 |
| Finished | Aug 23 11:04:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278722763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_stall_trans.278722763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.2781391400 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 445948478 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:04:47 PM UTC 24 |
| Finished | Aug 23 11:04:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781391400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2781391400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.4175380497 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 2775101345 ps |
| CPU time | 22.54 seconds |
| Started | Aug 23 11:04:46 PM UTC 24 |
| Finished | Aug 23 11:05:09 PM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4175380497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_streaming_out.4175380497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.2238682368 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 2918856077 ps |
| CPU time | 21.12 seconds |
| Started | Aug 23 11:04:30 PM UTC 24 |
| Finished | Aug 23 11:04:53 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2238682368 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.2238682368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.1204793557 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 448050498 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:04:47 PM UTC 24 |
| Finished | Aug 23 11:04:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1204793557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.1204793557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.4016229585 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 610994750 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4016229585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.4016229585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.3024157068 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 492539775 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3024157068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.3024157068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.2983344710 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 566808427 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2983344710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.2983344710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.996064979 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 456490470 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=996064979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_t x_rx_disruption.996064979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.200912794 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 511800542 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=200912794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_t x_rx_disruption.200912794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.2269426419 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 557893300 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2269426419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_ tx_rx_disruption.2269426419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.454921448 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 530480336 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=454921448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_t x_rx_disruption.454921448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.3934214044 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 494852175 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3934214044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_ tx_rx_disruption.3934214044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.606717519 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 472438241 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:10:48 PM UTC 24 |
| Finished | Aug 23 11:10:51 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=606717519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_t x_rx_disruption.606717519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.4078975683 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 564741037 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:49 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4078975683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.4078975683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.259493007 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 38193473 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=259493007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.259493007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.4204402835 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 9670853694 ps |
| CPU time | 13.16 seconds |
| Started | Aug 23 11:04:47 PM UTC 24 |
| Finished | Aug 23 11:05:01 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204402835 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.4204402835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.3403306362 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 21147707034 ps |
| CPU time | 23.74 seconds |
| Started | Aug 23 11:04:48 PM UTC 24 |
| Finished | Aug 23 11:05:13 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3403306362 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.3403306362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1662632176 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 24307718730 ps |
| CPU time | 30.66 seconds |
| Started | Aug 23 11:04:48 PM UTC 24 |
| Finished | Aug 23 11:05:20 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1662632176 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1662632176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.1600155773 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 153582222 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:04:49 PM UTC 24 |
| Finished | Aug 23 11:04:51 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600155773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.1600155773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.278679547 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 193292585 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:04:49 PM UTC 24 |
| Finished | Aug 23 11:04:51 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278679547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_bitstuff_err.278679547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.539065581 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 384747217 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:04:49 PM UTC 24 |
| Finished | Aug 23 11:04:52 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=539065581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_data_toggle_clear.539065581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.949552475 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 904526279 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 11:04:49 PM UTC 24 |
| Finished | Aug 23 11:04:53 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=949552475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.949552475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1152830872 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 18780419342 ps |
| CPU time | 31.62 seconds |
| Started | Aug 23 11:04:51 PM UTC 24 |
| Finished | Aug 23 11:05:24 PM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1152830872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1152830872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.2103433782 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 1069597191 ps |
| CPU time | 7.48 seconds |
| Started | Aug 23 11:04:51 PM UTC 24 |
| Finished | Aug 23 11:04:59 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2103433782 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.2103433782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1110935043 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 1115882024 ps |
| CPU time | 2.27 seconds |
| Started | Aug 23 11:04:51 PM UTC 24 |
| Finished | Aug 23 11:04:54 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110935043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.1110935043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.2040230547 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 131955134 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:04:52 PM UTC 24 |
| Finished | Aug 23 11:04:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040230547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.2040230547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_enable.4089203678 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 101297683 ps |
| CPU time | 0.69 seconds |
| Started | Aug 23 11:04:52 PM UTC 24 |
| Finished | Aug 23 11:04:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4089203678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.4089203678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.3644375584 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 895199050 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 11:04:52 PM UTC 24 |
| Finished | Aug 23 11:04:55 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3644375584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.3644375584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.653749420 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 400650801 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:04:53 PM UTC 24 |
| Finished | Aug 23 11:04:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=653749420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.653749420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.3739362307 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 186638368 ps |
| CPU time | 2.06 seconds |
| Started | Aug 23 11:04:53 PM UTC 24 |
| Finished | Aug 23 11:04:56 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739362307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_fifo_rst.3739362307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.3064228354 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 177914330 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:04:54 PM UTC 24 |
| Finished | Aug 23 11:04:56 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064228354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.3064228354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.3135382701 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 144318583 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:04:54 PM UTC 24 |
| Finished | Aug 23 11:04:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3135382701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_stall.3135382701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.2013102310 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 176858052 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:04:54 PM UTC 24 |
| Finished | Aug 23 11:04:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013102310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.2013102310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.1812276175 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 3420049690 ps |
| CPU time | 27.98 seconds |
| Started | Aug 23 11:04:53 PM UTC 24 |
| Finished | Aug 23 11:05:22 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812276175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.1812276175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.3362649180 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 5473359276 ps |
| CPU time | 51.44 seconds |
| Started | Aug 23 11:04:56 PM UTC 24 |
| Finished | Aug 23 11:05:49 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362649180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.3362649180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.3212876510 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 245682820 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:04:56 PM UTC 24 |
| Finished | Aug 23 11:04:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212876510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.3212876510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.3718535603 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 14925190853 ps |
| CPU time | 18.73 seconds |
| Started | Aug 23 11:04:56 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718535603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.3718535603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.970793980 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 10912344919 ps |
| CPU time | 14.34 seconds |
| Started | Aug 23 11:04:56 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=970793980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_suspend.970793980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.1163564444 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 4287738502 ps |
| CPU time | 104.2 seconds |
| Started | Aug 23 11:04:57 PM UTC 24 |
| Finished | Aug 23 11:06:43 PM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1163564444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.1163564444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.2853630127 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 1867875663 ps |
| CPU time | 15.49 seconds |
| Started | Aug 23 11:04:57 PM UTC 24 |
| Finished | Aug 23 11:05:14 PM UTC 24 |
| Peak memory | 230332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853630127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.2853630127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3452634568 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 242271689 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:04:57 PM UTC 24 |
| Finished | Aug 23 11:04:59 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452634568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3452634568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.725411053 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 196852959 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:04:57 PM UTC 24 |
| Finished | Aug 23 11:04:59 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=725411053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.725411053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.4160847781 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 1916735474 ps |
| CPU time | 15.96 seconds |
| Started | Aug 23 11:04:58 PM UTC 24 |
| Finished | Aug 23 11:05:15 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160847781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.4160847781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.157732315 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 159732239 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:00 PM UTC 24 |
| Finished | Aug 23 11:05:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157732315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.157732315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.2804673485 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 149439910 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:05:00 PM UTC 24 |
| Finished | Aug 23 11:05:02 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804673485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.2804673485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.1097364836 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 214767244 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:00 PM UTC 24 |
| Finished | Aug 23 11:05:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097364836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.1097364836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.199208382 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 172184381 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:02 PM UTC 24 |
| Finished | Aug 23 11:05:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199208382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_out_iso.199208382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.1872184503 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 156639056 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:05:02 PM UTC 24 |
| Finished | Aug 23 11:05:04 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872184503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.1872184503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2278991126 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 153281938 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:02 PM UTC 24 |
| Finished | Aug 23 11:05:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2278991126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.2278991126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.1705434588 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 177643374 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:02 PM UTC 24 |
| Finished | Aug 23 11:05:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705434588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.1705434588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.689247814 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 222648090 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:05:04 PM UTC 24 |
| Finished | Aug 23 11:05:05 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=689247814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.689247814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.1913427281 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 140641444 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:05:04 PM UTC 24 |
| Finished | Aug 23 11:05:05 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913427281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.1913427281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.4212562772 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 66252710 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:05:05 PM UTC 24 |
| Finished | Aug 23 11:05:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212562772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.4212562772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3763165900 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 17809500106 ps |
| CPU time | 40.05 seconds |
| Started | Aug 23 11:05:05 PM UTC 24 |
| Finished | Aug 23 11:05:46 PM UTC 24 |
| Peak memory | 232660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3763165900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.3763165900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.541981240 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 157923054 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:05 PM UTC 24 |
| Finished | Aug 23 11:05:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=541981240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_pkt_received.541981240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.3362664693 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 216116867 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:05:05 PM UTC 24 |
| Finished | Aug 23 11:05:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362664693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_pkt_sent.3362664693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.262608931 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 265321429 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:06 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=262608931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_random_length_in_transaction.262608931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.4002303012 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 173524139 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:06 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002303012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.4002303012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.1723130607 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 216222036 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:06 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723130607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.1723130607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.2460329485 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 307742335 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 11:05:06 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2460329485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.2460329485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.4124153477 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 177285742 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:05:06 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124153477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.4124153477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.3655160350 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 151794573 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:07 PM UTC 24 |
| Finished | Aug 23 11:05:09 PM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3655160350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.3655160350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.868433305 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 244332411 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:05:07 PM UTC 24 |
| Finished | Aug 23 11:05:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=868433305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.868433305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.1621590816 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 2478359268 ps |
| CPU time | 15.69 seconds |
| Started | Aug 23 11:05:08 PM UTC 24 |
| Finished | Aug 23 11:05:24 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1621590816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.1621590816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.2425897852 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 156901412 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2425897852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.2425897852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.1520147107 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 148392456 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:05:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520147107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.1520147107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.3825948690 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 1298052771 ps |
| CPU time | 2.96 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:05:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3825948690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stream_len_max.3825948690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2779313948 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 2170565915 ps |
| CPU time | 49.95 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:06:01 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779313948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2779313948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.3738739510 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 2903410555 ps |
| CPU time | 15.93 seconds |
| Started | Aug 23 11:04:51 PM UTC 24 |
| Finished | Aug 23 11:05:08 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738739510 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.3738739510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.3389773028 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 447150564 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:05:09 PM UTC 24 |
| Finished | Aug 23 11:05:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3389773028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.3389773028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3806752244 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 641822014 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:10:50 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3806752244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3806752244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.4094290367 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 583638072 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:10:56 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4094290367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.4094290367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.153711474 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 673626422 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:10:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=153711474 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_t x_rx_disruption.153711474 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.2907354864 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 515908500 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:10:56 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2907354864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.2907354864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.909732420 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 507910796 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=909732420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_t x_rx_disruption.909732420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.1158793913 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 574280870 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:03 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1158793913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.1158793913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.1692903527 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 572152380 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1692903527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.1692903527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.3984538347 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 625900546 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:10:56 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3984538347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.3984538347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.134529052 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 532923793 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=134529052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_t x_rx_disruption.134529052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.3850658527 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 505296672 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3850658527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.3850658527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.834641202 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 74366025 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 11:05:27 PM UTC 24 |
| Finished | Aug 23 11:05:29 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=834641202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.834641202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.3914570939 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 4979919355 ps |
| CPU time | 7.28 seconds |
| Started | Aug 23 11:05:10 PM UTC 24 |
| Finished | Aug 23 11:05:19 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914570939 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.3914570939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.612925122 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 19877505069 ps |
| CPU time | 25.39 seconds |
| Started | Aug 23 11:05:10 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=612925122 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.612925122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.2057230424 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 26229192992 ps |
| CPU time | 29.25 seconds |
| Started | Aug 23 11:05:10 PM UTC 24 |
| Finished | Aug 23 11:05:41 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057230424 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.2057230424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.704901521 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 169929696 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:05:11 PM UTC 24 |
| Finished | Aug 23 11:05:13 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704901521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.704901521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.2343025347 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 155024775 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:05:11 PM UTC 24 |
| Finished | Aug 23 11:05:13 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343025347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.2343025347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.553426656 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 183118012 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:11 PM UTC 24 |
| Finished | Aug 23 11:05:13 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553426656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_data_toggle_clear.553426656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.2619774568 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 1250250989 ps |
| CPU time | 2.98 seconds |
| Started | Aug 23 11:05:12 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619774568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.2619774568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.2370357471 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 18854498911 ps |
| CPU time | 30.48 seconds |
| Started | Aug 23 11:05:12 PM UTC 24 |
| Finished | Aug 23 11:05:43 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370357471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_address.2370357471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.2097152199 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 444439820 ps |
| CPU time | 6.98 seconds |
| Started | Aug 23 11:05:13 PM UTC 24 |
| Finished | Aug 23 11:05:21 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097152199 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.2097152199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.3369077625 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 779380158 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:05:13 PM UTC 24 |
| Finished | Aug 23 11:05:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369077625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_disable_endpoint.3369077625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.742250098 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 140614069 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742250098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_disconnected.742250098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_enable.3593927953 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 40858923 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593927953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.3593927953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2790444144 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 864778322 ps |
| CPU time | 2.13 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:17 PM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790444144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2790444144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.1775831378 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 361234629 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1775831378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.1775831378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.3491199867 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 171999032 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491199867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.3491199867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.3281018542 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 192262915 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:05:15 PM UTC 24 |
| Finished | Aug 23 11:05:17 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3281018542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.3281018542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.3363634275 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 141412329 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:18 PM UTC 24 |
| Peak memory | 215716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363634275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.3363634275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.244410830 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 288817247 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:19 PM UTC 24 |
| Peak memory | 215700 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244410830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_in_trans.244410830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.2859120080 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 3092597012 ps |
| CPU time | 19.65 seconds |
| Started | Aug 23 11:05:14 PM UTC 24 |
| Finished | Aug 23 11:05:35 PM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859120080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.2859120080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.1232241106 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 4013175392 ps |
| CPU time | 38.93 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:57 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1232241106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.1232241106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.908632157 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 280659993 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=908632157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_link_in_err.908632157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.3385782263 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 26209350628 ps |
| CPU time | 40.47 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:59 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3385782263 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_resume.3385782263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.2351955060 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 10823252325 ps |
| CPU time | 12.55 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:31 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351955060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.2351955060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.3482743060 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 4832896582 ps |
| CPU time | 115.61 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:07:15 PM UTC 24 |
| Peak memory | 230748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482743060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.3482743060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1984990111 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 2129727894 ps |
| CPU time | 12.77 seconds |
| Started | Aug 23 11:05:17 PM UTC 24 |
| Finished | Aug 23 11:05:31 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1984990111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1984990111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.377971811 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 254549779 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:18 PM UTC 24 |
| Finished | Aug 23 11:05:20 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=377971811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.377971811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.1731946965 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 191899908 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:05:18 PM UTC 24 |
| Finished | Aug 23 11:05:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731946965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.1731946965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.593041389 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 2884949634 ps |
| CPU time | 19.25 seconds |
| Started | Aug 23 11:05:19 PM UTC 24 |
| Finished | Aug 23 11:05:40 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=593041389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.593041389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.2457948900 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 152148169 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:19 PM UTC 24 |
| Finished | Aug 23 11:05:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457948900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.2457948900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.822005700 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 153516034 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:19 PM UTC 24 |
| Finished | Aug 23 11:05:21 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=822005700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.822005700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.1684747141 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 169696215 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:19 PM UTC 24 |
| Finished | Aug 23 11:05:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1684747141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.1684747141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.424415592 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 149866666 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:20 PM UTC 24 |
| Finished | Aug 23 11:05:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=424415592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_out_iso.424415592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.843078503 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 215788610 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:20 PM UTC 24 |
| Finished | Aug 23 11:05:22 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=843078503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_out_stall.843078503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.2747871638 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 254533604 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:05:20 PM UTC 24 |
| Finished | Aug 23 11:05:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2747871638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.2747871638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1339835882 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 164778260 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:22 PM UTC 24 |
| Finished | Aug 23 11:05:23 PM UTC 24 |
| Peak memory | 215864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1339835882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1339835882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.3958593562 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 271811357 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:05:22 PM UTC 24 |
| Finished | Aug 23 11:05:24 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958593562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.3958593562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.1225083849 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 151982389 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:22 PM UTC 24 |
| Finished | Aug 23 11:05:23 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1225083849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.1225083849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.634939689 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 38537562 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:05:22 PM UTC 24 |
| Finished | Aug 23 11:05:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=634939689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_phy_pins_sense.634939689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2164148496 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 11385052819 ps |
| CPU time | 26.74 seconds |
| Started | Aug 23 11:05:23 PM UTC 24 |
| Finished | Aug 23 11:05:51 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164148496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2164148496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.3184311890 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 187251037 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:05:23 PM UTC 24 |
| Finished | Aug 23 11:05:25 PM UTC 24 |
| Peak memory | 215456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3184311890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.3184311890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.4101184967 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 161129637 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:23 PM UTC 24 |
| Finished | Aug 23 11:05:25 PM UTC 24 |
| Peak memory | 215392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101184967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.4101184967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.3240817454 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 154395376 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:24 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 215632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240817454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.3240817454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.4170551461 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 189364503 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:05:24 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 215608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4170551461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.4170551461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.716812204 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 175422627 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:05:24 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=716812204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_rx_crc_err.716812204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.383632612 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 148469135 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:05:24 PM UTC 24 |
| Finished | Aug 23 11:05:26 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383632612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_setup_stage.383632612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.2386843586 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 158659444 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:26 PM UTC 24 |
| Finished | Aug 23 11:05:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2386843586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.2386843586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.142790798 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 296067088 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:05:26 PM UTC 24 |
| Finished | Aug 23 11:05:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=142790798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.142790798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.1585181383 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 2675411175 ps |
| CPU time | 17.19 seconds |
| Started | Aug 23 11:05:26 PM UTC 24 |
| Finished | Aug 23 11:05:44 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585181383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.1585181383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.2991016102 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 166799252 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:05:26 PM UTC 24 |
| Finished | Aug 23 11:05:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991016102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.2991016102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.2597210488 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 173817366 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:27 PM UTC 24 |
| Finished | Aug 23 11:05:29 PM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597210488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.2597210488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.3154554397 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 1024708884 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 11:05:27 PM UTC 24 |
| Finished | Aug 23 11:05:30 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154554397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stream_len_max.3154554397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.3029120036 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 1869777497 ps |
| CPU time | 43.66 seconds |
| Started | Aug 23 11:05:27 PM UTC 24 |
| Finished | Aug 23 11:06:12 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029120036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.3029120036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3910624580 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 3383118926 ps |
| CPU time | 26.39 seconds |
| Started | Aug 23 11:05:13 PM UTC 24 |
| Finished | Aug 23 11:05:40 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910624580 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3910624580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.1330238690 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 496663530 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:05:27 PM UTC 24 |
| Finished | Aug 23 11:05:29 PM UTC 24 |
| Peak memory | 217384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1330238690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.1330238690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.3958941967 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 570794890 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 217712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3958941967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_ tx_rx_disruption.3958941967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.3883373995 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 642207369 ps |
| CPU time | 1.64 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3883373995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.3883373995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.878126562 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 498284381 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=878126562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_t x_rx_disruption.878126562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.108461323 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 477671196 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=108461323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_t x_rx_disruption.108461323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.3037170548 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 462238999 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3037170548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.3037170548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.3289879727 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 492219806 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3289879727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.3289879727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.2817784247 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 602990943 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:10:52 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2817784247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.2817784247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.3167971209 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 464962649 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:10:53 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3167971209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.3167971209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.1734518282 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 562643337 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:10:53 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1734518282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.1734518282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.1425146738 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 455944435 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:10:57 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1425146738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.1425146738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.452087983 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 40990717 ps |
| CPU time | 0.56 seconds |
| Started | Aug 23 10:51:02 PM UTC 24 |
| Finished | Aug 23 10:51:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=452087983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.452087983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3396849166 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 11336334124 ps |
| CPU time | 15.33 seconds |
| Started | Aug 23 10:50:09 PM UTC 24 |
| Finished | Aug 23 10:50:26 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396849166 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.3396849166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.3535982963 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 14154098546 ps |
| CPU time | 17.82 seconds |
| Started | Aug 23 10:50:11 PM UTC 24 |
| Finished | Aug 23 10:50:30 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535982963 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.3535982963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.2092357499 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 29862895590 ps |
| CPU time | 37.92 seconds |
| Started | Aug 23 10:50:11 PM UTC 24 |
| Finished | Aug 23 10:50:50 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2092357499 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.2092357499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.1985233620 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 196409261 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:50:11 PM UTC 24 |
| Finished | Aug 23 10:50:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985233620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.1985233620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.2010226138 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 147222976 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:50:14 PM UTC 24 |
| Finished | Aug 23 10:50:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010226138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_av_empty.2010226138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.3293317884 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 182473889 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:50:14 PM UTC 24 |
| Finished | Aug 23 10:50:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293317884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.3293317884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1133280109 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 181929559 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:50:17 PM UTC 24 |
| Finished | Aug 23 10:50:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1133280109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1133280109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.1980612548 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 670232191 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 10:50:17 PM UTC 24 |
| Finished | Aug 23 10:50:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980612548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.1980612548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.2833860134 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 1059679889 ps |
| CPU time | 2.51 seconds |
| Started | Aug 23 10:50:17 PM UTC 24 |
| Finished | Aug 23 10:50:20 PM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833860134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.2833860134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.2892678131 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 12896715983 ps |
| CPU time | 21.16 seconds |
| Started | Aug 23 10:50:20 PM UTC 24 |
| Finished | Aug 23 10:50:42 PM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2892678131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.2892678131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.389513135 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 1403234160 ps |
| CPU time | 27.65 seconds |
| Started | Aug 23 10:50:20 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389513135 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.389513135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.3525611109 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 586474270 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 10:50:21 PM UTC 24 |
| Finished | Aug 23 10:50:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525611109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.3525611109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.922885261 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 139107262 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:50:22 PM UTC 24 |
| Finished | Aug 23 10:50:24 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922885261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_disconnected.922885261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_enable.2014011328 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 35081664 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:50:24 PM UTC 24 |
| Finished | Aug 23 10:50:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014011328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.2014011328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.1650968256 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 939166615 ps |
| CPU time | 2.48 seconds |
| Started | Aug 23 10:50:24 PM UTC 24 |
| Finished | Aug 23 10:50:28 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650968256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.1650968256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.445100682 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 566391753 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 10:50:25 PM UTC 24 |
| Finished | Aug 23 10:50:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=445100682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.445100682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.2048999669 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 193425323 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 10:50:26 PM UTC 24 |
| Finished | Aug 23 10:50:29 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048999669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.2048999669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.3660064651 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 101239872290 ps |
| CPU time | 177.03 seconds |
| Started | Aug 23 10:50:27 PM UTC 24 |
| Finished | Aug 23 10:53:26 PM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660064651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.3660064651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.767580505 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 100422982228 ps |
| CPU time | 155.97 seconds |
| Started | Aug 23 10:50:27 PM UTC 24 |
| Finished | Aug 23 10:53:05 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=767580505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 4.usbdev_freq_hiclk_max.767580505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.3081978261 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 104162694479 ps |
| CPU time | 164.6 seconds |
| Started | Aug 23 10:50:28 PM UTC 24 |
| Finished | Aug 23 10:53:15 PM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081978261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.3081978261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1598630055 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 99968445928 ps |
| CPU time | 169.32 seconds |
| Started | Aug 23 10:50:28 PM UTC 24 |
| Finished | Aug 23 10:53:20 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1598630055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1598630055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.1593587560 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 91165084667 ps |
| CPU time | 141.61 seconds |
| Started | Aug 23 10:50:29 PM UTC 24 |
| Finished | Aug 23 10:52:53 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593587560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.1593587560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.665717591 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 219199222 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 10:50:29 PM UTC 24 |
| Finished | Aug 23 10:50:32 PM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=665717591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.665717591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.170420352 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 177464379 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:50:29 PM UTC 24 |
| Finished | Aug 23 10:50:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=170420352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_in_stall.170420352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.47376526 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 196879647 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:50:31 PM UTC 24 |
| Finished | Aug 23 10:50:33 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47376526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_in_trans.47376526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.1196004759 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 2908074000 ps |
| CPU time | 67.34 seconds |
| Started | Aug 23 10:50:29 PM UTC 24 |
| Finished | Aug 23 10:51:38 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1196004759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.1196004759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.3461454364 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 8548034004 ps |
| CPU time | 48.38 seconds |
| Started | Aug 23 10:50:31 PM UTC 24 |
| Finished | Aug 23 10:51:21 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461454364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.3461454364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.726532649 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 222421228 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:50:31 PM UTC 24 |
| Finished | Aug 23 10:50:33 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=726532649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_link_in_err.726532649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.4245343536 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 10778717018 ps |
| CPU time | 13.27 seconds |
| Started | Aug 23 10:50:32 PM UTC 24 |
| Finished | Aug 23 10:50:47 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245343536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_link_suspend.4245343536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.3405584604 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 3031281612 ps |
| CPU time | 71.61 seconds |
| Started | Aug 23 10:50:32 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405584604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.3405584604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.4000686557 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 1974599895 ps |
| CPU time | 12.48 seconds |
| Started | Aug 23 10:50:33 PM UTC 24 |
| Finished | Aug 23 10:50:47 PM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000686557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.4000686557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.3424851721 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 242099506 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:50:33 PM UTC 24 |
| Finished | Aug 23 10:50:35 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424851721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3424851721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.601403791 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 196690294 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:50:36 PM UTC 24 |
| Finished | Aug 23 10:50:39 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=601403791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.601403791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.1114901607 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 2973506560 ps |
| CPU time | 25.38 seconds |
| Started | Aug 23 10:50:39 PM UTC 24 |
| Finished | Aug 23 10:51:05 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114901607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.1114901607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.3910710551 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 2079755943 ps |
| CPU time | 48.71 seconds |
| Started | Aug 23 10:50:40 PM UTC 24 |
| Finished | Aug 23 10:51:30 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910710551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.3910710551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.3199746620 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 3018316771 ps |
| CPU time | 19.97 seconds |
| Started | Aug 23 10:50:40 PM UTC 24 |
| Finished | Aug 23 10:51:01 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199746620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.3199746620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2632217331 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 154033075 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:50:41 PM UTC 24 |
| Finished | Aug 23 10:50:43 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632217331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2632217331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.3353182592 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 171108893 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:50:43 PM UTC 24 |
| Finished | Aug 23 10:50:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3353182592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.3353182592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.249022872 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 232365955 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:50:44 PM UTC 24 |
| Finished | Aug 23 10:50:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=249022872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_nak_trans.249022872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.2730937406 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 178457476 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:50:47 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730937406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.2730937406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.28843607 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 164630630 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:50:47 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28843607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_stall.28843607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.2673145597 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 158313855 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:50:47 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673145597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.2673145597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.3320591597 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 197038939 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:50:47 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3320591597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_pending_in_trans.3320591597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.457784069 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 237852843 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:50:47 PM UTC 24 |
| Finished | Aug 23 10:50:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=457784069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.457784069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.1219827752 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 260066230 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 10:50:48 PM UTC 24 |
| Finished | Aug 23 10:50:50 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1219827752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.1219827752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.4132706979 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 151507113 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:50:48 PM UTC 24 |
| Finished | Aug 23 10:50:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132706979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.4132706979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.2457794328 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 38968167 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 10:50:48 PM UTC 24 |
| Finished | Aug 23 10:50:50 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457794328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.2457794328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.4074174121 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 183853368 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:50:49 PM UTC 24 |
| Finished | Aug 23 10:50:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074174121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_pkt_received.4074174121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.427238738 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 218385433 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:50:49 PM UTC 24 |
| Finished | Aug 23 10:50:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=427238738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_pkt_sent.427238738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.221840882 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 6892029606 ps |
| CPU time | 86.47 seconds |
| Started | Aug 23 10:50:50 PM UTC 24 |
| Finished | Aug 23 10:52:18 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=221840882 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.221840882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.1535403855 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 10396495137 ps |
| CPU time | 47.63 seconds |
| Started | Aug 23 10:50:51 PM UTC 24 |
| Finished | Aug 23 10:51:40 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535403855 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.1535403855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.2285680814 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 227222269 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:50:50 PM UTC 24 |
| Finished | Aug 23 10:50:52 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2285680814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_random_length_in_transaction.2285680814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.1825846161 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 168397373 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:50:50 PM UTC 24 |
| Finished | Aug 23 10:50:51 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1825846161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.1825846161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.2222973535 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 20184625895 ps |
| CPU time | 22.79 seconds |
| Started | Aug 23 10:50:51 PM UTC 24 |
| Finished | Aug 23 10:51:15 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222973535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 4.usbdev_resume_link_active.2222973535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.3127468004 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 198329812 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:50:51 PM UTC 24 |
| Finished | Aug 23 10:50:53 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3127468004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.3127468004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.2393480908 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 256878442 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:50:52 PM UTC 24 |
| Finished | Aug 23 10:50:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2393480908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.2393480908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.173549574 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 181644317 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:50:52 PM UTC 24 |
| Finished | Aug 23 10:50:54 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173549574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_rx_pid_err.173549574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.3351908182 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 312685323 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 10:51:00 PM UTC 24 |
| Finished | Aug 23 10:51:02 PM UTC 24 |
| Peak memory | 250720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351908182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.3351908182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.921977252 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 337063287 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 10:50:52 PM UTC 24 |
| Finished | Aug 23 10:50:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921977252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_setup_priority.921977252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.2352778691 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 228020571 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:50:52 PM UTC 24 |
| Finished | Aug 23 10:50:54 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2352778691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.2352778691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.3400620736 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 167988680 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:50:53 PM UTC 24 |
| Finished | Aug 23 10:50:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3400620736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.3400620736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.2781063693 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 146427399 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:50:54 PM UTC 24 |
| Finished | Aug 23 10:50:56 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781063693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.2781063693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.3799613391 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 212865840 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:50:54 PM UTC 24 |
| Finished | Aug 23 10:50:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799613391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3799613391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.3936012866 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 3574530728 ps |
| CPU time | 25.05 seconds |
| Started | Aug 23 10:50:55 PM UTC 24 |
| Finished | Aug 23 10:51:22 PM UTC 24 |
| Peak memory | 230200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3936012866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.3936012866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.825087296 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 159034010 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:50:55 PM UTC 24 |
| Finished | Aug 23 10:50:57 PM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=825087296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.825087296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.3650040514 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 180242204 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:50:55 PM UTC 24 |
| Finished | Aug 23 10:50:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3650040514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.3650040514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.1873359993 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 465003121 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 10:50:57 PM UTC 24 |
| Finished | Aug 23 10:50:59 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1873359993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.1873359993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.3398908936 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 1649676074 ps |
| CPU time | 38.23 seconds |
| Started | Aug 23 10:50:57 PM UTC 24 |
| Finished | Aug 23 10:51:36 PM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398908936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.3398908936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.3300637870 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 3153609609 ps |
| CPU time | 17.8 seconds |
| Started | Aug 23 10:50:21 PM UTC 24 |
| Finished | Aug 23 10:50:40 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300637870 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.3300637870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.2107679171 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 546689091 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 10:51:00 PM UTC 24 |
| Finished | Aug 23 10:51:03 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2107679171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx _rx_disruption.2107679171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2217056668 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 34574136 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:05:50 PM UTC 24 |
| Finished | Aug 23 11:05:52 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2217056668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2217056668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.81934487 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 10744203292 ps |
| CPU time | 12.79 seconds |
| Started | Aug 23 11:05:28 PM UTC 24 |
| Finished | Aug 23 11:05:42 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=81934487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.81934487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.3890826818 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 20543471837 ps |
| CPU time | 24.23 seconds |
| Started | Aug 23 11:05:28 PM UTC 24 |
| Finished | Aug 23 11:05:54 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890826818 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.3890826818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.1148773993 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 31144324365 ps |
| CPU time | 45.28 seconds |
| Started | Aug 23 11:05:28 PM UTC 24 |
| Finished | Aug 23 11:06:15 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148773993 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.1148773993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2944932630 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 173958941 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:28 PM UTC 24 |
| Finished | Aug 23 11:05:30 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2944932630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.2944932630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.2082763332 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 169558415 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:05:30 PM UTC 24 |
| Finished | Aug 23 11:05:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2082763332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.2082763332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1680584633 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 371211649 ps |
| CPU time | 1.22 seconds |
| Started | Aug 23 11:05:30 PM UTC 24 |
| Finished | Aug 23 11:05:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1680584633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.1680584633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1106295570 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 864707009 ps |
| CPU time | 2.16 seconds |
| Started | Aug 23 11:05:30 PM UTC 24 |
| Finished | Aug 23 11:05:33 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1106295570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1106295570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.1574014212 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 21171654807 ps |
| CPU time | 31.18 seconds |
| Started | Aug 23 11:05:31 PM UTC 24 |
| Finished | Aug 23 11:06:03 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574014212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.1574014212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.1399373918 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 1980555854 ps |
| CPU time | 11.37 seconds |
| Started | Aug 23 11:05:31 PM UTC 24 |
| Finished | Aug 23 11:05:43 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1399373918 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.1399373918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.3180188215 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 975299152 ps |
| CPU time | 2.04 seconds |
| Started | Aug 23 11:05:32 PM UTC 24 |
| Finished | Aug 23 11:05:35 PM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3180188215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.3180188215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3830631811 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 152698935 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:05:32 PM UTC 24 |
| Finished | Aug 23 11:05:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830631811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.3830631811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_enable.1761700884 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 38838904 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:05:32 PM UTC 24 |
| Finished | Aug 23 11:05:34 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761700884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 40.usbdev_enable.1761700884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.3169897087 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 1026833354 ps |
| CPU time | 2.73 seconds |
| Started | Aug 23 11:05:33 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169897087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.3169897087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3535608941 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 296896587 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:05:33 PM UTC 24 |
| Finished | Aug 23 11:05:35 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535608941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.3535608941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.3962782320 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 257527699 ps |
| CPU time | 2 seconds |
| Started | Aug 23 11:05:34 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962782320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.3962782320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.1875249636 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 217369037 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:05:35 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875249636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.1875249636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.755155977 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 189366160 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:05:35 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755155977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_stall.755155977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.3125272848 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 197765276 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:05:35 PM UTC 24 |
| Finished | Aug 23 11:05:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125272848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.3125272848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.1548881195 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 2663094686 ps |
| CPU time | 61.46 seconds |
| Started | Aug 23 11:05:34 PM UTC 24 |
| Finished | Aug 23 11:06:37 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548881195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.1548881195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.3502388996 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 7853240839 ps |
| CPU time | 42.96 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:06:22 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502388996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.3502388996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.168649411 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 206553215 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:05:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=168649411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_in_err.168649411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.1194158936 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 12082420521 ps |
| CPU time | 14.87 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:05:54 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194158936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_link_resume.1194158936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.1968956296 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 4337906849 ps |
| CPU time | 6.74 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:05:46 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968956296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.1968956296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.1744127535 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 2674093665 ps |
| CPU time | 16.27 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:05:55 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744127535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.1744127535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.237423430 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 1911128596 ps |
| CPU time | 15.09 seconds |
| Started | Aug 23 11:05:38 PM UTC 24 |
| Finished | Aug 23 11:05:54 PM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237423430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.237423430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.2269744945 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 241543963 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:39 PM UTC 24 |
| Finished | Aug 23 11:05:41 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2269744945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.2269744945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.654470995 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 199102521 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:41 PM UTC 24 |
| Finished | Aug 23 11:05:43 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654470995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.654470995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.2993132409 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 2585484246 ps |
| CPU time | 59.36 seconds |
| Started | Aug 23 11:05:41 PM UTC 24 |
| Finished | Aug 23 11:06:42 PM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993132409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.2993132409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.2342702727 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 153598366 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:41 PM UTC 24 |
| Finished | Aug 23 11:05:43 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342702727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.2342702727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.386006014 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 196685704 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:41 PM UTC 24 |
| Finished | Aug 23 11:05:43 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=386006014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.386006014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.1521982114 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 216925114 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:05:42 PM UTC 24 |
| Finished | Aug 23 11:05:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1521982114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.1521982114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1553473813 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 170995079 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:05:42 PM UTC 24 |
| Finished | Aug 23 11:05:44 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553473813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.1553473813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.85247945 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 197263446 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:05:42 PM UTC 24 |
| Finished | Aug 23 11:05:44 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=85247945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_stall.85247945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.1920780742 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 161940872 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:05:43 PM UTC 24 |
| Finished | Aug 23 11:05:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920780742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_out_trans_nak.1920780742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.2191652486 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 182160885 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:44 PM UTC 24 |
| Finished | Aug 23 11:05:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191652486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.2191652486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.1720351490 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 225325976 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:05:44 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1720351490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.1720351490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.1764556846 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 144678568 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:44 PM UTC 24 |
| Finished | Aug 23 11:05:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764556846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.1764556846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.3317077065 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 75335829 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317077065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_pins_sense.3317077065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.1099229404 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 16522389481 ps |
| CPU time | 41.87 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:06:28 PM UTC 24 |
| Peak memory | 228628 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1099229404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_pkt_buffer.1099229404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.4239260809 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 159807393 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4239260809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_pkt_received.4239260809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3946445331 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 190438673 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3946445331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3946445331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.3928061055 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 228453493 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3928061055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.3928061055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.2531280761 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 237209120 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:45 PM UTC 24 |
| Finished | Aug 23 11:05:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531280761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.2531280761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.1356534966 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 134685835 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:05:46 PM UTC 24 |
| Finished | Aug 23 11:05:48 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356534966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_rx_crc_err.1356534966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.4071287170 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 266189233 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:05:47 PM UTC 24 |
| Finished | Aug 23 11:05:49 PM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4071287170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.4071287170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.758282977 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 149010694 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:05:47 PM UTC 24 |
| Finished | Aug 23 11:05:49 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=758282977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_setup_stage.758282977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.587185240 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 154010065 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:05:47 PM UTC 24 |
| Finished | Aug 23 11:05:49 PM UTC 24 |
| Peak memory | 215796 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=587185240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 40.usbdev_setup_trans_ignored.587185240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.1320339189 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 237008474 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:47 PM UTC 24 |
| Finished | Aug 23 11:05:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1320339189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.1320339189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.2356359122 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 2119015366 ps |
| CPU time | 48.56 seconds |
| Started | Aug 23 11:05:48 PM UTC 24 |
| Finished | Aug 23 11:06:39 PM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2356359122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.2356359122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.3776589300 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 155071570 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:05:48 PM UTC 24 |
| Finished | Aug 23 11:05:50 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3776589300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.3776589300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.1637037633 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 165914615 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:05:48 PM UTC 24 |
| Finished | Aug 23 11:05:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637037633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.1637037633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.3479234555 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 785350229 ps |
| CPU time | 1.86 seconds |
| Started | Aug 23 11:05:49 PM UTC 24 |
| Finished | Aug 23 11:05:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479234555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stream_len_max.3479234555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.3914870259 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 1713049492 ps |
| CPU time | 37.03 seconds |
| Started | Aug 23 11:05:49 PM UTC 24 |
| Finished | Aug 23 11:06:27 PM UTC 24 |
| Peak memory | 234976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3914870259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.3914870259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3039377255 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 5015513331 ps |
| CPU time | 27.75 seconds |
| Started | Aug 23 11:05:31 PM UTC 24 |
| Finished | Aug 23 11:06:00 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3039377255 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3039377255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.1860915551 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 478482270 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:05:49 PM UTC 24 |
| Finished | Aug 23 11:05:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1860915551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.1860915551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.3869924464 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 500000428 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:10:57 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3869924464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.3869924464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.1330829524 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 532932302 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:10:57 PM UTC 24 |
| Finished | Aug 23 11:11:03 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1330829524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.1330829524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.4107692835 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 609274154 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 11:10:57 PM UTC 24 |
| Finished | Aug 23 11:11:02 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4107692835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.4107692835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.616536853 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 593575770 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=616536853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_t x_rx_disruption.616536853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.4219622370 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 473582767 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4219622370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_ tx_rx_disruption.4219622370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.600615357 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 565708610 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=600615357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_t x_rx_disruption.600615357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1768520163 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 567686709 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 215840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1768520163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1768520163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.1926045259 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 511524005 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1926045259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.1926045259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.3805215242 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 555880959 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3805215242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.3805215242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.3370734616 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 473815561 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3370734616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_ tx_rx_disruption.3370734616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.4256884083 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 46741760 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:06:10 PM UTC 24 |
| Finished | Aug 23 11:06:11 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256884083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.4256884083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.1664439054 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 4791209561 ps |
| CPU time | 6.42 seconds |
| Started | Aug 23 11:05:50 PM UTC 24 |
| Finished | Aug 23 11:05:57 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664439054 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.1664439054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.3730750419 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 14033688680 ps |
| CPU time | 15.81 seconds |
| Started | Aug 23 11:05:50 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730750419 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.3730750419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.2697472148 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 31044351781 ps |
| CPU time | 37.48 seconds |
| Started | Aug 23 11:05:50 PM UTC 24 |
| Finished | Aug 23 11:06:29 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2697472148 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.2697472148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.3416251014 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 208790711 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:05:51 PM UTC 24 |
| Finished | Aug 23 11:05:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416251014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_av_buffer.3416251014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3593009415 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 142548402 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:05:51 PM UTC 24 |
| Finished | Aug 23 11:05:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3593009415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3593009415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3474749432 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 567309338 ps |
| CPU time | 1.75 seconds |
| Started | Aug 23 11:05:51 PM UTC 24 |
| Finished | Aug 23 11:05:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3474749432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3474749432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.3672911479 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 766789633 ps |
| CPU time | 1.94 seconds |
| Started | Aug 23 11:05:51 PM UTC 24 |
| Finished | Aug 23 11:05:54 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672911479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.3672911479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.3933869116 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 21675488739 ps |
| CPU time | 33.45 seconds |
| Started | Aug 23 11:05:52 PM UTC 24 |
| Finished | Aug 23 11:06:27 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3933869116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.3933869116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.3864979837 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 1094729970 ps |
| CPU time | 21.84 seconds |
| Started | Aug 23 11:05:52 PM UTC 24 |
| Finished | Aug 23 11:06:16 PM UTC 24 |
| Peak memory | 217836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864979837 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.3864979837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.4100551413 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 526756550 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:05:52 PM UTC 24 |
| Finished | Aug 23 11:05:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100551413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.4100551413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1132603076 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 186067738 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:54 PM UTC 24 |
| Finished | Aug 23 11:05:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132603076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1132603076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_enable.319931369 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 105547086 ps |
| CPU time | 0.68 seconds |
| Started | Aug 23 11:05:54 PM UTC 24 |
| Finished | Aug 23 11:05:55 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=319931369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_enable.319931369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.3081423105 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 898536101 ps |
| CPU time | 2.24 seconds |
| Started | Aug 23 11:05:55 PM UTC 24 |
| Finished | Aug 23 11:05:58 PM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3081423105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.3081423105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.2567812849 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 305599224 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:05:55 PM UTC 24 |
| Finished | Aug 23 11:05:57 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2567812849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.2567812849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.686082621 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 362518169 ps |
| CPU time | 2.27 seconds |
| Started | Aug 23 11:05:55 PM UTC 24 |
| Finished | Aug 23 11:05:58 PM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686082621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_fifo_rst.686082621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.469233766 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 172528708 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:05:55 PM UTC 24 |
| Finished | Aug 23 11:05:57 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=469233766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.469233766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.873596682 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 145534736 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:05:56 PM UTC 24 |
| Finished | Aug 23 11:05:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873596682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_in_stall.873596682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.2118321159 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 197123224 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:05:56 PM UTC 24 |
| Finished | Aug 23 11:05:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118321159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.2118321159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.1929116451 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 3282377022 ps |
| CPU time | 77.29 seconds |
| Started | Aug 23 11:05:55 PM UTC 24 |
| Finished | Aug 23 11:07:14 PM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1929116451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.1929116451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3625023963 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 4421105273 ps |
| CPU time | 45.09 seconds |
| Started | Aug 23 11:05:56 PM UTC 24 |
| Finished | Aug 23 11:06:43 PM UTC 24 |
| Peak memory | 218384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3625023963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3625023963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.1647686763 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 196575995 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:05:56 PM UTC 24 |
| Finished | Aug 23 11:05:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1647686763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.1647686763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.932467450 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 31158124249 ps |
| CPU time | 48.4 seconds |
| Started | Aug 23 11:05:57 PM UTC 24 |
| Finished | Aug 23 11:06:47 PM UTC 24 |
| Peak memory | 217756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932467450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_link_resume.932467450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.4189852046 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 6329381069 ps |
| CPU time | 9.55 seconds |
| Started | Aug 23 11:05:57 PM UTC 24 |
| Finished | Aug 23 11:06:08 PM UTC 24 |
| Peak memory | 217852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4189852046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.4189852046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.485319893 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 3487187361 ps |
| CPU time | 23.58 seconds |
| Started | Aug 23 11:05:59 PM UTC 24 |
| Finished | Aug 23 11:06:23 PM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485319893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.485319893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1874572773 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2758336038 ps |
| CPU time | 23.25 seconds |
| Started | Aug 23 11:05:59 PM UTC 24 |
| Finished | Aug 23 11:06:23 PM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1874572773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1874572773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3299303883 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 263387387 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:05:59 PM UTC 24 |
| Finished | Aug 23 11:06:01 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299303883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3299303883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.1738953118 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 203631678 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:05:59 PM UTC 24 |
| Finished | Aug 23 11:06:00 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738953118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.1738953118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.2856753235 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 1698271461 ps |
| CPU time | 39.93 seconds |
| Started | Aug 23 11:05:59 PM UTC 24 |
| Finished | Aug 23 11:06:40 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856753235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.2856753235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.3484856942 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 181705750 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:06:00 PM UTC 24 |
| Finished | Aug 23 11:06:02 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3484856942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.3484856942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.3716229383 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 162307823 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:06:00 PM UTC 24 |
| Finished | Aug 23 11:06:02 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716229383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.3716229383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.645720331 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 210274690 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:06:00 PM UTC 24 |
| Finished | Aug 23 11:06:02 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645720331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_nak_trans.645720331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.4000769479 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 192290606 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:06:01 PM UTC 24 |
| Finished | Aug 23 11:06:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4000769479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_out_iso.4000769479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.945292510 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 174145975 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:06:01 PM UTC 24 |
| Finished | Aug 23 11:06:03 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=945292510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_out_stall.945292510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.560323617 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 181220537 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:01 PM UTC 24 |
| Finished | Aug 23 11:06:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560323617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_out_trans_nak.560323617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.3087846667 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 157620027 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:01 PM UTC 24 |
| Finished | Aug 23 11:06:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3087846667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_pending_in_trans.3087846667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.554808590 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 251981617 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:06:02 PM UTC 24 |
| Finished | Aug 23 11:06:04 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=554808590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.554808590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.1971819212 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 146354630 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:02 PM UTC 24 |
| Finished | Aug 23 11:06:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1971819212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.1971819212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.1787432399 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 98566422 ps |
| CPU time | 0.65 seconds |
| Started | Aug 23 11:06:02 PM UTC 24 |
| Finished | Aug 23 11:06:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1787432399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.1787432399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.3283805741 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 9902368569 ps |
| CPU time | 23.79 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283805741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.3283805741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.1923989947 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 165604770 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1923989947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.1923989947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.2689456094 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 256874199 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2689456094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.2689456094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.164978078 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 206574878 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=164978078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_random_length_in_transaction.164978078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.567661947 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 186201795 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=567661947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.567661947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.76570051 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 138780923 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:06:05 PM UTC 24 |
| Finished | Aug 23 11:06:07 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=76570051 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_rx_crc_err.76570051 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.4284223588 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 255801190 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:06:06 PM UTC 24 |
| Finished | Aug 23 11:06:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4284223588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.4284223588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.3840546089 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 159061086 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:06:06 PM UTC 24 |
| Finished | Aug 23 11:06:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840546089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_setup_stage.3840546089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.2570935254 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 165274817 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:07 PM UTC 24 |
| Finished | Aug 23 11:06:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570935254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.2570935254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.2721711259 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 271759848 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 11:06:08 PM UTC 24 |
| Finished | Aug 23 11:06:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2721711259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.2721711259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.1633898164 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 2097638616 ps |
| CPU time | 49.97 seconds |
| Started | Aug 23 11:06:08 PM UTC 24 |
| Finished | Aug 23 11:07:00 PM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633898164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.1633898164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.217655066 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 174733798 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:08 PM UTC 24 |
| Finished | Aug 23 11:06:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=217655066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.217655066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.3247624387 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 182570089 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:06:08 PM UTC 24 |
| Finished | Aug 23 11:06:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3247624387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.3247624387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.2873326418 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 1072446157 ps |
| CPU time | 2.48 seconds |
| Started | Aug 23 11:06:10 PM UTC 24 |
| Finished | Aug 23 11:06:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2873326418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.2873326418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.2516190084 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 2910124045 ps |
| CPU time | 19.33 seconds |
| Started | Aug 23 11:06:08 PM UTC 24 |
| Finished | Aug 23 11:06:29 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516190084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.2516190084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.2068760759 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 4350299040 ps |
| CPU time | 23.52 seconds |
| Started | Aug 23 11:05:52 PM UTC 24 |
| Finished | Aug 23 11:06:17 PM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068760759 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.2068760759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.2938169560 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 578733008 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:06:10 PM UTC 24 |
| Finished | Aug 23 11:06:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2938169560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_t x_rx_disruption.2938169560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.1472861451 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 503411149 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:11:02 PM UTC 24 |
| Finished | Aug 23 11:11:06 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1472861451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.1472861451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.2481384023 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 555748323 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:03 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 215048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2481384023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_ tx_rx_disruption.2481384023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.1632673730 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 552036025 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:11:03 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1632673730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_ tx_rx_disruption.1632673730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3603466292 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 593957458 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:03 PM UTC 24 |
| Finished | Aug 23 11:11:13 PM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3603466292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3603466292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.3805772645 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 514935685 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:11:03 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3805772645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.3805772645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.1910890096 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 599289883 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1910890096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_ tx_rx_disruption.1910890096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.1346743081 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 581002735 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1346743081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.1346743081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.3459895878 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 625204787 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:17 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3459895878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_ tx_rx_disruption.3459895878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.616199266 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 484450148 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:17 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=616199266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_t x_rx_disruption.616199266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.3296160172 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 668459708 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 217708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3296160172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_ tx_rx_disruption.3296160172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1342081003 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 64336924 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:06:36 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1342081003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1342081003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.1188658527 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 11306058871 ps |
| CPU time | 14.17 seconds |
| Started | Aug 23 11:06:11 PM UTC 24 |
| Finished | Aug 23 11:06:26 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188658527 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.1188658527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.1768866348 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 15211969605 ps |
| CPU time | 17.88 seconds |
| Started | Aug 23 11:06:11 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1768866348 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.1768866348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.3824931694 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 24965343048 ps |
| CPU time | 32.78 seconds |
| Started | Aug 23 11:06:11 PM UTC 24 |
| Finished | Aug 23 11:06:45 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824931694 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.3824931694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.4275168268 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 177243314 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:12 PM UTC 24 |
| Finished | Aug 23 11:06:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275168268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.4275168268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.3944671463 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 187218213 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:12 PM UTC 24 |
| Finished | Aug 23 11:06:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944671463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.3944671463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.519060777 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 657004418 ps |
| CPU time | 1.8 seconds |
| Started | Aug 23 11:06:13 PM UTC 24 |
| Finished | Aug 23 11:06:16 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=519060777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_data_toggle_clear.519060777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.3862439189 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 803552359 ps |
| CPU time | 2.06 seconds |
| Started | Aug 23 11:06:13 PM UTC 24 |
| Finished | Aug 23 11:06:16 PM UTC 24 |
| Peak memory | 218072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862439189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.3862439189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.1916039269 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 20958009106 ps |
| CPU time | 32.65 seconds |
| Started | Aug 23 11:06:14 PM UTC 24 |
| Finished | Aug 23 11:06:48 PM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1916039269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_address.1916039269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.3699975307 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 4264370297 ps |
| CPU time | 24.17 seconds |
| Started | Aug 23 11:06:14 PM UTC 24 |
| Finished | Aug 23 11:06:40 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699975307 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.3699975307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.155970324 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 897820153 ps |
| CPU time | 2.11 seconds |
| Started | Aug 23 11:06:17 PM UTC 24 |
| Finished | Aug 23 11:06:20 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=155970324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.155970324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.2664755374 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 147638549 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:06:17 PM UTC 24 |
| Finished | Aug 23 11:06:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2664755374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_disconnected.2664755374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_enable.2706253713 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 75022170 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:06:17 PM UTC 24 |
| Finished | Aug 23 11:06:18 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2706253713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.2706253713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.1226847220 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 808845485 ps |
| CPU time | 2.27 seconds |
| Started | Aug 23 11:06:17 PM UTC 24 |
| Finished | Aug 23 11:06:20 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226847220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.1226847220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.1961657044 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 514226139 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:06:18 PM UTC 24 |
| Finished | Aug 23 11:06:20 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1961657044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.1961657044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.2811678771 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 176285211 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:06:18 PM UTC 24 |
| Finished | Aug 23 11:06:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811678771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.2811678771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2890442067 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 166979591 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:19 PM UTC 24 |
| Finished | Aug 23 11:06:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890442067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2890442067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.1435871509 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 159170479 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:06:23 PM UTC 24 |
| Peak memory | 215892 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435871509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.1435871509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.1618430296 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 194302034 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:06:23 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1618430296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.1618430296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.1675590712 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 4286637505 ps |
| CPU time | 36.04 seconds |
| Started | Aug 23 11:06:19 PM UTC 24 |
| Finished | Aug 23 11:06:56 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675590712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.1675590712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.249075790 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 7354901581 ps |
| CPU time | 45.67 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:07:08 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249075790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.249075790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3969435728 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 183328784 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:06:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3969435728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3969435728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.1852145791 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 7391627992 ps |
| CPU time | 10.69 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852145791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.1852145791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.760505829 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 11240391435 ps |
| CPU time | 13.85 seconds |
| Started | Aug 23 11:06:21 PM UTC 24 |
| Finished | Aug 23 11:06:36 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=760505829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_suspend.760505829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.1040686516 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 2575621588 ps |
| CPU time | 60.03 seconds |
| Started | Aug 23 11:06:23 PM UTC 24 |
| Finished | Aug 23 11:07:25 PM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040686516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.1040686516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.2058838596 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 2827019113 ps |
| CPU time | 23.26 seconds |
| Started | Aug 23 11:06:23 PM UTC 24 |
| Finished | Aug 23 11:06:48 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058838596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.2058838596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.3846975066 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 248387519 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:06:23 PM UTC 24 |
| Finished | Aug 23 11:06:25 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846975066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.3846975066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.557009579 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 199387105 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:06:23 PM UTC 24 |
| Finished | Aug 23 11:06:25 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=557009579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.557009579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.2673549627 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 3041752108 ps |
| CPU time | 24.85 seconds |
| Started | Aug 23 11:06:25 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673549627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.2673549627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.216474337 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 155666057 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:06:25 PM UTC 24 |
| Finished | Aug 23 11:06:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=216474337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.216474337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.402508389 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 184255311 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:26 PM UTC 24 |
| Finished | Aug 23 11:06:28 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=402508389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.402508389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.3404608704 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 184459330 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:06:26 PM UTC 24 |
| Finished | Aug 23 11:06:28 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3404608704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.3404608704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.1062931966 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 145106131 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:27 PM UTC 24 |
| Finished | Aug 23 11:06:29 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1062931966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.1062931966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.4020071984 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 184333445 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:27 PM UTC 24 |
| Finished | Aug 23 11:06:29 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020071984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_out_stall.4020071984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.175499105 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 182653681 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:28 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175499105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_out_trans_nak.175499105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.3177771821 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 147710569 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:06:28 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177771821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 42.usbdev_pending_in_trans.3177771821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.2388946073 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 224427567 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:06:28 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2388946073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.2388946073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.466893930 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 146416231 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:06:28 PM UTC 24 |
| Finished | Aug 23 11:06:30 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=466893930 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.466893930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.2546731163 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 38102624 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:06:30 PM UTC 24 |
| Finished | Aug 23 11:06:31 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546731163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.2546731163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.1433595100 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 13820282645 ps |
| CPU time | 31.85 seconds |
| Started | Aug 23 11:06:30 PM UTC 24 |
| Finished | Aug 23 11:07:03 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433595100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.1433595100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.2287677057 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 170322291 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:30 PM UTC 24 |
| Finished | Aug 23 11:06:32 PM UTC 24 |
| Peak memory | 215620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287677057 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.2287677057 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.3022850305 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 224671329 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:06:30 PM UTC 24 |
| Finished | Aug 23 11:06:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022850305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.3022850305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.1892326412 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 215932993 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:06:30 PM UTC 24 |
| Finished | Aug 23 11:06:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1892326412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_random_length_in_transaction.1892326412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3821665602 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 169322058 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821665602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3821665602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.97606022 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 148350193 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=97606022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_rx_crc_err.97606022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.89729115 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 270280923 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89729115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_rx_full.89729115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.2451384770 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 154313140 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451384770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.2451384770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.1543452056 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 172160986 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543452056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.1543452056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.1542207461 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 229308742 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:06:31 PM UTC 24 |
| Finished | Aug 23 11:06:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1542207461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.1542207461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.510006646 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 2802405946 ps |
| CPU time | 64.33 seconds |
| Started | Aug 23 11:06:33 PM UTC 24 |
| Finished | Aug 23 11:07:39 PM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510006646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.510006646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.21095272 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 221685749 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:06:33 PM UTC 24 |
| Finished | Aug 23 11:06:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=21095272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.21095272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.3219052788 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 159208096 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:33 PM UTC 24 |
| Finished | Aug 23 11:06:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219052788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_stall_trans.3219052788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.3023352666 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 574198936 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:06:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3023352666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.3023352666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.2122256348 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 4025999761 ps |
| CPU time | 33.56 seconds |
| Started | Aug 23 11:06:33 PM UTC 24 |
| Finished | Aug 23 11:07:08 PM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2122256348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.2122256348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.3496824288 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 878624215 ps |
| CPU time | 4.79 seconds |
| Started | Aug 23 11:06:14 PM UTC 24 |
| Finished | Aug 23 11:06:20 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496824288 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.3496824288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.4126240683 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 500650173 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:06:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4126240683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.4126240683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.2759546490 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 519806648 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2759546490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.2759546490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.836738583 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 561547780 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=836738583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_t x_rx_disruption.836738583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.451421251 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 530667738 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=451421251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_t x_rx_disruption.451421251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3509629008 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 473482165 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:11:04 PM UTC 24 |
| Finished | Aug 23 11:11:17 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3509629008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3509629008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.1173235232 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 575999068 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:11:06 PM UTC 24 |
| Finished | Aug 23 11:11:12 PM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1173235232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.1173235232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.4125210677 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 711540823 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 11:11:06 PM UTC 24 |
| Finished | Aug 23 11:11:12 PM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4125210677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.4125210677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.2915290222 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 403887299 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 11:11:06 PM UTC 24 |
| Finished | Aug 23 11:11:12 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2915290222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.2915290222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.3424604937 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 447130561 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:11:06 PM UTC 24 |
| Finished | Aug 23 11:11:12 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3424604937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.3424604937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.3230140011 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 563380368 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:06 PM UTC 24 |
| Finished | Aug 23 11:11:12 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3230140011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_ tx_rx_disruption.3230140011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.4225605523 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 641458323 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:08 PM UTC 24 |
| Finished | Aug 23 11:11:11 PM UTC 24 |
| Peak memory | 216368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4225605523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.4225605523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.2655834093 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 68595343 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:54 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655834093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.2655834093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.3222397097 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 9685676446 ps |
| CPU time | 12.69 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:06:48 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222397097 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.3222397097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.956703153 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 20885742655 ps |
| CPU time | 22.3 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:06:58 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=956703153 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.956703153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.2381857749 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 25531515369 ps |
| CPU time | 31.96 seconds |
| Started | Aug 23 11:06:34 PM UTC 24 |
| Finished | Aug 23 11:07:08 PM UTC 24 |
| Peak memory | 227956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381857749 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.2381857749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.675200576 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 180180020 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:06:35 PM UTC 24 |
| Finished | Aug 23 11:06:37 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675200576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_av_buffer.675200576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.2433202075 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 166115543 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:35 PM UTC 24 |
| Finished | Aug 23 11:06:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433202075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_bitstuff_err.2433202075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.3273647890 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 304412815 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 11:06:35 PM UTC 24 |
| Finished | Aug 23 11:06:38 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3273647890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.3273647890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3496743187 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 676468676 ps |
| CPU time | 1.66 seconds |
| Started | Aug 23 11:06:36 PM UTC 24 |
| Finished | Aug 23 11:06:39 PM UTC 24 |
| Peak memory | 216176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3496743187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3496743187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.2452800560 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 34191277587 ps |
| CPU time | 50.6 seconds |
| Started | Aug 23 11:06:36 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452800560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_address.2452800560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.1280842340 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 2919823451 ps |
| CPU time | 16.73 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:06:56 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1280842340 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.1280842340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1061355455 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 1112372562 ps |
| CPU time | 2.34 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:06:41 PM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061355455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1061355455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.685248733 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 139330308 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:06:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=685248733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_disconnected.685248733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_enable.1109572047 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 48227901 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:06:39 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109572047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.1109572047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.2639549929 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 1030458388 ps |
| CPU time | 2.46 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:06:41 PM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639549929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.2639549929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.1214641968 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 178903683 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:06:39 PM UTC 24 |
| Finished | Aug 23 11:06:41 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214641968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.1214641968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.2298385944 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 249367645 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 11:06:40 PM UTC 24 |
| Finished | Aug 23 11:06:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2298385944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_fifo_rst.2298385944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.4225238905 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 278717893 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:06:40 PM UTC 24 |
| Finished | Aug 23 11:06:42 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225238905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.4225238905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.3371574317 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 145571076 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:06:40 PM UTC 24 |
| Finished | Aug 23 11:06:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371574317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.3371574317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.3959349435 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 252723357 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:06:40 PM UTC 24 |
| Finished | Aug 23 11:06:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959349435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.3959349435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.1673758030 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 2545031167 ps |
| CPU time | 20.28 seconds |
| Started | Aug 23 11:06:40 PM UTC 24 |
| Finished | Aug 23 11:07:02 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673758030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.1673758030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.3570185469 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 7424403762 ps |
| CPU time | 72 seconds |
| Started | Aug 23 11:06:41 PM UTC 24 |
| Finished | Aug 23 11:07:55 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570185469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.3570185469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.704805478 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 231326878 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:06:41 PM UTC 24 |
| Finished | Aug 23 11:06:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=704805478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_link_in_err.704805478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.1772539554 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 9275146443 ps |
| CPU time | 12.98 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:06:57 PM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772539554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.1772539554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.2139246800 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 10778751364 ps |
| CPU time | 13.42 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:06:57 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139246800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.2139246800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.3221926825 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 4755449787 ps |
| CPU time | 34.05 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:07:18 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221926825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.3221926825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.1067081514 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 1395265418 ps |
| CPU time | 8.91 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:06:53 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067081514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.1067081514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.112787184 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 247702996 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:06:45 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=112787184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.112787184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.2652054897 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 192451970 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 11:06:43 PM UTC 24 |
| Finished | Aug 23 11:06:45 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2652054897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.2652054897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.1479516771 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 2520392612 ps |
| CPU time | 63.26 seconds |
| Started | Aug 23 11:06:44 PM UTC 24 |
| Finished | Aug 23 11:07:49 PM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479516771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.1479516771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.2597436020 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 153222027 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:44 PM UTC 24 |
| Finished | Aug 23 11:06:46 PM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597436020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.2597436020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.160673222 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 149097071 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:44 PM UTC 24 |
| Finished | Aug 23 11:06:46 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=160673222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.160673222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.338848832 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 195020389 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:44 PM UTC 24 |
| Finished | Aug 23 11:06:46 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338848832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_nak_trans.338848832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.2758697788 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 221764706 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:06:45 PM UTC 24 |
| Finished | Aug 23 11:06:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758697788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.2758697788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.448198528 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 192713470 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:06:45 PM UTC 24 |
| Finished | Aug 23 11:06:47 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=448198528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_out_stall.448198528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.182302947 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 161857892 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:06:45 PM UTC 24 |
| Finished | Aug 23 11:06:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182302947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_out_trans_nak.182302947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.2673493522 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 152403430 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:06:46 PM UTC 24 |
| Finished | Aug 23 11:06:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673493522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.2673493522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.87315247 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 237071514 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:06:46 PM UTC 24 |
| Finished | Aug 23 11:06:49 PM UTC 24 |
| Peak memory | 215980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=87315247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_p inflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.87315247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.2135527818 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 153611867 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:47 PM UTC 24 |
| Finished | Aug 23 11:06:48 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135527818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.2135527818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.3912191067 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 31645317 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:06:48 PM UTC 24 |
| Finished | Aug 23 11:06:49 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3912191067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.3912191067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.1917746368 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 21765103729 ps |
| CPU time | 51.1 seconds |
| Started | Aug 23 11:06:48 PM UTC 24 |
| Finished | Aug 23 11:07:40 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917746368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.1917746368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.4062222157 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 165506916 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4062222157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.4062222157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.2474305707 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 195164381 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2474305707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.2474305707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.1622097221 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 186149559 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622097221 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.1622097221 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.426145873 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 201096615 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=426145873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.426145873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.1337082707 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 171569103 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337082707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.1337082707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.4012118437 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 244429052 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012118437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_rx_full.4012118437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.2859712393 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 198995376 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859712393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_setup_stage.2859712393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.1440990648 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 157238977 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:49 PM UTC 24 |
| Finished | Aug 23 11:06:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1440990648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1440990648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.3324525390 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 190957985 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:06:50 PM UTC 24 |
| Finished | Aug 23 11:06:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3324525390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.3324525390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.2241733130 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 3335052997 ps |
| CPU time | 79.05 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:08:13 PM UTC 24 |
| Peak memory | 230876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241733130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.2241733130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.668244775 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 157139976 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=668244775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.668244775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.1438653820 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 186665556 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438653820 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_stall_trans.1438653820 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.1601300251 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 377052762 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601300251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.1601300251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.3909414754 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 1621266546 ps |
| CPU time | 13.56 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:07:07 PM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909414754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.3909414754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.54976510 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 1218116926 ps |
| CPU time | 21.51 seconds |
| Started | Aug 23 11:06:38 PM UTC 24 |
| Finished | Aug 23 11:07:00 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=54976510 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.54976510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.2509437182 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 490977537 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2509437182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_t x_rx_disruption.2509437182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.3815553188 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 569479379 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:11:08 PM UTC 24 |
| Finished | Aug 23 11:11:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3815553188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.3815553188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.472770956 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 545354911 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:11:08 PM UTC 24 |
| Finished | Aug 23 11:11:11 PM UTC 24 |
| Peak memory | 216820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=472770956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_t x_rx_disruption.472770956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.2777858313 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 495606799 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:11:08 PM UTC 24 |
| Finished | Aug 23 11:11:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2777858313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.2777858313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.3547223923 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 617776733 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:11:12 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3547223923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.3547223923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.654254171 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 535607749 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:11:12 PM UTC 24 |
| Finished | Aug 23 11:11:15 PM UTC 24 |
| Peak memory | 214732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=654254171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_t x_rx_disruption.654254171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.3717514291 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 579009503 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:12 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3717514291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.3717514291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.2330017734 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 496614757 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:11:12 PM UTC 24 |
| Finished | Aug 23 11:11:15 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2330017734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_ tx_rx_disruption.2330017734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.3485295309 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 476851272 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:11:13 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3485295309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.3485295309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.1716174602 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 510532321 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:11:13 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1716174602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_ tx_rx_disruption.1716174602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.2915985334 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 494585072 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:11:13 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2915985334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.2915985334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.3275985456 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 52715173 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:07:11 PM UTC 24 |
| Finished | Aug 23 11:07:13 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275985456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.3275985456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.3772711894 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 4191239905 ps |
| CPU time | 5.84 seconds |
| Started | Aug 23 11:06:52 PM UTC 24 |
| Finished | Aug 23 11:06:59 PM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772711894 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.3772711894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.3731378518 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 14326098470 ps |
| CPU time | 18.26 seconds |
| Started | Aug 23 11:06:53 PM UTC 24 |
| Finished | Aug 23 11:07:13 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731378518 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.3731378518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.529844987 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 24702910580 ps |
| CPU time | 29.69 seconds |
| Started | Aug 23 11:06:54 PM UTC 24 |
| Finished | Aug 23 11:07:25 PM UTC 24 |
| Peak memory | 227840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=529844987 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.529844987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.1198383411 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 171518816 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:54 PM UTC 24 |
| Finished | Aug 23 11:06:56 PM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1198383411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.1198383411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.478398603 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 144286787 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:06:54 PM UTC 24 |
| Finished | Aug 23 11:06:56 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478398603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_bitstuff_err.478398603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.384564449 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 170975087 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:06:54 PM UTC 24 |
| Finished | Aug 23 11:06:56 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=384564449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_data_toggle_clear.384564449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.2343500212 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 869874493 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 11:06:54 PM UTC 24 |
| Finished | Aug 23 11:06:58 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2343500212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.2343500212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.1229830013 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 49197418783 ps |
| CPU time | 81.01 seconds |
| Started | Aug 23 11:06:56 PM UTC 24 |
| Finished | Aug 23 11:08:18 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229830013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.1229830013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.2933336716 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 165946940 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:56 PM UTC 24 |
| Finished | Aug 23 11:06:57 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933336716 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.2933336716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2153352585 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 478750296 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:06:57 PM UTC 24 |
| Finished | Aug 23 11:06:59 PM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153352585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2153352585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3337225003 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 161350486 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:06:57 PM UTC 24 |
| Finished | Aug 23 11:06:59 PM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337225003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3337225003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_enable.2031933952 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 56479587 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:06:57 PM UTC 24 |
| Finished | Aug 23 11:06:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031933952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_enable.2031933952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.2477919492 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 966491175 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 11:06:57 PM UTC 24 |
| Finished | Aug 23 11:07:00 PM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477919492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.2477919492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2488930085 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 269788136 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:06:58 PM UTC 24 |
| Finished | Aug 23 11:07:00 PM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488930085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2488930085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.150623226 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 322577788 ps |
| CPU time | 1.88 seconds |
| Started | Aug 23 11:06:58 PM UTC 24 |
| Finished | Aug 23 11:07:01 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=150623226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_fifo_rst.150623226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.146515903 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 232793962 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:06:58 PM UTC 24 |
| Finished | Aug 23 11:07:00 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=146515903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.146515903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.1959677710 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 161081628 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:06:59 PM UTC 24 |
| Finished | Aug 23 11:07:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959677710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_in_stall.1959677710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.278209201 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 252614503 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 11:06:59 PM UTC 24 |
| Finished | Aug 23 11:07:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278209201 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_trans.278209201 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.739932863 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 4205729399 ps |
| CPU time | 101.75 seconds |
| Started | Aug 23 11:06:58 PM UTC 24 |
| Finished | Aug 23 11:08:42 PM UTC 24 |
| Peak memory | 230756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=739932863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.739932863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.1988661374 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 10980807426 ps |
| CPU time | 65.65 seconds |
| Started | Aug 23 11:06:59 PM UTC 24 |
| Finished | Aug 23 11:08:07 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988661374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.1988661374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.1314464940 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 186265040 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:07:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1314464940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.1314464940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.3675409968 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 15038992108 ps |
| CPU time | 17.87 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:07:20 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675409968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.3675409968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.3257158176 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 11235755321 ps |
| CPU time | 12.82 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:07:15 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3257158176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.3257158176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.3059800968 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 3868531825 ps |
| CPU time | 89.26 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:08:32 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059800968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.3059800968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.1601769207 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 253455154 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:07:01 PM UTC 24 |
| Finished | Aug 23 11:07:03 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601769207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.1601769207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.528397667 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 184997748 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:02 PM UTC 24 |
| Finished | Aug 23 11:07:04 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=528397667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.528397667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.334156628 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 2482603384 ps |
| CPU time | 58.11 seconds |
| Started | Aug 23 11:07:02 PM UTC 24 |
| Finished | Aug 23 11:08:02 PM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=334156628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.334156628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.904034897 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 147546825 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:07:02 PM UTC 24 |
| Finished | Aug 23 11:07:04 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904034897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.904034897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.1038401422 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 151904142 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:07:02 PM UTC 24 |
| Finished | Aug 23 11:07:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1038401422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.1038401422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.3312377716 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 226909140 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:07:03 PM UTC 24 |
| Finished | Aug 23 11:07:05 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3312377716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.3312377716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.1033943485 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 177611724 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:07:03 PM UTC 24 |
| Finished | Aug 23 11:07:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033943485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.1033943485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.4055689188 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 164153794 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:07:03 PM UTC 24 |
| Finished | Aug 23 11:07:05 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4055689188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.4055689188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.298678050 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 193806628 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:05 PM UTC 24 |
| Finished | Aug 23 11:07:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=298678050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_out_trans_nak.298678050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.4152694140 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 156641233 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:07:05 PM UTC 24 |
| Finished | Aug 23 11:07:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152694140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.4152694140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.2464257254 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 181331119 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:05 PM UTC 24 |
| Finished | Aug 23 11:07:06 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2464257254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.2464257254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.425584098 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 141399600 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:05 PM UTC 24 |
| Finished | Aug 23 11:07:06 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=425584098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.425584098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.3433983442 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 91076413 ps |
| CPU time | 0.67 seconds |
| Started | Aug 23 11:07:06 PM UTC 24 |
| Finished | Aug 23 11:07:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3433983442 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.3433983442 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.3836214239 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 9765827047 ps |
| CPU time | 24.08 seconds |
| Started | Aug 23 11:07:06 PM UTC 24 |
| Finished | Aug 23 11:07:31 PM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836214239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.3836214239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.533003798 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 212765948 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:06 PM UTC 24 |
| Finished | Aug 23 11:07:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533003798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_pkt_received.533003798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.4211786450 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 219958523 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:07 PM UTC 24 |
| Finished | Aug 23 11:07:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4211786450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.4211786450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.2589736648 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 285555059 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:07:07 PM UTC 24 |
| Finished | Aug 23 11:07:09 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589736648 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.2589736648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.686374712 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 177492347 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:07 PM UTC 24 |
| Finished | Aug 23 11:07:09 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=686374712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.686374712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.223801783 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 162223043 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:07 PM UTC 24 |
| Finished | Aug 23 11:07:09 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=223801783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_rx_crc_err.223801783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.457763161 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 242304665 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:07:07 PM UTC 24 |
| Finished | Aug 23 11:07:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457763161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 44.usbdev_rx_full.457763161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.1673536570 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 179099833 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:08 PM UTC 24 |
| Finished | Aug 23 11:07:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673536570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.1673536570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.4294725158 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 232595178 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:07:08 PM UTC 24 |
| Finished | Aug 23 11:07:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294725158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.4294725158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.2735679324 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 218027440 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:07:08 PM UTC 24 |
| Finished | Aug 23 11:07:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2735679324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.2735679324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.319223480 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 1496941508 ps |
| CPU time | 34.82 seconds |
| Started | Aug 23 11:07:08 PM UTC 24 |
| Finished | Aug 23 11:07:45 PM UTC 24 |
| Peak memory | 228364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=319223480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.319223480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2637575762 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 163093555 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:07:10 PM UTC 24 |
| Finished | Aug 23 11:07:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637575762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2637575762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.2078584839 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 213299467 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:07:10 PM UTC 24 |
| Finished | Aug 23 11:07:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078584839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.2078584839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.555502121 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 1089338555 ps |
| CPU time | 2.35 seconds |
| Started | Aug 23 11:07:10 PM UTC 24 |
| Finished | Aug 23 11:07:13 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555502121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_stream_len_max.555502121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.2738109338 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 2667654316 ps |
| CPU time | 18.28 seconds |
| Started | Aug 23 11:07:10 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2738109338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.2738109338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.4246741006 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 3926555831 ps |
| CPU time | 28.12 seconds |
| Started | Aug 23 11:06:57 PM UTC 24 |
| Finished | Aug 23 11:07:26 PM UTC 24 |
| Peak memory | 218352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4246741006 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.4246741006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.3524806050 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 497271517 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:07:10 PM UTC 24 |
| Finished | Aug 23 11:07:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3524806050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.3524806050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.117117642 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 479906963 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:13 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=117117642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_t x_rx_disruption.117117642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.1428116623 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 611963717 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:11:13 PM UTC 24 |
| Finished | Aug 23 11:11:16 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1428116623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.1428116623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.984712544 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 676775666 ps |
| CPU time | 1.68 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=984712544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_t x_rx_disruption.984712544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.4258425470 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 434277441 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:24 PM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4258425470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_ tx_rx_disruption.4258425470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.400901097 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 535767917 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 215256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=400901097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_t x_rx_disruption.400901097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.983118017 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 610657451 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=983118017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_t x_rx_disruption.983118017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.2431581948 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 579180051 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2431581948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_ tx_rx_disruption.2431581948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2074543797 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 604915670 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2074543797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2074543797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.2784042800 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 492429949 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:11:15 PM UTC 24 |
| Finished | Aug 23 11:11:25 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2784042800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.2784042800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.413956363 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 554725414 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=413956363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_t x_rx_disruption.413956363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.3865016629 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 47477725 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:07:34 PM UTC 24 |
| Finished | Aug 23 11:07:36 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3865016629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.3865016629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.947708462 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 9423256009 ps |
| CPU time | 13.07 seconds |
| Started | Aug 23 11:07:11 PM UTC 24 |
| Finished | Aug 23 11:07:25 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=947708462 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.947708462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.1184028944 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 18575062038 ps |
| CPU time | 23.86 seconds |
| Started | Aug 23 11:07:11 PM UTC 24 |
| Finished | Aug 23 11:07:36 PM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1184028944 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.1184028944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.2109106056 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 30350083158 ps |
| CPU time | 37.66 seconds |
| Started | Aug 23 11:07:12 PM UTC 24 |
| Finished | Aug 23 11:07:51 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109106056 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.2109106056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.2608255388 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 171284047 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:12 PM UTC 24 |
| Finished | Aug 23 11:07:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2608255388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.2608255388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.338602596 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 199015748 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:12 PM UTC 24 |
| Finished | Aug 23 11:07:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=338602596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_bitstuff_err.338602596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.713996081 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 393251130 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:07:13 PM UTC 24 |
| Finished | Aug 23 11:07:16 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=713996081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_data_toggle_clear.713996081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.3162707762 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 982821286 ps |
| CPU time | 2.44 seconds |
| Started | Aug 23 11:07:13 PM UTC 24 |
| Finished | Aug 23 11:07:17 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3162707762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.3162707762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.819014302 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 40703949851 ps |
| CPU time | 58.18 seconds |
| Started | Aug 23 11:07:13 PM UTC 24 |
| Finished | Aug 23 11:08:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819014302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_device_address.819014302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.3299708124 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 610858152 ps |
| CPU time | 4.12 seconds |
| Started | Aug 23 11:07:15 PM UTC 24 |
| Finished | Aug 23 11:07:20 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299708124 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.3299708124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.3414266919 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 789825308 ps |
| CPU time | 1.98 seconds |
| Started | Aug 23 11:07:15 PM UTC 24 |
| Finished | Aug 23 11:07:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414266919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.3414266919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.4240167146 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 140322290 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:07:15 PM UTC 24 |
| Finished | Aug 23 11:07:16 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4240167146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.4240167146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_enable.382803802 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 42118480 ps |
| CPU time | 0.66 seconds |
| Started | Aug 23 11:07:16 PM UTC 24 |
| Finished | Aug 23 11:07:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=382803802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_enable.382803802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.2546853368 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 823308146 ps |
| CPU time | 2.22 seconds |
| Started | Aug 23 11:07:16 PM UTC 24 |
| Finished | Aug 23 11:07:19 PM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2546853368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2546853368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.1944991641 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 210636327 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:07:17 PM UTC 24 |
| Finished | Aug 23 11:07:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1944991641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.1944991641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.396558577 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 154761409 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:07:18 PM UTC 24 |
| Finished | Aug 23 11:07:20 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=396558577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.396558577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.1540685267 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 165546698 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:18 PM UTC 24 |
| Finished | Aug 23 11:07:20 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1540685267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_stall.1540685267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.3454232968 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 222168531 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:07:19 PM UTC 24 |
| Finished | Aug 23 11:07:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454232968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.3454232968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3581470918 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 2548198980 ps |
| CPU time | 21.45 seconds |
| Started | Aug 23 11:07:18 PM UTC 24 |
| Finished | Aug 23 11:07:41 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581470918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3581470918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.2381167437 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 6901251180 ps |
| CPU time | 43.1 seconds |
| Started | Aug 23 11:07:19 PM UTC 24 |
| Finished | Aug 23 11:08:04 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381167437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.2381167437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.1154049899 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 209003509 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:07:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1154049899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_in_err.1154049899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.3667194337 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 24535339259 ps |
| CPU time | 37.64 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:08:00 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667194337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.3667194337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.3274486613 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 10819136649 ps |
| CPU time | 11.78 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:07:34 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274486613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.3274486613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.1749046011 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 4640435504 ps |
| CPU time | 110.91 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 228572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749046011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.1749046011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.813048406 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 1725692846 ps |
| CPU time | 10.76 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:07:33 PM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=813048406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.813048406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.2751174391 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 268568131 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:07:21 PM UTC 24 |
| Finished | Aug 23 11:07:23 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751174391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.2751174391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.3807480830 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 243620386 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:07:22 PM UTC 24 |
| Finished | Aug 23 11:07:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807480830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.3807480830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.3636171986 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 2542148726 ps |
| CPU time | 21.76 seconds |
| Started | Aug 23 11:07:23 PM UTC 24 |
| Finished | Aug 23 11:07:46 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3636171986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.3636171986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.29772405 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 158923054 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:24 PM UTC 24 |
| Finished | Aug 23 11:07:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=29772405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_ trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.29772405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.4212682904 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 159189274 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:07:24 PM UTC 24 |
| Finished | Aug 23 11:07:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212682904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.4212682904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.3975628027 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 194540002 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:07:25 PM UTC 24 |
| Finished | Aug 23 11:07:27 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3975628027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_nak_trans.3975628027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.2993018041 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 187762433 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:07:26 PM UTC 24 |
| Finished | Aug 23 11:07:28 PM UTC 24 |
| Peak memory | 215836 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993018041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.2993018041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.1051701411 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 173770318 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:26 PM UTC 24 |
| Finished | Aug 23 11:07:28 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051701411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_out_stall.1051701411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.2442554436 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 177416850 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:26 PM UTC 24 |
| Finished | Aug 23 11:07:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442554436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.2442554436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.1799178966 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 147338909 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:07:26 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799178966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.1799178966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.2513059430 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 189915964 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:26 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2513059430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.2513059430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.3107206983 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 137068341 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:07:28 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3107206983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.3107206983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.1449881793 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 35297123 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:07:28 PM UTC 24 |
| Finished | Aug 23 11:07:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449881793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1449881793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.616150502 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 22698161759 ps |
| CPU time | 54.2 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:08:26 PM UTC 24 |
| Peak memory | 232660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616150502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_pkt_buffer.616150502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.3336878608 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 201427870 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3336878608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.3336878608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.1112366274 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 211606306 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112366274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.1112366274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.3813650130 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 213892640 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813650130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.3813650130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.2827780083 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 164858106 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827780083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.2827780083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.3807552682 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 187132938 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807552682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_rx_crc_err.3807552682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.3064174945 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 254486653 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3064174945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_rx_full.3064174945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.1100828758 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 145632269 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100828758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.1100828758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.2176456424 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 153979722 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:30 PM UTC 24 |
| Finished | Aug 23 11:07:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2176456424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.2176456424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.763255526 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 190555788 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:07:32 PM UTC 24 |
| Finished | Aug 23 11:07:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=763255526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.763255526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.426205606 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 3521085461 ps |
| CPU time | 31.12 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:08:05 PM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426205606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.426205606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.4249066976 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 176271788 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:07:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249066976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.4249066976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.377883191 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 167149526 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:07:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377883191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_stall_trans.377883191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1981049808 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 904982493 ps |
| CPU time | 2.03 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:07:36 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1981049808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.1981049808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.808952861 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 2629202700 ps |
| CPU time | 22.48 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:07:57 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808952861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_streaming_out.808952861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.1616310808 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 1296452839 ps |
| CPU time | 24.41 seconds |
| Started | Aug 23 11:07:15 PM UTC 24 |
| Finished | Aug 23 11:07:40 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1616310808 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.1616310808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.2811916593 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 438934014 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:07:33 PM UTC 24 |
| Finished | Aug 23 11:07:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2811916593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.2811916593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.1368844677 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 419702510 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1368844677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_ tx_rx_disruption.1368844677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.3737121614 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 580267633 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3737121614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.3737121614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.1509394161 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 429037423 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1509394161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.1509394161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.1071102464 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 477470625 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 215768 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071102464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.1071102464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.2534573120 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 532427754 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2534573120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_ tx_rx_disruption.2534573120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.1927199316 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 591799068 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1927199316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_ tx_rx_disruption.1927199316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.3338778615 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 453891518 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 11:11:16 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3338778615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.3338778615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.3148116575 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 569333569 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3148116575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.3148116575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.3846302075 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 613569135 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3846302075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.3846302075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.91495259 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 529968944 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=91495259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_tx _rx_disruption.91495259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.184166252 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 43667318 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:07:57 PM UTC 24 |
| Finished | Aug 23 11:07:59 PM UTC 24 |
| Peak memory | 215824 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184166252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.184166252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.1463528493 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 11660035453 ps |
| CPU time | 12.89 seconds |
| Started | Aug 23 11:07:34 PM UTC 24 |
| Finished | Aug 23 11:07:48 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463528493 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.1463528493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.2430529540 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 15545790400 ps |
| CPU time | 18.89 seconds |
| Started | Aug 23 11:07:34 PM UTC 24 |
| Finished | Aug 23 11:07:54 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430529540 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.2430529540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.1071526312 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 26311774025 ps |
| CPU time | 30.1 seconds |
| Started | Aug 23 11:07:34 PM UTC 24 |
| Finished | Aug 23 11:08:06 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1071526312 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.1071526312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.1053956123 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 192362891 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:35 PM UTC 24 |
| Finished | Aug 23 11:07:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1053956123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.1053956123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.2498306144 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 138597027 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:07:35 PM UTC 24 |
| Finished | Aug 23 11:07:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2498306144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.2498306144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.2946177146 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 476180571 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:07:35 PM UTC 24 |
| Finished | Aug 23 11:07:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2946177146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.2946177146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.4110196300 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 1066944070 ps |
| CPU time | 2.57 seconds |
| Started | Aug 23 11:07:37 PM UTC 24 |
| Finished | Aug 23 11:07:41 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4110196300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.4110196300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.2447888214 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 29729531492 ps |
| CPU time | 46.59 seconds |
| Started | Aug 23 11:07:37 PM UTC 24 |
| Finished | Aug 23 11:08:25 PM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447888214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.2447888214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.2710625033 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 1361954852 ps |
| CPU time | 7.82 seconds |
| Started | Aug 23 11:07:37 PM UTC 24 |
| Finished | Aug 23 11:07:46 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710625033 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.2710625033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.1846249214 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 679249228 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:07:38 PM UTC 24 |
| Finished | Aug 23 11:07:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846249214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_disable_endpoint.1846249214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.2201381688 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 139180982 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:07:38 PM UTC 24 |
| Finished | Aug 23 11:07:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201381688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.2201381688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_enable.890260687 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 38343177 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:07:39 PM UTC 24 |
| Finished | Aug 23 11:07:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890260687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.890260687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.1657168726 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 767152631 ps |
| CPU time | 1.97 seconds |
| Started | Aug 23 11:07:40 PM UTC 24 |
| Finished | Aug 23 11:07:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1657168726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.1657168726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.3806606709 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 440957658 ps |
| CPU time | 1.29 seconds |
| Started | Aug 23 11:07:40 PM UTC 24 |
| Finished | Aug 23 11:07:43 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806606709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.3806606709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.447907040 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 305641400 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:07:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=447907040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_fifo_rst.447907040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.1808941366 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 163670818 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:07:44 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808941366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.1808941366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.2516351093 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 141995074 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:07:44 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2516351093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.2516351093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.1597139208 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 277975912 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:07:44 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597139208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_trans.1597139208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.513120432 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 3137491805 ps |
| CPU time | 19.31 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:08:03 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=513120432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.513120432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.2488670365 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 10430057588 ps |
| CPU time | 104.94 seconds |
| Started | Aug 23 11:07:42 PM UTC 24 |
| Finished | Aug 23 11:09:29 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2488670365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.2488670365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.4021194276 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 239921205 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:07:43 PM UTC 24 |
| Finished | Aug 23 11:07:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4021194276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.4021194276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.4045960037 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 27151282949 ps |
| CPU time | 31.39 seconds |
| Started | Aug 23 11:07:44 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4045960037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.4045960037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.2548814836 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 9774725388 ps |
| CPU time | 11.32 seconds |
| Started | Aug 23 11:07:45 PM UTC 24 |
| Finished | Aug 23 11:07:58 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548814836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.2548814836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.2823092029 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 3299422474 ps |
| CPU time | 23.65 seconds |
| Started | Aug 23 11:07:45 PM UTC 24 |
| Finished | Aug 23 11:08:10 PM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823092029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.2823092029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.3228456833 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 3729384665 ps |
| CPU time | 24.4 seconds |
| Started | Aug 23 11:07:45 PM UTC 24 |
| Finished | Aug 23 11:08:11 PM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3228456833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.3228456833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.1692121965 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 241378330 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:07:46 PM UTC 24 |
| Finished | Aug 23 11:07:48 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692121965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.1692121965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.4288552390 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 206107037 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:07:46 PM UTC 24 |
| Finished | Aug 23 11:07:48 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288552390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.4288552390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.3500458855 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 2944458613 ps |
| CPU time | 20.53 seconds |
| Started | Aug 23 11:07:46 PM UTC 24 |
| Finished | Aug 23 11:08:08 PM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500458855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.3500458855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.2137473760 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 178046332 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:07:46 PM UTC 24 |
| Finished | Aug 23 11:07:49 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137473760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.2137473760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.2929247585 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 168843857 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:47 PM UTC 24 |
| Finished | Aug 23 11:07:49 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2929247585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.2929247585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.2265613583 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 232529380 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:07:49 PM UTC 24 |
| Finished | Aug 23 11:07:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265613583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.2265613583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.834817250 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 183908914 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:07:49 PM UTC 24 |
| Finished | Aug 23 11:07:50 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834817250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_out_iso.834817250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.49872358 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 219097831 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:07:50 PM UTC 24 |
| Finished | Aug 23 11:07:52 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=49872358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_stall.49872358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.1116655039 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 176615062 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:07:50 PM UTC 24 |
| Finished | Aug 23 11:07:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1116655039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.1116655039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.1452489488 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 157861732 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:07:50 PM UTC 24 |
| Finished | Aug 23 11:07:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1452489488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.1452489488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.1523355626 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 220235010 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:07:50 PM UTC 24 |
| Finished | Aug 23 11:07:52 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523355626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.1523355626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.2040134642 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 154006461 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:07:51 PM UTC 24 |
| Finished | Aug 23 11:07:53 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2040134642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.2040134642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.3525810954 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 47973677 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:07:51 PM UTC 24 |
| Finished | Aug 23 11:07:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525810954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.3525810954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3987092708 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 12465010879 ps |
| CPU time | 30.84 seconds |
| Started | Aug 23 11:07:52 PM UTC 24 |
| Finished | Aug 23 11:08:25 PM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987092708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.3987092708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.2710798206 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 193899972 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:07:52 PM UTC 24 |
| Finished | Aug 23 11:07:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710798206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_pkt_received.2710798206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.3621427160 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 198762358 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:07:52 PM UTC 24 |
| Finished | Aug 23 11:07:54 PM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3621427160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.3621427160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.2433301732 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 156265434 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:07:52 PM UTC 24 |
| Finished | Aug 23 11:07:54 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2433301732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.2433301732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.2129681382 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 187775496 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:07:53 PM UTC 24 |
| Finished | Aug 23 11:07:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129681382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.2129681382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.3429265818 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 258106331 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:07:53 PM UTC 24 |
| Finished | Aug 23 11:07:56 PM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429265818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.3429265818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.3498525789 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 249427791 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:07:53 PM UTC 24 |
| Finished | Aug 23 11:07:56 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3498525789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_rx_full.3498525789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3611148017 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 145512762 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 11:07:55 PM UTC 24 |
| Finished | Aug 23 11:07:57 PM UTC 24 |
| Peak memory | 215312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611148017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3611148017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.3201976552 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 154923552 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:07:55 PM UTC 24 |
| Finished | Aug 23 11:07:57 PM UTC 24 |
| Peak memory | 217328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201976552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 46.usbdev_setup_trans_ignored.3201976552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.2531170254 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 277298196 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:07:55 PM UTC 24 |
| Finished | Aug 23 11:07:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531170254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.2531170254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.796925901 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 2406371748 ps |
| CPU time | 16.26 seconds |
| Started | Aug 23 11:07:55 PM UTC 24 |
| Finished | Aug 23 11:08:12 PM UTC 24 |
| Peak memory | 217568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=796925901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.796925901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.2394244104 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 182043298 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:07:56 PM UTC 24 |
| Finished | Aug 23 11:07:58 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2394244104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.2394244104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.1551000738 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 164743405 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:07:57 PM UTC 24 |
| Finished | Aug 23 11:07:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551000738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.1551000738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.1334019916 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 1115552836 ps |
| CPU time | 2.48 seconds |
| Started | Aug 23 11:07:57 PM UTC 24 |
| Finished | Aug 23 11:08:01 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1334019916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.1334019916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.3958878546 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 3043190836 ps |
| CPU time | 19.94 seconds |
| Started | Aug 23 11:07:57 PM UTC 24 |
| Finished | Aug 23 11:08:19 PM UTC 24 |
| Peak memory | 229296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3958878546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.3958878546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.1092034649 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 1414798414 ps |
| CPU time | 27.86 seconds |
| Started | Aug 23 11:07:37 PM UTC 24 |
| Finished | Aug 23 11:08:06 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092034649 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.1092034649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.3015995231 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 484203956 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:07:57 PM UTC 24 |
| Finished | Aug 23 11:08:00 PM UTC 24 |
| Peak memory | 216956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3015995231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_t x_rx_disruption.3015995231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.470719390 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 526143694 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=470719390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_t x_rx_disruption.470719390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.2718079136 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 474568459 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2718079136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.2718079136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.2369455285 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 604716450 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 217924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2369455285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.2369455285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.379216208 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 472212538 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 215588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=379216208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_t x_rx_disruption.379216208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.153125599 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 453928652 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=153125599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_t x_rx_disruption.153125599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.3152357546 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 460837267 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3152357546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.3152357546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.1120595218 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 566682183 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1120595218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_ tx_rx_disruption.1120595218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.1193790613 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 592488500 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1193790613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.1193790613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.3388045833 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 469589913 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:22 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3388045833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.3388045833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.978167389 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 455965752 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:11:18 PM UTC 24 |
| Finished | Aug 23 11:11:21 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=978167389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_t x_rx_disruption.978167389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.56083580 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 47113804 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 11:08:19 PM UTC 24 |
| Finished | Aug 23 11:08:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56083580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.56083580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3704412436 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 10169794680 ps |
| CPU time | 12.73 seconds |
| Started | Aug 23 11:07:58 PM UTC 24 |
| Finished | Aug 23 11:08:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3704412436 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3704412436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.2381521694 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 15931999008 ps |
| CPU time | 19.09 seconds |
| Started | Aug 23 11:07:58 PM UTC 24 |
| Finished | Aug 23 11:08:19 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2381521694 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.2381521694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.300961375 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 31396225404 ps |
| CPU time | 37.39 seconds |
| Started | Aug 23 11:07:58 PM UTC 24 |
| Finished | Aug 23 11:08:38 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=300961375 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.300961375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.1681661798 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 153872260 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:00 PM UTC 24 |
| Finished | Aug 23 11:08:02 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681661798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.1681661798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.3656406415 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 171490488 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:08:00 PM UTC 24 |
| Finished | Aug 23 11:08:02 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3656406415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_bitstuff_err.3656406415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.833195728 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 426415565 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:08:01 PM UTC 24 |
| Finished | Aug 23 11:08:03 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=833195728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_data_toggle_clear.833195728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.2342441932 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 1309401744 ps |
| CPU time | 3.12 seconds |
| Started | Aug 23 11:08:01 PM UTC 24 |
| Finished | Aug 23 11:08:05 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2342441932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.2342441932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.16598748 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 32600856084 ps |
| CPU time | 46.37 seconds |
| Started | Aug 23 11:08:01 PM UTC 24 |
| Finished | Aug 23 11:08:49 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=16598748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_device_address.16598748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.1715065652 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 611495718 ps |
| CPU time | 9.99 seconds |
| Started | Aug 23 11:08:02 PM UTC 24 |
| Finished | Aug 23 11:08:13 PM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715065652 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.1715065652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.108524506 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 991614711 ps |
| CPU time | 2.04 seconds |
| Started | Aug 23 11:08:03 PM UTC 24 |
| Finished | Aug 23 11:08:06 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108524506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_disable_endpoint.108524506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.3144658463 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 139041113 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:08:03 PM UTC 24 |
| Finished | Aug 23 11:08:05 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144658463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.3144658463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_enable.3595243083 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 33903321 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:08:04 PM UTC 24 |
| Finished | Aug 23 11:08:06 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3595243083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.3595243083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.2686874790 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 727171289 ps |
| CPU time | 1.93 seconds |
| Started | Aug 23 11:08:04 PM UTC 24 |
| Finished | Aug 23 11:08:07 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2686874790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.2686874790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.2491441238 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 405654777 ps |
| CPU time | 1.16 seconds |
| Started | Aug 23 11:08:05 PM UTC 24 |
| Finished | Aug 23 11:08:07 PM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491441238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.2491441238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.1363716323 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 192227473 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 11:08:05 PM UTC 24 |
| Finished | Aug 23 11:08:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363716323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.1363716323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.4026491596 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 191832034 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:08:07 PM UTC 24 |
| Finished | Aug 23 11:08:09 PM UTC 24 |
| Peak memory | 226376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026491596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.4026491596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.2644325179 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 179105819 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:07 PM UTC 24 |
| Finished | Aug 23 11:08:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2644325179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.2644325179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.328213012 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 164063255 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:08:07 PM UTC 24 |
| Finished | Aug 23 11:08:09 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328213012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_in_trans.328213012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.3330053317 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 2369779613 ps |
| CPU time | 20.67 seconds |
| Started | Aug 23 11:08:07 PM UTC 24 |
| Finished | Aug 23 11:08:29 PM UTC 24 |
| Peak memory | 235316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330053317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.3330053317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.658455588 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 4938604937 ps |
| CPU time | 29.55 seconds |
| Started | Aug 23 11:08:07 PM UTC 24 |
| Finished | Aug 23 11:08:38 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=658455588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.658455588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.834536933 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 253808969 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:08:08 PM UTC 24 |
| Finished | Aug 23 11:08:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=834536933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_link_in_err.834536933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.1435727286 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 31447364479 ps |
| CPU time | 41.59 seconds |
| Started | Aug 23 11:08:08 PM UTC 24 |
| Finished | Aug 23 11:08:51 PM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1435727286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.1435727286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1761761819 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 9723486796 ps |
| CPU time | 12.62 seconds |
| Started | Aug 23 11:08:08 PM UTC 24 |
| Finished | Aug 23 11:08:22 PM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761761819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1761761819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.3949610010 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 4260606358 ps |
| CPU time | 102.41 seconds |
| Started | Aug 23 11:08:08 PM UTC 24 |
| Finished | Aug 23 11:09:53 PM UTC 24 |
| Peak memory | 230620 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949610010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.3949610010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.505111074 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 2924673740 ps |
| CPU time | 69.54 seconds |
| Started | Aug 23 11:08:08 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=505111074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.505111074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.2641530302 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 248610622 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:08:09 PM UTC 24 |
| Finished | Aug 23 11:08:11 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2641530302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.2641530302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.381311026 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 189519364 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:08:09 PM UTC 24 |
| Finished | Aug 23 11:08:11 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=381311026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.381311026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.3036279635 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 2353952925 ps |
| CPU time | 18.76 seconds |
| Started | Aug 23 11:08:09 PM UTC 24 |
| Finished | Aug 23 11:08:29 PM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3036279635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.3036279635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.1831615811 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 156774626 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:09 PM UTC 24 |
| Finished | Aug 23 11:08:11 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1831615811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.1831615811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.2440728848 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 162033082 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:08:10 PM UTC 24 |
| Finished | Aug 23 11:08:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2440728848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.2440728848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.4288397782 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 163734726 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:08:12 PM UTC 24 |
| Finished | Aug 23 11:08:14 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288397782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.4288397782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.4153463736 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 207827194 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:08:12 PM UTC 24 |
| Finished | Aug 23 11:08:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153463736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.4153463736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.3116854306 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 183469365 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:12 PM UTC 24 |
| Finished | Aug 23 11:08:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116854306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.3116854306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.2985620456 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 183930984 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:08:12 PM UTC 24 |
| Finished | Aug 23 11:08:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2985620456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.2985620456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.3900422275 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 161299605 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:08:13 PM UTC 24 |
| Finished | Aug 23 11:08:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3900422275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.3900422275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.1822364350 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 203907108 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:08:13 PM UTC 24 |
| Finished | Aug 23 11:08:15 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822364350 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.1822364350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.743717180 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 164286004 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:13 PM UTC 24 |
| Finished | Aug 23 11:08:15 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=743717180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.743717180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.4096537323 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 70278739 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 11:08:13 PM UTC 24 |
| Finished | Aug 23 11:08:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096537323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.4096537323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.2374090016 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 22912199944 ps |
| CPU time | 53.49 seconds |
| Started | Aug 23 11:08:13 PM UTC 24 |
| Finished | Aug 23 11:09:08 PM UTC 24 |
| Peak memory | 228500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2374090016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.2374090016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.3718017893 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 193413023 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3718017893 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.3718017893 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1687571516 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 183138491 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687571516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1687571516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.2570388492 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 223669841 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570388492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.2570388492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.2630545994 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 160516282 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2630545994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.2630545994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.3214405149 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 169560492 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3214405149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_rx_crc_err.3214405149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.4155753616 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 259566092 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:08:15 PM UTC 24 |
| Finished | Aug 23 11:08:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4155753616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_rx_full.4155753616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.1408273925 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 156130385 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:08:16 PM UTC 24 |
| Finished | Aug 23 11:08:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1408273925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_setup_stage.1408273925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.543598410 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 161473421 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:16 PM UTC 24 |
| Finished | Aug 23 11:08:18 PM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543598410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 47.usbdev_setup_trans_ignored.543598410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.2476614209 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 211759971 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:08:16 PM UTC 24 |
| Finished | Aug 23 11:08:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476614209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.2476614209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.3840179636 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 2327708366 ps |
| CPU time | 16.09 seconds |
| Started | Aug 23 11:08:16 PM UTC 24 |
| Finished | Aug 23 11:08:33 PM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3840179636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.3840179636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.2989224127 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 212269696 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:08:17 PM UTC 24 |
| Finished | Aug 23 11:08:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2989224127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.2989224127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.3203100816 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 188611546 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 11:08:17 PM UTC 24 |
| Finished | Aug 23 11:08:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3203100816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.3203100816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.2467064633 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 1251801569 ps |
| CPU time | 2.81 seconds |
| Started | Aug 23 11:08:17 PM UTC 24 |
| Finished | Aug 23 11:08:21 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467064633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stream_len_max.2467064633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.925412365 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 2682297250 ps |
| CPU time | 64.35 seconds |
| Started | Aug 23 11:08:17 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=925412365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_streaming_out.925412365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.2744075444 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 4962500865 ps |
| CPU time | 29.12 seconds |
| Started | Aug 23 11:08:03 PM UTC 24 |
| Finished | Aug 23 11:08:34 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744075444 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.2744075444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.3716405871 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 477362861 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:08:17 PM UTC 24 |
| Finished | Aug 23 11:08:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3716405871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.3716405871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.659448204 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 614915883 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=659448204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_t x_rx_disruption.659448204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.2635513497 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 506937314 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2635513497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.2635513497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.3351141936 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 582554032 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3351141936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_ tx_rx_disruption.3351141936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.4020485710 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 486367558 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4020485710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.4020485710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2795418215 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 480112709 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2795418215 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.2795418215 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.1679029764 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 563596378 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1679029764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.1679029764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.4221885060 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 513099691 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4221885060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.4221885060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.599651438 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 506457746 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=599651438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_t x_rx_disruption.599651438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.325394767 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 463879661 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=325394767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_t x_rx_disruption.325394767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.2339214449 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 516473206 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2339214449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.2339214449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.2495851466 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 49186895 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 11:08:38 PM UTC 24 |
| Finished | Aug 23 11:08:40 PM UTC 24 |
| Peak memory | 216240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495851466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.2495851466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.2869398802 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 6133029711 ps |
| CPU time | 9.89 seconds |
| Started | Aug 23 11:08:19 PM UTC 24 |
| Finished | Aug 23 11:08:30 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869398802 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.2869398802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.1382323630 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 14272379931 ps |
| CPU time | 19.26 seconds |
| Started | Aug 23 11:08:19 PM UTC 24 |
| Finished | Aug 23 11:08:39 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1382323630 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.1382323630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.2034108827 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 24476843045 ps |
| CPU time | 30.49 seconds |
| Started | Aug 23 11:08:19 PM UTC 24 |
| Finished | Aug 23 11:08:50 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034108827 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.2034108827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.1092850969 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 153596969 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:08:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1092850969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.1092850969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.2913640145 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 141386937 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:08:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2913640145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.2913640145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.2503115163 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 532245441 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:08:23 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2503115163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 48.usbdev_data_toggle_clear.2503115163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.1177076394 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 957698494 ps |
| CPU time | 2.37 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:08:24 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177076394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.1177076394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.496277083 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 37893305487 ps |
| CPU time | 54.26 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:09:16 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496277083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_device_address.496277083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.2131120929 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 741540112 ps |
| CPU time | 13.03 seconds |
| Started | Aug 23 11:08:20 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2131120929 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.2131120929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.862631511 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 828728724 ps |
| CPU time | 1.83 seconds |
| Started | Aug 23 11:08:22 PM UTC 24 |
| Finished | Aug 23 11:08:24 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=862631511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.862631511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.1749315112 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 141270372 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:08:23 PM UTC 24 |
| Finished | Aug 23 11:08:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749315112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.1749315112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_enable.23450042 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 67085561 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:08:23 PM UTC 24 |
| Finished | Aug 23 11:08:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=23450042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_enable.23450042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.2193212249 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 889592383 ps |
| CPU time | 2.21 seconds |
| Started | Aug 23 11:08:23 PM UTC 24 |
| Finished | Aug 23 11:08:26 PM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2193212249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.2193212249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.3080123536 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 269582048 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:08:23 PM UTC 24 |
| Finished | Aug 23 11:08:25 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3080123536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.3080123536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.747560423 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 211738019 ps |
| CPU time | 1.23 seconds |
| Started | Aug 23 11:08:24 PM UTC 24 |
| Finished | Aug 23 11:08:26 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=747560423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_fifo_rst.747560423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.638987597 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 177364198 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:27 PM UTC 24 |
| Peak memory | 216176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=638987597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.638987597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.1968010494 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 144211851 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968010494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_stall.1968010494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.3260085333 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 252670305 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260085333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_in_trans.3260085333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.3106575437 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 2845149483 ps |
| CPU time | 17.85 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:44 PM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106575437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.3106575437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.3879350300 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 4683311349 ps |
| CPU time | 26.71 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:53 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3879350300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.3879350300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.1941424923 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 173878934 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:25 PM UTC 24 |
| Finished | Aug 23 11:08:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941424923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_link_in_err.1941424923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.698671116 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 31305061412 ps |
| CPU time | 45.62 seconds |
| Started | Aug 23 11:08:27 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698671116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_resume.698671116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.2877163398 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 10205024377 ps |
| CPU time | 11.51 seconds |
| Started | Aug 23 11:08:27 PM UTC 24 |
| Finished | Aug 23 11:08:40 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877163398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.2877163398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.884124451 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 4159783970 ps |
| CPU time | 28.47 seconds |
| Started | Aug 23 11:08:27 PM UTC 24 |
| Finished | Aug 23 11:08:57 PM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884124451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.884124451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.2452579574 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 2374235014 ps |
| CPU time | 52.97 seconds |
| Started | Aug 23 11:08:27 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452579574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.2452579574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.1672397794 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 255871541 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:08:28 PM UTC 24 |
| Finished | Aug 23 11:08:30 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1672397794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.1672397794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.2634584678 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 198973457 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:28 PM UTC 24 |
| Finished | Aug 23 11:08:30 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634584678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.2634584678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.2732113836 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 2284504190 ps |
| CPU time | 53.47 seconds |
| Started | Aug 23 11:08:28 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732113836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.2732113836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.2485679027 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 150051442 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:28 PM UTC 24 |
| Finished | Aug 23 11:08:30 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485679027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.2485679027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.4128425936 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 167604366 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:08:29 PM UTC 24 |
| Finished | Aug 23 11:08:31 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4128425936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.4128425936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.3785099822 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 209926437 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:08:31 PM UTC 24 |
| Finished | Aug 23 11:08:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3785099822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.3785099822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.2490718947 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 164326108 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:08:31 PM UTC 24 |
| Finished | Aug 23 11:08:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490718947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.2490718947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.729547871 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 206754671 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 11:08:31 PM UTC 24 |
| Finished | Aug 23 11:08:33 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=729547871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_out_stall.729547871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.3123405757 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 163717177 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:31 PM UTC 24 |
| Finished | Aug 23 11:08:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123405757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_out_trans_nak.3123405757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1418719410 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 214890039 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:31 PM UTC 24 |
| Finished | Aug 23 11:08:33 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418719410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.1418719410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.2781505917 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 231284703 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:08:32 PM UTC 24 |
| Finished | Aug 23 11:08:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2781505917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.2781505917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.3708149030 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 150915609 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708149030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.3708149030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.3174936483 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 40890749 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 215532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174936483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_pins_sense.3174936483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.1085883901 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 10491611033 ps |
| CPU time | 23.4 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:58 PM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1085883901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_pkt_buffer.1085883901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.599049032 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 168861257 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599049032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_pkt_received.599049032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.3047587149 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 291798365 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047587149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.3047587149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.2505974842 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 208404675 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:33 PM UTC 24 |
| Finished | Aug 23 11:08:35 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505974842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.2505974842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.312741617 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 172808186 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:08:34 PM UTC 24 |
| Finished | Aug 23 11:08:36 PM UTC 24 |
| Peak memory | 216308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312741617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.312741617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.1999232976 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 190806379 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:34 PM UTC 24 |
| Finished | Aug 23 11:08:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1999232976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.1999232976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.3751416723 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 246968458 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:08:34 PM UTC 24 |
| Finished | Aug 23 11:08:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3751416723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.3751416723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.2382755851 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 167673988 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:08:37 PM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2382755851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_setup_stage.2382755851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.4206046379 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 161252821 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:08:37 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206046379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.4206046379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.2544539798 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 255253463 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:08:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2544539798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.2544539798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3948857685 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 3810163980 ps |
| CPU time | 88.84 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:10:06 PM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948857685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3948857685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.3930771168 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 196961067 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:08:37 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930771168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.3930771168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.2615247017 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 201734712 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:08:36 PM UTC 24 |
| Finished | Aug 23 11:08:38 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2615247017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 48.usbdev_stall_trans.2615247017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.2450889848 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 680723688 ps |
| CPU time | 1.75 seconds |
| Started | Aug 23 11:08:37 PM UTC 24 |
| Finished | Aug 23 11:08:40 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450889848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.2450889848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.1711086438 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 2963394664 ps |
| CPU time | 26.2 seconds |
| Started | Aug 23 11:08:37 PM UTC 24 |
| Finished | Aug 23 11:09:05 PM UTC 24 |
| Peak memory | 235232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711086438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_streaming_out.1711086438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.66594673 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 3121992980 ps |
| CPU time | 18.99 seconds |
| Started | Aug 23 11:08:22 PM UTC 24 |
| Finished | Aug 23 11:08:42 PM UTC 24 |
| Peak memory | 217604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66594673 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.66594673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.1713329148 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 647912152 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:08:37 PM UTC 24 |
| Finished | Aug 23 11:08:39 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713329148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.1713329148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.3473775632 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 462279182 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3473775632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_ tx_rx_disruption.3473775632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.4252844951 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 583279567 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4252844951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.4252844951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.468253568 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 577898003 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=468253568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_t x_rx_disruption.468253568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.42457900 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 562410498 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=42457900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_tx _rx_disruption.42457900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2780198767 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 626529634 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:11:23 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2780198767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.2780198767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.3221794137 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 672908933 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3221794137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.3221794137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.769848276 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 535347023 ps |
| CPU time | 1.41 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 215316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=769848276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_t x_rx_disruption.769848276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.3214447938 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 585260825 ps |
| CPU time | 1.43 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3214447938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_ tx_rx_disruption.3214447938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3469802013 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 513902095 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3469802013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.3469802013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.588383250 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 511154139 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=588383250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_t x_rx_disruption.588383250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.1785859970 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 41593527 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 11:08:59 PM UTC 24 |
| Finished | Aug 23 11:09:01 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785859970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.1785859970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.1894410697 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 9933163578 ps |
| CPU time | 12.22 seconds |
| Started | Aug 23 11:08:38 PM UTC 24 |
| Finished | Aug 23 11:08:52 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1894410697 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.1894410697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.3002673729 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 13617229785 ps |
| CPU time | 16.79 seconds |
| Started | Aug 23 11:08:38 PM UTC 24 |
| Finished | Aug 23 11:08:56 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002673729 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.3002673729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.2144331180 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 30867386724 ps |
| CPU time | 33.78 seconds |
| Started | Aug 23 11:08:38 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2144331180 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.2144331180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.3653434196 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 159096479 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 11:08:38 PM UTC 24 |
| Finished | Aug 23 11:08:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653434196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_av_buffer.3653434196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.20677321 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 146755295 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:39 PM UTC 24 |
| Finished | Aug 23 11:08:41 PM UTC 24 |
| Peak memory | 215888 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20677321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_bitstuff_err.20677321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1885510619 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 352409754 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:08:39 PM UTC 24 |
| Finished | Aug 23 11:08:42 PM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1885510619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1885510619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.3153508441 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 854738273 ps |
| CPU time | 2.05 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:08:44 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3153508441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.3153508441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.4258682285 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 13448881249 ps |
| CPU time | 21.89 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:09:04 PM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4258682285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.4258682285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.3772616120 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 162958323 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:08:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772616120 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.3772616120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.2276089140 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 1025704569 ps |
| CPU time | 1.96 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:08:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276089140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.2276089140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.1567117743 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 140006765 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:08:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1567117743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.1567117743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2739065487 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 38889126 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 11:08:42 PM UTC 24 |
| Finished | Aug 23 11:08:44 PM UTC 24 |
| Peak memory | 215884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739065487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2739065487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.883078513 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 982131988 ps |
| CPU time | 2.41 seconds |
| Started | Aug 23 11:08:42 PM UTC 24 |
| Finished | Aug 23 11:08:45 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=883078513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.883078513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.2253691393 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 415935491 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 11:08:43 PM UTC 24 |
| Finished | Aug 23 11:08:45 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253691393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.2253691393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.4031675234 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 365800206 ps |
| CPU time | 2.25 seconds |
| Started | Aug 23 11:08:43 PM UTC 24 |
| Finished | Aug 23 11:08:46 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031675234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.4031675234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.3893829774 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 200799323 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:08:43 PM UTC 24 |
| Finished | Aug 23 11:08:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893829774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.3893829774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.3119514685 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 141868650 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:44 PM UTC 24 |
| Finished | Aug 23 11:08:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3119514685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.3119514685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.2198734130 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 165909417 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:08:44 PM UTC 24 |
| Finished | Aug 23 11:08:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2198734130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.2198734130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.4210417732 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 4127607479 ps |
| CPU time | 34.58 seconds |
| Started | Aug 23 11:08:43 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 228580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210417732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.4210417732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.4157316799 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 5658454208 ps |
| CPU time | 56.57 seconds |
| Started | Aug 23 11:08:44 PM UTC 24 |
| Finished | Aug 23 11:09:43 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157316799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.4157316799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2062766768 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 172837643 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 11:08:46 PM UTC 24 |
| Finished | Aug 23 11:08:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2062766768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2062766768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.35234580 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 11951218397 ps |
| CPU time | 15.49 seconds |
| Started | Aug 23 11:08:46 PM UTC 24 |
| Finished | Aug 23 11:09:02 PM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=35234580 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_link_resume.35234580 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.1619050224 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 11370218997 ps |
| CPU time | 13.03 seconds |
| Started | Aug 23 11:08:47 PM UTC 24 |
| Finished | Aug 23 11:09:01 PM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619050224 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.1619050224 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.771057243 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 5692828707 ps |
| CPU time | 40.2 seconds |
| Started | Aug 23 11:08:47 PM UTC 24 |
| Finished | Aug 23 11:09:28 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771057243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.771057243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2397939014 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 2671983512 ps |
| CPU time | 16.78 seconds |
| Started | Aug 23 11:08:47 PM UTC 24 |
| Finished | Aug 23 11:09:05 PM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2397939014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2397939014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.2779945566 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 270926145 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:08:47 PM UTC 24 |
| Finished | Aug 23 11:08:49 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2779945566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.2779945566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.1723009702 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 194573409 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:08:47 PM UTC 24 |
| Finished | Aug 23 11:08:49 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723009702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.1723009702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.510026792 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 3714077682 ps |
| CPU time | 24.32 seconds |
| Started | Aug 23 11:08:48 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=510026792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.510026792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.549492866 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 153173702 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:49 PM UTC 24 |
| Finished | Aug 23 11:08:51 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=549492866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.549492866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.2589303775 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 154991555 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 11:08:50 PM UTC 24 |
| Finished | Aug 23 11:08:52 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2589303775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.2589303775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.669330574 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 229490422 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:08:50 PM UTC 24 |
| Finished | Aug 23 11:08:52 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669330574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_nak_trans.669330574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.1834547157 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 158431341 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:08:51 PM UTC 24 |
| Finished | Aug 23 11:08:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1834547157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_out_iso.1834547157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.698480847 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 182021318 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:52 PM UTC 24 |
| Finished | Aug 23 11:08:53 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=698480847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_out_stall.698480847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.509258353 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 178596512 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:08:52 PM UTC 24 |
| Finished | Aug 23 11:08:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=509258353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_out_trans_nak.509258353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.1917855085 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 195077898 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:08:53 PM UTC 24 |
| Finished | Aug 23 11:08:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1917855085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.1917855085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.2996778025 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 252486641 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:08:53 PM UTC 24 |
| Finished | Aug 23 11:08:55 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996778025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.2996778025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.4278127124 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 148279898 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 11:08:53 PM UTC 24 |
| Finished | Aug 23 11:08:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4278127124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.4278127124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.1490284079 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 72469740 ps |
| CPU time | 0.64 seconds |
| Started | Aug 23 11:08:54 PM UTC 24 |
| Finished | Aug 23 11:08:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490284079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_pins_sense.1490284079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.1583971644 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 12269606389 ps |
| CPU time | 28.84 seconds |
| Started | Aug 23 11:08:54 PM UTC 24 |
| Finished | Aug 23 11:09:24 PM UTC 24 |
| Peak memory | 228508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583971644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_pkt_buffer.1583971644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.1489696438 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 180811179 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 11:08:54 PM UTC 24 |
| Finished | Aug 23 11:08:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489696438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.1489696438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.232404440 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 233590105 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:08:54 PM UTC 24 |
| Finished | Aug 23 11:08:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232404440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_pkt_sent.232404440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.498509952 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 198408681 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:08:55 PM UTC 24 |
| Finished | Aug 23 11:08:57 PM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=498509952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_random_length_in_transaction.498509952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1905443852 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 193789801 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:08:55 PM UTC 24 |
| Finished | Aug 23 11:08:57 PM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905443852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.1905443852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.1651550366 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 150385905 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:08:55 PM UTC 24 |
| Finished | Aug 23 11:08:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651550366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.1651550366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.4061707476 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 347207999 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:08:56 PM UTC 24 |
| Finished | Aug 23 11:08:58 PM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061707476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.4061707476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.2439912961 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 163880263 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:08:56 PM UTC 24 |
| Finished | Aug 23 11:08:58 PM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2439912961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.2439912961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.4233861790 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 158024755 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 11:08:56 PM UTC 24 |
| Finished | Aug 23 11:08:58 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233861790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.4233861790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.3348243593 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 241867433 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 11:08:58 PM UTC 24 |
| Finished | Aug 23 11:09:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348243593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.3348243593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.3055533733 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 2897142076 ps |
| CPU time | 68.33 seconds |
| Started | Aug 23 11:08:58 PM UTC 24 |
| Finished | Aug 23 11:10:08 PM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055533733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.3055533733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.2549848801 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 150637316 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 11:08:58 PM UTC 24 |
| Finished | Aug 23 11:08:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549848801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.2549848801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.3725985008 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 214661597 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:08:58 PM UTC 24 |
| Finished | Aug 23 11:09:00 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725985008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_stall_trans.3725985008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2322467670 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 1320161835 ps |
| CPU time | 2.85 seconds |
| Started | Aug 23 11:08:59 PM UTC 24 |
| Finished | Aug 23 11:09:03 PM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322467670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.2322467670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.4279768408 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 2147652893 ps |
| CPU time | 50.19 seconds |
| Started | Aug 23 11:08:58 PM UTC 24 |
| Finished | Aug 23 11:09:49 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279768408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.4279768408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.3241115607 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 1582186306 ps |
| CPU time | 31.03 seconds |
| Started | Aug 23 11:08:41 PM UTC 24 |
| Finished | Aug 23 11:09:13 PM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3241115607 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.3241115607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.936798944 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 511323388 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:08:59 PM UTC 24 |
| Finished | Aug 23 11:09:01 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=936798944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_tx _rx_disruption.936798944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.4240455861 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 561105564 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4240455861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.4240455861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.3389698561 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 549701923 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3389698561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_ tx_rx_disruption.3389698561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.1614720265 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 667156047 ps |
| CPU time | 1.61 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1614720265 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.1614720265 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.157108400 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 637703206 ps |
| CPU time | 1.62 seconds |
| Started | Aug 23 11:11:24 PM UTC 24 |
| Finished | Aug 23 11:11:27 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=157108400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_t x_rx_disruption.157108400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.3642798653 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 612987820 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:28 PM UTC 24 |
| Peak memory | 216196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3642798653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.3642798653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.2979475125 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 585728491 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2979475125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_ tx_rx_disruption.2979475125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.1345022374 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 630205061 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1345022374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_ tx_rx_disruption.1345022374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.2805068880 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 430418146 ps |
| CPU time | 1.21 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2805068880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.2805068880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.2538766620 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 595044295 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:28 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2538766620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_ tx_rx_disruption.2538766620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1739323534 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 634484622 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:11:25 PM UTC 24 |
| Finished | Aug 23 11:11:29 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1739323534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1739323534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2788210846 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 51175441 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:51:52 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2788210846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2788210846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.2194642230 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 10437901596 ps |
| CPU time | 12.24 seconds |
| Started | Aug 23 10:51:02 PM UTC 24 |
| Finished | Aug 23 10:51:16 PM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2194642230 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.2194642230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.3686100733 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 20131132726 ps |
| CPU time | 23.7 seconds |
| Started | Aug 23 10:51:04 PM UTC 24 |
| Finished | Aug 23 10:51:29 PM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686100733 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.3686100733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.1220392972 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 29341962912 ps |
| CPU time | 36.58 seconds |
| Started | Aug 23 10:51:04 PM UTC 24 |
| Finished | Aug 23 10:51:41 PM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220392972 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.1220392972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.2512334242 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 168469040 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:51:05 PM UTC 24 |
| Finished | Aug 23 10:51:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2512334242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.2512334242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.1569406917 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 145757840 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:51:06 PM UTC 24 |
| Finished | Aug 23 10:51:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569406917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.1569406917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.144584593 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 487307884 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 10:51:07 PM UTC 24 |
| Finished | Aug 23 10:51:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144584593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_data_toggle_clear.144584593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.3365830490 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 389418452 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 10:51:07 PM UTC 24 |
| Finished | Aug 23 10:51:09 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365830490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.3365830490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.3007396075 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 17723125242 ps |
| CPU time | 32.5 seconds |
| Started | Aug 23 10:51:08 PM UTC 24 |
| Finished | Aug 23 10:51:42 PM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007396075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.3007396075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.2357090533 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 219892513 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:51:09 PM UTC 24 |
| Finished | Aug 23 10:51:11 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357090533 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.2357090533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.3026072915 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 685413845 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 10:51:10 PM UTC 24 |
| Finished | Aug 23 10:51:13 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026072915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.3026072915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.2937532154 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 148769734 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:51:13 PM UTC 24 |
| Finished | Aug 23 10:51:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937532154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.2937532154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_enable.1081348241 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 40102916 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:51:14 PM UTC 24 |
| Finished | Aug 23 10:51:15 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1081348241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 5.usbdev_enable.1081348241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.2869754019 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 796149367 ps |
| CPU time | 2.02 seconds |
| Started | Aug 23 10:51:15 PM UTC 24 |
| Finished | Aug 23 10:51:18 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869754019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.2869754019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.504417231 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 193061720 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:51:16 PM UTC 24 |
| Finished | Aug 23 10:51:18 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=504417231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.504417231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.615479463 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 169455248 ps |
| CPU time | 1.57 seconds |
| Started | Aug 23 10:51:16 PM UTC 24 |
| Finished | Aug 23 10:51:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=615479463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_fifo_rst.615479463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.1367951390 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 221028393 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:51:18 PM UTC 24 |
| Finished | Aug 23 10:51:20 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1367951390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.1367951390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.852408778 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 158476071 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:51:19 PM UTC 24 |
| Finished | Aug 23 10:51:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=852408778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_in_stall.852408778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.3334303387 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 181016677 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:51:19 PM UTC 24 |
| Finished | Aug 23 10:51:21 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3334303387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.3334303387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.2894795989 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 3192364896 ps |
| CPU time | 26.09 seconds |
| Started | Aug 23 10:51:17 PM UTC 24 |
| Finished | Aug 23 10:51:44 PM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2894795989 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.2894795989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.3565308306 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 13482817262 ps |
| CPU time | 137.69 seconds |
| Started | Aug 23 10:51:21 PM UTC 24 |
| Finished | Aug 23 10:53:41 PM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3565308306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.3565308306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.682121393 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 243253713 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:51:21 PM UTC 24 |
| Finished | Aug 23 10:51:23 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=682121393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_link_in_err.682121393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.3103477673 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 25860890561 ps |
| CPU time | 38.77 seconds |
| Started | Aug 23 10:51:21 PM UTC 24 |
| Finished | Aug 23 10:52:01 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3103477673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.3103477673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3411412960 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 9225486688 ps |
| CPU time | 13.28 seconds |
| Started | Aug 23 10:51:22 PM UTC 24 |
| Finished | Aug 23 10:51:37 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411412960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3411412960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.471842774 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 5699332897 ps |
| CPU time | 35.93 seconds |
| Started | Aug 23 10:51:23 PM UTC 24 |
| Finished | Aug 23 10:52:00 PM UTC 24 |
| Peak memory | 234912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471842774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.471842774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.3661625069 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 3547783323 ps |
| CPU time | 23.63 seconds |
| Started | Aug 23 10:51:24 PM UTC 24 |
| Finished | Aug 23 10:51:48 PM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661625069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.3661625069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.3075601392 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 255617188 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 10:51:30 PM UTC 24 |
| Finished | Aug 23 10:51:32 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3075601392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.3075601392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.3871787498 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 191583442 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:51:31 PM UTC 24 |
| Finished | Aug 23 10:51:33 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871787498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.3871787498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.1054860121 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 2585763359 ps |
| CPU time | 58.42 seconds |
| Started | Aug 23 10:51:31 PM UTC 24 |
| Finished | Aug 23 10:52:31 PM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054860121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.1054860121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.2379141998 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 2733805023 ps |
| CPU time | 63.68 seconds |
| Started | Aug 23 10:51:32 PM UTC 24 |
| Finished | Aug 23 10:52:38 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379141998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.2379141998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.2175854085 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 1714232074 ps |
| CPU time | 14.24 seconds |
| Started | Aug 23 10:51:34 PM UTC 24 |
| Finished | Aug 23 10:51:50 PM UTC 24 |
| Peak memory | 228356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2175854085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.2175854085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.2505924436 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 166488970 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:51:36 PM UTC 24 |
| Finished | Aug 23 10:51:38 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505924436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.2505924436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.2477404466 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 144621263 ps |
| CPU time | 0.71 seconds |
| Started | Aug 23 10:51:38 PM UTC 24 |
| Finished | Aug 23 10:51:39 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477404466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.2477404466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.1864992741 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 152409646 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:51:40 PM UTC 24 |
| Finished | Aug 23 10:51:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1864992741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.1864992741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.351598173 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 217074701 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:51:40 PM UTC 24 |
| Finished | Aug 23 10:51:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351598173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_out_stall.351598173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.264756302 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 203136741 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:51:40 PM UTC 24 |
| Finished | Aug 23 10:51:42 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=264756302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_out_trans_nak.264756302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.3992007003 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 153315159 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:51:42 PM UTC 24 |
| Finished | Aug 23 10:51:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3992007003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.3992007003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.3832981730 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 289673744 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:51:42 PM UTC 24 |
| Finished | Aug 23 10:51:44 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832981730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.3832981730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.911923106 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 156493188 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:51:42 PM UTC 24 |
| Finished | Aug 23 10:51:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911923106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.911923106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.2938565146 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 31191189 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2938565146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.2938565146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.863515100 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 13845134020 ps |
| CPU time | 37.44 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:52:23 PM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=863515100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_pkt_buffer.863515100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.3774266849 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 207302571 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 215704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3774266849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.3774266849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.553219550 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 235786049 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=553219550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_pkt_sent.553219550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.1036758815 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 6596132234 ps |
| CPU time | 22.23 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:52:08 PM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1036758815 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.1036758815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.1643280428 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 6056079442 ps |
| CPU time | 17.62 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:52:03 PM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1643280428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.1643280428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1547619253 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 201511764 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547619253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1547619253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.182750614 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 174230928 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:51:46 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182750614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.182750614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1626292841 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 20160310712 ps |
| CPU time | 28.59 seconds |
| Started | Aug 23 10:51:44 PM UTC 24 |
| Finished | Aug 23 10:52:15 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626292841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.1626292841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.2033945397 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 182281525 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:51:49 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033945397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.2033945397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.1726300234 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 434114300 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:51:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1726300234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.1726300234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.177941854 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 189580192 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:51:49 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=177941854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_setup_stage.177941854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.3717828554 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 157826098 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:51:49 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717828554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 5.usbdev_setup_trans_ignored.3717828554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.1035047237 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 231180303 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:51:49 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035047237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.1035047237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.1426057856 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 2797367688 ps |
| CPU time | 18.29 seconds |
| Started | Aug 23 10:51:47 PM UTC 24 |
| Finished | Aug 23 10:52:06 PM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426057856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.1426057856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.2837925374 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 152838854 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:51:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2837925374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.2837925374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.140491033 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 186853115 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:51:52 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=140491033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_stall_trans.140491033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.3591677369 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 1282946997 ps |
| CPU time | 2.78 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:51:54 PM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3591677369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.3591677369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.2815974146 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 1861892155 ps |
| CPU time | 14.53 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:52:05 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815974146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.2815974146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.1581000602 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 5706460621 ps |
| CPU time | 31.66 seconds |
| Started | Aug 23 10:51:10 PM UTC 24 |
| Finished | Aug 23 10:51:43 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581000602 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.1581000602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.429145511 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 456514465 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 10:51:50 PM UTC 24 |
| Finished | Aug 23 10:51:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=429145511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx_ rx_disruption.429145511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.1893170898 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 411851775 ps |
| CPU time | 1.18 seconds |
| Started | Aug 23 11:09:00 PM UTC 24 |
| Finished | Aug 23 11:09:03 PM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1893170898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.1893170898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.1550864469 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 670934545 ps |
| CPU time | 1.54 seconds |
| Started | Aug 23 11:09:00 PM UTC 24 |
| Finished | Aug 23 11:09:03 PM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1550864469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.1550864469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.1463906837 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 257497426 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 11:09:00 PM UTC 24 |
| Finished | Aug 23 11:09:02 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463906837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.1463906837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.1679522890 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 556731485 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:01 PM UTC 24 |
| Finished | Aug 23 11:09:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1679522890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.1679522890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.203227369 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 523014581 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:09:01 PM UTC 24 |
| Finished | Aug 23 11:09:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=203227369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.203227369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.1847640240 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 662098240 ps |
| CPU time | 1.7 seconds |
| Started | Aug 23 11:09:01 PM UTC 24 |
| Finished | Aug 23 11:09:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1847640240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.1847640240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.1460317261 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 174138647 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 11:09:03 PM UTC 24 |
| Finished | Aug 23 11:09:04 PM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1460317261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.1460317261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.1877967409 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 613583325 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:03 PM UTC 24 |
| Finished | Aug 23 11:09:05 PM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1877967409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_t x_rx_disruption.1877967409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.2516228771 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 482203496 ps |
| CPU time | 1.36 seconds |
| Started | Aug 23 11:09:04 PM UTC 24 |
| Finished | Aug 23 11:09:06 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2516228771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.2516228771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.3855775351 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 245442390 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:09:04 PM UTC 24 |
| Finished | Aug 23 11:09:06 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855775351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.3855775351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.156068124 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 581626169 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:04 PM UTC 24 |
| Finished | Aug 23 11:09:06 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=156068124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_tx _rx_disruption.156068124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3955414322 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 242141498 ps |
| CPU time | 0.95 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:07 PM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955414322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3955414322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.1499042799 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 539136348 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:08 PM UTC 24 |
| Peak memory | 215904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1499042799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.1499042799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.2925247300 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 316741239 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:07 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925247300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.2925247300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.2667352939 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 566846532 ps |
| CPU time | 1.63 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2667352939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.2667352939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.2393961603 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 646544560 ps |
| CPU time | 1.6 seconds |
| Started | Aug 23 11:09:05 PM UTC 24 |
| Finished | Aug 23 11:09:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2393961603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_t x_rx_disruption.2393961603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.160471885 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 345470695 ps |
| CPU time | 1.06 seconds |
| Started | Aug 23 11:09:07 PM UTC 24 |
| Finished | Aug 23 11:09:09 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=160471885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.160471885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.2987373188 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 31602511 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:52:24 PM UTC 24 |
| Finished | Aug 23 10:52:26 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987373188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.2987373188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2673137183 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 8944373235 ps |
| CPU time | 13 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:52:06 PM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673137183 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.2673137183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.362881878 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 18699072345 ps |
| CPU time | 23.29 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=362881878 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.362881878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.2786248619 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 26281640175 ps |
| CPU time | 33.46 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:52:27 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786248619 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.2786248619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.1584731787 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 255544342 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:51:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584731787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.1584731787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1689203936 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 151098951 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:51:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1689203936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1689203936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.4231889336 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 343965002 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:51:55 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231889336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.4231889336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.2077357562 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 700345454 ps |
| CPU time | 1.78 seconds |
| Started | Aug 23 10:51:52 PM UTC 24 |
| Finished | Aug 23 10:51:55 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2077357562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.2077357562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.407191595 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 199667685 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:51:55 PM UTC 24 |
| Finished | Aug 23 10:51:56 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=407191595 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.407191595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.2936793864 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 307998366 ps |
| CPU time | 1.1 seconds |
| Started | Aug 23 10:51:55 PM UTC 24 |
| Finished | Aug 23 10:51:57 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936793864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_disable_endpoint.2936793864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.3274384455 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 144837571 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:51:57 PM UTC 24 |
| Finished | Aug 23 10:51:59 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3274384455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.3274384455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_enable.1151141198 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 35416505 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:51:57 PM UTC 24 |
| Finished | Aug 23 10:51:59 PM UTC 24 |
| Peak memory | 215664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151141198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.1151141198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1708724171 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 896665797 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 10:51:57 PM UTC 24 |
| Finished | Aug 23 10:52:00 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1708724171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1708724171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.2809882482 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 315104986 ps |
| CPU time | 1.75 seconds |
| Started | Aug 23 10:51:59 PM UTC 24 |
| Finished | Aug 23 10:52:02 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2809882482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_fifo_rst.2809882482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.2502669669 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 178451240 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:51:59 PM UTC 24 |
| Finished | Aug 23 10:52:01 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502669669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.2502669669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.2778257015 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 156141014 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:02 PM UTC 24 |
| Finished | Aug 23 10:52:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2778257015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.2778257015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.808882432 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 210782257 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:52:02 PM UTC 24 |
| Finished | Aug 23 10:52:03 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808882432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_in_trans.808882432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.3191268242 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 4189740901 ps |
| CPU time | 35.48 seconds |
| Started | Aug 23 10:51:59 PM UTC 24 |
| Finished | Aug 23 10:52:36 PM UTC 24 |
| Peak memory | 228496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3191268242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.3191268242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.4280215190 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 5682111952 ps |
| CPU time | 34.28 seconds |
| Started | Aug 23 10:52:02 PM UTC 24 |
| Finished | Aug 23 10:52:37 PM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4280215190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.4280215190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.882102371 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 196732228 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:52:02 PM UTC 24 |
| Finished | Aug 23 10:52:03 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=882102371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.882102371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.3246532127 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 6281726957 ps |
| CPU time | 9.79 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:52:15 PM UTC 24 |
| Peak memory | 227632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246532127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.3246532127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.477829194 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 4096286198 ps |
| CPU time | 5.93 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:52:11 PM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=477829194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_suspend.477829194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.3201931217 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 2421091352 ps |
| CPU time | 57.17 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:53:03 PM UTC 24 |
| Peak memory | 229860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3201931217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.3201931217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.1327378568 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 1751561930 ps |
| CPU time | 39.76 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:52:45 PM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1327378568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.1327378568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.1669138486 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 242382896 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:52:06 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669138486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.1669138486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.3500950948 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 203950601 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:52:04 PM UTC 24 |
| Finished | Aug 23 10:52:06 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500950948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.3500950948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.2080198572 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 2945259850 ps |
| CPU time | 70 seconds |
| Started | Aug 23 10:52:06 PM UTC 24 |
| Finished | Aug 23 10:53:18 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2080198572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.2080198572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2257585840 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 2525509884 ps |
| CPU time | 17.33 seconds |
| Started | Aug 23 10:52:06 PM UTC 24 |
| Finished | Aug 23 10:52:25 PM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257585840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2257585840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.3161507861 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 1834266148 ps |
| CPU time | 11.73 seconds |
| Started | Aug 23 10:52:08 PM UTC 24 |
| Finished | Aug 23 10:52:21 PM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3161507861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3161507861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.2942553204 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 160055021 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:08 PM UTC 24 |
| Finished | Aug 23 10:52:10 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942553204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.2942553204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.1191729570 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 152336229 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:52:08 PM UTC 24 |
| Finished | Aug 23 10:52:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1191729570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.1191729570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.2132928947 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 239008242 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:52:09 PM UTC 24 |
| Finished | Aug 23 10:52:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132928947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_nak_trans.2132928947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3566908238 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 151974183 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:52:12 PM UTC 24 |
| Finished | Aug 23 10:52:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566908238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3566908238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.1578893214 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 199855119 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:52:12 PM UTC 24 |
| Finished | Aug 23 10:52:14 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1578893214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.1578893214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.4109138924 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 179907711 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:52:12 PM UTC 24 |
| Finished | Aug 23 10:52:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109138924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.4109138924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.2304592736 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 165563801 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:14 PM UTC 24 |
| Finished | Aug 23 10:52:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304592736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 6.usbdev_pending_in_trans.2304592736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.2827588413 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 221699576 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827588413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.2827588413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.3638014426 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 144910427 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3638014426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.3638014426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.327295782 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 40891518 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327295782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_phy_pins_sense.327295782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.3744498357 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 14000401963 ps |
| CPU time | 32 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:49 PM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3744498357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.3744498357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.1096941868 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 194926825 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096941868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_pkt_received.1096941868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.1774572987 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 217111236 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:52:15 PM UTC 24 |
| Finished | Aug 23 10:52:17 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774572987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.1774572987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.852938294 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 5551951556 ps |
| CPU time | 18.23 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:52:38 PM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=852938294 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.852938294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.3421063553 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 5228566307 ps |
| CPU time | 21.86 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:52:41 PM UTC 24 |
| Peak memory | 235124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421063553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.3421063553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.2124418722 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 10193703889 ps |
| CPU time | 43.95 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:53:04 PM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124418722 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.2124418722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.4103157204 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 177906745 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:52:17 PM UTC 24 |
| Finished | Aug 23 10:52:18 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103157204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.4103157204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.3930938922 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 185790559 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:52:17 PM UTC 24 |
| Finished | Aug 23 10:52:18 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3930938922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.3930938922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.2632540830 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 20155202105 ps |
| CPU time | 24.1 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:52:44 PM UTC 24 |
| Peak memory | 217808 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632540830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.2632540830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2201985294 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 145817310 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:52:20 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2201985294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2201985294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1553070885 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 410753471 ps |
| CPU time | 1.3 seconds |
| Started | Aug 23 10:52:18 PM UTC 24 |
| Finished | Aug 23 10:52:21 PM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1553070885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1553070885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.2153342165 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 158529468 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:52:19 PM UTC 24 |
| Finished | Aug 23 10:52:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2153342165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_setup_stage.2153342165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.3380677586 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 155973076 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:52:19 PM UTC 24 |
| Finished | Aug 23 10:52:22 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3380677586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 6.usbdev_setup_trans_ignored.3380677586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.2293505097 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 249952080 ps |
| CPU time | 0.93 seconds |
| Started | Aug 23 10:52:19 PM UTC 24 |
| Finished | Aug 23 10:52:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2293505097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_smoke.2293505097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.937767946 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 3207749569 ps |
| CPU time | 26.82 seconds |
| Started | Aug 23 10:52:21 PM UTC 24 |
| Finished | Aug 23 10:52:50 PM UTC 24 |
| Peak memory | 230296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=937767946 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.937767946 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.1301325190 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 164799380 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:52:21 PM UTC 24 |
| Finished | Aug 23 10:52:23 PM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301325190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.1301325190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.1939468257 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 178445641 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:52:23 PM UTC 24 |
| Finished | Aug 23 10:52:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939468257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_stall_trans.1939468257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.737995719 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 485722029 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:52:23 PM UTC 24 |
| Finished | Aug 23 10:52:25 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737995719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_stream_len_max.737995719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.339258305 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 3421620414 ps |
| CPU time | 26.68 seconds |
| Started | Aug 23 10:52:23 PM UTC 24 |
| Finished | Aug 23 10:52:51 PM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339258305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_streaming_out.339258305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.1254749534 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 9701009026 ps |
| CPU time | 52.97 seconds |
| Started | Aug 23 10:51:55 PM UTC 24 |
| Finished | Aug 23 10:52:49 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1254749534 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.1254749534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.3668937365 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 489930100 ps |
| CPU time | 1.33 seconds |
| Started | Aug 23 10:52:23 PM UTC 24 |
| Finished | Aug 23 10:52:25 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3668937365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx _rx_disruption.3668937365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.480877225 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 291111242 ps |
| CPU time | 1 seconds |
| Started | Aug 23 11:09:07 PM UTC 24 |
| Finished | Aug 23 11:09:09 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=480877225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.480877225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.3342828431 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 617289120 ps |
| CPU time | 1.4 seconds |
| Started | Aug 23 11:09:07 PM UTC 24 |
| Finished | Aug 23 11:09:09 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3342828431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.3342828431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.3663970436 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 341859752 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:09:07 PM UTC 24 |
| Finished | Aug 23 11:09:09 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3663970436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.3663970436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.1868275161 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 436284153 ps |
| CPU time | 1.24 seconds |
| Started | Aug 23 11:09:08 PM UTC 24 |
| Finished | Aug 23 11:09:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1868275161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.1868275161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.4064548687 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 272448757 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 11:09:08 PM UTC 24 |
| Finished | Aug 23 11:09:10 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4064548687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.4064548687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.2394192138 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 505575657 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:08 PM UTC 24 |
| Finished | Aug 23 11:09:10 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2394192138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.2394192138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.2993300574 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 296178016 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:09:08 PM UTC 24 |
| Finished | Aug 23 11:09:10 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2993300574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.2993300574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.2598422646 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 491429064 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:09 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2598422646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_t x_rx_disruption.2598422646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.251972759 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 289707687 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:09:09 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=251972759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.251972759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.2846398683 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 483688145 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:09 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2846398683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_t x_rx_disruption.2846398683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.1426616299 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 411461124 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 11:09:10 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1426616299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.1426616299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.2000525706 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 497879904 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 11:09:10 PM UTC 24 |
| Finished | Aug 23 11:09:12 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2000525706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.2000525706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.1453700689 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 563140397 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1453700689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_t x_rx_disruption.1453700689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.4068326260 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 260450906 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:13 PM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4068326260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.4068326260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.2185242415 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 553188649 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2185242415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.2185242415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.129761389 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 469686984 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:13 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=129761389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_tx _rx_disruption.129761389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.2443350557 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 174639227 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:13 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2443350557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.2443350557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.2805576760 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 613654961 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:11 PM UTC 24 |
| Finished | Aug 23 11:09:14 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2805576760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.2805576760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.744978779 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 89952634 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:52:57 PM UTC 24 |
| Finished | Aug 23 10:52:58 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=744978779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.744978779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.2188834713 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 5647517575 ps |
| CPU time | 7.88 seconds |
| Started | Aug 23 10:52:25 PM UTC 24 |
| Finished | Aug 23 10:52:35 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2188834713 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.2188834713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.637681699 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 19653609530 ps |
| CPU time | 23.14 seconds |
| Started | Aug 23 10:52:25 PM UTC 24 |
| Finished | Aug 23 10:52:50 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637681699 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.637681699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.2707736135 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 30694906924 ps |
| CPU time | 38.31 seconds |
| Started | Aug 23 10:52:26 PM UTC 24 |
| Finished | Aug 23 10:53:05 PM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707736135 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.2707736135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.1753045586 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 160138449 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:52:26 PM UTC 24 |
| Finished | Aug 23 10:52:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1753045586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.1753045586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.3249791380 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 149122051 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:52:27 PM UTC 24 |
| Finished | Aug 23 10:52:29 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3249791380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.3249791380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.1425247448 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 254817352 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:52:27 PM UTC 24 |
| Finished | Aug 23 10:52:29 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1425247448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.1425247448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.2860215333 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 41754987325 ps |
| CPU time | 64.43 seconds |
| Started | Aug 23 10:52:27 PM UTC 24 |
| Finished | Aug 23 10:53:33 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2860215333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.2860215333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.1884744720 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 1076077641 ps |
| CPU time | 7.45 seconds |
| Started | Aug 23 10:52:28 PM UTC 24 |
| Finished | Aug 23 10:52:37 PM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884744720 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.1884744720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.3224175391 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 1056851278 ps |
| CPU time | 2.47 seconds |
| Started | Aug 23 10:52:29 PM UTC 24 |
| Finished | Aug 23 10:52:33 PM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3224175391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.3224175391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.2141406211 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 179743017 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:52:30 PM UTC 24 |
| Finished | Aug 23 10:52:32 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141406211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.2141406211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2265863048 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 72749691 ps |
| CPU time | 0.63 seconds |
| Started | Aug 23 10:52:30 PM UTC 24 |
| Finished | Aug 23 10:52:32 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2265863048 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2265863048 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.2640127227 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 795003443 ps |
| CPU time | 2.13 seconds |
| Started | Aug 23 10:52:32 PM UTC 24 |
| Finished | Aug 23 10:52:36 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640127227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.2640127227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.3995424765 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 606621342 ps |
| CPU time | 1.48 seconds |
| Started | Aug 23 10:52:33 PM UTC 24 |
| Finished | Aug 23 10:52:36 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3995424765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3995424765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.1215067044 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 247081883 ps |
| CPU time | 2.21 seconds |
| Started | Aug 23 10:52:33 PM UTC 24 |
| Finished | Aug 23 10:52:37 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1215067044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.1215067044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.3256723940 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 231577556 ps |
| CPU time | 1.11 seconds |
| Started | Aug 23 10:52:36 PM UTC 24 |
| Finished | Aug 23 10:52:38 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256723940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.3256723940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.1633250795 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 140833054 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:52:37 PM UTC 24 |
| Finished | Aug 23 10:52:39 PM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633250795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.1633250795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.1619036873 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 281425566 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:52:37 PM UTC 24 |
| Finished | Aug 23 10:52:39 PM UTC 24 |
| Peak memory | 215804 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619036873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_trans.1619036873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.1826177717 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 4153408444 ps |
| CPU time | 33.81 seconds |
| Started | Aug 23 10:52:33 PM UTC 24 |
| Finished | Aug 23 10:53:09 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826177717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.1826177717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.2501752634 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 4179913024 ps |
| CPU time | 25.6 seconds |
| Started | Aug 23 10:52:37 PM UTC 24 |
| Finished | Aug 23 10:53:04 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2501752634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.2501752634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.4012729227 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 206834652 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:52:38 PM UTC 24 |
| Finished | Aug 23 10:52:40 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4012729227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.4012729227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.3546632142 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 33796587323 ps |
| CPU time | 46.65 seconds |
| Started | Aug 23 10:52:38 PM UTC 24 |
| Finished | Aug 23 10:53:26 PM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546632142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.3546632142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.792633722 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 6071048985 ps |
| CPU time | 9.75 seconds |
| Started | Aug 23 10:52:38 PM UTC 24 |
| Finished | Aug 23 10:52:49 PM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792633722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_suspend.792633722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.1854315556 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 4222709978 ps |
| CPU time | 34.64 seconds |
| Started | Aug 23 10:52:39 PM UTC 24 |
| Finished | Aug 23 10:53:15 PM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1854315556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.1854315556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.3025816848 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 2759999865 ps |
| CPU time | 23.21 seconds |
| Started | Aug 23 10:52:39 PM UTC 24 |
| Finished | Aug 23 10:53:04 PM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3025816848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.3025816848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.306287014 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 232007442 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:52:39 PM UTC 24 |
| Finished | Aug 23 10:52:41 PM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306287014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.306287014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.251691266 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 193495349 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:52:39 PM UTC 24 |
| Finished | Aug 23 10:52:41 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251691266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.251691266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.3948586214 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 2450541320 ps |
| CPU time | 15.48 seconds |
| Started | Aug 23 10:52:39 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948586214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3948586214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.413779825 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 2444068973 ps |
| CPU time | 56.5 seconds |
| Started | Aug 23 10:52:40 PM UTC 24 |
| Finished | Aug 23 10:53:39 PM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=413779825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.413779825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.1194642726 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 2719769383 ps |
| CPU time | 22.21 seconds |
| Started | Aug 23 10:52:43 PM UTC 24 |
| Finished | Aug 23 10:53:07 PM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194642726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.1194642726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.2119357531 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 162809792 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:52:43 PM UTC 24 |
| Finished | Aug 23 10:52:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2119357531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.2119357531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.784418573 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 148018250 ps |
| CPU time | 0.72 seconds |
| Started | Aug 23 10:52:44 PM UTC 24 |
| Finished | Aug 23 10:52:46 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=784418573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.784418573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.866540595 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 284895591 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 10:52:44 PM UTC 24 |
| Finished | Aug 23 10:52:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866540595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_nak_trans.866540595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.3802559471 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 158882552 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:52:46 PM UTC 24 |
| Finished | Aug 23 10:52:48 PM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802559471 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.3802559471 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.3266824751 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 223584575 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 10:52:47 PM UTC 24 |
| Finished | Aug 23 10:52:48 PM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3266824751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.3266824751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.4127494918 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 171825792 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:52:47 PM UTC 24 |
| Finished | Aug 23 10:52:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4127494918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.4127494918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.984104273 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 177050653 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:52:49 PM UTC 24 |
| Finished | Aug 23 10:52:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=984104273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_pending_in_trans.984104273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.3908803244 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 224532823 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:52:49 PM UTC 24 |
| Finished | Aug 23 10:52:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3908803244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.3908803244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.1596308454 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 145606412 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:49 PM UTC 24 |
| Finished | Aug 23 10:52:51 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1596308454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.1596308454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.3691952568 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 57922006 ps |
| CPU time | 0.6 seconds |
| Started | Aug 23 10:52:49 PM UTC 24 |
| Finished | Aug 23 10:52:50 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3691952568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3691952568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.2028459303 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 18026043975 ps |
| CPU time | 38.74 seconds |
| Started | Aug 23 10:52:51 PM UTC 24 |
| Finished | Aug 23 10:53:32 PM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2028459303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.2028459303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.3647856465 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 160900376 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:52:51 PM UTC 24 |
| Finished | Aug 23 10:52:53 PM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647856465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.3647856465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.3065931731 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 228363997 ps |
| CPU time | 0.99 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:52:53 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3065931731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.3065931731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.3221604181 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 6137084987 ps |
| CPU time | 26.46 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:53:19 PM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3221604181 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.3221604181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.3193787585 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 9087789802 ps |
| CPU time | 143 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:55:17 PM UTC 24 |
| Peak memory | 236800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3193787585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.3193787585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.4123774262 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 6296510590 ps |
| CPU time | 25.59 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:53:19 PM UTC 24 |
| Peak memory | 232652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4123774262 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.4123774262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.702951717 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 255415496 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:52:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=702951717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_random_length_in_transaction.702951717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.1797718671 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 215676395 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:52:53 PM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797718671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.1797718671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.4204719698 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 20146216325 ps |
| CPU time | 28.86 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204719698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.4204719698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.1665857417 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 134010290 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:52:53 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1665857417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.1665857417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.254449628 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 238837307 ps |
| CPU time | 0.96 seconds |
| Started | Aug 23 10:52:52 PM UTC 24 |
| Finished | Aug 23 10:52:54 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=254449628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_rx_full.254449628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2163063988 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 164807452 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163063988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2163063988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.709697270 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 176364957 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709697270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_setup_trans_ignored.709697270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.3767822523 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 315705149 ps |
| CPU time | 1.01 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767822523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.3767822523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.3586981267 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 3648445548 ps |
| CPU time | 23.27 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:53:19 PM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586981267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.3586981267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.1101591098 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 158207167 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101591098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.1101591098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.1337970828 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 185993808 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:52:54 PM UTC 24 |
| Finished | Aug 23 10:52:56 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337970828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_stall_trans.1337970828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.742574437 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 375301509 ps |
| CPU time | 1.2 seconds |
| Started | Aug 23 10:52:57 PM UTC 24 |
| Finished | Aug 23 10:52:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=742574437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_stream_len_max.742574437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.2391762302 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 3737574876 ps |
| CPU time | 23.89 seconds |
| Started | Aug 23 10:52:57 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391762302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.2391762302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.2937744964 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 7055455471 ps |
| CPU time | 38.74 seconds |
| Started | Aug 23 10:52:28 PM UTC 24 |
| Finished | Aug 23 10:53:08 PM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937744964 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.2937744964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.1077758815 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 485618943 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 10:52:57 PM UTC 24 |
| Finished | Aug 23 10:52:59 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1077758815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx _rx_disruption.1077758815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.2041260786 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 479261326 ps |
| CPU time | 1.14 seconds |
| Started | Aug 23 11:09:12 PM UTC 24 |
| Finished | Aug 23 11:09:15 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2041260786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.2041260786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.2997753619 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 426821433 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:12 PM UTC 24 |
| Finished | Aug 23 11:09:15 PM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2997753619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_t x_rx_disruption.2997753619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.1729053168 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 531327345 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:12 PM UTC 24 |
| Finished | Aug 23 11:09:15 PM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729053168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.1729053168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.3219749061 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 519124399 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:12 PM UTC 24 |
| Finished | Aug 23 11:09:15 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3219749061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_t x_rx_disruption.3219749061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.2482870657 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 690008119 ps |
| CPU time | 1.51 seconds |
| Started | Aug 23 11:09:12 PM UTC 24 |
| Finished | Aug 23 11:09:15 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482870657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.2482870657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.237410494 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 489729120 ps |
| CPU time | 1.39 seconds |
| Started | Aug 23 11:09:14 PM UTC 24 |
| Finished | Aug 23 11:09:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=237410494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx _rx_disruption.237410494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.652592069 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 479498109 ps |
| CPU time | 1.32 seconds |
| Started | Aug 23 11:09:14 PM UTC 24 |
| Finished | Aug 23 11:09:16 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=652592069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_tx _rx_disruption.652592069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.2106342954 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 527427788 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:14 PM UTC 24 |
| Finished | Aug 23 11:09:16 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106342954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.2106342954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.1943747069 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 472009729 ps |
| CPU time | 1.38 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1943747069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.1943747069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.4282174911 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 460042523 ps |
| CPU time | 1.15 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4282174911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.4282174911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.73893148 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 513219486 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=73893148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_tx_ rx_disruption.73893148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.3076384289 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 500384108 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3076384289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.3076384289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.79133457 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 588052037 ps |
| CPU time | 1.58 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=79133457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_tx_ rx_disruption.79133457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.196168821 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 214108670 ps |
| CPU time | 0.87 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:17 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196168821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.196168821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.950547837 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 629231340 ps |
| CPU time | 1.56 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=950547837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_tx _rx_disruption.950547837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1331803359 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 314062474 ps |
| CPU time | 1.05 seconds |
| Started | Aug 23 11:09:15 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1331803359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1331803359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.4268853838 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 655937299 ps |
| CPU time | 1.64 seconds |
| Started | Aug 23 11:09:16 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4268853838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.4268853838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.920760673 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 544594843 ps |
| CPU time | 1.34 seconds |
| Started | Aug 23 11:09:16 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=920760673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.920760673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.1202112467 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 566643405 ps |
| CPU time | 1.47 seconds |
| Started | Aug 23 11:09:16 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1202112467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_t x_rx_disruption.1202112467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.2942097173 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 46242716 ps |
| CPU time | 0.58 seconds |
| Started | Aug 23 10:53:25 PM UTC 24 |
| Finished | Aug 23 10:53:27 PM UTC 24 |
| Peak memory | 214972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942097173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.2942097173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.3526682401 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 9964906444 ps |
| CPU time | 15.25 seconds |
| Started | Aug 23 10:52:59 PM UTC 24 |
| Finished | Aug 23 10:53:15 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3526682401 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.3526682401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.1127911160 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 19607266394 ps |
| CPU time | 21.87 seconds |
| Started | Aug 23 10:52:59 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127911160 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.1127911160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.2117863545 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 23588037973 ps |
| CPU time | 29.95 seconds |
| Started | Aug 23 10:52:59 PM UTC 24 |
| Finished | Aug 23 10:53:30 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2117863545 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.2117863545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.867058130 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 168000557 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:52:59 PM UTC 24 |
| Finished | Aug 23 10:53:01 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867058130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_av_buffer.867058130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.2967022380 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 155245619 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:53:01 PM UTC 24 |
| Finished | Aug 23 10:53:03 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967022380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_bitstuff_err.2967022380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.4270408424 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 610166437 ps |
| CPU time | 1.81 seconds |
| Started | Aug 23 10:53:01 PM UTC 24 |
| Finished | Aug 23 10:53:04 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4270408424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.4270408424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.1004683273 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 531936338 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 10:53:01 PM UTC 24 |
| Finished | Aug 23 10:53:04 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1004683273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.1004683273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.3777623400 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 16407674980 ps |
| CPU time | 27.86 seconds |
| Started | Aug 23 10:53:03 PM UTC 24 |
| Finished | Aug 23 10:53:33 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3777623400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.3777623400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.1941284830 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 6135493782 ps |
| CPU time | 36.44 seconds |
| Started | Aug 23 10:53:04 PM UTC 24 |
| Finished | Aug 23 10:53:41 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941284830 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.1941284830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.969654428 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 920701894 ps |
| CPU time | 2.12 seconds |
| Started | Aug 23 10:53:06 PM UTC 24 |
| Finished | Aug 23 10:53:09 PM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=969654428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_disable_endpoint.969654428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.2236301006 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 220776839 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:06 PM UTC 24 |
| Finished | Aug 23 10:53:08 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236301006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_disconnected.2236301006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2184942801 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 50408946 ps |
| CPU time | 0.62 seconds |
| Started | Aug 23 10:53:06 PM UTC 24 |
| Finished | Aug 23 10:53:08 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2184942801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2184942801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1355848335 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 954994195 ps |
| CPU time | 2.31 seconds |
| Started | Aug 23 10:53:06 PM UTC 24 |
| Finished | Aug 23 10:53:09 PM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1355848335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1355848335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.1963112993 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 344180866 ps |
| CPU time | 1.13 seconds |
| Started | Aug 23 10:53:07 PM UTC 24 |
| Finished | Aug 23 10:53:09 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963112993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1963112993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.2155486817 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 234741572 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 10:53:07 PM UTC 24 |
| Finished | Aug 23 10:53:10 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155486817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.2155486817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.2283664548 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 188006707 ps |
| CPU time | 0.94 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:53:12 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283664548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.2283664548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.3479737373 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 165199838 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:53:11 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3479737373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.3479737373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.3238714735 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 206721139 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:53:12 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3238714735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.3238714735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.403222733 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 2894986463 ps |
| CPU time | 66.55 seconds |
| Started | Aug 23 10:53:07 PM UTC 24 |
| Finished | Aug 23 10:54:16 PM UTC 24 |
| Peak memory | 235204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=403222733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.403222733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.271363975 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 10126360642 ps |
| CPU time | 60.57 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:54:12 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=271363975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.271363975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.972067361 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 225997734 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:53:12 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972067361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_link_in_err.972067361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.1781436432 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 8335371557 ps |
| CPU time | 10.69 seconds |
| Started | Aug 23 10:53:10 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1781436432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.1781436432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.218613971 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 4155744957 ps |
| CPU time | 5.78 seconds |
| Started | Aug 23 10:53:11 PM UTC 24 |
| Finished | Aug 23 10:53:18 PM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=218613971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_suspend.218613971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.123483455 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 3452730630 ps |
| CPU time | 28.73 seconds |
| Started | Aug 23 10:53:11 PM UTC 24 |
| Finished | Aug 23 10:53:41 PM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=123483455 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.123483455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.18471379 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 3148933085 ps |
| CPU time | 72.45 seconds |
| Started | Aug 23 10:53:11 PM UTC 24 |
| Finished | Aug 23 10:54:25 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=18471379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.18471379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.364952869 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 253867389 ps |
| CPU time | 0.98 seconds |
| Started | Aug 23 10:53:11 PM UTC 24 |
| Finished | Aug 23 10:53:13 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=364952869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.364952869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.608810737 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 191279865 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:53:12 PM UTC 24 |
| Finished | Aug 23 10:53:14 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608810737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.608810737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.1570763056 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 3525882860 ps |
| CPU time | 82.78 seconds |
| Started | Aug 23 10:53:12 PM UTC 24 |
| Finished | Aug 23 10:54:37 PM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1570763056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.1570763056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.4157117584 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 3311321961 ps |
| CPU time | 28.6 seconds |
| Started | Aug 23 10:53:12 PM UTC 24 |
| Finished | Aug 23 10:53:42 PM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157117584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.4157117584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.1699409346 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 3831685364 ps |
| CPU time | 32.06 seconds |
| Started | Aug 23 10:53:12 PM UTC 24 |
| Finished | Aug 23 10:53:46 PM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1699409346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.1699409346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.1177803313 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 192228588 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:13 PM UTC 24 |
| Finished | Aug 23 10:53:15 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177803313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.1177803313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.1592488210 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 201085902 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:14 PM UTC 24 |
| Finished | Aug 23 10:53:16 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592488210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.1592488210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.270527347 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 203032894 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:53:16 PM UTC 24 |
| Finished | Aug 23 10:53:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270527347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_nak_trans.270527347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.39030251 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 148936105 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:53:16 PM UTC 24 |
| Finished | Aug 23 10:53:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=39030251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_out_iso.39030251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.722088540 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 190247278 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:16 PM UTC 24 |
| Finished | Aug 23 10:53:18 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=722088540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_out_stall.722088540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.2048896166 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 164371731 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:53:17 PM UTC 24 |
| Finished | Aug 23 10:53:19 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048896166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.2048896166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.520716792 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 175601703 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:17 PM UTC 24 |
| Finished | Aug 23 10:53:19 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=520716792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_pending_in_trans.520716792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.3212812759 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 207351395 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:53:18 PM UTC 24 |
| Finished | Aug 23 10:53:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3212812759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.3212812759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.261841217 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 144922557 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:53:18 PM UTC 24 |
| Finished | Aug 23 10:53:20 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=261841217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.261841217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.1620770603 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 41871240 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:53:18 PM UTC 24 |
| Finished | Aug 23 10:53:20 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620770603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.1620770603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.2573750085 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 14535180263 ps |
| CPU time | 34.14 seconds |
| Started | Aug 23 10:53:18 PM UTC 24 |
| Finished | Aug 23 10:53:54 PM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573750085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_pkt_buffer.2573750085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.4277111941 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 158885682 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:53:18 PM UTC 24 |
| Finished | Aug 23 10:53:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277111941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.4277111941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3987159657 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 206051931 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:53:20 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987159657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3987159657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.3862992330 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 10528658498 ps |
| CPU time | 153.67 seconds |
| Started | Aug 23 10:53:20 PM UTC 24 |
| Finished | Aug 23 10:55:56 PM UTC 24 |
| Peak memory | 232304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3862992330 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.3862992330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.1884157652 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 7158208639 ps |
| CPU time | 40.92 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:54:04 PM UTC 24 |
| Peak memory | 228280 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884157652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.1884157652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.3263720825 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 7150426548 ps |
| CPU time | 78.78 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:54:42 PM UTC 24 |
| Peak memory | 228328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3263720825 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.3263720825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.2625355022 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 225855733 ps |
| CPU time | 0.82 seconds |
| Started | Aug 23 10:53:20 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2625355022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.2625355022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.2471388212 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 179340501 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:20 PM UTC 24 |
| Finished | Aug 23 10:53:22 PM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2471388212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.2471388212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.2560845400 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 20168116182 ps |
| CPU time | 26.55 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:53:49 PM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2560845400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.2560845400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.1075903713 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 209434317 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:53:23 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075903713 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.1075903713 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.149001160 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 243833415 ps |
| CPU time | 0.92 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:53:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149001160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_rx_full.149001160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.1145908257 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 186054223 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:21 PM UTC 24 |
| Finished | Aug 23 10:53:23 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1145908257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_setup_stage.1145908257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.911081295 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 155546928 ps |
| CPU time | 0.78 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:25 PM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911081295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_setup_trans_ignored.911081295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.617341302 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 219433322 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:25 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617341302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.617341302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2113442771 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 2919845243 ps |
| CPU time | 25.34 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:49 PM UTC 24 |
| Peak memory | 230288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2113442771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.2113442771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.878471600 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 197774265 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878471600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.878471600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2403912578 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 160057570 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403912578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.2403912578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.1701739561 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 333776134 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:25 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701739561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stream_len_max.1701739561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3026724819 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 2136256774 ps |
| CPU time | 14.5 seconds |
| Started | Aug 23 10:53:23 PM UTC 24 |
| Finished | Aug 23 10:53:39 PM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026724819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.3026724819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.179288435 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 276207179 ps |
| CPU time | 3.75 seconds |
| Started | Aug 23 10:53:05 PM UTC 24 |
| Finished | Aug 23 10:53:10 PM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=179288435 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.179288435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.507805176 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 575554596 ps |
| CPU time | 1.44 seconds |
| Started | Aug 23 10:53:24 PM UTC 24 |
| Finished | Aug 23 10:53:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507805176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_ rx_disruption.507805176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.1403488656 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 766184665 ps |
| CPU time | 1.72 seconds |
| Started | Aug 23 11:09:16 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1403488656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.1403488656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1454388448 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 554777040 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:16 PM UTC 24 |
| Finished | Aug 23 11:09:18 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1454388448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_t x_rx_disruption.1454388448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.1585481508 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 295833292 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1585481508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.1585481508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.1569834200 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 622855353 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:20 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1569834200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.1569834200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.715606968 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 222924884 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715606968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.715606968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.1310109504 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 466207943 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:20 PM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1310109504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.1310109504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2975085164 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 225230843 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:19 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975085164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.2975085164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.341108220 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 494156537 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:17 PM UTC 24 |
| Finished | Aug 23 11:09:20 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341108220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_tx _rx_disruption.341108220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2018344472 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 210109191 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2018344472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.2018344472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1362098228 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 430196308 ps |
| CPU time | 1.27 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1362098228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.1362098228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.1865771210 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 229913050 ps |
| CPU time | 0.91 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1865771210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.1865771210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.958026038 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 631519799 ps |
| CPU time | 1.67 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=958026038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_tx _rx_disruption.958026038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3563337774 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 702681460 ps |
| CPU time | 1.71 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3563337774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.3563337774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3619320484 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 549156056 ps |
| CPU time | 1.45 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619320484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.3619320484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.344884620 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 559859611 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=344884620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_tx _rx_disruption.344884620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2931816661 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 512976444 ps |
| CPU time | 1.31 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931816661 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.2931816661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.759196761 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 644091867 ps |
| CPU time | 1.52 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=759196761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_tx _rx_disruption.759196761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.230149732 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 297673114 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:21 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230149732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.230149732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2772269239 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 461543191 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:19 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2772269239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.2772269239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2963639709 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 53437455 ps |
| CPU time | 0.59 seconds |
| Started | Aug 23 10:53:53 PM UTC 24 |
| Finished | Aug 23 10:53:55 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2963639709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2963639709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3293933514 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 6255204646 ps |
| CPU time | 9.29 seconds |
| Started | Aug 23 10:53:25 PM UTC 24 |
| Finished | Aug 23 10:53:36 PM UTC 24 |
| Peak memory | 227560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3293933514 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.3293933514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.184764599 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 19211653674 ps |
| CPU time | 22.87 seconds |
| Started | Aug 23 10:53:25 PM UTC 24 |
| Finished | Aug 23 10:53:49 PM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=184764599 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.184764599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.3262175451 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 23521964500 ps |
| CPU time | 30.46 seconds |
| Started | Aug 23 10:53:25 PM UTC 24 |
| Finished | Aug 23 10:53:57 PM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3262175451 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.3262175451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.1796777249 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 146257574 ps |
| CPU time | 0.7 seconds |
| Started | Aug 23 10:53:25 PM UTC 24 |
| Finished | Aug 23 10:53:27 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1796777249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.1796777249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1055806635 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 149704117 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:26 PM UTC 24 |
| Finished | Aug 23 10:53:28 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055806635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.1055806635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.1967870689 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 409310528 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 10:53:26 PM UTC 24 |
| Finished | Aug 23 10:53:29 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1967870689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.1967870689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.4281135630 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 1008908798 ps |
| CPU time | 2.77 seconds |
| Started | Aug 23 10:53:28 PM UTC 24 |
| Finished | Aug 23 10:53:32 PM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281135630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.4281135630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.329478851 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 36601167816 ps |
| CPU time | 54.92 seconds |
| Started | Aug 23 10:53:28 PM UTC 24 |
| Finished | Aug 23 10:54:24 PM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329478851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_device_address.329478851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.4231396795 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 7749426450 ps |
| CPU time | 43.4 seconds |
| Started | Aug 23 10:53:28 PM UTC 24 |
| Finished | Aug 23 10:54:13 PM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231396795 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.4231396795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.3935161826 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 610153881 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 10:53:28 PM UTC 24 |
| Finished | Aug 23 10:53:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935161826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.3935161826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.4059979119 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 178207275 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:29 PM UTC 24 |
| Finished | Aug 23 10:53:31 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059979119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.4059979119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_enable.562606762 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 41055666 ps |
| CPU time | 0.61 seconds |
| Started | Aug 23 10:53:29 PM UTC 24 |
| Finished | Aug 23 10:53:31 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=562606762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.562606762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.472353675 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 702564480 ps |
| CPU time | 1.98 seconds |
| Started | Aug 23 10:53:31 PM UTC 24 |
| Finished | Aug 23 10:53:34 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=472353675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.472353675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.3390945034 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 413663193 ps |
| CPU time | 1.28 seconds |
| Started | Aug 23 10:53:31 PM UTC 24 |
| Finished | Aug 23 10:53:34 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390945034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.3390945034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.3594263535 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 311857293 ps |
| CPU time | 2.17 seconds |
| Started | Aug 23 10:53:31 PM UTC 24 |
| Finished | Aug 23 10:53:35 PM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594263535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.3594263535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1633302836 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 272547107 ps |
| CPU time | 1.02 seconds |
| Started | Aug 23 10:53:33 PM UTC 24 |
| Finished | Aug 23 10:53:35 PM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1633302836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.1633302836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.701568868 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 156496180 ps |
| CPU time | 0.73 seconds |
| Started | Aug 23 10:53:33 PM UTC 24 |
| Finished | Aug 23 10:53:35 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701568868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_stall.701568868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.2606805511 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 170952997 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:34 PM UTC 24 |
| Finished | Aug 23 10:53:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606805511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_trans.2606805511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.253675278 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 5680038007 ps |
| CPU time | 47.83 seconds |
| Started | Aug 23 10:53:31 PM UTC 24 |
| Finished | Aug 23 10:54:21 PM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=253675278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.253675278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.534084099 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 3921329644 ps |
| CPU time | 23.1 seconds |
| Started | Aug 23 10:53:34 PM UTC 24 |
| Finished | Aug 23 10:53:59 PM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534084099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.534084099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.4009145915 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 158002167 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:34 PM UTC 24 |
| Finished | Aug 23 10:53:36 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4009145915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_in_err.4009145915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.3416363054 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 33572292381 ps |
| CPU time | 47.93 seconds |
| Started | Aug 23 10:53:36 PM UTC 24 |
| Finished | Aug 23 10:54:25 PM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416363054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.3416363054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.850905216 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 9533444986 ps |
| CPU time | 13.01 seconds |
| Started | Aug 23 10:53:36 PM UTC 24 |
| Finished | Aug 23 10:53:50 PM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=850905216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_suspend.850905216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.1784137677 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 5572911102 ps |
| CPU time | 41.1 seconds |
| Started | Aug 23 10:53:36 PM UTC 24 |
| Finished | Aug 23 10:54:18 PM UTC 24 |
| Peak memory | 232704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1784137677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.1784137677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.671379222 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 2050588282 ps |
| CPU time | 13.34 seconds |
| Started | Aug 23 10:53:36 PM UTC 24 |
| Finished | Aug 23 10:53:50 PM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=671379222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.671379222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.3674030360 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 249716320 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:53:37 PM UTC 24 |
| Finished | Aug 23 10:53:39 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3674030360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.3674030360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.614288634 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 187094241 ps |
| CPU time | 0.84 seconds |
| Started | Aug 23 10:53:37 PM UTC 24 |
| Finished | Aug 23 10:53:39 PM UTC 24 |
| Peak memory | 216248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=614288634 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.614288634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.3443165065 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 2975077098 ps |
| CPU time | 24.56 seconds |
| Started | Aug 23 10:53:37 PM UTC 24 |
| Finished | Aug 23 10:54:03 PM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443165065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.3443165065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.3846863604 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 1936492729 ps |
| CPU time | 46.28 seconds |
| Started | Aug 23 10:53:39 PM UTC 24 |
| Finished | Aug 23 10:54:27 PM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3846863604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.3846863604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.247167731 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 2629857352 ps |
| CPU time | 60.19 seconds |
| Started | Aug 23 10:53:39 PM UTC 24 |
| Finished | Aug 23 10:54:41 PM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=247167731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.247167731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.798451772 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 159761226 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:39 PM UTC 24 |
| Finished | Aug 23 10:53:41 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=798451772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.798451772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.201539011 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 144339136 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:53:39 PM UTC 24 |
| Finished | Aug 23 10:53:41 PM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201539011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.201539011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.2942689166 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 223051245 ps |
| CPU time | 0.86 seconds |
| Started | Aug 23 10:53:41 PM UTC 24 |
| Finished | Aug 23 10:53:43 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2942689166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.2942689166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.228922886 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 173292897 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:53:41 PM UTC 24 |
| Finished | Aug 23 10:53:43 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=228922886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.228922886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3219604606 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 199177254 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:43 PM UTC 24 |
| Finished | Aug 23 10:53:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3219604606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.3219604606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1535539159 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 178404682 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:43 PM UTC 24 |
| Finished | Aug 23 10:53:45 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535539159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.1535539159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.1387725953 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 146569583 ps |
| CPU time | 0.75 seconds |
| Started | Aug 23 10:53:43 PM UTC 24 |
| Finished | Aug 23 10:53:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1387725953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.1387725953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.750082940 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 207520237 ps |
| CPU time | 0.88 seconds |
| Started | Aug 23 10:53:43 PM UTC 24 |
| Finished | Aug 23 10:53:45 PM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=750082940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.750082940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3504765337 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 169262503 ps |
| CPU time | 0.76 seconds |
| Started | Aug 23 10:53:44 PM UTC 24 |
| Finished | Aug 23 10:53:46 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3504765337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.3504765337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.549834955 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 34645356 ps |
| CPU time | 0.57 seconds |
| Started | Aug 23 10:53:44 PM UTC 24 |
| Finished | Aug 23 10:53:45 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=549834955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_phy_pins_sense.549834955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1505075817 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 17637682537 ps |
| CPU time | 39.17 seconds |
| Started | Aug 23 10:53:45 PM UTC 24 |
| Finished | Aug 23 10:54:26 PM UTC 24 |
| Peak memory | 232592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505075817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1505075817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.3731329261 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 224548580 ps |
| CPU time | 0.89 seconds |
| Started | Aug 23 10:53:45 PM UTC 24 |
| Finished | Aug 23 10:53:47 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731329261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.3731329261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.1812573700 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 170562625 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:45 PM UTC 24 |
| Finished | Aug 23 10:53:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1812573700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_pkt_sent.1812573700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.591031674 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 2693308898 ps |
| CPU time | 13.38 seconds |
| Started | Aug 23 10:53:46 PM UTC 24 |
| Finished | Aug 23 10:54:01 PM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=591031674 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.591031674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1503556350 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 9293146092 ps |
| CPU time | 143.99 seconds |
| Started | Aug 23 10:53:47 PM UTC 24 |
| Finished | Aug 23 10:56:14 PM UTC 24 |
| Peak memory | 230684 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503556350 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.1503556350 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.4032357720 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 180092790 ps |
| CPU time | 0.8 seconds |
| Started | Aug 23 10:53:45 PM UTC 24 |
| Finished | Aug 23 10:53:47 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032357720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_random_length_in_transaction.4032357720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.824717785 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 173639883 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:46 PM UTC 24 |
| Finished | Aug 23 10:53:48 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=824717785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.824717785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.4172839871 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 20199961253 ps |
| CPU time | 24.59 seconds |
| Started | Aug 23 10:53:47 PM UTC 24 |
| Finished | Aug 23 10:54:13 PM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4172839871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.4172839871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3945673857 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 177992288 ps |
| CPU time | 0.74 seconds |
| Started | Aug 23 10:53:47 PM UTC 24 |
| Finished | Aug 23 10:53:49 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945673857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.3945673857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.197418003 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 380991272 ps |
| CPU time | 1.19 seconds |
| Started | Aug 23 10:53:49 PM UTC 24 |
| Finished | Aug 23 10:53:51 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197418003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_rx_full.197418003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1437332797 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 161919567 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:50 PM UTC 24 |
| Finished | Aug 23 10:53:52 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437332797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1437332797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2991347632 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 165213123 ps |
| CPU time | 0.79 seconds |
| Started | Aug 23 10:53:50 PM UTC 24 |
| Finished | Aug 23 10:53:52 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991347632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.2991347632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.17813764 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 198130003 ps |
| CPU time | 0.9 seconds |
| Started | Aug 23 10:53:50 PM UTC 24 |
| Finished | Aug 23 10:53:52 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=17813764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 9.usbdev_smoke.17813764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.3070189129 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 2535766499 ps |
| CPU time | 59.03 seconds |
| Started | Aug 23 10:53:50 PM UTC 24 |
| Finished | Aug 23 10:54:51 PM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3070189129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.3070189129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.1675696683 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 179643594 ps |
| CPU time | 0.77 seconds |
| Started | Aug 23 10:53:51 PM UTC 24 |
| Finished | Aug 23 10:53:53 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675696683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.1675696683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.928093293 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 193156844 ps |
| CPU time | 0.85 seconds |
| Started | Aug 23 10:53:51 PM UTC 24 |
| Finished | Aug 23 10:53:53 PM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=928093293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_stall_trans.928093293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.153725246 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 289955989 ps |
| CPU time | 0.97 seconds |
| Started | Aug 23 10:53:52 PM UTC 24 |
| Finished | Aug 23 10:53:54 PM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153725246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_stream_len_max.153725246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1369003818 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 2921833243 ps |
| CPU time | 69.04 seconds |
| Started | Aug 23 10:53:52 PM UTC 24 |
| Finished | Aug 23 10:55:03 PM UTC 24 |
| Peak memory | 235332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1369003818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1369003818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3485484705 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 3370968731 ps |
| CPU time | 24.68 seconds |
| Started | Aug 23 10:53:28 PM UTC 24 |
| Finished | Aug 23 10:53:54 PM UTC 24 |
| Peak memory | 218356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485484705 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3485484705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3548418076 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 397145098 ps |
| CPU time | 1.09 seconds |
| Started | Aug 23 11:09:20 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548418076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.3548418076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1383286017 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 584811919 ps |
| CPU time | 1.59 seconds |
| Started | Aug 23 11:09:20 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1383286017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.1383286017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3337339581 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 158593007 ps |
| CPU time | 0.81 seconds |
| Started | Aug 23 11:09:20 PM UTC 24 |
| Finished | Aug 23 11:09:22 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337339581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3337339581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.912184365 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 652020114 ps |
| CPU time | 1.5 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=912184365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_tx _rx_disruption.912184365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1411133623 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 309540397 ps |
| CPU time | 1.04 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411133623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.1411133623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.121146252 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 508499153 ps |
| CPU time | 1.49 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=121146252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_tx _rx_disruption.121146252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3401736949 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 329922282 ps |
| CPU time | 1.03 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401736949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.3401736949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1585528151 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 449239998 ps |
| CPU time | 1.26 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1585528151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1585528151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.543854542 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 533238157 ps |
| CPU time | 1.37 seconds |
| Started | Aug 23 11:09:21 PM UTC 24 |
| Finished | Aug 23 11:09:23 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=543854542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.543854542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.985452439 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 442767956 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:24 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=985452439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_tx _rx_disruption.985452439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.2224039901 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 565061295 ps |
| CPU time | 1.53 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:25 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224039901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.2224039901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1350360371 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 480737181 ps |
| CPU time | 1.35 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:24 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1350360371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1350360371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1762977462 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 361918543 ps |
| CPU time | 1.07 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:24 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762977462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.1762977462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.1607109470 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 625869002 ps |
| CPU time | 1.74 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:25 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1607109470 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_t x_rx_disruption.1607109470 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2072040952 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 262343133 ps |
| CPU time | 0.83 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:24 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072040952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.2072040952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.68181639 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 608991625 ps |
| CPU time | 1.46 seconds |
| Started | Aug 23 11:09:22 PM UTC 24 |
| Finished | Aug 23 11:09:25 PM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=68181639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx_ rx_disruption.68181639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.408464533 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 574993645 ps |
| CPU time | 1.42 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=408464533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.408464533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3984650138 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 536683337 ps |
| CPU time | 1.55 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3984650138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.3984650138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.1260409663 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 669383796 ps |
| CPU time | 1.65 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:27 PM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260409663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.1260409663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.3494275005 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 415821877 ps |
| CPU time | 1.25 seconds |
| Started | Aug 23 11:09:24 PM UTC 24 |
| Finished | Aug 23 11:09:26 PM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3494275005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.3494275005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |