Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.34 98.16 96.03 97.44 93.22 98.38 98.17 92.94


Total tests in report: 3740
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
65.63 65.63 86.83 86.83 66.63 66.63 60.87 60.87 50.85 50.85 79.47 79.47 90.85 90.85 23.89 23.89 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.170709216
72.74 7.12 89.20 2.37 71.02 4.40 84.22 23.35 62.71 11.86 81.92 2.45 92.89 2.03 27.24 3.35 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2143678829
76.71 3.97 92.63 3.43 79.56 8.53 86.78 2.56 62.71 0.00 91.25 9.33 93.29 0.41 30.77 3.53 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.598120315
79.25 2.54 93.18 0.55 82.53 2.97 87.21 0.43 69.49 6.78 92.41 1.16 93.29 0.00 36.65 5.88 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.418170751
81.55 2.30 93.88 0.70 82.58 0.05 89.34 2.13 69.49 0.00 92.41 0.00 93.29 0.00 49.86 13.21 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3963783841
83.70 2.14 95.05 1.17 84.81 2.23 89.98 0.64 74.58 5.08 94.94 2.53 93.29 0.00 53.21 3.35 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1556906245
84.96 1.27 95.38 0.32 86.33 1.52 90.41 0.43 74.58 0.00 95.64 0.71 93.29 0.00 59.10 5.88 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.1705414581
86.04 1.07 95.72 0.34 86.88 0.55 91.26 0.85 74.58 0.00 95.69 0.04 96.14 2.85 61.99 2.90 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.1542645560
86.90 0.87 95.83 0.11 87.02 0.14 91.47 0.21 79.66 5.08 95.85 0.17 96.14 0.00 62.35 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.2100269725
87.55 0.64 95.85 0.02 87.09 0.07 95.10 3.62 79.66 0.00 95.89 0.04 96.34 0.20 62.90 0.54 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3629789735
88.17 0.63 95.85 0.00 88.73 1.64 95.52 0.43 79.66 0.00 95.94 0.04 96.54 0.20 64.98 2.08 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.1072305768
88.75 0.57 96.02 0.17 88.83 0.10 95.52 0.00 83.05 3.39 96.10 0.17 96.54 0.00 65.16 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.3201707585
89.25 0.50 96.02 0.00 88.83 0.00 95.63 0.11 86.44 3.39 96.10 0.00 96.54 0.00 65.16 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.4121692968
89.74 0.50 96.27 0.25 89.66 0.83 95.63 0.00 86.44 0.00 96.60 0.50 96.54 0.00 67.06 1.90 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2528703475
90.18 0.43 97.01 0.74 90.80 1.14 95.63 0.00 86.44 0.00 97.76 1.16 96.54 0.00 67.06 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3728638171
90.53 0.35 97.01 0.00 90.87 0.07 95.84 0.21 86.44 0.00 97.76 0.00 96.54 0.00 69.23 2.17 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.1006994305
90.84 0.31 97.76 0.76 90.87 0.00 95.84 0.00 86.44 0.00 97.76 0.00 97.97 1.42 69.23 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.3885285106
91.12 0.28 97.78 0.02 90.90 0.02 95.84 0.00 88.14 1.69 97.80 0.04 97.97 0.00 69.41 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1437667722
91.38 0.27 97.80 0.02 91.06 0.17 95.84 0.00 88.14 0.00 97.84 0.04 97.97 0.00 71.04 1.63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.2439544583
91.64 0.25 97.82 0.02 91.06 0.00 95.84 0.00 89.83 1.69 97.88 0.04 97.97 0.00 71.04 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.1616060197
91.88 0.25 97.82 0.00 91.09 0.02 95.84 0.00 91.53 1.69 97.88 0.00 97.97 0.00 71.04 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.1204183559
92.13 0.24 97.88 0.06 92.30 1.21 95.84 0.00 91.53 0.00 97.97 0.08 97.97 0.00 71.40 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1679208507
92.37 0.24 97.88 0.00 92.30 0.00 95.84 0.00 93.22 1.69 97.97 0.00 97.97 0.00 71.40 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.2470129253
92.54 0.17 97.88 0.00 92.39 0.10 95.84 0.00 93.22 0.00 97.97 0.00 97.97 0.00 72.49 1.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.3278236400
92.69 0.15 97.88 0.00 92.56 0.17 96.06 0.21 93.22 0.00 98.01 0.04 97.97 0.00 73.12 0.63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.668664152
92.83 0.14 97.88 0.00 92.56 0.00 96.06 0.00 93.22 0.00 98.01 0.00 97.97 0.00 74.12 1.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.4233431041
92.96 0.13 97.88 0.00 92.56 0.00 96.06 0.00 93.22 0.00 98.01 0.00 97.97 0.00 75.02 0.90 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.2056148235
93.09 0.13 97.88 0.00 93.37 0.81 96.06 0.00 93.22 0.00 98.01 0.00 97.97 0.00 75.11 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.3874758831
93.21 0.12 97.90 0.02 93.61 0.24 96.27 0.21 93.22 0.00 98.09 0.08 97.97 0.00 75.38 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2760752330
93.32 0.11 97.90 0.00 93.65 0.05 96.48 0.21 93.22 0.00 98.09 0.00 97.97 0.00 75.93 0.54 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.4047497499
93.43 0.11 97.90 0.00 93.68 0.02 96.48 0.00 93.22 0.00 98.09 0.00 97.97 0.00 76.65 0.72 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.924227720
93.53 0.10 97.90 0.00 93.68 0.00 96.48 0.00 93.22 0.00 98.09 0.00 97.97 0.00 77.38 0.72 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1707178743
93.63 0.10 97.90 0.00 93.72 0.05 96.70 0.21 93.22 0.00 98.09 0.00 97.97 0.00 77.83 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.2480418417
93.73 0.10 97.90 0.00 93.77 0.05 96.91 0.21 93.22 0.00 98.09 0.00 97.97 0.00 78.28 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.4183487529
93.82 0.09 97.90 0.00 93.77 0.00 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 78.91 0.63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.3111675471
93.91 0.09 97.90 0.00 93.77 0.00 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 79.55 0.63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.1608826448
94.01 0.09 97.90 0.00 93.77 0.00 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 80.18 0.63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.1454315259
94.08 0.08 97.90 0.00 93.77 0.00 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 80.72 0.54 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.1519795398
94.16 0.08 97.90 0.00 93.77 0.00 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 81.27 0.54 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.2072575673
94.23 0.07 97.90 0.00 93.80 0.02 96.91 0.00 93.22 0.00 98.09 0.00 97.97 0.00 81.72 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.2513592756
94.30 0.07 97.93 0.04 93.80 0.00 97.12 0.21 93.22 0.00 98.13 0.04 97.97 0.00 81.90 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.41997255
94.36 0.06 97.93 0.00 93.80 0.00 97.12 0.00 93.22 0.00 98.13 0.00 97.97 0.00 82.35 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.3836029069
94.43 0.06 97.93 0.00 93.80 0.00 97.12 0.00 93.22 0.00 98.13 0.00 97.97 0.00 82.81 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.327856779
94.49 0.06 97.93 0.00 93.80 0.00 97.12 0.00 93.22 0.00 98.13 0.00 97.97 0.00 83.26 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.2355409291
94.55 0.06 97.93 0.00 93.80 0.00 97.12 0.00 93.22 0.00 98.13 0.00 97.97 0.00 83.71 0.45 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.455034656
94.61 0.06 97.93 0.00 93.82 0.02 97.12 0.00 93.22 0.00 98.13 0.00 98.17 0.20 83.89 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.1631284759
94.67 0.06 97.95 0.02 93.89 0.07 97.12 0.00 93.22 0.00 98.18 0.04 98.17 0.00 84.16 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.990606162
94.72 0.05 97.95 0.00 93.89 0.00 97.12 0.00 93.22 0.00 98.18 0.00 98.17 0.00 84.52 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.519869465
94.77 0.05 97.95 0.00 93.89 0.00 97.12 0.00 93.22 0.00 98.18 0.00 98.17 0.00 84.89 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.711768768
94.83 0.05 97.95 0.00 93.89 0.00 97.12 0.00 93.22 0.00 98.18 0.00 98.17 0.00 85.25 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2644027725
94.88 0.05 97.95 0.00 93.89 0.00 97.12 0.00 93.22 0.00 98.18 0.00 98.17 0.00 85.61 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.1486581177
94.93 0.05 97.95 0.00 93.89 0.00 97.12 0.00 93.22 0.00 98.18 0.00 98.17 0.00 85.97 0.36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.2485467913
94.98 0.05 98.01 0.06 93.96 0.07 97.33 0.21 93.22 0.00 98.18 0.00 98.17 0.00 85.97 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2636353103
95.02 0.04 98.01 0.00 94.06 0.10 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 86.15 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.767295436
95.06 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 86.43 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.2853461432
95.10 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 86.70 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2756437009
95.13 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 86.97 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1146865420
95.17 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 87.24 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.913018855
95.21 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 87.51 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.2986109046
95.25 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 87.78 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.4048609318
95.29 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 88.05 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.1242997206
95.33 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 88.33 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.57443104
95.37 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 88.60 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.960852321
95.41 0.04 98.01 0.00 94.06 0.00 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 88.87 0.27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.2408087617
95.44 0.04 98.07 0.06 94.08 0.02 97.33 0.00 93.22 0.00 98.18 0.00 98.17 0.00 89.05 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2840021596
95.47 0.03 98.09 0.02 94.11 0.02 97.44 0.11 93.22 0.00 98.22 0.04 98.17 0.00 89.05 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.3317747082
95.50 0.03 98.09 0.00 94.30 0.19 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.05 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2981253866
95.52 0.03 98.09 0.00 94.39 0.10 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.14 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.1737213891
95.55 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.32 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3178878644
95.58 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.50 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.1450038678
95.60 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.68 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3137874364
95.63 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 89.86 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.1406844627
95.65 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.05 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1121605569
95.68 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.23 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.4158892423
95.70 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.41 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2699017512
95.73 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.59 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.2535222152
95.76 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.77 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.2440698607
95.78 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 90.95 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.108656596
95.81 0.03 98.09 0.00 94.39 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.13 0.18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.37428597
95.83 0.02 98.09 0.00 94.46 0.07 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.22 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.424560541
95.85 0.02 98.09 0.00 94.60 0.14 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.22 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.2529278661
95.87 0.02 98.09 0.00 94.72 0.12 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.22 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.1654990624
95.88 0.02 98.09 0.00 94.75 0.02 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.31 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.3995088029
95.90 0.01 98.09 0.00 94.84 0.10 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.31 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.4186759282
95.91 0.01 98.09 0.00 94.94 0.10 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.31 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.1012816736
95.93 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.40 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.758024085
95.94 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.49 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.1888811439
95.95 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.58 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.1851221289
95.96 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.67 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2009977364
95.98 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.76 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3229969352
95.99 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.86 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.293310647
96.00 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 91.95 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.1953412181
96.02 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.04 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.301618525
96.03 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.13 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.2361011698
96.04 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.22 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1994734899
96.05 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.31 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.3351452793
96.07 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.40 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.2619090789
96.08 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.49 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.1309658252
96.09 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.58 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.4112356601
96.11 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.67 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3115061843
96.12 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.76 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.581705911
96.13 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.85 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.3604886834
96.14 0.01 98.09 0.00 94.94 0.00 97.44 0.00 93.22 0.00 98.22 0.00 98.17 0.00 92.94 0.09 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.4171802039
96.16 0.01 98.09 0.00 94.98 0.05 97.44 0.00 93.22 0.00 98.26 0.04 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.675497685
96.17 0.01 98.11 0.02 95.01 0.02 97.44 0.00 93.22 0.00 98.30 0.04 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.3481141670
96.18 0.01 98.14 0.04 95.01 0.00 97.44 0.00 93.22 0.00 98.34 0.04 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.1127372255
96.19 0.01 98.14 0.00 95.08 0.07 97.44 0.00 93.22 0.00 98.34 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1371150472
96.20 0.01 98.14 0.00 95.15 0.07 97.44 0.00 93.22 0.00 98.34 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.816511746
96.21 0.01 98.14 0.00 95.22 0.07 97.44 0.00 93.22 0.00 98.34 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.2688688355
96.22 0.01 98.14 0.00 95.29 0.07 97.44 0.00 93.22 0.00 98.34 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.467846439
96.23 0.01 98.16 0.02 95.29 0.00 97.44 0.00 93.22 0.00 98.38 0.04 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.3880149782
96.24 0.01 98.16 0.00 95.34 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3091974502
96.24 0.01 98.16 0.00 95.39 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3678816370
96.25 0.01 98.16 0.00 95.44 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.738781895
96.26 0.01 98.16 0.00 95.48 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.1526492686
96.26 0.01 98.16 0.00 95.53 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3024226156
96.27 0.01 98.16 0.00 95.58 0.05 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.247087470
96.27 0.01 98.16 0.00 95.60 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.2298922978
96.28 0.01 98.16 0.00 95.63 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.921413392
96.28 0.01 98.16 0.00 95.65 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.444013306
96.28 0.01 98.16 0.00 95.67 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1963379765
96.29 0.01 98.16 0.00 95.70 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.540379581
96.29 0.01 98.16 0.00 95.72 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.2212697022
96.29 0.01 98.16 0.00 95.75 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.540305567
96.30 0.01 98.16 0.00 95.77 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.4271340006
96.30 0.01 98.16 0.00 95.79 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.1943303950
96.30 0.01 98.16 0.00 95.82 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.469457008
96.31 0.01 98.16 0.00 95.84 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.2820951960
96.31 0.01 98.16 0.00 95.86 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.2225573623
96.32 0.01 98.16 0.00 95.89 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2355635113
96.32 0.01 98.16 0.00 95.91 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.235157839
96.32 0.01 98.16 0.00 95.94 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.4183438852
96.33 0.01 98.16 0.00 95.96 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1562048084
96.33 0.01 98.16 0.00 95.98 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.456249832
96.33 0.01 98.16 0.00 96.01 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.1697092547
96.34 0.01 98.16 0.00 96.03 0.02 97.44 0.00 93.22 0.00 98.38 0.00 98.17 0.00 92.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.3088727465

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.2530118227
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.2420171475
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.888509870
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.4210316362
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.1626078244
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.126543361
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.2472341842
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.1310861183
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.3230312196
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.3228550245
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2790884467
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.3342848684
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.913329650
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.3932620895
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.2052505879
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.2956211882
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.3351727363
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.146970641
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2747605364
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.1111927848
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.2732671732
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.28094159
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.1038086880
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2376560943
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3492097082
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.3018896728
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2602017234
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.3118245359
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.2849653066
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.3689676182
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.4280947757
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.885904603
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.590974355
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.927715632
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.632941138
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.753581348
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.810907190
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.622124268
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.1146676863
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2616084012
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.3904502285
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.1661671431
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.111258630
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/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.2403912578
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.1701739561
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.3026724819
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.179288435
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.507805176
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.1403488656
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.1454388448
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.1585481508
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.1569834200
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.715606968
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.1310109504
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2975085164
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.341108220
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.2018344472
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1362098228
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.1865771210
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.958026038
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.3563337774
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3619320484
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.344884620
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.2931816661
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.759196761
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.230149732
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.2772269239
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2963639709
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.3293933514
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.184764599
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.3262175451
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.1796777249
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.1055806635
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.1967870689
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.4281135630
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.329478851
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.4231396795
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.3935161826
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.4059979119
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_enable.562606762
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.472353675
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.3390945034
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.3594263535
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.1633302836
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.701568868
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.2606805511
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.253675278
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.534084099
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.4009145915
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.3416363054
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.850905216
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.1784137677
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.671379222
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.3674030360
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.614288634
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.3443165065
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.3846863604
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.247167731
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.798451772
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.201539011
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.2942689166
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.228922886
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.3219604606
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1535539159
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.1387725953
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.750082940
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.3504765337
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.549834955
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1505075817
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.3731329261
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.1812573700
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.591031674
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.1503556350
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.4032357720
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.824717785
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.4172839871
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3945673857
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.197418003
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1437332797
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2991347632
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.17813764
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.3070189129
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.1675696683
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.928093293
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.153725246
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1369003818
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3485484705
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.3548418076
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1383286017
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3337339581
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.912184365
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.1411133623
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.121146252
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.3401736949
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1585528151
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.543854542
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.985452439
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.2224039901
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1350360371
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.1762977462
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.1607109470
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.2072040952
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.68181639
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.408464533
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.3984650138
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.1260409663
/workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.3494275005



Total test records in report: 3740
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TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.1978807165 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:06 PM UTC 24 148303326 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.2981253866 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:06 PM UTC 24 133906774 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.2480418417 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:06 PM UTC 24 151042744 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.1737213891 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:06 PM UTC 24 181255636 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.2048949721 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:06 PM UTC 24 269452599 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.170709216 Aug 23 10:46:05 PM UTC 24 Aug 23 10:46:09 PM UTC 24 896549590 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2636353103 Aug 23 10:46:49 PM UTC 24 Aug 23 10:46:51 PM UTC 24 40839767 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1654876380 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:11 PM UTC 24 149681590 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_enable.2175207490 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:11 PM UTC 24 33179740 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.770262248 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:12 PM UTC 24 448190241 ps
T63 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.921413392 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:12 PM UTC 24 209638672 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.598120315 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:12 PM UTC 24 738789370 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.1371150472 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:13 PM UTC 24 1006948495 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.3678816370 Aug 23 10:46:11 PM UTC 24 Aug 23 10:46:14 PM UTC 24 508258668 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.2635022514 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:14 PM UTC 24 341623997 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.1522293513 Aug 23 10:46:12 PM UTC 24 Aug 23 10:46:14 PM UTC 24 156095093 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.2421148024 Aug 23 10:46:12 PM UTC 24 Aug 23 10:46:14 PM UTC 24 246935128 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3058509280 Aug 23 10:46:12 PM UTC 24 Aug 23 10:46:14 PM UTC 24 191518182 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.738781895 Aug 23 10:46:15 PM UTC 24 Aug 23 10:46:17 PM UTC 24 192055554 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.312500325 Aug 23 10:46:15 PM UTC 24 Aug 23 10:46:17 PM UTC 24 260261746 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.2325280765 Aug 23 10:46:15 PM UTC 24 Aug 23 10:46:17 PM UTC 24 508056788 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.1556906245 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:19 PM UTC 24 11726020800 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.1386613402 Aug 23 10:46:18 PM UTC 24 Aug 23 10:46:20 PM UTC 24 243231101 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.1561492770 Aug 23 10:46:18 PM UTC 24 Aug 23 10:46:20 PM UTC 24 194692405 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.3091974502 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:20 PM UTC 24 4163074166 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.30087331 Aug 23 10:46:21 PM UTC 24 Aug 23 10:46:24 PM UTC 24 144477865 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.157835211 Aug 23 10:46:24 PM UTC 24 Aug 23 10:46:26 PM UTC 24 158642496 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.532873993 Aug 23 10:46:16 PM UTC 24 Aug 23 10:46:28 PM UTC 24 8404053167 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.3915375392 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:29 PM UTC 24 1041304520 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.2143678829 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:30 PM UTC 24 20052358996 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.2840021596 Aug 23 10:46:28 PM UTC 24 Aug 23 10:46:30 PM UTC 24 241846423 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.4027387930 Aug 23 10:46:27 PM UTC 24 Aug 23 10:46:31 PM UTC 24 488902429 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.2454637746 Aug 23 10:46:11 PM UTC 24 Aug 23 10:46:32 PM UTC 24 3042293280 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.232146772 Aug 23 10:46:18 PM UTC 24 Aug 23 10:46:32 PM UTC 24 1999763824 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.605717411 Aug 23 10:46:31 PM UTC 24 Aug 23 10:46:33 PM UTC 24 152190533 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.2632085836 Aug 23 10:46:31 PM UTC 24 Aug 23 10:46:33 PM UTC 24 182119148 ps
T70 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.2981207032 Aug 23 10:46:16 PM UTC 24 Aug 23 10:46:33 PM UTC 24 10296381139 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.610576731 Aug 23 10:46:32 PM UTC 24 Aug 23 10:46:34 PM UTC 24 166091719 ps
T350 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.4174097937 Aug 23 10:46:32 PM UTC 24 Aug 23 10:46:34 PM UTC 24 231934231 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2607746783 Aug 23 10:46:33 PM UTC 24 Aug 23 10:46:35 PM UTC 24 163999814 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.560976970 Aug 23 10:46:33 PM UTC 24 Aug 23 10:46:35 PM UTC 24 209160339 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.1686444594 Aug 23 10:46:34 PM UTC 24 Aug 23 10:46:36 PM UTC 24 219868053 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.3200725794 Aug 23 10:46:34 PM UTC 24 Aug 23 10:46:36 PM UTC 24 235147096 ps
T231 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.3201707585 Aug 23 10:46:34 PM UTC 24 Aug 23 10:46:36 PM UTC 24 301630385 ps
T243 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.675497685 Aug 23 10:46:35 PM UTC 24 Aug 23 10:46:37 PM UTC 24 140697779 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.69470305 Aug 23 10:46:35 PM UTC 24 Aug 23 10:46:37 PM UTC 24 252225426 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.2571660033 Aug 23 10:46:36 PM UTC 24 Aug 23 10:46:38 PM UTC 24 31267821 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.1199236328 Aug 23 10:46:04 PM UTC 24 Aug 23 10:46:38 PM UTC 24 29341564360 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2528703475 Aug 23 10:46:21 PM UTC 24 Aug 23 10:46:39 PM UTC 24 2502707026 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.2466548020 Aug 23 10:46:37 PM UTC 24 Aug 23 10:46:39 PM UTC 24 199785953 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.1146865420 Aug 23 10:46:37 PM UTC 24 Aug 23 10:46:39 PM UTC 24 208130037 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.1454851916 Aug 23 10:46:37 PM UTC 24 Aug 23 10:46:39 PM UTC 24 208915198 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.211055202 Aug 23 10:46:37 PM UTC 24 Aug 23 10:46:39 PM UTC 24 194623016 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.1526492686 Aug 23 10:46:40 PM UTC 24 Aug 23 10:46:43 PM UTC 24 190615736 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.4183487529 Aug 23 10:46:40 PM UTC 24 Aug 23 10:46:43 PM UTC 24 214823422 ps
T58 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.3981883249 Aug 23 10:46:40 PM UTC 24 Aug 23 10:46:43 PM UTC 24 403344128 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1296481886 Aug 23 10:46:19 PM UTC 24 Aug 23 10:46:43 PM UTC 24 2636447506 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.990606162 Aug 23 10:46:40 PM UTC 24 Aug 23 10:46:43 PM UTC 24 458579614 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.394703264 Aug 23 10:46:42 PM UTC 24 Aug 23 10:46:44 PM UTC 24 309771997 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.2172036066 Aug 23 10:46:44 PM UTC 24 Aug 23 10:46:46 PM UTC 24 148695940 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.1851221289 Aug 23 10:46:44 PM UTC 24 Aug 23 10:46:46 PM UTC 24 157042427 ps
T226 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.41997255 Aug 23 10:46:44 PM UTC 24 Aug 23 10:46:46 PM UTC 24 169616930 ps
T159 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.3534916570 Aug 23 10:46:44 PM UTC 24 Aug 23 10:46:46 PM UTC 24 261852990 ps
T498 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2944492331 Aug 23 10:46:45 PM UTC 24 Aug 23 10:46:47 PM UTC 24 194180875 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.2760752330 Aug 23 10:46:47 PM UTC 24 Aug 23 10:46:50 PM UTC 24 627674649 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.734017683 Aug 23 10:46:47 PM UTC 24 Aug 23 10:46:51 PM UTC 24 1139973551 ps
T246 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3629789735 Aug 23 10:46:49 PM UTC 24 Aug 23 10:46:51 PM UTC 24 222567368 ps
T160 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.1450038678 Aug 23 10:46:09 PM UTC 24 Aug 23 10:46:53 PM UTC 24 5112305758 ps
T68 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.418170751 Aug 23 10:46:16 PM UTC 24 Aug 23 10:46:54 PM UTC 24 5228730291 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1772671739 Aug 23 10:46:53 PM UTC 24 Aug 23 10:46:54 PM UTC 24 154491123 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.3024226156 Aug 23 10:46:54 PM UTC 24 Aug 23 10:46:56 PM UTC 24 197941304 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2363496499 Aug 23 10:46:55 PM UTC 24 Aug 23 10:46:57 PM UTC 24 175824740 ps
T64 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.816511746 Aug 23 10:46:55 PM UTC 24 Aug 23 10:46:57 PM UTC 24 141686780 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.2624557959 Aug 23 10:46:38 PM UTC 24 Aug 23 10:46:57 PM UTC 24 3304118588 ps
T112 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.3406360815 Aug 23 10:46:56 PM UTC 24 Aug 23 10:46:58 PM UTC 24 286841443 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.107046907 Aug 23 10:46:51 PM UTC 24 Aug 23 10:46:59 PM UTC 24 5790560320 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.3137874364 Aug 23 10:46:57 PM UTC 24 Aug 23 10:47:00 PM UTC 24 830062333 ps
T66 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.4047497499 Aug 23 10:47:01 PM UTC 24 Aug 23 10:47:03 PM UTC 24 157301233 ps
T333 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.1883523025 Aug 23 10:47:00 PM UTC 24 Aug 23 10:47:03 PM UTC 24 974116013 ps
T279 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3630628903 Aug 23 10:47:03 PM UTC 24 Aug 23 10:47:05 PM UTC 24 39610394 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.1106714941 Aug 23 10:46:39 PM UTC 24 Aug 23 10:47:05 PM UTC 24 20168279092 ps
T185 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.4026960352 Aug 23 10:46:58 PM UTC 24 Aug 23 10:47:06 PM UTC 24 426183553 ps
T158 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.2970136044 Aug 23 10:47:04 PM UTC 24 Aug 23 10:47:07 PM UTC 24 793086313 ps
T228 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.1969595035 Aug 23 10:47:05 PM UTC 24 Aug 23 10:47:08 PM UTC 24 458582345 ps
T69 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2458585112 Aug 23 10:46:14 PM UTC 24 Aug 23 10:47:08 PM UTC 24 9432244117 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1679208507 Aug 23 10:46:47 PM UTC 24 Aug 23 10:47:08 PM UTC 24 3369225442 ps
T239 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.3458303500 Aug 23 10:47:06 PM UTC 24 Aug 23 10:47:09 PM UTC 24 188771614 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.4186759282 Aug 23 10:46:20 PM UTC 24 Aug 23 10:47:10 PM UTC 24 2095074525 ps
T107 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.1705414581 Aug 23 10:46:09 PM UTC 24 Aug 23 10:47:10 PM UTC 24 39848691061 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.2350868692 Aug 23 10:47:10 PM UTC 24 Aug 23 10:47:12 PM UTC 24 205576534 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.2754645214 Aug 23 10:47:11 PM UTC 24 Aug 23 10:47:13 PM UTC 24 159159982 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.1896764424 Aug 23 10:47:11 PM UTC 24 Aug 23 10:47:13 PM UTC 24 187049712 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.4149364230 Aug 23 10:47:13 PM UTC 24 Aug 23 10:47:15 PM UTC 24 224685632 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.2239383279 Aug 23 10:46:59 PM UTC 24 Aug 23 10:47:15 PM UTC 24 2571420067 ps
T275 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.3736394104 Aug 23 10:46:47 PM UTC 24 Aug 23 10:47:16 PM UTC 24 3353011025 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.1437667722 Aug 23 10:46:52 PM UTC 24 Aug 23 10:47:19 PM UTC 24 20623941070 ps
T518 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.3174457664 Aug 23 10:47:20 PM UTC 24 Aug 23 10:47:22 PM UTC 24 249223409 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.3007563615 Aug 23 10:47:17 PM UTC 24 Aug 23 10:47:23 PM UTC 24 3350986600 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.216978923 Aug 23 10:47:23 PM UTC 24 Aug 23 10:47:25 PM UTC 24 262845310 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1395847239 Aug 23 10:46:52 PM UTC 24 Aug 23 10:47:28 PM UTC 24 26098706112 ps
T280 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.1072305768 Aug 23 10:46:36 PM UTC 24 Aug 23 10:47:30 PM UTC 24 22569532233 ps
T71 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2240606217 Aug 23 10:47:13 PM UTC 24 Aug 23 10:47:31 PM UTC 24 12343207080 ps
T316 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.2149208009 Aug 23 10:47:30 PM UTC 24 Aug 23 10:47:32 PM UTC 24 181296799 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2545461512 Aug 23 10:47:33 PM UTC 24 Aug 23 10:47:34 PM UTC 24 150515404 ps
T318 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.2592163318 Aug 23 10:47:33 PM UTC 24 Aug 23 10:47:34 PM UTC 24 171916909 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.1963379765 Aug 23 10:47:33 PM UTC 24 Aug 23 10:47:34 PM UTC 24 254901462 ps
T319 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1313914865 Aug 23 10:47:35 PM UTC 24 Aug 23 10:47:37 PM UTC 24 190666071 ps
T320 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.3922450818 Aug 23 10:47:35 PM UTC 24 Aug 23 10:47:37 PM UTC 24 179757280 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.1038248093 Aug 23 10:47:36 PM UTC 24 Aug 23 10:47:38 PM UTC 24 165817734 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.2398878654 Aug 23 10:47:37 PM UTC 24 Aug 23 10:47:39 PM UTC 24 218109707 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.2526584951 Aug 23 10:47:37 PM UTC 24 Aug 23 10:47:39 PM UTC 24 191226217 ps
T244 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.466790950 Aug 23 10:47:38 PM UTC 24 Aug 23 10:47:40 PM UTC 24 169788781 ps
T198 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.1567800185 Aug 23 10:46:39 PM UTC 24 Aug 23 10:47:41 PM UTC 24 10036191343 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.1778560484 Aug 23 10:47:40 PM UTC 24 Aug 23 10:47:42 PM UTC 24 66948515 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.1469871470 Aug 23 10:47:40 PM UTC 24 Aug 23 10:47:42 PM UTC 24 195778279 ps
T161 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.3400773204 Aug 23 10:46:44 PM UTC 24 Aug 23 10:47:42 PM UTC 24 2437664582 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.767295436 Aug 23 10:46:57 PM UTC 24 Aug 23 10:47:43 PM UTC 24 30493490411 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.1450706907 Aug 23 10:47:42 PM UTC 24 Aug 23 10:47:44 PM UTC 24 201600896 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2911462776 Aug 23 10:47:42 PM UTC 24 Aug 23 10:47:44 PM UTC 24 223541737 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.346054532 Aug 23 10:47:42 PM UTC 24 Aug 23 10:47:44 PM UTC 24 205865739 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.1710174659 Aug 23 10:47:28 PM UTC 24 Aug 23 10:47:45 PM UTC 24 2546014128 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.983940114 Aug 23 10:47:45 PM UTC 24 Aug 23 10:47:46 PM UTC 24 142924718 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.2150234305 Aug 23 10:47:47 PM UTC 24 Aug 23 10:47:48 PM UTC 24 169350148 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.668664152 Aug 23 10:47:47 PM UTC 24 Aug 23 10:47:49 PM UTC 24 282245463 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.444013306 Aug 23 10:47:26 PM UTC 24 Aug 23 10:47:50 PM UTC 24 2710336790 ps
T177 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.1642977730 Aug 23 10:47:09 PM UTC 24 Aug 23 10:47:51 PM UTC 24 4787893466 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.2087482188 Aug 23 10:47:49 PM UTC 24 Aug 23 10:47:51 PM UTC 24 450678434 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.3694812582 Aug 23 10:47:50 PM UTC 24 Aug 23 10:47:52 PM UTC 24 314134427 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.3148006468 Aug 23 10:47:51 PM UTC 24 Aug 23 10:47:53 PM UTC 24 153138707 ps
T336 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.4015603322 Aug 23 10:47:52 PM UTC 24 Aug 23 10:47:54 PM UTC 24 169440907 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.3890604283 Aug 23 10:47:52 PM UTC 24 Aug 23 10:47:54 PM UTC 24 233705518 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.4069704823 Aug 23 10:47:53 PM UTC 24 Aug 23 10:47:55 PM UTC 24 184136486 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.1510714860 Aug 23 10:47:17 PM UTC 24 Aug 23 10:47:56 PM UTC 24 1665709670 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.3874823076 Aug 23 10:47:54 PM UTC 24 Aug 23 10:47:56 PM UTC 24 177321389 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.1648981119 Aug 23 10:47:55 PM UTC 24 Aug 23 10:47:59 PM UTC 24 959344009 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2668957041 Aug 23 10:47:12 PM UTC 24 Aug 23 10:48:17 PM UTC 24 9996767824 ps
T191 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.540379581 Aug 23 10:47:58 PM UTC 24 Aug 23 10:48:01 PM UTC 24 624094689 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.3723632824 Aug 23 10:48:15 PM UTC 24 Aug 23 10:48:19 PM UTC 24 1025688946 ps
T178 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.2738643448 Aug 23 10:47:44 PM UTC 24 Aug 23 10:48:01 PM UTC 24 3145552834 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.2180942802 Aug 23 10:46:38 PM UTC 24 Aug 23 10:48:02 PM UTC 24 6582074971 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.124569886 Aug 23 10:48:01 PM UTC 24 Aug 23 10:48:03 PM UTC 24 63641606 ps
T247 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.2098149237 Aug 23 10:48:01 PM UTC 24 Aug 23 10:48:03 PM UTC 24 320785819 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.3395489849 Aug 23 10:48:05 PM UTC 24 Aug 23 10:48:06 PM UTC 24 203382615 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.1663407290 Aug 23 10:47:24 PM UTC 24 Aug 23 10:48:07 PM UTC 24 1849626014 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.4185658248 Aug 23 10:47:45 PM UTC 24 Aug 23 10:48:08 PM UTC 24 20146137506 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.2278460912 Aug 23 10:48:07 PM UTC 24 Aug 23 10:48:09 PM UTC 24 163226989 ps
T65 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.1577240106 Aug 23 10:48:07 PM UTC 24 Aug 23 10:48:10 PM UTC 24 169053691 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.100218343 Aug 23 10:47:55 PM UTC 24 Aug 23 10:48:10 PM UTC 24 1984729686 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.2454832091 Aug 23 10:48:08 PM UTC 24 Aug 23 10:48:10 PM UTC 24 168387467 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1762439987 Aug 23 10:48:09 PM UTC 24 Aug 23 10:48:11 PM UTC 24 264105740 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.524000398 Aug 23 10:48:03 PM UTC 24 Aug 23 10:48:12 PM UTC 24 6060177255 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.660097497 Aug 23 10:47:40 PM UTC 24 Aug 23 10:48:12 PM UTC 24 13606058136 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.2924112541 Aug 23 10:48:10 PM UTC 24 Aug 23 10:48:14 PM UTC 24 1071808104 ps
T67 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.3244327240 Aug 23 10:48:12 PM UTC 24 Aug 23 10:48:14 PM UTC 24 146116947 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.4006063500 Aug 23 10:48:12 PM UTC 24 Aug 23 10:48:15 PM UTC 24 620554976 ps
T293 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_enable.1531357201 Aug 23 10:48:14 PM UTC 24 Aug 23 10:48:15 PM UTC 24 27463668 ps
T215 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.2097252847 Aug 23 10:47:53 PM UTC 24 Aug 23 10:48:16 PM UTC 24 2493100763 ps
T294 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.1210457809 Aug 23 10:48:15 PM UTC 24 Aug 23 10:48:17 PM UTC 24 423622855 ps
T295 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.3603712494 Aug 23 10:48:11 PM UTC 24 Aug 23 10:48:19 PM UTC 24 464910044 ps
T240 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.1856501332 Aug 23 10:48:16 PM UTC 24 Aug 23 10:48:19 PM UTC 24 404420059 ps
T296 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3469220232 Aug 23 10:48:20 PM UTC 24 Aug 23 10:48:22 PM UTC 24 240344747 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3306613846 Aug 23 10:48:03 PM UTC 24 Aug 23 10:48:22 PM UTC 24 15162489305 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.3018534230 Aug 23 10:46:09 PM UTC 24 Aug 23 10:48:25 PM UTC 24 86318921759 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.1232933172 Aug 23 10:48:23 PM UTC 24 Aug 23 10:48:25 PM UTC 24 145699896 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.2332462863 Aug 23 10:48:23 PM UTC 24 Aug 23 10:48:25 PM UTC 24 195680321 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.462591793 Aug 23 10:47:43 PM UTC 24 Aug 23 10:48:26 PM UTC 24 5878241198 ps
T216 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1954309185 Aug 23 10:48:10 PM UTC 24 Aug 23 10:48:26 PM UTC 24 2019462925 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.1343971712 Aug 23 10:48:26 PM UTC 24 Aug 23 10:48:28 PM UTC 24 206503733 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2899465909 Aug 23 10:48:04 PM UTC 24 Aug 23 10:48:33 PM UTC 24 24109292450 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.2386606611 Aug 23 10:48:34 PM UTC 24 Aug 23 10:48:36 PM UTC 24 269103189 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.230935016 Aug 23 10:48:27 PM UTC 24 Aug 23 10:48:39 PM UTC 24 9329308782 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.4109353471 Aug 23 10:48:37 PM UTC 24 Aug 23 10:48:39 PM UTC 24 205219342 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.2372839695 Aug 23 10:46:09 PM UTC 24 Aug 23 10:48:41 PM UTC 24 87117443512 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.358127916 Aug 23 10:46:09 PM UTC 24 Aug 23 10:48:43 PM UTC 24 94197194909 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.218769931 Aug 23 10:47:17 PM UTC 24 Aug 23 10:48:45 PM UTC 24 3662409060 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.43298225 Aug 23 10:48:45 PM UTC 24 Aug 23 10:48:46 PM UTC 24 146970885 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.2148508540 Aug 23 10:48:47 PM UTC 24 Aug 23 10:48:48 PM UTC 24 146160585 ps
T140 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.4285083739 Aug 23 10:48:47 PM UTC 24 Aug 23 10:48:49 PM UTC 24 242554293 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.3092805583 Aug 23 10:47:45 PM UTC 24 Aug 23 10:48:49 PM UTC 24 5961536626 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.941812725 Aug 23 10:48:49 PM UTC 24 Aug 23 10:48:51 PM UTC 24 177804525 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.65339010 Aug 23 10:48:50 PM UTC 24 Aug 23 10:48:52 PM UTC 24 185212190 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.1781495907 Aug 23 10:48:50 PM UTC 24 Aug 23 10:48:52 PM UTC 24 171481203 ps
T219 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.3911030911 Aug 23 10:48:51 PM UTC 24 Aug 23 10:48:53 PM UTC 24 148005083 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.1898395652 Aug 23 10:48:52 PM UTC 24 Aug 23 10:48:54 PM UTC 24 194251941 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.1698755651 Aug 23 10:48:20 PM UTC 24 Aug 23 10:48:54 PM UTC 24 3682872631 ps
T245 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.1942550372 Aug 23 10:48:53 PM UTC 24 Aug 23 10:48:55 PM UTC 24 146386088 ps
T256 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.44741861 Aug 23 10:48:53 PM UTC 24 Aug 23 10:48:55 PM UTC 24 237138408 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3728638171 Aug 23 10:48:54 PM UTC 24 Aug 23 10:48:56 PM UTC 24 90457186 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.3049152204 Aug 23 10:48:54 PM UTC 24 Aug 23 10:48:56 PM UTC 24 195551538 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.424560541 Aug 23 10:48:27 PM UTC 24 Aug 23 10:48:57 PM UTC 24 4144423622 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.3779203700 Aug 23 10:48:55 PM UTC 24 Aug 23 10:48:57 PM UTC 24 150195026 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3259288070 Aug 23 10:48:55 PM UTC 24 Aug 23 10:48:57 PM UTC 24 159781162 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.1023281270 Aug 23 10:48:57 PM UTC 24 Aug 23 10:48:58 PM UTC 24 188508150 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.3618416956 Aug 23 10:48:59 PM UTC 24 Aug 23 10:49:01 PM UTC 24 207565264 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.54940985 Aug 23 10:49:02 PM UTC 24 Aug 23 10:49:04 PM UTC 24 221494610 ps
T59 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.238455018 Aug 23 10:49:02 PM UTC 24 Aug 23 10:49:04 PM UTC 24 259722945 ps
T72 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.59276510 Aug 23 10:48:26 PM UTC 24 Aug 23 10:49:05 PM UTC 24 28770933564 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.4178687133 Aug 23 10:49:05 PM UTC 24 Aug 23 10:49:07 PM UTC 24 207529598 ps
T60 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2070370233 Aug 23 10:49:05 PM UTC 24 Aug 23 10:49:08 PM UTC 24 459699365 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.1863462937 Aug 23 10:49:06 PM UTC 24 Aug 23 10:49:08 PM UTC 24 167037112 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1978015227 Aug 23 10:49:07 PM UTC 24 Aug 23 10:49:09 PM UTC 24 194092864 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.126865950 Aug 23 10:48:57 PM UTC 24 Aug 23 10:49:10 PM UTC 24 2107950074 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.4036702943 Aug 23 10:48:40 PM UTC 24 Aug 23 10:49:10 PM UTC 24 3129397076 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.1012816736 Aug 23 10:47:56 PM UTC 24 Aug 23 10:49:10 PM UTC 24 12027373555 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.1988357553 Aug 23 10:49:08 PM UTC 24 Aug 23 10:49:11 PM UTC 24 234285400 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.2032242017 Aug 23 10:47:09 PM UTC 24 Aug 23 10:49:11 PM UTC 24 83083571106 ps
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T581 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.1571261425 Aug 23 10:48:40 PM UTC 24 Aug 23 10:49:11 PM UTC 24 3513131989 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.984763387 Aug 23 10:49:11 PM UTC 24 Aug 23 10:49:12 PM UTC 24 146800363 ps
T288 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.2935137270 Aug 23 10:48:54 PM UTC 24 Aug 23 10:49:14 PM UTC 24 7690211181 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3553345330 Aug 23 10:49:12 PM UTC 24 Aug 23 10:49:15 PM UTC 24 588563037 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.2179877103 Aug 23 10:49:11 PM UTC 24 Aug 23 10:49:15 PM UTC 24 1396690099 ps
T248 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.2505590441 Aug 23 10:49:13 PM UTC 24 Aug 23 10:49:16 PM UTC 24 694601310 ps
T242 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.246844110 Aug 23 10:49:14 PM UTC 24 Aug 23 10:49:16 PM UTC 24 45063629 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.1098045365 Aug 23 10:49:15 PM UTC 24 Aug 23 10:49:17 PM UTC 24 148069003 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.1575700301 Aug 23 10:49:17 PM UTC 24 Aug 23 10:49:18 PM UTC 24 145922734 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.1074772947 Aug 23 10:49:17 PM UTC 24 Aug 23 10:49:18 PM UTC 24 186111336 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2561626938 Aug 23 10:49:18 PM UTC 24 Aug 23 10:49:19 PM UTC 24 142185039 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.2427197551 Aug 23 10:49:19 PM UTC 24 Aug 23 10:49:21 PM UTC 24 370414459 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.419044601 Aug 23 10:48:10 PM UTC 24 Aug 23 10:49:21 PM UTC 24 41398209835 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.506737904 Aug 23 10:49:19 PM UTC 24 Aug 23 10:49:22 PM UTC 24 694640573 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.291728433 Aug 23 10:46:09 PM UTC 24 Aug 23 10:49:23 PM UTC 24 118105011770 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.2320739947 Aug 23 10:48:58 PM UTC 24 Aug 23 10:49:23 PM UTC 24 20149215583 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1426825165 Aug 23 10:46:09 PM UTC 24 Aug 23 10:49:24 PM UTC 24 120186190639 ps
T589 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_enable.1916634302 Aug 23 10:49:24 PM UTC 24 Aug 23 10:49:25 PM UTC 24 38622754 ps
T590 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.1684624228 Aug 23 10:49:24 PM UTC 24 Aug 23 10:49:25 PM UTC 24 152345844 ps
T401 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.1148035722 Aug 23 10:49:22 PM UTC 24 Aug 23 10:49:25 PM UTC 24 979477910 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.1343612942 Aug 23 10:49:14 PM UTC 24 Aug 23 10:49:28 PM UTC 24 9209533676 ps
T591 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.634531491 Aug 23 10:47:09 PM UTC 24 Aug 23 10:49:28 PM UTC 24 99120334571 ps
T447 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.1239922994 Aug 23 10:49:26 PM UTC 24 Aug 23 10:49:28 PM UTC 24 485356134 ps
T527 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.2009977364 Aug 23 10:47:06 PM UTC 24 Aug 23 10:49:29 PM UTC 24 88175203415 ps
T592 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.1395826129 Aug 23 10:49:26 PM UTC 24 Aug 23 10:49:29 PM UTC 24 324259932 ps
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T594 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.2415502288 Aug 23 10:49:11 PM UTC 24 Aug 23 10:49:31 PM UTC 24 2812951445 ps
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T608 /workspaces/repo/scratch/os_regression_2024_08_22/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.702345284 Aug 23 10:49:43 PM UTC 24 Aug 23 10:49:45 PM UTC 24 167909695 ps
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