Unified Coverage Report :: Group :: usbdev_env_pkg::usbdev_env_cov::address_cg

Group : usbdev_env_pkg::usbdev_env_cov::address_cg

SCORE	WEIGHT	GOAL	AT LEAST	AUTO BIN MAX	PRINT MISSING
100.00	1	100	1	64	64

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/sim-vcs/../src/lowrisc_dv_usbdev_env_0.1/usbdev_env_cov.sv

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Summary for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
Variables	9	0	9	100.00
Crosses	14	0	14	100.00

Variables for Group usbdev_env_pkg::usbdev_env_cov::address_cg

VARIABLE	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	AUTO BIN MAX	COMMENT
cp_address	7	0	7	100.00	100	1	1	0
cp_endp	2	0	2	100.00	100	1	1	0

Crosses for Group usbdev_env_pkg::usbdev_env_cov::address_cg

CROSS	EXPECTED	UNCOVERED	COVERED	PERCENT	GOAL	WEIGHT	AT LEAST	PRINT MISSING	COMMENT
cr_address_X_endp	14	0	14	100.00	100	1	1	0

Summary for Variable cp_address

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	7	0	7	100.00

User Defined Bins for cp_address

Bins

NAME	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	1808	1			T22	1		T123	7		T124	5
range_16_to_126	149883	1			T2	1		T27	1		T40	18
fifteen	1298	1			T22	1		T176	1		T62	1
range_2_to_14	23224	1			T40	1		T29	24		T35	2
seven	739	1			T38	2		T22	6		T191	1
one	2333	1			T75	11		T53	2		T22	2
zero	715	1			T1	1		T22	1		T327	3

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Summary for Variable cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT
User Defined Bins	2	0	2	100.00

User Defined Bins for cp_endp

Bins

NAME

COUNT

AT LEAST

STATUS

TEST

COUNT

TEST

COUNT

TEST

COUNT

seven

12123

1

T40

6

T28

13

T29

3

three

11993

1

T29

4

T31

2

T75

11

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Summary for Cross cr_address_X_endp

Samples crossed: cp_address cp_endp

CATEGORY	EXPECTED	UNCOVERED	COVERED	PERCENT	MISSING
Automatically Generated Cross Bins	14	0	14	100.00

Automatically Generated Cross Bins for cr_address_X_endp

Bins

cp_address	cp_endp	COUNT	AT LEAST	STATUS		TEST	COUNT		TEST	COUNT		TEST	COUNT
range_127	seven	91	1			T123	1		T124	1		T518	1
range_127	three	123	1			T123	1		T183	2		T391	1
range_16_to_126	seven	10415	1			T40	6		T28	13		T31	2
range_16_to_126	three	10049	1			T31	2		T89	1		T17	1
fifteen	seven	69	1			T22	1		T183	1		T391	2
fifteen	three	198	1			T176	1		T123	1		T183	1
range_2_to_14	seven	1339	1			T29	3		T36	11		T22	2
range_2_to_14	three	1401	1			T29	4		T22	2		T176	19
seven	seven	50	1			T22	1		T183	1		T519	1
seven	three	36	1			T363	1		T193	1		T520	1
one	seven	172	1			T264	67		T391	42		T193	1
one	three	196	1			T75	11		T264	69		T183	1
zero	seven	37	1			T521	2		T185	11		T503	1
zero	three	26	1			T121	1		T521	2		T520	1