Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.54 98.11 96.01 97.44 94.92 98.30 98.17 92.85


Total tests in report: 3739
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
64.71 64.71 86.81 86.81 66.67 66.67 58.74 58.74 50.85 50.85 79.51 79.51 90.85 90.85 19.55 19.55 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3867416082
72.00 7.29 90.26 3.45 75.64 8.96 83.26 24.52 50.85 0.00 88.93 9.42 91.26 0.41 23.80 4.25 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2116161600
75.89 3.89 91.93 1.67 78.20 2.57 85.71 2.45 62.71 11.86 90.17 1.24 93.29 2.03 29.23 5.43 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2331248258
78.80 2.91 92.88 0.95 83.81 5.61 87.21 1.49 64.41 1.69 92.37 2.20 93.29 0.00 37.65 8.42 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.3974062448
81.08 2.28 93.58 0.70 83.93 0.12 89.55 2.35 64.41 0.00 92.37 0.00 93.50 0.20 50.23 12.58 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.4051198194
82.82 1.74 95.21 1.63 87.59 3.66 90.19 0.64 64.41 0.00 95.56 3.19 93.50 0.00 53.30 3.08 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.3199334671
84.14 1.32 95.28 0.08 88.04 0.45 90.62 0.43 66.10 1.69 95.73 0.17 93.50 0.00 59.73 6.43 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2376989837
85.35 1.20 95.49 0.21 88.52 0.48 90.62 0.00 71.19 5.08 95.94 0.21 93.50 0.00 62.17 2.44 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.20055628
86.45 1.11 96.63 1.14 89.11 0.59 92.11 1.49 71.19 0.00 96.02 0.08 94.31 0.81 65.79 3.62 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.1490563372
87.32 0.87 96.74 0.11 89.26 0.14 92.32 0.21 76.27 5.08 96.18 0.17 94.31 0.00 66.15 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.3509649320
87.95 0.63 96.82 0.08 89.42 0.17 92.75 0.43 79.66 3.39 96.35 0.17 94.31 0.00 66.33 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2755506448
88.50 0.55 96.99 0.17 89.52 0.10 92.75 0.00 83.05 3.39 96.52 0.17 94.31 0.00 66.33 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2890324724
89.03 0.54 96.99 0.00 89.57 0.05 95.74 2.99 83.05 0.00 96.52 0.00 94.51 0.20 66.88 0.54 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3269540872
89.57 0.53 97.06 0.08 90.94 1.38 95.74 0.00 84.75 1.69 96.64 0.12 94.51 0.00 67.33 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1687273481
90.00 0.44 97.06 0.00 91.13 0.19 95.74 0.00 84.75 0.00 96.68 0.04 96.34 1.83 68.33 1.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.359614583
90.44 0.43 97.80 0.74 92.27 1.14 95.74 0.00 84.75 0.00 97.84 1.16 96.34 0.00 68.33 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3480355938
90.87 0.43 97.80 0.00 92.27 0.00 95.74 0.00 84.75 0.00 97.84 0.00 96.34 0.00 71.31 2.99 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.1722273394
91.12 0.26 97.80 0.00 92.27 0.00 95.84 0.11 86.44 1.69 97.84 0.00 96.34 0.00 71.31 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.4261345279
91.37 0.25 97.82 0.02 92.27 0.00 95.84 0.00 88.14 1.69 97.88 0.04 96.34 0.00 71.31 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.2870128219
91.62 0.25 97.82 0.00 92.30 0.02 95.84 0.00 89.83 1.69 97.88 0.00 96.34 0.00 71.31 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.19686943
91.86 0.24 97.82 0.00 92.37 0.07 95.84 0.00 89.83 0.00 97.88 0.00 96.34 0.00 72.94 1.63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1415237796
92.10 0.24 97.82 0.00 92.37 0.00 95.84 0.00 91.53 1.69 97.88 0.00 96.34 0.00 72.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.3075843520
92.35 0.24 97.82 0.00 92.37 0.00 95.84 0.00 93.22 1.69 97.88 0.00 96.34 0.00 72.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1397886120
92.59 0.24 97.82 0.00 92.37 0.00 95.84 0.00 94.92 1.69 97.88 0.00 96.34 0.00 72.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1818330909
92.76 0.17 97.82 0.00 92.37 0.00 95.84 0.00 94.92 0.00 97.88 0.00 97.56 1.22 72.94 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.3925588158
92.93 0.17 97.82 0.00 93.06 0.69 95.84 0.00 94.92 0.00 97.93 0.04 97.76 0.20 73.21 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.3889712016
93.09 0.15 97.82 0.00 93.23 0.17 96.06 0.21 94.92 0.00 97.97 0.04 97.76 0.00 73.85 0.63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121733922
93.21 0.13 97.82 0.00 93.23 0.00 96.06 0.00 94.92 0.00 97.97 0.00 97.76 0.00 74.75 0.90 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.1974352988
93.34 0.13 97.84 0.02 93.46 0.24 96.06 0.00 94.92 0.00 98.05 0.08 97.76 0.00 75.29 0.54 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.1146390758
93.46 0.12 97.84 0.00 94.20 0.74 96.06 0.00 94.92 0.00 98.05 0.00 97.76 0.00 75.38 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1158198642
93.57 0.12 97.84 0.00 94.20 0.00 96.06 0.00 94.92 0.00 98.05 0.00 97.76 0.00 76.20 0.81 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1694936107
93.68 0.11 97.84 0.00 94.34 0.14 96.27 0.21 94.92 0.00 98.09 0.04 97.76 0.00 76.56 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.161452694
93.79 0.10 97.84 0.00 94.34 0.00 96.27 0.00 94.92 0.00 98.09 0.00 97.76 0.00 77.29 0.72 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2682022971
93.89 0.10 97.84 0.00 94.39 0.05 96.48 0.21 94.92 0.00 98.09 0.00 97.76 0.00 77.74 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.49894366
93.99 0.10 97.84 0.00 94.44 0.05 96.70 0.21 94.92 0.00 98.09 0.00 97.76 0.00 78.19 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1941566396
94.09 0.10 97.84 0.00 94.49 0.05 96.91 0.21 94.92 0.00 98.09 0.00 97.76 0.00 78.64 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3635630415
94.18 0.09 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 79.28 0.63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.3926789169
94.27 0.09 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 79.91 0.63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.1066653081
94.36 0.09 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 80.54 0.63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.995324055
94.44 0.08 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 81.09 0.54 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.196825106
94.52 0.08 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 81.63 0.54 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1818181303
94.60 0.08 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 82.17 0.54 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.3537557038
94.66 0.06 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 82.62 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1058529431
94.73 0.06 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 83.08 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.1418637923
94.79 0.06 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 83.53 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3970978187
94.86 0.06 97.84 0.00 94.49 0.00 96.91 0.00 94.92 0.00 98.09 0.00 97.76 0.00 83.98 0.45 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.3454715119
94.91 0.05 97.86 0.02 94.53 0.05 96.91 0.00 94.92 0.00 98.13 0.04 97.76 0.00 84.25 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3899164677
94.96 0.05 97.95 0.09 94.56 0.02 97.12 0.21 94.92 0.00 98.18 0.04 97.76 0.00 84.25 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3601398859
95.01 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 84.62 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.627197980
95.07 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 84.98 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1710751020
95.12 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 85.34 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1828468162
95.17 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 85.70 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3101370764
95.22 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 86.06 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.4202407361
95.27 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 86.43 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.527143679
95.32 0.05 97.95 0.00 94.56 0.00 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 86.79 0.36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1920322334
95.38 0.05 98.01 0.06 94.58 0.02 97.12 0.00 94.92 0.00 98.18 0.00 97.76 0.00 87.06 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1012343349
95.42 0.05 98.07 0.06 94.65 0.07 97.33 0.21 94.92 0.00 98.18 0.00 97.76 0.00 87.06 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2362804151
95.47 0.04 98.07 0.00 94.68 0.02 97.33 0.00 94.92 0.00 98.18 0.00 97.76 0.00 87.33 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3516564964
95.51 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.20 87.42 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.4006195523
95.55 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.00 87.69 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.128592089
95.59 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.00 87.96 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2078143075
95.62 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.00 88.24 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.1926059125
95.66 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.00 88.51 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.2391949665
95.70 0.04 98.07 0.00 94.68 0.00 97.33 0.00 94.92 0.00 98.18 0.00 97.97 0.00 88.78 0.27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.1398093492
95.73 0.03 98.09 0.02 94.75 0.07 97.33 0.00 94.92 0.00 98.22 0.04 97.97 0.00 88.87 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1761907289
95.76 0.03 98.09 0.00 94.77 0.02 97.33 0.00 94.92 0.00 98.22 0.00 97.97 0.00 89.05 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2569047009
95.79 0.03 98.09 0.00 94.79 0.02 97.33 0.00 94.92 0.00 98.22 0.00 97.97 0.00 89.23 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.632948033
95.82 0.03 98.09 0.00 94.79 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.20 89.23 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.77010169
95.85 0.03 98.09 0.00 94.98 0.19 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 89.23 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3416983944
95.87 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 89.41 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.4122526185
95.90 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 89.59 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1247644352
95.93 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 89.77 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1577309395
95.95 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 89.95 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.3670224112
95.98 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 90.14 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.698648954
96.00 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 90.32 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1446029817
96.03 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 90.50 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3976496152
96.06 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 90.68 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1515221076
96.08 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 90.86 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.867548978
96.11 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.04 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.534113638
96.13 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.22 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.169120870
96.16 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.40 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3606887596
96.18 0.03 98.09 0.00 94.98 0.00 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.58 0.18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.621006104
96.21 0.02 98.09 0.00 95.15 0.17 97.33 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.58 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2976905856
96.23 0.02 98.09 0.00 95.20 0.05 97.44 0.11 94.92 0.00 98.22 0.00 98.17 0.00 91.58 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3494423014
96.24 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.67 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2941262271
96.26 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.76 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.655911706
96.27 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.86 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4073781865
96.28 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 91.95 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2537963366
96.29 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.04 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.3534591456
96.31 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.13 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.2220384925
96.32 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.22 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1858391803
96.33 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.31 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.425931568
96.35 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.40 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.1601421759
96.36 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.49 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.3185565815
96.37 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.58 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.279287739
96.39 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.67 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.277699733
96.40 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.76 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.3980325917
96.41 0.01 98.09 0.00 95.20 0.00 97.44 0.00 94.92 0.00 98.22 0.00 98.17 0.00 92.85 0.09 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.3487858356
96.42 0.01 98.09 0.00 95.25 0.05 97.44 0.00 94.92 0.00 98.26 0.04 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.3014199849
96.44 0.01 98.11 0.02 95.27 0.02 97.44 0.00 94.92 0.00 98.30 0.04 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.3769115643
96.45 0.01 98.11 0.00 95.34 0.07 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.4181905908
96.46 0.01 98.11 0.00 95.41 0.07 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.4096045904
96.46 0.01 98.11 0.00 95.46 0.05 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.345125182
96.47 0.01 98.11 0.00 95.51 0.05 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.1237324797
96.48 0.01 98.11 0.00 95.56 0.05 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.3520167522
96.48 0.01 98.11 0.00 95.60 0.05 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.4271140031
96.49 0.01 98.11 0.00 95.65 0.05 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3442517744
96.49 0.01 98.11 0.00 95.67 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3869009266
96.50 0.01 98.11 0.00 95.70 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.875763256
96.50 0.01 98.11 0.00 95.72 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2804364325
96.50 0.01 98.11 0.00 95.75 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.153472251
96.51 0.01 98.11 0.00 95.77 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.377494767
96.51 0.01 98.11 0.00 95.79 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2707850659
96.51 0.01 98.11 0.00 95.82 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3525128383
96.52 0.01 98.11 0.00 95.84 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.436714101
96.52 0.01 98.11 0.00 95.86 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.2800113169
96.52 0.01 98.11 0.00 95.89 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2089563322
96.53 0.01 98.11 0.00 95.91 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.577543971
96.53 0.01 98.11 0.00 95.94 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1881316188
96.53 0.01 98.11 0.00 95.96 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.1685926385
96.54 0.01 98.11 0.00 95.98 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.3746471164
96.54 0.01 98.11 0.00 96.01 0.02 97.44 0.00 94.92 0.00 98.30 0.00 98.17 0.00 92.85 0.00 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.3375401743

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3622615329
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1526783794
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3944179489
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.2348646343
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1240330721
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.660696249
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3819982481
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.1207353966
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2928240833
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.2973067017
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2378923299
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3966565142
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.392108777
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3090763305
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.1686932440
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2999387056
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.566782432
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.415611563
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.882829473
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2380586104
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3773702923
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2332198229
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2086607650
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2698075450
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.4043153109
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2457503398
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.3095691707
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.1543616366
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1186862269
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1170990911
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3684920652
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3279977163
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2403075266
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.580834908
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2710387818
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3745455283
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.51439302
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1241172389
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.320232818
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.182992928
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.2592307537
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3032985425
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3004263420
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.434034730
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1109119542
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3534443453
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.507238970
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2570041952
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2734408933
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3115370965
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.4286744903
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.714172897
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.24691303
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2481261259
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1872468732
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.2025520130
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1429351408
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1127890527
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.3407061112
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2812266213
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3396792711
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3270519081
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.4037803000
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2384702029
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1357427031
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2150596855
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2380575483
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2137281892
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3049664174
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/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.914749595
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.2887591214
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3339126918
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.977229865
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.774296605
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3441071696
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2450213142
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.3587199527
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2099681542
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1291067702
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.1185511459
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1016271880
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2775638926
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.2086517864
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.1376034630
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.498104669
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.154206854
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.3137895180
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.3079285363
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.2236267183
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_enable.504368329
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.1421534125
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2936599681
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.1156563873
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3220154062
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2470384777
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.794549742
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.1600149590
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.1702510942
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.677238551
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.2037929959
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.3561967011
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4275586063
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.1853178701
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.2719165212
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.1322572468
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.80522565
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1002833811
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3509207542
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.426259680
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.3032119791
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.1384073633
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.693358364
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1932093139
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1449438291
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2248628491
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.1032938396
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.2553910863
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1479912225
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1308175554
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.2476922528
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.197686776
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1171072878
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.1772943501
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.3552076277
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.857833957
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.2357169937
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1094330001
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3306315007
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3844393414
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1572723562
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2107188147
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.751297269
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.3690654110
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2654099173
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1322277831
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3924824116
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1935138080
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3822376775
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.4266055640
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.1464073926
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1067301195
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3604127751
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.3244635495
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.182970056
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1902899315
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1885174627
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2856876547
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1507249652
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.157727589
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1591488860
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.265585751
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.689163863
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.877841547
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.731092525
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1602680367
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2795341066
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3100303897
/workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1068601110



Total test records in report: 3739
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TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.49894366 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:16 AM UTC 24 177870486 ps
T2 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.345125182 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:16 AM UTC 24 177729507 ps
T3 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3416983944 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:16 AM UTC 24 136699553 ps
T27 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2097453746 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:16 AM UTC 24 192645618 ps
T39 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1941566396 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:17 AM UTC 24 153196940 ps
T40 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2116161600 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:17 AM UTC 24 498632583 ps
T28 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.2107936729 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:17 AM UTC 24 501322440 ps
T41 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_enable.3530277039 Aug 27 07:35:15 AM UTC 24 Aug 27 07:35:18 AM UTC 24 104387767 ps
T42 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.749485746 Aug 27 07:35:16 AM UTC 24 Aug 27 07:35:18 AM UTC 24 152023551 ps
T29 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3867416082 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:19 AM UTC 24 947431976 ps
T43 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3869009266 Aug 27 07:35:16 AM UTC 24 Aug 27 07:35:19 AM UTC 24 249137454 ps
T30 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.366384650 Aug 27 07:35:17 AM UTC 24 Aug 27 07:35:19 AM UTC 24 148418309 ps
T31 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.3199334671 Aug 27 07:35:15 AM UTC 24 Aug 27 07:35:20 AM UTC 24 819708417 ps
T32 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3821778441 Aug 27 07:35:17 AM UTC 24 Aug 27 07:35:20 AM UTC 24 211924935 ps
T33 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.3567029367 Aug 27 07:35:18 AM UTC 24 Aug 27 07:35:20 AM UTC 24 193845819 ps
T34 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1761907289 Aug 27 07:35:17 AM UTC 24 Aug 27 07:35:21 AM UTC 24 543305768 ps
T35 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.3863067307 Aug 27 07:35:18 AM UTC 24 Aug 27 07:35:21 AM UTC 24 179290425 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.1237324797 Aug 27 07:35:18 AM UTC 24 Aug 27 07:35:21 AM UTC 24 182193301 ps
T36 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3893345796 Aug 27 07:35:18 AM UTC 24 Aug 27 07:35:22 AM UTC 24 500544764 ps
T37 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.2824595312 Aug 27 07:35:21 AM UTC 24 Aug 27 07:35:23 AM UTC 24 242472605 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.3635562449 Aug 27 07:35:21 AM UTC 24 Aug 27 07:35:23 AM UTC 24 186196294 ps
T38 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.2412936730 Aug 27 07:35:22 AM UTC 24 Aug 27 07:35:24 AM UTC 24 152852334 ps
T311 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3524125300 Aug 27 07:35:23 AM UTC 24 Aug 27 07:35:26 AM UTC 24 175852113 ps
T87 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.182716419 Aug 27 07:35:24 AM UTC 24 Aug 27 07:35:27 AM UTC 24 175761012 ps
T76 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1012343349 Aug 27 07:35:24 AM UTC 24 Aug 27 07:35:27 AM UTC 24 226522205 ps
T77 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.3020741846 Aug 27 07:35:25 AM UTC 24 Aug 27 07:35:28 AM UTC 24 190340468 ps
T75 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.163920876 Aug 27 07:35:24 AM UTC 24 Aug 27 07:35:28 AM UTC 24 528220859 ps
T312 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.1132101088 Aug 27 07:35:26 AM UTC 24 Aug 27 07:35:29 AM UTC 24 143302067 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2896437280 Aug 27 07:35:26 AM UTC 24 Aug 27 07:35:29 AM UTC 24 161640284 ps
T90 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2782457256 Aug 27 07:35:27 AM UTC 24 Aug 27 07:35:30 AM UTC 24 187874899 ps
T50 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.875763256 Aug 27 07:35:27 AM UTC 24 Aug 27 07:35:30 AM UTC 24 201323185 ps
T49 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2376989837 Aug 27 07:35:16 AM UTC 24 Aug 27 07:35:31 AM UTC 24 4202493709 ps
T64 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.2535011773 Aug 27 07:35:20 AM UTC 24 Aug 27 07:35:31 AM UTC 24 4867310157 ps
T51 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.1221281994 Aug 27 07:35:29 AM UTC 24 Aug 27 07:35:31 AM UTC 24 245448805 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2890324724 Aug 27 07:35:29 AM UTC 24 Aug 27 07:35:31 AM UTC 24 329300375 ps
T52 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.113424421 Aug 27 07:35:29 AM UTC 24 Aug 27 07:35:31 AM UTC 24 265762349 ps
T105 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.3014199849 Aug 27 07:35:30 AM UTC 24 Aug 27 07:35:32 AM UTC 24 142039012 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2617762337 Aug 27 07:35:30 AM UTC 24 Aug 27 07:35:32 AM UTC 24 230565516 ps
T24 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.277503594 Aug 27 07:35:31 AM UTC 24 Aug 27 07:35:33 AM UTC 24 56247503 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.161452694 Aug 27 07:35:32 AM UTC 24 Aug 27 07:35:35 AM UTC 24 153273396 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.3647335055 Aug 27 07:35:32 AM UTC 24 Aug 27 07:35:35 AM UTC 24 213710791 ps
T163 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.3425274217 Aug 27 07:35:32 AM UTC 24 Aug 27 07:35:35 AM UTC 24 218403348 ps
T313 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.2482288562 Aug 27 07:35:32 AM UTC 24 Aug 27 07:35:35 AM UTC 24 171649198 ps
T7 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.950169819 Aug 27 07:35:13 AM UTC 24 Aug 27 07:35:36 AM UTC 24 9725245773 ps
T8 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3965707304 Aug 27 07:35:13 AM UTC 24 Aug 27 07:35:37 AM UTC 24 14782506862 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3635630415 Aug 27 07:35:36 AM UTC 24 Aug 27 07:35:38 AM UTC 24 142691025 ps
T18 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.3520167522 Aug 27 07:35:36 AM UTC 24 Aug 27 07:35:38 AM UTC 24 161142257 ps
T4 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2368863399 Aug 27 07:35:22 AM UTC 24 Aug 27 07:35:39 AM UTC 24 1779540248 ps
T19 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.3527292534 Aug 27 07:35:36 AM UTC 24 Aug 27 07:35:39 AM UTC 24 364052751 ps
T20 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3899164677 Aug 27 07:35:36 AM UTC 24 Aug 27 07:35:39 AM UTC 24 397077530 ps
T21 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3068217511 Aug 27 07:35:37 AM UTC 24 Aug 27 07:35:39 AM UTC 24 305605140 ps
T22 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.3974062448 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:39 AM UTC 24 12217185808 ps
T23 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.3794216274 Aug 27 07:35:38 AM UTC 24 Aug 27 07:35:40 AM UTC 24 149353749 ps
T65 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.754453698 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:41 AM UTC 24 3434382878 ps
T226 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.655911706 Aug 27 07:35:39 AM UTC 24 Aug 27 07:35:41 AM UTC 24 167723045 ps
T344 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4073781865 Aug 27 07:35:39 AM UTC 24 Aug 27 07:35:41 AM UTC 24 162900961 ps
T327 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.942275285 Aug 27 07:35:39 AM UTC 24 Aug 27 07:35:42 AM UTC 24 248270433 ps
T499 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2334657329 Aug 27 07:35:41 AM UTC 24 Aug 27 07:35:43 AM UTC 24 198383264 ps
T61 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.4271140031 Aug 27 07:35:46 AM UTC 24 Aug 27 07:35:48 AM UTC 24 157823508 ps
T240 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.2322906903 Aug 27 07:35:41 AM UTC 24 Aug 27 07:35:44 AM UTC 24 576127599 ps
T211 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3269540872 Aug 27 07:35:43 AM UTC 24 Aug 27 07:35:46 AM UTC 24 331982864 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2362804151 Aug 27 07:35:44 AM UTC 24 Aug 27 07:35:46 AM UTC 24 86005404 ps
T111 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.743338493 Aug 27 07:35:43 AM UTC 24 Aug 27 07:35:46 AM UTC 24 611579894 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2940618127 Aug 27 07:35:54 AM UTC 24 Aug 27 07:35:58 AM UTC 24 402450071 ps
T116 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1628549505 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:47 AM UTC 24 3875768174 ps
T224 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1211774364 Aug 27 07:35:46 AM UTC 24 Aug 27 07:35:48 AM UTC 24 159007986 ps
T66 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.4181905908 Aug 27 07:35:47 AM UTC 24 Aug 27 07:35:49 AM UTC 24 143991930 ps
T85 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2564440988 Aug 27 07:35:47 AM UTC 24 Aug 27 07:35:49 AM UTC 24 195195478 ps
T117 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.2891712380 Aug 27 07:35:48 AM UTC 24 Aug 27 07:35:51 AM UTC 24 508928860 ps
T9 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2331248258 Aug 27 07:35:14 AM UTC 24 Aug 27 07:35:51 AM UTC 24 25464016174 ps
T98 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.1434538715 Aug 27 07:35:48 AM UTC 24 Aug 27 07:35:52 AM UTC 24 586242730 ps
T68 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3782460590 Aug 27 07:35:50 AM UTC 24 Aug 27 07:35:53 AM UTC 24 139146411 ps
T254 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3216877099 Aug 27 07:35:51 AM UTC 24 Aug 27 07:35:54 AM UTC 24 76269123 ps
T241 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.273649126 Aug 27 07:35:50 AM UTC 24 Aug 27 07:35:54 AM UTC 24 569516949 ps
T229 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2569047009 Aug 27 07:35:15 AM UTC 24 Aug 27 07:35:55 AM UTC 24 5136806140 ps
T121 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.2306570521 Aug 27 07:35:53 AM UTC 24 Aug 27 07:35:55 AM UTC 24 535171640 ps
T5 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1151707391 Aug 27 07:35:22 AM UTC 24 Aug 27 07:35:56 AM UTC 24 3262870341 ps
T162 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.1660096304 Aug 27 07:35:52 AM UTC 24 Aug 27 07:35:58 AM UTC 24 881962859 ps
T6 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.1146390758 Aug 27 07:35:32 AM UTC 24 Aug 27 07:35:58 AM UTC 24 3142543935 ps
T70 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.43461699 Aug 27 07:35:34 AM UTC 24 Aug 27 07:35:59 AM UTC 24 5846489095 ps
T528 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.3242000335 Aug 27 07:35:59 AM UTC 24 Aug 27 07:36:01 AM UTC 24 193815787 ps
T115 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.3732193356 Aug 27 07:35:59 AM UTC 24 Aug 27 07:36:01 AM UTC 24 218879552 ps
T114 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.4042549152 Aug 27 07:35:59 AM UTC 24 Aug 27 07:36:01 AM UTC 24 188233739 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.4182032788 Aug 27 07:35:48 AM UTC 24 Aug 27 07:36:02 AM UTC 24 561184460 ps
T529 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.2744510511 Aug 27 07:36:00 AM UTC 24 Aug 27 07:36:02 AM UTC 24 218603633 ps
T175 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.202095764 Aug 27 07:35:49 AM UTC 24 Aug 27 07:36:03 AM UTC 24 1513395199 ps
T10 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2755506448 Aug 27 07:35:44 AM UTC 24 Aug 27 07:36:04 AM UTC 24 11391752760 ps
T530 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.137127801 Aug 27 07:36:04 AM UTC 24 Aug 27 07:36:06 AM UTC 24 221816117 ps
T531 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1293429854 Aug 27 07:36:04 AM UTC 24 Aug 27 07:36:06 AM UTC 24 248362574 ps
T532 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.435681192 Aug 27 07:36:07 AM UTC 24 Aug 27 07:36:10 AM UTC 24 189266130 ps
T173 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2284480156 Aug 27 07:35:41 AM UTC 24 Aug 27 07:36:12 AM UTC 24 2397114518 ps
T533 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3611535035 Aug 27 07:36:10 AM UTC 24 Aug 27 07:36:13 AM UTC 24 172282380 ps
T71 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.1165832017 Aug 27 07:35:34 AM UTC 24 Aug 27 07:36:15 AM UTC 24 20208929840 ps
T225 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2877945600 Aug 27 07:36:14 AM UTC 24 Aug 27 07:36:16 AM UTC 24 210184467 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.153472251 Aug 27 07:36:14 AM UTC 24 Aug 27 07:36:16 AM UTC 24 167646887 ps
T109 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.3738117701 Aug 27 07:36:02 AM UTC 24 Aug 27 07:36:16 AM UTC 24 4355898886 ps
T534 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1736492377 Aug 27 07:36:16 AM UTC 24 Aug 27 07:36:18 AM UTC 24 198043155 ps
T496 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.838133573 Aug 27 07:36:17 AM UTC 24 Aug 27 07:36:19 AM UTC 24 208727543 ps
T188 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.4221227960 Aug 27 07:36:17 AM UTC 24 Aug 27 07:36:19 AM UTC 24 171332110 ps
T174 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.418058811 Aug 27 07:36:18 AM UTC 24 Aug 27 07:36:21 AM UTC 24 248685458 ps
T110 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2708755016 Aug 27 07:35:18 AM UTC 24 Aug 27 07:36:22 AM UTC 24 6579785114 ps
T171 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.270006934 Aug 27 07:36:19 AM UTC 24 Aug 27 07:36:22 AM UTC 24 224943826 ps
T164 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3157662791 Aug 27 07:36:04 AM UTC 24 Aug 27 07:36:22 AM UTC 24 1665261802 ps
T25 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.907581219 Aug 27 07:36:20 AM UTC 24 Aug 27 07:36:23 AM UTC 24 42973994 ps
T209 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2598486439 Aug 27 07:36:20 AM UTC 24 Aug 27 07:36:23 AM UTC 24 152827943 ps
T535 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.103999171 Aug 27 07:36:23 AM UTC 24 Aug 27 07:36:25 AM UTC 24 184306332 ps
T536 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.989279774 Aug 27 07:36:23 AM UTC 24 Aug 27 07:36:25 AM UTC 24 178519747 ps
T342 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.912387612 Aug 27 07:36:23 AM UTC 24 Aug 27 07:36:25 AM UTC 24 203157502 ps
T537 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2572311607 Aug 27 07:36:23 AM UTC 24 Aug 27 07:36:26 AM UTC 24 207602320 ps
T11 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.764453173 Aug 27 07:35:44 AM UTC 24 Aug 27 07:36:28 AM UTC 24 21358790565 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.1370756732 Aug 27 07:36:05 AM UTC 24 Aug 27 07:36:28 AM UTC 24 2388779583 ps
T12 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1798943465 Aug 27 07:35:44 AM UTC 24 Aug 27 07:36:28 AM UTC 24 24826035930 ps
T176 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.20055628 Aug 27 07:35:21 AM UTC 24 Aug 27 07:36:28 AM UTC 24 5192114301 ps
T78 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.759862211 Aug 27 07:36:27 AM UTC 24 Aug 27 07:36:29 AM UTC 24 153121123 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121733922 Aug 27 07:36:28 AM UTC 24 Aug 27 07:36:31 AM UTC 24 316081289 ps
T80 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.1654642617 Aug 27 07:36:29 AM UTC 24 Aug 27 07:36:32 AM UTC 24 164625525 ps
T538 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.3246419365 Aug 27 07:36:29 AM UTC 24 Aug 27 07:36:32 AM UTC 24 154007824 ps
T189 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2108500411 Aug 27 07:36:29 AM UTC 24 Aug 27 07:36:32 AM UTC 24 232675157 ps
T56 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.737661443 Aug 27 07:36:29 AM UTC 24 Aug 27 07:36:33 AM UTC 24 491024154 ps
T309 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.3573342413 Aug 27 07:36:30 AM UTC 24 Aug 27 07:36:33 AM UTC 24 149860514 ps
T95 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2804364325 Aug 27 07:35:31 AM UTC 24 Aug 27 07:36:34 AM UTC 24 22486524157 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.2764251042 Aug 27 07:36:02 AM UTC 24 Aug 27 07:36:34 AM UTC 24 2455925617 ps
T72 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.848590766 Aug 27 07:35:19 AM UTC 24 Aug 27 07:36:34 AM UTC 24 31483600983 ps
T287 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.819124085 Aug 27 07:36:32 AM UTC 24 Aug 27 07:36:35 AM UTC 24 250681105 ps
T288 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.2414576132 Aug 27 07:36:33 AM UTC 24 Aug 27 07:36:35 AM UTC 24 188482495 ps
T289 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1192920939 Aug 27 07:36:33 AM UTC 24 Aug 27 07:36:35 AM UTC 24 161093566 ps
T290 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.80613649 Aug 27 07:35:21 AM UTC 24 Aug 27 07:36:36 AM UTC 24 2625151992 ps
T291 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.1783852372 Aug 27 07:36:07 AM UTC 24 Aug 27 07:36:37 AM UTC 24 2907808881 ps
T207 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.2973552788 Aug 27 07:36:37 AM UTC 24 Aug 27 07:36:40 AM UTC 24 42395678 ps
T168 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.2730840522 Aug 27 07:35:57 AM UTC 24 Aug 27 07:36:40 AM UTC 24 4138889600 ps
T165 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.3983849736 Aug 27 07:36:36 AM UTC 24 Aug 27 07:36:40 AM UTC 24 636974703 ps
T212 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.1547673183 Aug 27 07:36:36 AM UTC 24 Aug 27 07:36:40 AM UTC 24 870369815 ps
T539 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.3699858731 Aug 27 07:36:34 AM UTC 24 Aug 27 07:36:40 AM UTC 24 1296445252 ps
T122 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.530338800 Aug 27 07:35:17 AM UTC 24 Aug 27 07:36:41 AM UTC 24 3250421408 ps
T540 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.4268959684 Aug 27 07:36:39 AM UTC 24 Aug 27 07:36:41 AM UTC 24 225254760 ps
T191 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2537963366 Aug 27 07:36:02 AM UTC 24 Aug 27 07:36:43 AM UTC 24 4515103618 ps
T62 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.3265253602 Aug 27 07:36:41 AM UTC 24 Aug 27 07:36:44 AM UTC 24 152851217 ps
T86 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1456643620 Aug 27 07:36:41 AM UTC 24 Aug 27 07:36:44 AM UTC 24 148098481 ps
T67 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.3398686443 Aug 27 07:36:41 AM UTC 24 Aug 27 07:36:44 AM UTC 24 147882514 ps
T541 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1340271449 Aug 27 07:36:41 AM UTC 24 Aug 27 07:36:44 AM UTC 24 385938644 ps
T120 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.3057191751 Aug 27 07:36:41 AM UTC 24 Aug 27 07:36:45 AM UTC 24 523167012 ps
T542 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_enable.226786113 Aug 27 07:36:45 AM UTC 24 Aug 27 07:36:47 AM UTC 24 75773286 ps
T69 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1811622028 Aug 27 07:36:45 AM UTC 24 Aug 27 07:36:48 AM UTC 24 187687363 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.659990183 Aug 27 07:36:45 AM UTC 24 Aug 27 07:36:49 AM UTC 24 687261968 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.2683549767 Aug 27 07:36:46 AM UTC 24 Aug 27 07:36:50 AM UTC 24 531080071 ps
T543 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.533499579 Aug 27 07:36:45 AM UTC 24 Aug 27 07:36:51 AM UTC 24 904134426 ps
T99 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1311249546 Aug 27 07:36:27 AM UTC 24 Aug 27 07:36:53 AM UTC 24 20160727908 ps
T205 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.2213639254 Aug 27 07:36:49 AM UTC 24 Aug 27 07:36:53 AM UTC 24 330762658 ps
T166 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.3889712016 Aug 27 07:36:24 AM UTC 24 Aug 27 07:36:55 AM UTC 24 5809051008 ps
T544 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1905065091 Aug 27 07:36:44 AM UTC 24 Aug 27 07:36:56 AM UTC 24 558309586 ps
T545 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3672182666 Aug 27 07:36:55 AM UTC 24 Aug 27 07:36:58 AM UTC 24 306460235 ps
T546 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3917167099 Aug 27 07:36:57 AM UTC 24 Aug 27 07:36:59 AM UTC 24 140391621 ps
T255 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.4006195523 Aug 27 07:36:22 AM UTC 24 Aug 27 07:36:59 AM UTC 24 11464612109 ps
T259 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3633493924 Aug 27 07:36:57 AM UTC 24 Aug 27 07:36:59 AM UTC 24 221129426 ps
T260 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.2949832517 Aug 27 07:35:22 AM UTC 24 Aug 27 07:36:59 AM UTC 24 3259472594 ps
T13 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3148459100 Aug 27 07:36:37 AM UTC 24 Aug 27 07:36:59 AM UTC 24 9545713376 ps
T261 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.990025000 Aug 27 07:36:33 AM UTC 24 Aug 27 07:37:02 AM UTC 24 2017703296 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2186328125 Aug 27 07:35:48 AM UTC 24 Aug 27 07:37:03 AM UTC 24 37565217395 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.767430838 Aug 27 07:37:00 AM UTC 24 Aug 27 07:37:03 AM UTC 24 207981916 ps
T73 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2871173392 Aug 27 07:36:01 AM UTC 24 Aug 27 07:37:04 AM UTC 24 32705874366 ps
T169 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.1443138146 Aug 27 07:35:33 AM UTC 24 Aug 27 07:37:05 AM UTC 24 5953195425 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3379548609 Aug 27 07:37:03 AM UTC 24 Aug 27 07:37:05 AM UTC 24 236349270 ps
T547 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.1813625041 Aug 27 07:37:04 AM UTC 24 Aug 27 07:37:07 AM UTC 24 194721325 ps
T81 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1687273481 Aug 27 07:35:42 AM UTC 24 Aug 27 07:37:08 AM UTC 24 12008648836 ps
T548 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.1551124298 Aug 27 07:37:07 AM UTC 24 Aug 27 07:37:09 AM UTC 24 207511950 ps
T549 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3283592309 Aug 27 07:37:08 AM UTC 24 Aug 27 07:37:10 AM UTC 24 146907164 ps
T147 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.1101812848 Aug 27 07:37:09 AM UTC 24 Aug 27 07:37:12 AM UTC 24 208226855 ps
T550 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.2211631075 Aug 27 07:37:01 AM UTC 24 Aug 27 07:37:13 AM UTC 24 3891403992 ps
T551 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2163236680 Aug 27 07:37:10 AM UTC 24 Aug 27 07:37:13 AM UTC 24 161409786 ps
T552 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3959332865 Aug 27 07:37:11 AM UTC 24 Aug 27 07:37:14 AM UTC 24 182733455 ps
T553 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1123045894 Aug 27 07:36:43 AM UTC 24 Aug 27 07:37:14 AM UTC 24 3425920516 ps
T194 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.2057711917 Aug 27 07:35:39 AM UTC 24 Aug 27 07:37:15 AM UTC 24 3136312474 ps
T497 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.2811517484 Aug 27 07:37:13 AM UTC 24 Aug 27 07:37:15 AM UTC 24 173326065 ps
T83 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3549550103 Aug 27 07:36:36 AM UTC 24 Aug 27 07:37:15 AM UTC 24 3777333483 ps
T179 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.1013582729 Aug 27 07:37:14 AM UTC 24 Aug 27 07:37:17 AM UTC 24 202284088 ps
T554 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.3327939113 Aug 27 07:37:14 AM UTC 24 Aug 27 07:37:17 AM UTC 24 205047721 ps
T210 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.3428924137 Aug 27 07:37:15 AM UTC 24 Aug 27 07:37:18 AM UTC 24 150369324 ps
T14 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2203668324 Aug 27 07:36:39 AM UTC 24 Aug 27 07:37:18 AM UTC 24 25535090068 ps
T555 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.1209721915 Aug 27 07:37:15 AM UTC 24 Aug 27 07:37:18 AM UTC 24 225702876 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3708109805 Aug 27 07:37:16 AM UTC 24 Aug 27 07:37:19 AM UTC 24 41047307 ps
T343 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.2254575816 Aug 27 07:37:16 AM UTC 24 Aug 27 07:37:19 AM UTC 24 158120639 ps
T556 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3796358722 Aug 27 07:37:18 AM UTC 24 Aug 27 07:37:20 AM UTC 24 252109760 ps
T329 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1073756016 Aug 27 07:35:16 AM UTC 24 Aug 27 07:38:08 AM UTC 24 100208214499 ps
T557 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.1705706419 Aug 27 07:37:18 AM UTC 24 Aug 27 07:37:21 AM UTC 24 210599647 ps
T558 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.3136928897 Aug 27 07:37:47 AM UTC 24 Aug 27 07:38:11 AM UTC 24 1147222493 ps
T15 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3601398859 Aug 27 07:36:37 AM UTC 24 Aug 27 07:37:21 AM UTC 24 19268710758 ps
T559 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2831495845 Aug 27 07:37:19 AM UTC 24 Aug 27 07:37:21 AM UTC 24 161805046 ps
T82 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.4208583360 Aug 27 07:37:21 AM UTC 24 Aug 27 07:37:24 AM UTC 24 158417386 ps
T79 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.2124615966 Aug 27 07:37:21 AM UTC 24 Aug 27 07:37:24 AM UTC 24 164271251 ps
T57 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.3980325917 Aug 27 07:37:21 AM UTC 24 Aug 27 07:37:24 AM UTC 24 320639446 ps
T560 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3870407238 Aug 27 07:36:26 AM UTC 24 Aug 27 07:37:26 AM UTC 24 2151913859 ps
T58 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2075257018 Aug 27 07:37:23 AM UTC 24 Aug 27 07:37:26 AM UTC 24 492251336 ps
T561 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.2462714146 Aug 27 07:37:25 AM UTC 24 Aug 27 07:37:27 AM UTC 24 148878238 ps
T181 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.4053019261 Aug 27 07:37:25 AM UTC 24 Aug 27 07:37:28 AM UTC 24 199769705 ps
T310 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1558888159 Aug 27 07:37:26 AM UTC 24 Aug 27 07:37:29 AM UTC 24 210082330 ps
T562 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.4137921754 Aug 27 07:37:27 AM UTC 24 Aug 27 07:37:30 AM UTC 24 248454550 ps
T501 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.1337674389 Aug 27 07:37:28 AM UTC 24 Aug 27 07:37:31 AM UTC 24 172174676 ps
T563 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.985844377 Aug 27 07:37:28 AM UTC 24 Aug 27 07:37:31 AM UTC 24 223491114 ps
T564 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.3084027698 Aug 27 07:37:05 AM UTC 24 Aug 27 07:37:32 AM UTC 24 2662117146 ps
T170 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3494423014 Aug 27 07:37:34 AM UTC 24 Aug 27 07:37:37 AM UTC 24 436993804 ps
T221 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.2128119253 Aug 27 07:37:35 AM UTC 24 Aug 27 07:37:38 AM UTC 24 322720844 ps
T565 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.46126152 Aug 27 07:37:32 AM UTC 24 Aug 27 07:37:39 AM UTC 24 1357165687 ps
T208 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.2208337117 Aug 27 07:37:37 AM UTC 24 Aug 27 07:37:39 AM UTC 24 116175967 ps
T330 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1383509795 Aug 27 07:35:16 AM UTC 24 Aug 27 07:37:42 AM UTC 24 85175117438 ps
T566 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2075910432 Aug 27 07:37:41 AM UTC 24 Aug 27 07:37:43 AM UTC 24 158503921 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3517720935 Aug 27 07:37:43 AM UTC 24 Aug 27 07:37:45 AM UTC 24 144942932 ps
T63 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.114193078 Aug 27 07:37:43 AM UTC 24 Aug 27 07:37:45 AM UTC 24 169384498 ps
T96 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2033428010 Aug 27 07:36:00 AM UTC 24 Aug 27 07:37:45 AM UTC 24 12777764685 ps
T567 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2402714551 Aug 27 07:37:44 AM UTC 24 Aug 27 07:37:46 AM UTC 24 139968970 ps
T227 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.2655694346 Aug 27 07:37:06 AM UTC 24 Aug 27 07:37:47 AM UTC 24 3286560097 ps
T74 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2903371022 Aug 27 07:37:00 AM UTC 24 Aug 27 07:37:47 AM UTC 24 29181802289 ps
T568 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.24741503 Aug 27 07:37:46 AM UTC 24 Aug 27 07:37:49 AM UTC 24 413640569 ps
T569 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.20303871 Aug 27 07:37:46 AM UTC 24 Aug 27 07:37:49 AM UTC 24 402633941 ps
T570 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.43169079 Aug 27 07:37:49 AM UTC 24 Aug 27 07:37:51 AM UTC 24 142134605 ps
T571 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1738936880 Aug 27 07:35:16 AM UTC 24 Aug 27 07:37:51 AM UTC 24 88103348252 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3535186433 Aug 27 07:37:38 AM UTC 24 Aug 27 07:37:51 AM UTC 24 8956977657 ps
T572 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_enable.512741374 Aug 27 07:37:50 AM UTC 24 Aug 27 07:37:52 AM UTC 24 33614849 ps
T345 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.2311483967 Aug 27 07:37:49 AM UTC 24 Aug 27 07:37:52 AM UTC 24 678038968 ps
T492 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.2400300496 Aug 27 07:37:53 AM UTC 24 Aug 27 07:37:55 AM UTC 24 331041543 ps
T521 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.1164514886 Aug 27 07:37:51 AM UTC 24 Aug 27 07:37:55 AM UTC 24 821575117 ps
T573 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.2257699345 Aug 27 07:36:27 AM UTC 24 Aug 27 07:37:56 AM UTC 24 6652488403 ps
T292 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.1137948492 Aug 27 07:37:16 AM UTC 24 Aug 27 07:37:56 AM UTC 24 9841180076 ps
T574 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.4228455704 Aug 27 07:37:19 AM UTC 24 Aug 27 07:37:56 AM UTC 24 6260238076 ps
T575 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.231257045 Aug 27 07:37:53 AM UTC 24 Aug 27 07:37:56 AM UTC 24 291117476 ps
T576 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.2173906900 Aug 27 07:36:34 AM UTC 24 Aug 27 07:37:58 AM UTC 24 2853282078 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.101725808 Aug 27 07:37:01 AM UTC 24 Aug 27 07:37:58 AM UTC 24 5787187483 ps
T577 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.3268149335 Aug 27 07:38:10 AM UTC 24 Aug 27 07:38:12 AM UTC 24 171156726 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3829478223 Aug 27 07:36:43 AM UTC 24 Aug 27 07:37:59 AM UTC 24 34730043406 ps
T101 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3472053563 Aug 27 07:37:40 AM UTC 24 Aug 27 07:38:00 AM UTC 24 14265248682 ps
T578 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.1564810882 Aug 27 07:37:58 AM UTC 24 Aug 27 07:38:00 AM UTC 24 203107825 ps
T579 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.1078023171 Aug 27 07:37:58 AM UTC 24 Aug 27 07:38:00 AM UTC 24 251599950 ps
T580 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.1113572318 Aug 27 07:37:58 AM UTC 24 Aug 27 07:38:01 AM UTC 24 212109263 ps
T581 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.512691463 Aug 27 07:37:27 AM UTC 24 Aug 27 07:38:01 AM UTC 24 3330068942 ps
T582 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1648518805 Aug 27 07:37:59 AM UTC 24 Aug 27 07:38:02 AM UTC 24 212771661 ps
T583 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.1870529304 Aug 27 07:38:02 AM UTC 24 Aug 27 07:38:04 AM UTC 24 184153378 ps
T584 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1870360130 Aug 27 07:38:02 AM UTC 24 Aug 27 07:38:05 AM UTC 24 245726927 ps
T585 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.4066204312 Aug 27 07:36:59 AM UTC 24 Aug 27 07:38:05 AM UTC 24 10101356139 ps
T100 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.4119512595 Aug 27 07:37:20 AM UTC 24 Aug 27 07:38:07 AM UTC 24 20158285483 ps
T586 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.1845661760 Aug 27 07:38:07 AM UTC 24 Aug 27 07:38:09 AM UTC 24 155258090 ps
T587 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3690469163 Aug 27 07:38:08 AM UTC 24 Aug 27 07:38:11 AM UTC 24 199745359 ps
T84 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.3061244640 Aug 27 07:37:33 AM UTC 24 Aug 27 07:38:12 AM UTC 24 8077805139 ps
T157 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1988406550 Aug 27 07:38:10 AM UTC 24 Aug 27 07:38:12 AM UTC 24 206687271 ps
T588 /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2805531974 Aug 27 07:38:12 AM UTC 24 Aug 27 07:38:14 AM UTC 24 163285337 ps
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