| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | GROUP |
| 96.54 | 98.11 | 96.01 | 97.44 | 94.92 | 98.30 | 98.17 | 92.85 |
| T3569 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.993800694 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 397962210 ps | ||
| T3570 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.1345749197 | Aug 27 07:56:10 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 632486737 ps | ||
| T3571 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.275189335 | Aug 27 07:56:03 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 528575657 ps | ||
| T3572 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.3520942944 | Aug 27 07:56:03 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 467964013 ps | ||
| T3573 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3048548238 | Aug 27 07:56:03 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 512146718 ps | ||
| T3574 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.4061677733 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 477238449 ps | ||
| T3575 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.4258654911 | Aug 27 07:56:03 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 524438687 ps | ||
| T3576 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.3783831239 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 510523414 ps | ||
| T3577 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.529144396 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 504917504 ps | ||
| T3578 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.1297664697 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 513538719 ps | ||
| T3579 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2033278594 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:13 AM UTC 24 | 628319279 ps | ||
| T3580 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.1143936516 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 584350596 ps | ||
| T3581 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.3255247295 | Aug 27 07:56:11 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 478683333 ps | ||
| T3582 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.787815236 | Aug 27 07:56:11 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 523984070 ps | ||
| T3583 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.2622205214 | Aug 27 07:56:11 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 527785922 ps | ||
| T3584 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.649929462 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 508301300 ps | ||
| T3585 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.2227666235 | Aug 27 07:56:11 AM UTC 24 | Aug 27 07:56:14 AM UTC 24 | 638933867 ps | ||
| T3586 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2223274074 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 433376062 ps | ||
| T3587 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.3271085972 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 464631210 ps | ||
| T3588 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2015638826 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 612129169 ps | ||
| T3589 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.2711080099 | Aug 27 07:56:04 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 629534821 ps | ||
| T3590 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.2460823035 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 551927791 ps | ||
| T3591 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.6989195 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 461244379 ps | ||
| T3592 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.2497025315 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:17 AM UTC 24 | 567179895 ps | ||
| T3593 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.622673589 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 603625501 ps | ||
| T3594 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.2260727217 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 677111790 ps | ||
| T3595 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3351682498 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 505409315 ps | ||
| T3596 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3965049895 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 531480809 ps | ||
| T3597 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.2470534613 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 638991927 ps | ||
| T3598 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.1191252152 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 538172334 ps | ||
| T3599 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1018736286 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 482571447 ps | ||
| T3600 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.3079131574 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 508277807 ps | ||
| T3601 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2587499759 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 506827059 ps | ||
| T3602 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.1873881585 | Aug 27 07:55:55 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 606079647 ps | ||
| T3603 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.264564831 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 602464252 ps | ||
| T3604 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.3054617472 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 518105044 ps | ||
| T3605 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2162173486 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 570182830 ps | ||
| T3606 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.2032983044 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 548145982 ps | ||
| T3607 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.1534915477 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 618689129 ps | ||
| T3608 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.349414767 | Aug 27 07:56:15 AM UTC 24 | Aug 27 07:56:18 AM UTC 24 | 638596161 ps | ||
| T3609 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3832259362 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 486621723 ps | ||
| T3610 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.3342299583 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 471156022 ps | ||
| T3611 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.1825958230 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 470890365 ps | ||
| T3612 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.2548380252 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 523442804 ps | ||
| T3613 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.819715666 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 509552294 ps | ||
| T3614 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.820113086 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 471241047 ps | ||
| T3615 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1983585145 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 591527093 ps | ||
| T3616 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.669032424 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 501113144 ps | ||
| T3617 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.2885763921 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 468416611 ps | ||
| T3618 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.926490430 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 642950645 ps | ||
| T3619 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.61837121 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 461921276 ps | ||
| T3620 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3606403420 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 581165090 ps | ||
| T3621 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.1192735190 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 559015407 ps | ||
| T3622 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.1408801380 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 607499327 ps | ||
| T3623 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.3775948621 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 515020388 ps | ||
| T3624 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1511228947 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 520118614 ps | ||
| T3625 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.2100476769 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 609156765 ps | ||
| T3626 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3109939046 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 653030315 ps | ||
| T3627 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.1834067983 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 612148203 ps | ||
| T3628 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.618248206 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 493294678 ps | ||
| T3629 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3518359752 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 640866649 ps | ||
| T3630 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2209101558 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:23 AM UTC 24 | 642183077 ps | ||
| T524 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.1377262276 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:23 AM UTC 24 | 523353726 ps | ||
| T3631 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.4118021269 | Aug 27 07:56:16 AM UTC 24 | Aug 27 07:56:23 AM UTC 24 | 666278432 ps | ||
| T217 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1058529431 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 51154919 ps | ||
| T244 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1526783794 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 74095548 ps | ||
| T231 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.2348646343 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:21 AM UTC 24 | 72064436 ps | ||
| T269 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.3925588158 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 67546012 ps | ||
| T218 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.4051198194 | Aug 27 07:56:20 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 51197756 ps | ||
| T232 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.660696249 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 122747818 ps | ||
| T213 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3944179489 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 143137609 ps | ||
| T270 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.392108777 | Aug 27 07:56:20 AM UTC 24 | Aug 27 07:56:22 AM UTC 24 | 160835560 ps | ||
| T214 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2999387056 | Aug 27 07:56:20 AM UTC 24 | Aug 27 07:56:23 AM UTC 24 | 72015010 ps | ||
| T215 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3819982481 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:23 AM UTC 24 | 142038932 ps | ||
| T233 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.77010169 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:24 AM UTC 24 | 427158120 ps | ||
| T3632 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1240330721 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:24 AM UTC 24 | 176558429 ps | ||
| T230 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.1490563372 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:25 AM UTC 24 | 665657949 ps | ||
| T271 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3622615329 | Aug 27 07:56:19 AM UTC 24 | Aug 27 07:56:25 AM UTC 24 | 694025154 ps | ||
| T3633 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3090763305 | Aug 27 07:56:20 AM UTC 24 | Aug 27 07:56:25 AM UTC 24 | 485963152 ps | ||
| T242 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2941262271 | Aug 27 07:56:20 AM UTC 24 | Aug 27 07:56:27 AM UTC 24 | 2643240477 ps | ||
| T282 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3966565142 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:29 AM UTC 24 | 53819653 ps | ||
| T3634 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.2973067017 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:29 AM UTC 24 | 55699395 ps | ||
| T283 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.1686932440 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:29 AM UTC 24 | 172753889 ps | ||
| T245 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3146281070 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:30 AM UTC 24 | 146530945 ps | ||
| T256 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2378923299 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:30 AM UTC 24 | 160082627 ps | ||
| T219 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.581983420 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:30 AM UTC 24 | 54829434 ps | ||
| T220 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2034802457 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:30 AM UTC 24 | 89349647 ps | ||
| T272 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3880325765 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:30 AM UTC 24 | 113201522 ps | ||
| T333 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3429194423 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 90225039 ps | ||
| T284 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.198969816 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 67572977 ps | ||
| T273 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2283618801 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 84676229 ps | ||
| T257 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2643627022 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 56687153 ps | ||
| T285 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1549130320 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 256786148 ps | ||
| T274 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2120613287 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 114475571 ps | ||
| T275 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.909896884 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 78756065 ps | ||
| T294 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2833458479 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 186686832 ps | ||
| T243 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2700552875 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:31 AM UTC 24 | 342851542 ps | ||
| T276 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.1207353966 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:32 AM UTC 24 | 437934024 ps | ||
| T249 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4133397883 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:32 AM UTC 24 | 245286325 ps | ||
| T277 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2928240833 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:32 AM UTC 24 | 714320574 ps | ||
| T278 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.317612796 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:33 AM UTC 24 | 119631059 ps | ||
| T514 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3048614596 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:33 AM UTC 24 | 1227158900 ps | ||
| T3635 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3407261836 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:34 AM UTC 24 | 777082864 ps | ||
| T3636 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3495549706 | Aug 27 07:56:27 AM UTC 24 | Aug 27 07:56:34 AM UTC 24 | 434207257 ps | ||
| T3637 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3295644730 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:34 AM UTC 24 | 482838232 ps | ||
| T3638 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1711462206 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:34 AM UTC 24 | 412472795 ps | ||
| T286 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.1104323269 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:35 AM UTC 24 | 151204380 ps | ||
| T334 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.411601192 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 74687353 ps | ||
| T338 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.4214637866 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 60302127 ps | ||
| T279 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3809095714 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 105597088 ps | ||
| T3639 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3872401163 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 77195552 ps | ||
| T247 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.359614583 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 172031706 ps | ||
| T258 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.3813891088 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 67576477 ps | ||
| T251 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2348480408 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:36 AM UTC 24 | 154066792 ps | ||
| T3640 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3226547046 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:37 AM UTC 24 | 95745902 ps | ||
| T246 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1158198642 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:38 AM UTC 24 | 316790437 ps | ||
| T512 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2827951123 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:39 AM UTC 24 | 1346498821 ps | ||
| T280 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1411029879 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 68287514 ps | ||
| T3641 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.51439302 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:46 AM UTC 24 | 88032280 ps | ||
| T3642 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.580834908 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:46 AM UTC 24 | 59729868 ps | ||
| T3643 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2324611961 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:46 AM UTC 24 | 48518777 ps | ||
| T250 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3004263420 | Aug 27 07:56:44 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 64330205 ps | ||
| T252 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2380586104 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 145427309 ps | ||
| T335 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.1722273394 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 48320006 ps | ||
| T336 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2884772180 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 48523389 ps | ||
| T299 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2698075450 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 46714882 ps | ||
| T3644 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2086607650 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 49876017 ps | ||
| T281 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.415611563 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 76667631 ps | ||
| T513 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1213737369 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:47 AM UTC 24 | 343624804 ps | ||
| T3645 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.1587908157 | Aug 27 07:56:29 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 49860265 ps | ||
| T3646 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.882829473 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 298083310 ps | ||
| T339 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1170990911 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 35355584 ps | ||
| T3647 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1186862269 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 51011733 ps | ||
| T295 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.4043153109 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 97600889 ps | ||
| T3648 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1979059846 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 88387574 ps | ||
| T300 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3745455283 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 31998974 ps | ||
| T296 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3583884007 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 96605286 ps | ||
| T3649 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2710387818 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 74216386 ps | ||
| T337 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1692052247 | Aug 27 07:56:29 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 46663451 ps | ||
| T297 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.889523306 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 222755519 ps | ||
| T340 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.101538364 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 42850542 ps | ||
| T3650 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3684920652 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 136495048 ps | ||
| T3651 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.285461237 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 40114754 ps | ||
| T3652 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.566782432 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:48 AM UTC 24 | 141832169 ps | ||
| T3653 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.351061527 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 92543776 ps | ||
| T3654 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3731211494 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 60341319 ps | ||
| T3655 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3706694359 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 112530455 ps | ||
| T3656 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3745314023 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 88264567 ps | ||
| T3657 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3323957851 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 115508402 ps | ||
| T3658 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2126214579 | Aug 27 07:56:29 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 291102665 ps | ||
| T3659 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.97470607 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 134231396 ps | ||
| T248 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2457503398 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 104632622 ps | ||
| T3660 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3279977163 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 204204066 ps | ||
| T298 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.1543616366 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 152531423 ps | ||
| T3661 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.627168851 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 322426664 ps | ||
| T3662 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.2592307537 | Aug 27 07:56:47 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 33361250 ps | ||
| T3663 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2332198229 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 94521999 ps | ||
| T3664 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1330541558 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 138102885 ps | ||
| T253 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2976905856 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 124894247 ps | ||
| T3665 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2812605510 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 140982214 ps | ||
| T3666 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2316851801 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 95664139 ps | ||
| T3667 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.182992928 | Aug 27 07:56:47 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 80341355 ps | ||
| T3668 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.637879391 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:49 AM UTC 24 | 97540721 ps | ||
| T3669 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3735139623 | Aug 27 07:56:29 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 266185066 ps | ||
| T3670 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.3095691707 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 989717733 ps | ||
| T516 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1992793153 | Aug 27 07:56:29 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 712927709 ps | ||
| T3671 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3109547711 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 262439639 ps | ||
| T3672 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.1488696853 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 79071736 ps | ||
| T3673 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3920421499 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 403047056 ps | ||
| T301 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3773702923 | Aug 27 07:56:33 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 1220604071 ps | ||
| T3674 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1310768547 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 325805631 ps | ||
| T3675 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.320990816 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 178646081 ps | ||
| T3676 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1045092307 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:50 AM UTC 24 | 115008023 ps | ||
| T3677 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.434034730 | Aug 27 07:56:47 AM UTC 24 | Aug 27 07:56:51 AM UTC 24 | 406726000 ps | ||
| T511 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1241172389 | Aug 27 07:56:43 AM UTC 24 | Aug 27 07:56:51 AM UTC 24 | 552853195 ps | ||
| T3678 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2403075266 | Aug 27 07:56:42 AM UTC 24 | Aug 27 07:56:51 AM UTC 24 | 715946858 ps | ||
| T3679 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1593372106 | Aug 27 07:56:28 AM UTC 24 | Aug 27 07:56:51 AM UTC 24 | 596137549 ps | ||
| T3680 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.4122526185 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:11 AM UTC 24 | 57380237 ps | ||
| T3681 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3032985425 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:11 AM UTC 24 | 134326784 ps | ||
| T3682 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.320232818 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 136198822 ps | ||
| T3683 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.507238970 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 157544865 ps | ||
| T3684 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3534443453 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 41226961 ps | ||
| T3685 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.4286744903 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 31973003 ps | ||
| T3686 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2570041952 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 208339504 ps | ||
| T3687 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2812266213 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 355593449 ps | ||
| T3688 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2930744688 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 31881507 ps | ||
| T3689 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1429351408 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 59943649 ps | ||
| T3690 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1454663467 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 38712911 ps | ||
| T515 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.627197980 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 865855916 ps | ||
| T3691 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.715202847 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 31139998 ps | ||
| T3692 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2734408933 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 82559245 ps | ||
| T3693 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3115370965 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:12 AM UTC 24 | 45616955 ps | ||
| T3694 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3255461236 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 47224779 ps | ||
| T3695 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.2025520130 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 82020559 ps | ||
| T3696 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3049664174 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 45055293 ps | ||
| T3697 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2578347291 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 45269141 ps | ||
| T3698 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.820401227 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 44029974 ps | ||
| T3699 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.3855682534 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 44015170 ps | ||
| T3700 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.4037803000 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 42496456 ps | ||
| T3701 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.1086003898 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 36322716 ps | ||
| T3702 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2556417998 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 52058088 ps | ||
| T3703 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2442296726 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 34527177 ps | ||
| T3704 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.62933937 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 57396497 ps | ||
| T3705 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.904256286 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 49894600 ps | ||
| T3706 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1933242810 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 59617745 ps | ||
| T3707 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3890060249 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 85220896 ps | ||
| T3708 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3270519081 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 135174952 ps | ||
| T3709 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2996848984 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 53628197 ps | ||
| T3710 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.454853005 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 86235627 ps | ||
| T3711 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2137281892 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 82934115 ps | ||
| T3712 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1109119542 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 70586385 ps | ||
| T3713 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2219249426 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 81589479 ps | ||
| T3714 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1357427031 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 68965411 ps | ||
| T3715 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.714172897 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 292853341 ps | ||
| T3716 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3396792711 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 62625783 ps | ||
| T3717 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2073711705 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 159202657 ps | ||
| T3718 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3492024267 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 166999694 ps | ||
| T3719 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.3407061112 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 103977329 ps | ||
| T3720 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1127890527 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:13 AM UTC 24 | 320051479 ps | ||
| T3721 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1872468732 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 102419676 ps | ||
| T3722 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2384702029 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 302541183 ps | ||
| T3723 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.24691303 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 92312216 ps | ||
| T517 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2481261259 | Aug 27 07:57:08 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 307358153 ps | ||
| T3724 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2380575483 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 186877547 ps | ||
| T3725 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2150596855 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:14 AM UTC 24 | 273395519 ps | ||
| T3726 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2868151676 | Aug 27 07:57:09 AM UTC 24 | Aug 27 07:57:16 AM UTC 24 | 1231657405 ps | ||
| T3727 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3882037838 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 94461843 ps | ||
| T3728 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.44080272 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 44336261 ps | ||
| T3729 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2163977298 | Aug 27 07:58:42 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 98752112 ps | ||
| T3730 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2907553736 | Aug 27 07:58:42 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 117077045 ps | ||
| T3731 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.607213441 | Aug 27 07:58:42 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 66413135 ps | ||
| T3732 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2070201049 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 84829285 ps | ||
| T3733 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.240396726 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 37603197 ps | ||
| T3734 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1668405542 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 33569758 ps | ||
| T3735 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.293237026 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 47589087 ps | ||
| T3736 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.51356674 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:44 AM UTC 24 | 40171017 ps | ||
| T3737 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.4030810966 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:45 AM UTC 24 | 42397494 ps | ||
| T3738 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.838614878 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:45 AM UTC 24 | 38830009 ps | ||
| T3739 | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2609728666 | Aug 27 07:58:43 AM UTC 24 | Aug 27 07:58:45 AM UTC 24 | 61656851 ps |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_restore.3867416082 |
| Short name | T29 |
| Test name | |
| Test status | |
| Simulation time | 947431976 ps |
| CPU time | 3.54 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:19 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3867416082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_data_toggle_restore.3867416082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disable_endpoint.2116161600 |
| Short name | T40 |
| Test name | |
| Test status | |
| Simulation time | 498632583 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2116161600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_disable_endpoint.2116161600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_resume.2331248258 |
| Short name | T9 |
| Test name | |
| Test status | |
| Simulation time | 25464016174 ps |
| CPU time | 36.18 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:51 AM UTC 24 |
| Peak memory | 228384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331248258 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_resume.2331248258 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_device_address.3974062448 |
| Short name | T22 |
| Test name | |
| Test status | |
| Simulation time | 12217185808 ps |
| CPU time | 23.94 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:39 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3974062448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_address.3974062448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_intr_test.4051198194 |
| Short name | T218 |
| Test name | |
| Test status | |
| Simulation time | 51197756 ps |
| CPU time | 0.78 seconds |
| Started | Aug 27 07:56:20 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051198194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_intr_test.4051198194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_access.3199334671 |
| Short name | T31 |
| Test name | |
| Test status | |
| Simulation time | 819708417 ps |
| CPU time | 3.05 seconds |
| Started | Aug 27 07:35:15 AM UTC 24 |
| Finished | Aug 27 07:35:20 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199334671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_access.3199334671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_host_lost.2376989837 |
| Short name | T49 |
| Test name | |
| Test status | |
| Simulation time | 4202493709 ps |
| CPU time | 13.97 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:35:31 AM UTC 24 |
| Peak memory | 218324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2376989837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_host_lost_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_host_lost.2376989837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_host_lost/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_low_speed_traffic.20055628 |
| Short name | T176 |
| Test name | |
| Test status | |
| Simulation time | 5192114301 ps |
| CPU time | 66.14 seconds |
| Started | Aug 27 07:35:21 AM UTC 24 |
| Finished | Aug 27 07:36:28 AM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=20055628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_low_speed_traffic.20055628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_intg_err.1490563372 |
| Short name | T230 |
| Test name | |
| Test status | |
| Simulation time | 665657949 ps |
| CPU time | 4.03 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:25 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490563372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_intg_err.1490563372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_link_resume.3509649320 |
| Short name | T103 |
| Test name | |
| Test status | |
| Simulation time | 23487763811 ps |
| CPU time | 34.8 seconds |
| Started | Aug 27 07:38:01 AM UTC 24 |
| Finished | Aug 27 07:38:37 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509649320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_resume.3509649320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_disconnect.2755506448 |
| Short name | T10 |
| Test name | |
| Test status | |
| Simulation time | 11391752760 ps |
| CPU time | 18.22 seconds |
| Started | Aug 27 07:35:44 AM UTC 24 |
| Finished | Aug 27 07:36:04 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2755506448 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_disconnect.2755506448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_osc_test_mode.2890324724 |
| Short name | T196 |
| Test name | |
| Test status | |
| Simulation time | 329300375 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:35:29 AM UTC 24 |
| Finished | Aug 27 07:35:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2890324724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_tx_osc_test _mode_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_osc_test_mode.2890324724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_tx_osc_test_mode/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_sec_cm.3269540872 |
| Short name | T211 |
| Test name | |
| Test status | |
| Simulation time | 331982864 ps |
| CPU time | 2.03 seconds |
| Started | Aug 27 07:35:43 AM UTC 24 |
| Finished | Aug 27 07:35:46 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269540872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_sec_cm.3269540872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stress_usb_traffic.1687273481 |
| Short name | T81 |
| Test name | |
| Test status | |
| Simulation time | 12008648836 ps |
| CPU time | 84.08 seconds |
| Started | Aug 27 07:35:42 AM UTC 24 |
| Finished | Aug 27 07:37:08 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687273481 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stress_usb_traffic.1687273481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_mem_rw_with_rand_reset.359614583 |
| Short name | T247 |
| Test name | |
| Test status | |
| Simulation time | 172031706 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=359614583 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_mem_rw_with_rand_reset.359614583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_phy_pins_sense.3480355938 |
| Short name | T44 |
| Test name | |
| Test status | |
| Simulation time | 38558572 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:39:25 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480355938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_pins_sense.3480355938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_intr_test.1722273394 |
| Short name | T335 |
| Test name | |
| Test status | |
| Simulation time | 48320006 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722273394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_intr_test.1722273394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_tx_rx_disruption.4261345279 |
| Short name | T200 |
| Test name | |
| Test status | |
| Simulation time | 532544230 ps |
| CPU time | 2.05 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:42 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4261345279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_t x_rx_disruption.4261345279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_link_resume.2870128219 |
| Short name | T1153 |
| Test name | |
| Test status | |
| Simulation time | 32003022127 ps |
| CPU time | 61.12 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:43:53 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2870128219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_link_resume.2870128219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/111.usbdev_tx_rx_disruption.19686943 |
| Short name | T127 |
| Test name | |
| Test status | |
| Simulation time | 570896483 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=19686943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 111.usbdev_tx _rx_disruption.19686943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/111.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_device_address.1415237796 |
| Short name | T391 |
| Test name | |
| Test status | |
| Simulation time | 34887784205 ps |
| CPU time | 67.77 seconds |
| Started | Aug 27 07:39:40 AM UTC 24 |
| Finished | Aug 27 07:40:49 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1415237796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_address.1415237796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/105.usbdev_tx_rx_disruption.3075843520 |
| Short name | T3199 |
| Test name | |
| Test status | |
| Simulation time | 501339722 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3075843520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_ tx_rx_disruption.3075843520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/105.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_link_suspend.1397886120 |
| Short name | T113 |
| Test name | |
| Test status | |
| Simulation time | 3325815951 ps |
| CPU time | 9.26 seconds |
| Started | Aug 27 07:43:37 AM UTC 24 |
| Finished | Aug 27 07:43:48 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1397886120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_link_suspend.1397886120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/384.usbdev_tx_rx_disruption.1818330909 |
| Short name | T228 |
| Test name | |
| Test status | |
| Simulation time | 535563028 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:11 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1818330909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 384.usbdev_ tx_rx_disruption.1818330909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/384.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_partial_access.3925588158 |
| Short name | T269 |
| Test name | |
| Test status | |
| Simulation time | 67546012 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3925588158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_partial_access.3925588158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_disconnects.3889712016 |
| Short name | T166 |
| Test name | |
| Test status | |
| Simulation time | 5809051008 ps |
| CPU time | 29.3 seconds |
| Started | Aug 27 07:36:24 AM UTC 24 |
| Finished | Aug 27 07:36:55 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889712016 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_disconnects.3889712016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_full.1121733922 |
| Short name | T55 |
| Test name | |
| Test status | |
| Simulation time | 316081289 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:36:28 AM UTC 24 |
| Finished | Aug 27 07:36:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121733922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_rx_full.1121733922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_types.1974352988 |
| Short name | T350 |
| Test name | |
| Test status | |
| Simulation time | 650752033 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:53:30 AM UTC 24 |
| Finished | Aug 27 07:53:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974352988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_types.1974352988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_disconnects.1146390758 |
| Short name | T6 |
| Test name | |
| Test status | |
| Simulation time | 3142543935 ps |
| CPU time | 24.8 seconds |
| Started | Aug 27 07:35:32 AM UTC 24 |
| Finished | Aug 27 07:35:58 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1146390758 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_disconnects.1146390758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_errors.1158198642 |
| Short name | T246 |
| Test name | |
| Test status | |
| Simulation time | 316790437 ps |
| CPU time | 2.84 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:38 AM UTC 24 |
| Peak memory | 235156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158198642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_errors.1158198642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/160.usbdev_endpoint_types.1694936107 |
| Short name | T431 |
| Test name | |
| Test status | |
| Simulation time | 995079637 ps |
| CPU time | 2.24 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 217376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1694936107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_endpoint_types.1694936107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/160.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_received.161452694 |
| Short name | T341 |
| Test name | |
| Test status | |
| Simulation time | 153273396 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:35:32 AM UTC 24 |
| Finished | Aug 27 07:35:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=161452694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_pkt_received.161452694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/93.usbdev_endpoint_types.2682022971 |
| Short name | T399 |
| Test name | |
| Test status | |
| Simulation time | 715129819 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2682022971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_endpoint_types.2682022971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/93.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_bitstuff_err.49894366 |
| Short name | T1 |
| Test name | |
| Test status | |
| Simulation time | 177870486 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:16 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=49894366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_bitstuff_err.49894366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_disconnected.1941566396 |
| Short name | T39 |
| Test name | |
| Test status | |
| Simulation time | 153196940 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1941566396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_disconnected.1941566396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_crc_err.3635630415 |
| Short name | T17 |
| Test name | |
| Test status | |
| Simulation time | 142691025 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:35:36 AM UTC 24 |
| Finished | Aug 27 07:35:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635630415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_crc_err.3635630415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/110.usbdev_endpoint_types.3926789169 |
| Short name | T383 |
| Test name | |
| Test status | |
| Simulation time | 502093885 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926789169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_endpoint_types.3926789169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/110.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_types.1066653081 |
| Short name | T396 |
| Test name | |
| Test status | |
| Simulation time | 472644467 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:46:24 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066653081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_types.1066653081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_types.995324055 |
| Short name | T436 |
| Test name | |
| Test status | |
| Simulation time | 424160209 ps |
| CPU time | 2.16 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:56 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=995324055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_types.995324055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/103.usbdev_endpoint_types.196825106 |
| Short name | T408 |
| Test name | |
| Test status | |
| Simulation time | 492536113 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=196825106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 103.usbdev_endpoint_types.196825106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/103.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/122.usbdev_endpoint_types.1818181303 |
| Short name | T440 |
| Test name | |
| Test status | |
| Simulation time | 512120826 ps |
| CPU time | 1.84 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1818181303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_endpoint_types.1818181303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/122.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/143.usbdev_endpoint_types.3537557038 |
| Short name | T348 |
| Test name | |
| Test status | |
| Simulation time | 556198259 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537557038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_endpoint_types.3537557038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/143.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_intr_test.1058529431 |
| Short name | T217 |
| Test name | |
| Test status | |
| Simulation time | 51154919 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 217372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058529431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_intr_test.1058529431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/161.usbdev_endpoint_types.1418637923 |
| Short name | T394 |
| Test name | |
| Test status | |
| Simulation time | 389397966 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:54:46 AM UTC 24 |
| Finished | Aug 27 07:54:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1418637923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_endpoint_types.1418637923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/161.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/63.usbdev_endpoint_types.3970978187 |
| Short name | T414 |
| Test name | |
| Test status | |
| Simulation time | 417333202 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3970978187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_endpoint_types.3970978187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/63.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/66.usbdev_endpoint_types.3454715119 |
| Short name | T374 |
| Test name | |
| Test status | |
| Simulation time | 772213162 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454715119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_endpoint_types.3454715119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/66.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority.3899164677 |
| Short name | T20 |
| Test name | |
| Test status | |
| Simulation time | 397077530 ps |
| CPU time | 2.17 seconds |
| Started | Aug 27 07:35:36 AM UTC 24 |
| Finished | Aug 27 07:35:39 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899164677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority.3899164677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_reset.3601398859 |
| Short name | T15 |
| Test name | |
| Test status | |
| Simulation time | 19268710758 ps |
| CPU time | 41.74 seconds |
| Started | Aug 27 07:36:37 AM UTC 24 |
| Finished | Aug 27 07:37:21 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3601398859 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_reset.3601398859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_intg_err.627197980 |
| Short name | T515 |
| Test name | |
| Test status | |
| Simulation time | 865855916 ps |
| CPU time | 4 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627197980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_intg_err.627197980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/114.usbdev_endpoint_types.1710751020 |
| Short name | T376 |
| Test name | |
| Test status | |
| Simulation time | 599704013 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710751020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_endpoint_types.1710751020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/114.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/134.usbdev_endpoint_types.1828468162 |
| Short name | T418 |
| Test name | |
| Test status | |
| Simulation time | 413536328 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828468162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_endpoint_types.1828468162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/134.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/185.usbdev_endpoint_types.3101370764 |
| Short name | T453 |
| Test name | |
| Test status | |
| Simulation time | 392985820 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101370764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_endpoint_types.3101370764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/185.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_restore.4202407361 |
| Short name | T323 |
| Test name | |
| Test status | |
| Simulation time | 1142349497 ps |
| CPU time | 3.45 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:46:57 AM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4202407361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_data_toggle_restore.4202407361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_types.527143679 |
| Short name | T447 |
| Test name | |
| Test status | |
| Simulation time | 375798526 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:57 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=527143679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_types.527143679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_types.1920322334 |
| Short name | T373 |
| Test name | |
| Test status | |
| Simulation time | 648649136 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:35 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920322334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_types.1920322334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_nak_trans.1012343349 |
| Short name | T76 |
| Test name | |
| Test status | |
| Simulation time | 226522205 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:35:24 AM UTC 24 |
| Finished | Aug 27 07:35:27 AM UTC 24 |
| Peak memory | 215592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012343349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_nak_trans.1012343349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_alert_test.2362804151 |
| Short name | T206 |
| Test name | |
| Test status | |
| Simulation time | 86005404 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:35:44 AM UTC 24 |
| Finished | Aug 27 07:35:46 AM UTC 24 |
| Peak memory | 215980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362804151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 0.usbdev_alert_test.2362804151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_device_address.3516564964 |
| Short name | T518 |
| Test name | |
| Test status | |
| Simulation time | 26291612559 ps |
| CPU time | 44.05 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:41:34 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3516564964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_address.3516564964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_buffer.4006195523 |
| Short name | T255 |
| Test name | |
| Test status | |
| Simulation time | 11464612109 ps |
| CPU time | 35.82 seconds |
| Started | Aug 27 07:36:22 AM UTC 24 |
| Finished | Aug 27 07:36:59 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006195523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_pkt_buffer.4006195523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/113.usbdev_endpoint_types.128592089 |
| Short name | T441 |
| Test name | |
| Test status | |
| Simulation time | 930061791 ps |
| CPU time | 1.97 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=128592089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 113.usbdev_endpoint_types.128592089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/113.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/117.usbdev_endpoint_types.2078143075 |
| Short name | T361 |
| Test name | |
| Test status | |
| Simulation time | 777139721 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2078143075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_endpoint_types.2078143075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/117.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_spurious_pids_ignored.1926059125 |
| Short name | T523 |
| Test name | |
| Test status | |
| Simulation time | 2555277061 ps |
| CPU time | 62.36 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:49:08 AM UTC 24 |
| Peak memory | 235376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1926059125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_spurious_pids_ignored.1926059125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_restore.2391949665 |
| Short name | T318 |
| Test name | |
| Test status | |
| Simulation time | 1222113429 ps |
| CPU time | 4.15 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 218004 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2391949665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_data_toggle_restore.2391949665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/58.usbdev_endpoint_types.1398093492 |
| Short name | T387 |
| Test name | |
| Test status | |
| Simulation time | 890398037 ps |
| CPU time | 2.15 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:03 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1398093492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_endpoint_types.1398093492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/58.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_data1_data0_toggle_test.1761907289 |
| Short name | T34 |
| Test name | |
| Test status | |
| Simulation time | 543305768 ps |
| CPU time | 2.63 seconds |
| Started | Aug 27 07:35:17 AM UTC 24 |
| Finished | Aug 27 07:35:21 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761907289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_invalid_data1_data0_toggle_test.1761907289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_invalid_data1_data0_toggle_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_dpi_config_host.2569047009 |
| Short name | T229 |
| Test name | |
| Test status | |
| Simulation time | 5136806140 ps |
| CPU time | 37.75 seconds |
| Started | Aug 27 07:35:15 AM UTC 24 |
| Finished | Aug 27 07:35:55 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2569047009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_dpi_config_host_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_dpi_config_host.2569047009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_dpi_config_host/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_device_address.632948033 |
| Short name | T1772 |
| Test name | |
| Test status | |
| Simulation time | 35854711780 ps |
| CPU time | 62.49 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:47:40 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=632948033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_device_address.632948033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_aliasing.77010169 |
| Short name | T233 |
| Test name | |
| Test status | |
| Simulation time | 427158120 ps |
| CPU time | 3.33 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:24 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=77010169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_aliasing.77010169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_overflow.3416983944 |
| Short name | T3 |
| Test name | |
| Test status | |
| Simulation time | 136699553 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:16 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3416983944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_av_overflow.3416983944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_intr_test.4122526185 |
| Short name | T3680 |
| Test name | |
| Test status | |
| Simulation time | 57380237 ps |
| CPU time | 0.67 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:11 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4122526185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_intr_test.4122526185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/125.usbdev_endpoint_types.1247644352 |
| Short name | T412 |
| Test name | |
| Test status | |
| Simulation time | 592900531 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247644352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_endpoint_types.1247644352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/125.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/130.usbdev_endpoint_types.1577309395 |
| Short name | T508 |
| Test name | |
| Test status | |
| Simulation time | 254212017 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577309395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_endpoint_types.1577309395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/130.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/139.usbdev_endpoint_types.3670224112 |
| Short name | T470 |
| Test name | |
| Test status | |
| Simulation time | 408886652 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 215820 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670224112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_endpoint_types.3670224112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/139.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/146.usbdev_endpoint_types.698648954 |
| Short name | T367 |
| Test name | |
| Test status | |
| Simulation time | 577341105 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698648954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 146.usbdev_endpoint_types.698648954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/146.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/152.usbdev_endpoint_types.1446029817 |
| Short name | T444 |
| Test name | |
| Test status | |
| Simulation time | 378758506 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:54:37 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1446029817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_endpoint_types.1446029817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/152.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/164.usbdev_endpoint_types.3976496152 |
| Short name | T357 |
| Test name | |
| Test status | |
| Simulation time | 507303667 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:54 AM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3976496152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_endpoint_types.3976496152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/164.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_types.1515221076 |
| Short name | T384 |
| Test name | |
| Test status | |
| Simulation time | 862598706 ps |
| CPU time | 3.18 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:25 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515221076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_types.1515221076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_rx_full.867548978 |
| Short name | T305 |
| Test name | |
| Test status | |
| Simulation time | 247790782 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=867548978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_rx_full.867548978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_types.534113638 |
| Short name | T429 |
| Test name | |
| Test status | |
| Simulation time | 467059246 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:14 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=534113638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_types.534113638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_types.169120870 |
| Short name | T347 |
| Test name | |
| Test status | |
| Simulation time | 773343418 ps |
| CPU time | 2.16 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:10 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=169120870 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_types.169120870 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_types.3606887596 |
| Short name | T403 |
| Test name | |
| Test status | |
| Simulation time | 597415501 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606887596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_types.3606887596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/84.usbdev_endpoint_types.621006104 |
| Short name | T423 |
| Test name | |
| Test status | |
| Simulation time | 456692299 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=621006104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 84.usbdev_endpoint_types.621006104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/84.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_errors.2976905856 |
| Short name | T253 |
| Test name | |
| Test status | |
| Simulation time | 124894247 ps |
| CPU time | 2.43 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 235396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2976905856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_errors.2976905856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_tx_rx_disruption.3494423014 |
| Short name | T170 |
| Test name | |
| Test status | |
| Simulation time | 436993804 ps |
| CPU time | 2.36 seconds |
| Started | Aug 27 07:37:34 AM UTC 24 |
| Finished | Aug 27 07:37:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3494423014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_tx _rx_disruption.3494423014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_intg_err.2941262271 |
| Short name | T242 |
| Test name | |
| Test status | |
| Simulation time | 2643240477 ps |
| CPU time | 6.29 seconds |
| Started | Aug 27 07:56:20 AM UTC 24 |
| Finished | Aug 27 07:56:27 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2941262271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_intg_err.2941262271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_trans_ignored.655911706 |
| Short name | T226 |
| Test name | |
| Test status | |
| Simulation time | 167723045 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:35:39 AM UTC 24 |
| Finished | Aug 27 07:35:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=655911706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_setup_trans_ignored.655911706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stall_priority_over_nak.4073781865 |
| Short name | T344 |
| Test name | |
| Test status | |
| Simulation time | 162900961 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:35:39 AM UTC 24 |
| Finished | Aug 27 07:35:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4073781865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stall_priority_over_nak.4073781865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_low_speed_traffic.2537963366 |
| Short name | T191 |
| Test name | |
| Test status | |
| Simulation time | 4515103618 ps |
| CPU time | 39.03 seconds |
| Started | Aug 27 07:36:02 AM UTC 24 |
| Finished | Aug 27 07:36:43 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2537963366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_low_speed_traffic.2537963366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/116.usbdev_endpoint_types.3534591456 |
| Short name | T455 |
| Test name | |
| Test status | |
| Simulation time | 363143331 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 215568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534591456 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_endpoint_types.3534591456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/116.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_restore.2220384925 |
| Short name | T321 |
| Test name | |
| Test status | |
| Simulation time | 628978632 ps |
| CPU time | 3.31 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:10 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220384925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_data_toggle_restore.2220384925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/124.usbdev_endpoint_types.1858391803 |
| Short name | T443 |
| Test name | |
| Test status | |
| Simulation time | 275728627 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858391803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_endpoint_types.1858391803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/124.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/127.usbdev_endpoint_types.425931568 |
| Short name | T509 |
| Test name | |
| Test status | |
| Simulation time | 195114854 ps |
| CPU time | 0.85 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=425931568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 127.usbdev_endpoint_types.425931568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/127.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/136.usbdev_endpoint_types.1601421759 |
| Short name | T510 |
| Test name | |
| Test status | |
| Simulation time | 893568062 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:54:30 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 215896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601421759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_endpoint_types.1601421759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/136.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_device_address.3185565815 |
| Short name | T520 |
| Test name | |
| Test status | |
| Simulation time | 23779690415 ps |
| CPU time | 40.96 seconds |
| Started | Aug 27 07:43:55 AM UTC 24 |
| Finished | Aug 27 07:44:38 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3185565815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_address.3185565815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_spurious_pids_ignored.279287739 |
| Short name | T522 |
| Test name | |
| Test status | |
| Simulation time | 2639092032 ps |
| CPU time | 20.78 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:46:17 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=279287739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_spurious_pids_ignored.279287739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/191.usbdev_endpoint_types.277699733 |
| Short name | T398 |
| Test name | |
| Test status | |
| Simulation time | 635972606 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=277699733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 191.usbdev_endpoint_types.277699733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/191.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_full.3980325917 |
| Short name | T57 |
| Test name | |
| Test status | |
| Simulation time | 320639446 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:37:21 AM UTC 24 |
| Finished | Aug 27 07:37:24 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980325917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_rx_full.3980325917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk_max.3487858356 |
| Short name | T328 |
| Test name | |
| Test status | |
| Simulation time | 84185803361 ps |
| CPU time | 191.94 seconds |
| Started | Aug 27 07:37:56 AM UTC 24 |
| Finished | Aug 27 07:41:11 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3487858356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_loclk_max.3487858356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_usb_ref_disable.3014199849 |
| Short name | T105 |
| Test name | |
| Test status | |
| Simulation time | 142039012 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:35:30 AM UTC 24 |
| Finished | Aug 27 07:35:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3014199849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_usb_ref_disable.3014199849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_tx_rx_disruption.3769115643 |
| Short name | T238 |
| Test name | |
| Test status | |
| Simulation time | 550283901 ps |
| CPU time | 2.38 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:58 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3769115643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_t x_rx_disruption.3769115643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_overflow.4181905908 |
| Short name | T66 |
| Test name | |
| Test status | |
| Simulation time | 143991930 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:35:47 AM UTC 24 |
| Finished | Aug 27 07:35:49 AM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4181905908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_av_overflow.4181905908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_phy_pins_sense.4096045904 |
| Short name | T1027 |
| Test name | |
| Test status | |
| Simulation time | 38755861 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:42:56 AM UTC 24 |
| Finished | Aug 27 07:42:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096045904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_pins_sense.4096045904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_empty.345125182 |
| Short name | T2 |
| Test name | |
| Test status | |
| Simulation time | 177729507 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:16 AM UTC 24 |
| Peak memory | 217416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=345125182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_av_empty.345125182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_reset.1237324797 |
| Short name | T48 |
| Test name | |
| Test status | |
| Simulation time | 182193301 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:35:18 AM UTC 24 |
| Finished | Aug 27 07:35:21 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1237324797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_reset_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_reset.1237324797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_link_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_pid_err.3520167522 |
| Short name | T18 |
| Test name | |
| Test status | |
| Simulation time | 161142257 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:35:36 AM UTC 24 |
| Finished | Aug 27 07:35:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520167522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_rx_pid_err.3520167522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_empty.4271140031 |
| Short name | T61 |
| Test name | |
| Test status | |
| Simulation time | 157823508 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:35:46 AM UTC 24 |
| Finished | Aug 27 07:35:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271140031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_av_empty.4271140031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_disconnects.3442517744 |
| Short name | T177 |
| Test name | |
| Test status | |
| Simulation time | 6294906467 ps |
| CPU time | 26.13 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442517744 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_disconnects.3442517744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_fifo_rst.3869009266 |
| Short name | T43 |
| Test name | |
| Test status | |
| Simulation time | 249137454 ps |
| CPU time | 2.61 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:35:19 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3869009266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_fifo_rst.3869009266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_pinflip.875763256 |
| Short name | T50 |
| Test name | |
| Test status | |
| Simulation time | 201323185 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:35:27 AM UTC 24 |
| Finished | Aug 27 07:35:30 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=875763256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_pinflip.875763256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_buffer.2804364325 |
| Short name | T95 |
| Test name | |
| Test status | |
| Simulation time | 22486524157 ps |
| CPU time | 61.3 seconds |
| Started | Aug 27 07:35:31 AM UTC 24 |
| Finished | Aug 27 07:36:34 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804364325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_pkt_buffer.2804364325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_nak_trans.153472251 |
| Short name | T129 |
| Test name | |
| Test status | |
| Simulation time | 167646887 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:36:14 AM UTC 24 |
| Finished | Aug 27 07:36:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=153472251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_nak_trans.153472251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_nak_trans.377494767 |
| Short name | T154 |
| Test name | |
| Test status | |
| Simulation time | 244511889 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:42:33 AM UTC 24 |
| Finished | Aug 27 07:42:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=377494767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_nak_trans.377494767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/108.usbdev_endpoint_types.2707850659 |
| Short name | T125 |
| Test name | |
| Test status | |
| Simulation time | 427365439 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2707850659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_endpoint_types.2707850659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/108.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_nak_trans.3525128383 |
| Short name | T158 |
| Test name | |
| Test status | |
| Simulation time | 258658590 ps |
| CPU time | 1.94 seconds |
| Started | Aug 27 07:42:54 AM UTC 24 |
| Finished | Aug 27 07:42:57 AM UTC 24 |
| Peak memory | 215792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3525128383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_nak_trans.3525128383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_nak_trans.436714101 |
| Short name | T148 |
| Test name | |
| Test status | |
| Simulation time | 170926466 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:43:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436714101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_nak_trans.436714101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_nak_trans.2800113169 |
| Short name | T138 |
| Test name | |
| Test status | |
| Simulation time | 221342249 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:43:42 AM UTC 24 |
| Finished | Aug 27 07:43:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2800113169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_nak_trans.2800113169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_nak_trans.2089563322 |
| Short name | T141 |
| Test name | |
| Test status | |
| Simulation time | 207091433 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:44:27 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089563322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_nak_trans.2089563322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_nak_trans.577543971 |
| Short name | T132 |
| Test name | |
| Test status | |
| Simulation time | 217257548 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:44:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=577543971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_nak_trans.577543971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_nak_trans.1881316188 |
| Short name | T160 |
| Test name | |
| Test status | |
| Simulation time | 261173815 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:52 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881316188 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_nak_trans.1881316188 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_nak_trans.1685926385 |
| Short name | T146 |
| Test name | |
| Test status | |
| Simulation time | 271170355 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:09 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1685926385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_nak_trans.1685926385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_nak_trans.3746471164 |
| Short name | T151 |
| Test name | |
| Test status | |
| Simulation time | 273849288 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:54 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746471164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_nak_trans.3746471164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_nak_trans.3375401743 |
| Short name | T136 |
| Test name | |
| Test status | |
| Simulation time | 205482705 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3375401743 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_nak_trans.3375401743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_bit_bash.3622615329 |
| Short name | T271 |
| Test name | |
| Test status | |
| Simulation time | 694025154 ps |
| CPU time | 4.09 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:25 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622615329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_bit_bash.3622615329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_hw_reset.1526783794 |
| Short name | T244 |
| Test name | |
| Test status | |
| Simulation time | 74095548 ps |
| CPU time | 0.74 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526783794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_hw_reset.1526783794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_mem_rw_with_rand_reset.3944179489 |
| Short name | T213 |
| Test name | |
| Test status | |
| Simulation time | 143137609 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3944179489 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_mem_rw_with_rand_reset.3944179489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_csr_rw.2348646343 |
| Short name | T231 |
| Test name | |
| Test status | |
| Simulation time | 72064436 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348646343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_csr_rw.2348646343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_mem_walk.1240330721 |
| Short name | T3632 |
| Test name | |
| Test status | |
| Simulation time | 176558429 ps |
| CPU time | 3.71 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:24 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240330721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_mem_walk.1240330721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_same_csr_outstanding.660696249 |
| Short name | T232 |
| Test name | |
| Test status | |
| Simulation time | 122747818 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 217164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=660696249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_same_csr_outstanding.660696249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/0.usbdev_tl_errors.3819982481 |
| Short name | T215 |
| Test name | |
| Test status | |
| Simulation time | 142038932 ps |
| CPU time | 3.01 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:23 AM UTC 24 |
| Peak memory | 234600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3819982481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 0.usbdev_tl_errors.3819982481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_aliasing.1207353966 |
| Short name | T276 |
| Test name | |
| Test status | |
| Simulation time | 437934024 ps |
| CPU time | 3.43 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:32 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207353966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_aliasing.1207353966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_bit_bash.2928240833 |
| Short name | T277 |
| Test name | |
| Test status | |
| Simulation time | 714320574 ps |
| CPU time | 4.18 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:32 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2928240833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_bit_bash.2928240833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_hw_reset.2973067017 |
| Short name | T3634 |
| Test name | |
| Test status | |
| Simulation time | 55699395 ps |
| CPU time | 0.7 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:29 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973067017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_hw_reset.2973067017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_mem_rw_with_rand_reset.2378923299 |
| Short name | T256 |
| Test name | |
| Test status | |
| Simulation time | 160082627 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:30 AM UTC 24 |
| Peak memory | 227476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378923299 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_mem_rw_with_rand_reset.2378923299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_csr_rw.3966565142 |
| Short name | T282 |
| Test name | |
| Test status | |
| Simulation time | 53819653 ps |
| CPU time | 0.69 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:29 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3966565142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_csr_rw.3966565142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_partial_access.392108777 |
| Short name | T270 |
| Test name | |
| Test status | |
| Simulation time | 160835560 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:56:20 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 227472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=392108777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_partial_access.392108777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_mem_walk.3090763305 |
| Short name | T3633 |
| Test name | |
| Test status | |
| Simulation time | 485963152 ps |
| CPU time | 3.98 seconds |
| Started | Aug 27 07:56:20 AM UTC 24 |
| Finished | Aug 27 07:56:25 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090763305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_mem_walk.3090763305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_same_csr_outstanding.1686932440 |
| Short name | T283 |
| Test name | |
| Test status | |
| Simulation time | 172753889 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:29 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686932440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_same_csr_outstanding.1686932440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/1.usbdev_tl_errors.2999387056 |
| Short name | T214 |
| Test name | |
| Test status | |
| Simulation time | 72015010 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:56:20 AM UTC 24 |
| Finished | Aug 27 07:56:23 AM UTC 24 |
| Peak memory | 217248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2999387056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 1.usbdev_tl_errors.2999387056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_mem_rw_with_rand_reset.566782432 |
| Short name | T3652 |
| Test name | |
| Test status | |
| Simulation time | 141832169 ps |
| CPU time | 2.01 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 228460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=566782432 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_mem_rw_with_rand_reset.566782432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_csr_rw.415611563 |
| Short name | T281 |
| Test name | |
| Test status | |
| Simulation time | 76667631 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=415611563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_csr_rw.415611563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_same_csr_outstanding.882829473 |
| Short name | T3646 |
| Test name | |
| Test status | |
| Simulation time | 298083310 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=882829473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_same_csr_outstanding.882829473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_errors.2380586104 |
| Short name | T252 |
| Test name | |
| Test status | |
| Simulation time | 145427309 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 217180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380586104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_errors.2380586104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/10.usbdev_tl_intg_err.3773702923 |
| Short name | T301 |
| Test name | |
| Test status | |
| Simulation time | 1220604071 ps |
| CPU time | 4.61 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3773702923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 10.usbdev_tl_intg_err.3773702923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_mem_rw_with_rand_reset.2332198229 |
| Short name | T3663 |
| Test name | |
| Test status | |
| Simulation time | 94521999 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2332198229 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_mem_rw_with_rand_reset.2332198229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_csr_rw.2086607650 |
| Short name | T3644 |
| Test name | |
| Test status | |
| Simulation time | 49876017 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 217140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086607650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_csr_rw.2086607650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_intr_test.2698075450 |
| Short name | T299 |
| Test name | |
| Test status | |
| Simulation time | 46714882 ps |
| CPU time | 0.68 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 216928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698075450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_intr_test.2698075450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_same_csr_outstanding.4043153109 |
| Short name | T295 |
| Test name | |
| Test status | |
| Simulation time | 97600889 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4043153109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_same_csr_outstanding.4043153109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_errors.2457503398 |
| Short name | T248 |
| Test name | |
| Test status | |
| Simulation time | 104632622 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 234536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457503398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_errors.2457503398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/11.usbdev_tl_intg_err.3095691707 |
| Short name | T3670 |
| Test name | |
| Test status | |
| Simulation time | 989717733 ps |
| CPU time | 3.1 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3095691707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 11.usbdev_tl_intg_err.3095691707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_mem_rw_with_rand_reset.1543616366 |
| Short name | T298 |
| Test name | |
| Test status | |
| Simulation time | 152531423 ps |
| CPU time | 1.99 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 227316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543616366 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_mem_rw_with_rand_reset.1543616366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_csr_rw.1186862269 |
| Short name | T3647 |
| Test name | |
| Test status | |
| Simulation time | 51011733 ps |
| CPU time | 0.71 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186862269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_csr_rw.1186862269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_intr_test.1170990911 |
| Short name | T339 |
| Test name | |
| Test status | |
| Simulation time | 35355584 ps |
| CPU time | 0.69 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170990911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_intr_test.1170990911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_same_csr_outstanding.3684920652 |
| Short name | T3650 |
| Test name | |
| Test status | |
| Simulation time | 136495048 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3684920652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_same_csr_outstanding.3684920652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_errors.3279977163 |
| Short name | T3660 |
| Test name | |
| Test status | |
| Simulation time | 204204066 ps |
| CPU time | 2.13 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3279977163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_errors.3279977163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/12.usbdev_tl_intg_err.2403075266 |
| Short name | T3678 |
| Test name | |
| Test status | |
| Simulation time | 715946858 ps |
| CPU time | 4.47 seconds |
| Started | Aug 27 07:56:42 AM UTC 24 |
| Finished | Aug 27 07:56:51 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2403075266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 12.usbdev_tl_intg_err.2403075266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_mem_rw_with_rand_reset.580834908 |
| Short name | T3642 |
| Test name | |
| Test status | |
| Simulation time | 59729868 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:46 AM UTC 24 |
| Peak memory | 227404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=580834908 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_mem_rw_with_rand_reset.580834908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_csr_rw.2710387818 |
| Short name | T3649 |
| Test name | |
| Test status | |
| Simulation time | 74216386 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710387818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_csr_rw.2710387818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_intr_test.3745455283 |
| Short name | T300 |
| Test name | |
| Test status | |
| Simulation time | 31998974 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745455283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_intr_test.3745455283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_same_csr_outstanding.51439302 |
| Short name | T3641 |
| Test name | |
| Test status | |
| Simulation time | 88032280 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:46 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51439302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_same_csr_outstanding.51439302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/13.usbdev_tl_intg_err.1241172389 |
| Short name | T511 |
| Test name | |
| Test status | |
| Simulation time | 552853195 ps |
| CPU time | 3.64 seconds |
| Started | Aug 27 07:56:43 AM UTC 24 |
| Finished | Aug 27 07:56:51 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1241172389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 13.usbdev_tl_intg_err.1241172389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_mem_rw_with_rand_reset.320232818 |
| Short name | T3682 |
| Test name | |
| Test status | |
| Simulation time | 136198822 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320232818 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/o s_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_mem_rw_with_rand_reset.320232818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_csr_rw.182992928 |
| Short name | T3667 |
| Test name | |
| Test status | |
| Simulation time | 80341355 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:56:47 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182992928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_csr_rw.182992928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_intr_test.2592307537 |
| Short name | T3662 |
| Test name | |
| Test status | |
| Simulation time | 33361250 ps |
| CPU time | 0.7 seconds |
| Started | Aug 27 07:56:47 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592307537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_intr_test.2592307537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_same_csr_outstanding.3032985425 |
| Short name | T3681 |
| Test name | |
| Test status | |
| Simulation time | 134326784 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:11 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032985425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_same_csr_outstanding.3032985425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_errors.3004263420 |
| Short name | T250 |
| Test name | |
| Test status | |
| Simulation time | 64330205 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:56:44 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004263420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_errors.3004263420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/14.usbdev_tl_intg_err.434034730 |
| Short name | T3677 |
| Test name | |
| Test status | |
| Simulation time | 406726000 ps |
| CPU time | 2.36 seconds |
| Started | Aug 27 07:56:47 AM UTC 24 |
| Finished | Aug 27 07:56:51 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=434034730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 14.usbdev_tl_intg_err.434034730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_mem_rw_with_rand_reset.1109119542 |
| Short name | T3712 |
| Test name | |
| Test status | |
| Simulation time | 70586385 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 227484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1109119542 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_mem_rw_with_rand_reset.1109119542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_csr_rw.3534443453 |
| Short name | T3684 |
| Test name | |
| Test status | |
| Simulation time | 41226961 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534443453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_csr_rw.3534443453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_same_csr_outstanding.507238970 |
| Short name | T3683 |
| Test name | |
| Test status | |
| Simulation time | 157544865 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 217184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507238970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_same_csr_outstanding.507238970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/15.usbdev_tl_errors.2570041952 |
| Short name | T3686 |
| Test name | |
| Test status | |
| Simulation time | 208339504 ps |
| CPU time | 2.08 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2570041952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 15.usbdev_tl_errors.2570041952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_mem_rw_with_rand_reset.2734408933 |
| Short name | T3692 |
| Test name | |
| Test status | |
| Simulation time | 82559245 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2734408933 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_mem_rw_with_rand_reset.2734408933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_csr_rw.3115370965 |
| Short name | T3693 |
| Test name | |
| Test status | |
| Simulation time | 45616955 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3115370965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_csr_rw.3115370965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_intr_test.4286744903 |
| Short name | T3685 |
| Test name | |
| Test status | |
| Simulation time | 31973003 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286744903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_intr_test.4286744903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_same_csr_outstanding.714172897 |
| Short name | T3715 |
| Test name | |
| Test status | |
| Simulation time | 292853341 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=714172897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_same_csr_outstanding.714172897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_errors.24691303 |
| Short name | T3723 |
| Test name | |
| Test status | |
| Simulation time | 92312216 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 228528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24691303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_errors.24691303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/16.usbdev_tl_intg_err.2481261259 |
| Short name | T517 |
| Test name | |
| Test status | |
| Simulation time | 307358153 ps |
| CPU time | 2.27 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2481261259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 16.usbdev_tl_intg_err.2481261259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_mem_rw_with_rand_reset.1872468732 |
| Short name | T3721 |
| Test name | |
| Test status | |
| Simulation time | 102419676 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 227332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872468732 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_mem_rw_with_rand_reset.1872468732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_csr_rw.2025520130 |
| Short name | T3695 |
| Test name | |
| Test status | |
| Simulation time | 82020559 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025520130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_csr_rw.2025520130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_intr_test.1429351408 |
| Short name | T3689 |
| Test name | |
| Test status | |
| Simulation time | 59943649 ps |
| CPU time | 0.8 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 216780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429351408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_intr_test.1429351408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_same_csr_outstanding.1127890527 |
| Short name | T3720 |
| Test name | |
| Test status | |
| Simulation time | 320051479 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1127890527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_same_csr_outstanding.1127890527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_errors.3407061112 |
| Short name | T3719 |
| Test name | |
| Test status | |
| Simulation time | 103977329 ps |
| CPU time | 2.04 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407061112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_errors.3407061112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/17.usbdev_tl_intg_err.2812266213 |
| Short name | T3687 |
| Test name | |
| Test status | |
| Simulation time | 355593449 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:57:08 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 217860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812266213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 17.usbdev_tl_intg_err.2812266213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_mem_rw_with_rand_reset.3396792711 |
| Short name | T3716 |
| Test name | |
| Test status | |
| Simulation time | 62625783 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 227468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3396792711 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_mem_rw_with_rand_reset.3396792711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_csr_rw.3270519081 |
| Short name | T3708 |
| Test name | |
| Test status | |
| Simulation time | 135174952 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3270519081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_csr_rw.3270519081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_intr_test.4037803000 |
| Short name | T3700 |
| Test name | |
| Test status | |
| Simulation time | 42496456 ps |
| CPU time | 0.77 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216864 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037803000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_intr_test.4037803000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_same_csr_outstanding.2384702029 |
| Short name | T3722 |
| Test name | |
| Test status | |
| Simulation time | 302541183 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 217236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2384702029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_same_csr_outstanding.2384702029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_errors.1357427031 |
| Short name | T3714 |
| Test name | |
| Test status | |
| Simulation time | 68965411 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1357427031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_errors.1357427031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/18.usbdev_tl_intg_err.2150596855 |
| Short name | T3725 |
| Test name | |
| Test status | |
| Simulation time | 273395519 ps |
| CPU time | 2.11 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2150596855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 18.usbdev_tl_intg_err.2150596855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_mem_rw_with_rand_reset.2380575483 |
| Short name | T3724 |
| Test name | |
| Test status | |
| Simulation time | 186877547 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:14 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380575483 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_mem_rw_with_rand_reset.2380575483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_csr_rw.2137281892 |
| Short name | T3711 |
| Test name | |
| Test status | |
| Simulation time | 82934115 ps |
| CPU time | 0.83 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137281892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_csr_rw.2137281892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_intr_test.3049664174 |
| Short name | T3696 |
| Test name | |
| Test status | |
| Simulation time | 45055293 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049664174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_intr_test.3049664174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_same_csr_outstanding.3492024267 |
| Short name | T3718 |
| Test name | |
| Test status | |
| Simulation time | 166999694 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492024267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_same_csr_outstanding.3492024267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_errors.2073711705 |
| Short name | T3717 |
| Test name | |
| Test status | |
| Simulation time | 159202657 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073711705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_errors.2073711705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/19.usbdev_tl_intg_err.2868151676 |
| Short name | T3726 |
| Test name | |
| Test status | |
| Simulation time | 1231657405 ps |
| CPU time | 3.95 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:16 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868151676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 19.usbdev_tl_intg_err.2868151676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_aliasing.2833458479 |
| Short name | T294 |
| Test name | |
| Test status | |
| Simulation time | 186686832 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833458479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_aliasing.2833458479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_bit_bash.3495549706 |
| Short name | T3636 |
| Test name | |
| Test status | |
| Simulation time | 434207257 ps |
| CPU time | 4.17 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:34 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3495549706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_bit_bash.3495549706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_hw_reset.2034802457 |
| Short name | T220 |
| Test name | |
| Test status | |
| Simulation time | 89349647 ps |
| CPU time | 0.81 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:30 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034802457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_hw_reset.2034802457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_mem_rw_with_rand_reset.2643627022 |
| Short name | T257 |
| Test name | |
| Test status | |
| Simulation time | 56687153 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 227452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643627022 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_mem_rw_with_rand_reset.2643627022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_csr_rw.3880325765 |
| Short name | T272 |
| Test name | |
| Test status | |
| Simulation time | 113201522 ps |
| CPU time | 0.73 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:30 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880325765 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_csr_rw.3880325765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_intr_test.581983420 |
| Short name | T219 |
| Test name | |
| Test status | |
| Simulation time | 54829434 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:30 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=581983420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 2.usbdev_intr_test.581983420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_partial_access.909896884 |
| Short name | T275 |
| Test name | |
| Test status | |
| Simulation time | 78756065 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=909896884 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vc s/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_partial_access.909896884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_mem_walk.3407261836 |
| Short name | T3635 |
| Test name | |
| Test status | |
| Simulation time | 777082864 ps |
| CPU time | 4.11 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:34 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407261836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_mem_walk.3407261836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_same_csr_outstanding.1549130320 |
| Short name | T285 |
| Test name | |
| Test status | |
| Simulation time | 256786148 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1549130320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_same_csr_outstanding.1549130320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_errors.3146281070 |
| Short name | T245 |
| Test name | |
| Test status | |
| Simulation time | 146530945 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:30 AM UTC 24 |
| Peak memory | 217296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3146281070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_errors.3146281070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/2.usbdev_tl_intg_err.2700552875 |
| Short name | T243 |
| Test name | |
| Test status | |
| Simulation time | 342851542 ps |
| CPU time | 2.11 seconds |
| Started | Aug 27 07:56:27 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2700552875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 2.usbdev_tl_intg_err.2700552875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/20.usbdev_intr_test.454853005 |
| Short name | T3710 |
| Test name | |
| Test status | |
| Simulation time | 86235627 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454853005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 20.usbdev_intr_test.454853005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/21.usbdev_intr_test.820401227 |
| Short name | T3698 |
| Test name | |
| Test status | |
| Simulation time | 44029974 ps |
| CPU time | 0.7 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=820401227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 21.usbdev_intr_test.820401227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/22.usbdev_intr_test.1933242810 |
| Short name | T3706 |
| Test name | |
| Test status | |
| Simulation time | 59617745 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933242810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 22.usbdev_intr_test.1933242810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/23.usbdev_intr_test.3255461236 |
| Short name | T3694 |
| Test name | |
| Test status | |
| Simulation time | 47224779 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255461236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 23.usbdev_intr_test.3255461236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/24.usbdev_intr_test.2219249426 |
| Short name | T3713 |
| Test name | |
| Test status | |
| Simulation time | 81589479 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2219249426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 24.usbdev_intr_test.2219249426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/25.usbdev_intr_test.1086003898 |
| Short name | T3701 |
| Test name | |
| Test status | |
| Simulation time | 36322716 ps |
| CPU time | 0.71 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1086003898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 25.usbdev_intr_test.1086003898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/26.usbdev_intr_test.3855682534 |
| Short name | T3699 |
| Test name | |
| Test status | |
| Simulation time | 44015170 ps |
| CPU time | 0.74 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855682534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 26.usbdev_intr_test.3855682534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/27.usbdev_intr_test.62933937 |
| Short name | T3704 |
| Test name | |
| Test status | |
| Simulation time | 57396497 ps |
| CPU time | 0.8 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=62933937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 27.usbdev_intr_test.62933937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/28.usbdev_intr_test.2930744688 |
| Short name | T3688 |
| Test name | |
| Test status | |
| Simulation time | 31881507 ps |
| CPU time | 0.63 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930744688 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 28.usbdev_intr_test.2930744688 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/29.usbdev_intr_test.1454663467 |
| Short name | T3690 |
| Test name | |
| Test status | |
| Simulation time | 38712911 ps |
| CPU time | 0.69 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454663467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 29.usbdev_intr_test.1454663467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_aliasing.317612796 |
| Short name | T278 |
| Test name | |
| Test status | |
| Simulation time | 119631059 ps |
| CPU time | 2.74 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:33 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=317612796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_aliasing.317612796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_bit_bash.1711462206 |
| Short name | T3638 |
| Test name | |
| Test status | |
| Simulation time | 412472795 ps |
| CPU time | 4.16 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:34 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1711462206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_bit_bash.1711462206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_hw_reset.2283618801 |
| Short name | T273 |
| Test name | |
| Test status | |
| Simulation time | 84676229 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2283618801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_hw_reset.2283618801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_mem_rw_with_rand_reset.2316851801 |
| Short name | T3666 |
| Test name | |
| Test status | |
| Simulation time | 95664139 ps |
| CPU time | 2.15 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316851801 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_mem_rw_with_rand_reset.2316851801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_csr_rw.198969816 |
| Short name | T284 |
| Test name | |
| Test status | |
| Simulation time | 67572977 ps |
| CPU time | 0.74 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=198969816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover _reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_csr_rw.198969816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_intr_test.3429194423 |
| Short name | T333 |
| Test name | |
| Test status | |
| Simulation time | 90225039 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 216884 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3429194423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_intr_test.3429194423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_partial_access.2120613287 |
| Short name | T274 |
| Test name | |
| Test status | |
| Simulation time | 114475571 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:31 AM UTC 24 |
| Peak memory | 217160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120613287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_partial_access.2120613287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_mem_walk.3295644730 |
| Short name | T3637 |
| Test name | |
| Test status | |
| Simulation time | 482838232 ps |
| CPU time | 3.85 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:34 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3295644730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_mem_walk.3295644730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_same_csr_outstanding.3583884007 |
| Short name | T296 |
| Test name | |
| Test status | |
| Simulation time | 96605286 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583884007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_same_csr_outstanding.3583884007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_errors.4133397883 |
| Short name | T249 |
| Test name | |
| Test status | |
| Simulation time | 245286325 ps |
| CPU time | 2.56 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:32 AM UTC 24 |
| Peak memory | 228400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4133397883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_errors.4133397883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/3.usbdev_tl_intg_err.3048614596 |
| Short name | T514 |
| Test name | |
| Test status | |
| Simulation time | 1227158900 ps |
| CPU time | 3.21 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:33 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048614596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 3.usbdev_tl_intg_err.3048614596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/30.usbdev_intr_test.715202847 |
| Short name | T3691 |
| Test name | |
| Test status | |
| Simulation time | 31139998 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:12 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715202847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 30.usbdev_intr_test.715202847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/31.usbdev_intr_test.2996848984 |
| Short name | T3709 |
| Test name | |
| Test status | |
| Simulation time | 53628197 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996848984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 31.usbdev_intr_test.2996848984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/32.usbdev_intr_test.2442296726 |
| Short name | T3703 |
| Test name | |
| Test status | |
| Simulation time | 34527177 ps |
| CPU time | 0.78 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442296726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 32.usbdev_intr_test.2442296726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/33.usbdev_intr_test.3890060249 |
| Short name | T3707 |
| Test name | |
| Test status | |
| Simulation time | 85220896 ps |
| CPU time | 0.77 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3890060249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 33.usbdev_intr_test.3890060249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/34.usbdev_intr_test.904256286 |
| Short name | T3705 |
| Test name | |
| Test status | |
| Simulation time | 49894600 ps |
| CPU time | 0.76 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=904256286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 34.usbdev_intr_test.904256286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/35.usbdev_intr_test.2578347291 |
| Short name | T3697 |
| Test name | |
| Test status | |
| Simulation time | 45269141 ps |
| CPU time | 0.63 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2578347291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 35.usbdev_intr_test.2578347291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/36.usbdev_intr_test.2556417998 |
| Short name | T3702 |
| Test name | |
| Test status | |
| Simulation time | 52058088 ps |
| CPU time | 0.67 seconds |
| Started | Aug 27 07:57:09 AM UTC 24 |
| Finished | Aug 27 07:57:13 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556417998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 36.usbdev_intr_test.2556417998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/37.usbdev_intr_test.607213441 |
| Short name | T3731 |
| Test name | |
| Test status | |
| Simulation time | 66413135 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:58:42 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216500 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607213441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 37.usbdev_intr_test.607213441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/38.usbdev_intr_test.2907553736 |
| Short name | T3730 |
| Test name | |
| Test status | |
| Simulation time | 117077045 ps |
| CPU time | 0.73 seconds |
| Started | Aug 27 07:58:42 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2907553736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 38.usbdev_intr_test.2907553736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/39.usbdev_intr_test.2163977298 |
| Short name | T3729 |
| Test name | |
| Test status | |
| Simulation time | 98752112 ps |
| CPU time | 0.74 seconds |
| Started | Aug 27 07:58:42 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163977298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 39.usbdev_intr_test.2163977298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_aliasing.1488696853 |
| Short name | T3672 |
| Test name | |
| Test status | |
| Simulation time | 79071736 ps |
| CPU time | 2.12 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_aliasing +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488696853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_aliasing.1488696853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_csr_aliasing/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_bit_bash.1593372106 |
| Short name | T3679 |
| Test name | |
| Test status | |
| Simulation time | 596137549 ps |
| CPU time | 3.95 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:51 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_bit_bash +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1593372106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ =usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverag e/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_bit_bash.1593372106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_csr_bit_bash/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_hw_reset.351061527 |
| Short name | T3653 |
| Test name | |
| Test status | |
| Simulation time | 92543776 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_hw_reset +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=351061527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_hw_reset.351061527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_csr_hw_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_mem_rw_with_rand_reset.2812605510 |
| Short name | T3665 |
| Test name | |
| Test status | |
| Simulation time | 140982214 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 227416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812605510 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_mem_rw_with_rand_reset.2812605510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_csr_rw.1411029879 |
| Short name | T280 |
| Test name | |
| Test status | |
| Simulation time | 68287514 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411029879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_csr_rw.1411029879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_intr_test.101538364 |
| Short name | T340 |
| Test name | |
| Test status | |
| Simulation time | 42850542 ps |
| CPU time | 0.71 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101538364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 4.usbdev_intr_test.101538364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_partial_access.3323957851 |
| Short name | T3657 |
| Test name | |
| Test status | |
| Simulation time | 115508402 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_mem_partial_access +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323957851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_partial_access.3323957851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_mem_partial_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_mem_walk.637879391 |
| Short name | T3668 |
| Test name | |
| Test status | |
| Simulation time | 97540721 ps |
| CPU time | 2.03 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_mem_walk +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -l icqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=637879391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ= usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage /cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_mem_walk.637879391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_mem_walk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_same_csr_outstanding.97470607 |
| Short name | T3659 |
| Test name | |
| Test status | |
| Simulation time | 134231396 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=97470607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_same_csr_outstanding.97470607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_errors.1045092307 |
| Short name | T3676 |
| Test name | |
| Test status | |
| Simulation time | 115008023 ps |
| CPU time | 2.89 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 234840 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045092307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_errors.1045092307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/4.usbdev_tl_intg_err.3920421499 |
| Short name | T3673 |
| Test name | |
| Test status | |
| Simulation time | 403047056 ps |
| CPU time | 2.5 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920421499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 4.usbdev_tl_intg_err.3920421499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/40.usbdev_intr_test.3882037838 |
| Short name | T3727 |
| Test name | |
| Test status | |
| Simulation time | 94461843 ps |
| CPU time | 0.69 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3882037838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 40.usbdev_intr_test.3882037838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/41.usbdev_intr_test.44080272 |
| Short name | T3728 |
| Test name | |
| Test status | |
| Simulation time | 44336261 ps |
| CPU time | 0.64 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44080272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 41.usbdev_intr_test.44080272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/42.usbdev_intr_test.240396726 |
| Short name | T3733 |
| Test name | |
| Test status | |
| Simulation time | 37603197 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=240396726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 42.usbdev_intr_test.240396726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/43.usbdev_intr_test.2070201049 |
| Short name | T3732 |
| Test name | |
| Test status | |
| Simulation time | 84829285 ps |
| CPU time | 0.71 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2070201049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 43.usbdev_intr_test.2070201049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/44.usbdev_intr_test.51356674 |
| Short name | T3736 |
| Test name | |
| Test status | |
| Simulation time | 40171017 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 215556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=51356674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_com mon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg _top.vdb -cm_log /dev/null -cm_name 44.usbdev_intr_test.51356674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/45.usbdev_intr_test.293237026 |
| Short name | T3735 |
| Test name | |
| Test status | |
| Simulation time | 47589087 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 215856 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=293237026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 45.usbdev_intr_test.293237026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/46.usbdev_intr_test.1668405542 |
| Short name | T3734 |
| Test name | |
| Test status | |
| Simulation time | 33569758 ps |
| CPU time | 0.62 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:44 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668405542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 46.usbdev_intr_test.1668405542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/47.usbdev_intr_test.2609728666 |
| Short name | T3739 |
| Test name | |
| Test status | |
| Simulation time | 61656851 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:45 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609728666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 47.usbdev_intr_test.2609728666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/48.usbdev_intr_test.4030810966 |
| Short name | T3737 |
| Test name | |
| Test status | |
| Simulation time | 42397494 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:45 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030810966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 48.usbdev_intr_test.4030810966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/49.usbdev_intr_test.838614878 |
| Short name | T3738 |
| Test name | |
| Test status | |
| Simulation time | 38830009 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:58:43 AM UTC 24 |
| Finished | Aug 27 07:58:45 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838614878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 49.usbdev_intr_test.838614878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_mem_rw_with_rand_reset.3706694359 |
| Short name | T3655 |
| Test name | |
| Test status | |
| Simulation time | 112530455 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 227352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3706694359 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_mem_rw_with_rand_reset.3706694359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_csr_rw.3731211494 |
| Short name | T3654 |
| Test name | |
| Test status | |
| Simulation time | 60341319 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3731211494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_csr_rw.3731211494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_intr_test.285461237 |
| Short name | T3651 |
| Test name | |
| Test status | |
| Simulation time | 40114754 ps |
| CPU time | 0.69 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=285461237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_intr_test.285461237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_same_csr_outstanding.3745314023 |
| Short name | T3656 |
| Test name | |
| Test status | |
| Simulation time | 88264567 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3745314023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_same_csr_outstanding.3745314023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_errors.320990816 |
| Short name | T3675 |
| Test name | |
| Test status | |
| Simulation time | 178646081 ps |
| CPU time | 2.46 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 234488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=320990816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_errors.320990816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/5.usbdev_tl_intg_err.1310768547 |
| Short name | T3674 |
| Test name | |
| Test status | |
| Simulation time | 325805631 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310768547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 5.usbdev_tl_intg_err.1310768547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_mem_rw_with_rand_reset.1330541558 |
| Short name | T3664 |
| Test name | |
| Test status | |
| Simulation time | 138102885 ps |
| CPU time | 2.31 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 227868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1330541558 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_mem_rw_with_rand_reset.1330541558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_csr_rw.1979059846 |
| Short name | T3648 |
| Test name | |
| Test status | |
| Simulation time | 88387574 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1979059846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_csr_rw.1979059846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_intr_test.2884772180 |
| Short name | T336 |
| Test name | |
| Test status | |
| Simulation time | 48523389 ps |
| CPU time | 0.64 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2884772180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_intr_test.2884772180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_same_csr_outstanding.889523306 |
| Short name | T297 |
| Test name | |
| Test status | |
| Simulation time | 222755519 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=889523306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +U VM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_same_csr_outstanding.889523306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_errors.3109547711 |
| Short name | T3671 |
| Test name | |
| Test status | |
| Simulation time | 262439639 ps |
| CPU time | 3.05 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 228452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3109547711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_errors.3109547711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/6.usbdev_tl_intg_err.627168851 |
| Short name | T3661 |
| Test name | |
| Test status | |
| Simulation time | 322426664 ps |
| CPU time | 2.44 seconds |
| Started | Aug 27 07:56:28 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627168851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_S EQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/cover_reg_top.vdb -cm_log /dev/null -cm_name 6.usbdev_tl_intg_err.627168851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_csr_rw.1587908157 |
| Short name | T3645 |
| Test name | |
| Test status | |
| Simulation time | 49860265 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:56:29 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 217232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587908157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_csr_rw.1587908157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_intr_test.1692052247 |
| Short name | T337 |
| Test name | |
| Test status | |
| Simulation time | 46663451 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:56:29 AM UTC 24 |
| Finished | Aug 27 07:56:48 AM UTC 24 |
| Peak memory | 216984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692052247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_intr_test.1692052247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_same_csr_outstanding.2126214579 |
| Short name | T3658 |
| Test name | |
| Test status | |
| Simulation time | 291102665 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:56:29 AM UTC 24 |
| Finished | Aug 27 07:56:49 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126214579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_same_csr_outstanding.2126214579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_errors.3735139623 |
| Short name | T3669 |
| Test name | |
| Test status | |
| Simulation time | 266185066 ps |
| CPU time | 2.55 seconds |
| Started | Aug 27 07:56:29 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 232396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735139623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_errors.3735139623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/7.usbdev_tl_intg_err.1992793153 |
| Short name | T516 |
| Test name | |
| Test status | |
| Simulation time | 712927709 ps |
| CPU time | 2.87 seconds |
| Started | Aug 27 07:56:29 AM UTC 24 |
| Finished | Aug 27 07:56:50 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1992793153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 7.usbdev_tl_intg_err.1992793153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_mem_rw_with_rand_reset.3226547046 |
| Short name | T3640 |
| Test name | |
| Test status | |
| Simulation time | 95745902 ps |
| CPU time | 2.17 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:37 AM UTC 24 |
| Peak memory | 228340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226547046 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_mem_rw_with_rand_reset.3226547046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_csr_rw.3809095714 |
| Short name | T279 |
| Test name | |
| Test status | |
| Simulation time | 105597088 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 217284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3809095714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_csr_rw.3809095714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_intr_test.411601192 |
| Short name | T334 |
| Test name | |
| Test status | |
| Simulation time | 74687353 ps |
| CPU time | 0.7 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 217168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411601192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_co mmon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_re g_top.vdb -cm_log /dev/null -cm_name 8.usbdev_intr_test.411601192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_same_csr_outstanding.3872401163 |
| Short name | T3639 |
| Test name | |
| Test status | |
| Simulation time | 77195552 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 217360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3872401163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_same_csr_outstanding.3872401163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_errors.2348480408 |
| Short name | T251 |
| Test name | |
| Test status | |
| Simulation time | 154066792 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 227344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_errors +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2348480408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_errors.2348480408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_tl_errors/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/8.usbdev_tl_intg_err.2827951123 |
| Short name | T512 |
| Test name | |
| Test status | |
| Simulation time | 1346498821 ps |
| CPU time | 4.5 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:39 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2827951123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 8.usbdev_tl_intg_err.2827951123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_mem_rw_with_rand_reset.3813891088 |
| Short name | T258 |
| Test name | |
| Test status | |
| Simulation time | 67576477 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 227412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_csr_mem_rw_with_rand_reset +test_timeout_ns=10000000000 +en_s cb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813891088 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/ os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_mem_rw_with_rand_reset.3813891088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_csr_mem_rw_with_rand_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_csr_rw.2324611961 |
| Short name | T3643 |
| Test name | |
| Test status | |
| Simulation time | 48518777 ps |
| CPU time | 0.83 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:46 AM UTC 24 |
| Peak memory | 217348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +csr_rw +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2324611961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cove r_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_csr_rw.2324611961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_csr_rw/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_intr_test.4214637866 |
| Short name | T338 |
| Test name | |
| Test status | |
| Simulation time | 60302127 ps |
| CPU time | 0.65 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:36 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_intr_test +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue - ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214637866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_c ommon_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_r eg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_intr_test.4214637866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_intr_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_same_csr_outstanding.1104323269 |
| Short name | T286 |
| Test name | |
| Test status | |
| Simulation time | 151204380 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:35 AM UTC 24 |
| Peak memory | 217352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_same_csr_outstanding +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSIT Y=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1104323269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test + UVM_TEST_SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_same_csr_outstanding.1104323269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_same_csr_outstanding/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/cover_reg_top/9.usbdev_tl_intg_err.1213737369 |
| Short name | T513 |
| Test name | |
| Test status | |
| Simulation time | 343624804 ps |
| CPU time | 2.35 seconds |
| Started | Aug 27 07:56:33 AM UTC 24 |
| Finished | Aug 27 07:56:47 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover_reg_top/simv +run_tl_intg_err +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213737369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_ SEQ=usbdev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/cover_reg_top.vdb -cm_log /dev/null -cm_name 9.usbdev_tl_intg_err.1213737369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_tl_intg_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_disconnect.950169819 |
| Short name | T7 |
| Test name | |
| Test status | |
| Simulation time | 9725245773 ps |
| CPU time | 22.58 seconds |
| Started | Aug 27 07:35:13 AM UTC 24 |
| Finished | Aug 27 07:35:36 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=950169819 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_disconnect.950169819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_aon_wake_reset.3965707304 |
| Short name | T8 |
| Test name | |
| Test status | |
| Simulation time | 14782506862 ps |
| CPU time | 22.71 seconds |
| Started | Aug 27 07:35:13 AM UTC 24 |
| Finished | Aug 27 07:35:37 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3965707304 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_aon_wake_reset.3965707304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_av_buffer.2097453746 |
| Short name | T27 |
| Test name | |
| Test status | |
| Simulation time | 192645618 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:16 AM UTC 24 |
| Peak memory | 216144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097453746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_av_buffer.2097453746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_data_toggle_clear.2107936729 |
| Short name | T28 |
| Test name | |
| Test status | |
| Simulation time | 501322440 ps |
| CPU time | 2.36 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:17 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107936729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 0.usbdev_data_toggle_clear.2107936729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_device_timeout.1628549505 |
| Short name | T116 |
| Test name | |
| Test status | |
| Simulation time | 3875768174 ps |
| CPU time | 31.79 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:47 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1628549505 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_device_timeout.1628549505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_enable.3530277039 |
| Short name | T41 |
| Test name | |
| Test status | |
| Simulation time | 104387767 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:35:15 AM UTC 24 |
| Finished | Aug 27 07:35:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3530277039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_enable.3530277039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_endpoint_types.749485746 |
| Short name | T42 |
| Test name | |
| Test status | |
| Simulation time | 152023551 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:35:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=749485746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 0.usbdev_endpoint_types.749485746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk.1383509795 |
| Short name | T330 |
| Test name | |
| Test status | |
| Simulation time | 85175117438 ps |
| CPU time | 143.42 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:37:42 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1383509795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_hiclk.1383509795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_hiclk_max.1073756016 |
| Short name | T329 |
| Test name | |
| Test status | |
| Simulation time | 100208214499 ps |
| CPU time | 169.83 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:38:08 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1073756016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 0.usbdev_freq_hiclk_max.1073756016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk.1738936880 |
| Short name | T571 |
| Test name | |
| Test status | |
| Simulation time | 88103348252 ps |
| CPU time | 153.09 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:37:51 AM UTC 24 |
| Peak memory | 218292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1738936880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_freq_loclk.1738936880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_loclk_max.877116931 |
| Short name | T641 |
| Test name | |
| Test status | |
| Simulation time | 116007399597 ps |
| CPU time | 233.48 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:39:13 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=877116931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 0.usbdev_freq_loclk_max.877116931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_freq_phase.1592462041 |
| Short name | T331 |
| Test name | |
| Test status | |
| Simulation time | 95174894851 ps |
| CPU time | 186.43 seconds |
| Started | Aug 27 07:35:16 AM UTC 24 |
| Finished | Aug 27 07:38:25 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1592462041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_freq_phase.1592462041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_iso.3821778441 |
| Short name | T32 |
| Test name | |
| Test status | |
| Simulation time | 211924935 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:35:17 AM UTC 24 |
| Finished | Aug 27 07:35:20 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3821778441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_in_iso.3821778441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_stall.366384650 |
| Short name | T30 |
| Test name | |
| Test status | |
| Simulation time | 148418309 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:35:17 AM UTC 24 |
| Finished | Aug 27 07:35:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366384650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_in_stall.366384650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_in_trans.3567029367 |
| Short name | T33 |
| Test name | |
| Test status | |
| Simulation time | 193845819 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:35:18 AM UTC 24 |
| Finished | Aug 27 07:35:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567029367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_in_trans.3567029367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_invalid_sync.530338800 |
| Short name | T122 |
| Test name | |
| Test status | |
| Simulation time | 3250421408 ps |
| CPU time | 81.92 seconds |
| Started | Aug 27 07:35:17 AM UTC 24 |
| Finished | Aug 27 07:36:41 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=530338800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_invalid_sync.530338800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_iso_retraction.2708755016 |
| Short name | T110 |
| Test name | |
| Test status | |
| Simulation time | 6579785114 ps |
| CPU time | 61.76 seconds |
| Started | Aug 27 07:35:18 AM UTC 24 |
| Finished | Aug 27 07:36:22 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708755016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_iso_retraction.2708755016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_in_err.3863067307 |
| Short name | T35 |
| Test name | |
| Test status | |
| Simulation time | 179290425 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:35:18 AM UTC 24 |
| Finished | Aug 27 07:35:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863067307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_link_in_err.3863067307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_out_err.3893345796 |
| Short name | T36 |
| Test name | |
| Test status | |
| Simulation time | 500544764 ps |
| CPU time | 2.6 seconds |
| Started | Aug 27 07:35:18 AM UTC 24 |
| Finished | Aug 27 07:35:22 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893345796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_out_err.3893345796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_link_out_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_resume.848590766 |
| Short name | T72 |
| Test name | |
| Test status | |
| Simulation time | 31483600983 ps |
| CPU time | 73.17 seconds |
| Started | Aug 27 07:35:19 AM UTC 24 |
| Finished | Aug 27 07:36:34 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=848590766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 0.usbdev_link_resume.848590766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_link_suspend.2535011773 |
| Short name | T64 |
| Test name | |
| Test status | |
| Simulation time | 4867310157 ps |
| CPU time | 9.32 seconds |
| Started | Aug 27 07:35:20 AM UTC 24 |
| Finished | Aug 27 07:35:31 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535011773 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 0.usbdev_link_suspend.2535011773 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_inter_pkt_delay.80613649 |
| Short name | T290 |
| Test name | |
| Test status | |
| Simulation time | 2625151992 ps |
| CPU time | 73.88 seconds |
| Started | Aug 27 07:35:21 AM UTC 24 |
| Finished | Aug 27 07:36:36 AM UTC 24 |
| Peak memory | 230716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=80613649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_inter_pkt_delay.80613649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_in_transaction.2824595312 |
| Short name | T37 |
| Test name | |
| Test status | |
| Simulation time | 242472605 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:35:21 AM UTC 24 |
| Finished | Aug 27 07:35:23 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2824595312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_in_transaction.2824595312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_length_out_transaction.3635562449 |
| Short name | T88 |
| Test name | |
| Test status | |
| Simulation time | 186196294 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:35:21 AM UTC 24 |
| Finished | Aug 27 07:35:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635562449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_max_length_out_transaction.3635562449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_non_iso_usb_traffic.1151707391 |
| Short name | T5 |
| Test name | |
| Test status | |
| Simulation time | 3262870341 ps |
| CPU time | 32.86 seconds |
| Started | Aug 27 07:35:22 AM UTC 24 |
| Finished | Aug 27 07:35:56 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151707391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_non_iso_usb_traffic.1151707391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_max_usb_traffic.2949832517 |
| Short name | T260 |
| Test name | |
| Test status | |
| Simulation time | 3259472594 ps |
| CPU time | 95.63 seconds |
| Started | Aug 27 07:35:22 AM UTC 24 |
| Finished | Aug 27 07:36:59 AM UTC 24 |
| Peak memory | 230732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2949832517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_max_usb_traffic.2949832517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_inter_pkt_delay.2368863399 |
| Short name | T4 |
| Test name | |
| Test status | |
| Simulation time | 1779540248 ps |
| CPU time | 15.84 seconds |
| Started | Aug 27 07:35:22 AM UTC 24 |
| Finished | Aug 27 07:35:39 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368863399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_min_inter_pkt_delay.2368863399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_in_transaction.2412936730 |
| Short name | T38 |
| Test name | |
| Test status | |
| Simulation time | 152852334 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:35:22 AM UTC 24 |
| Finished | Aug 27 07:35:24 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412936730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_in_transaction.2412936730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_min_length_out_transaction.3524125300 |
| Short name | T311 |
| Test name | |
| Test status | |
| Simulation time | 175852113 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:35:23 AM UTC 24 |
| Finished | Aug 27 07:35:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3524125300 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 0.usbdev_min_length_out_transaction.3524125300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.163920876 |
| Short name | T75 |
| Test name | |
| Test status | |
| Simulation time | 528220859 ps |
| CPU time | 2.65 seconds |
| Started | Aug 27 07:35:24 AM UTC 24 |
| Finished | Aug 27 07:35:28 AM UTC 24 |
| Peak memory | 217660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=163920876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_out_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full.163920876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_iso.182716419 |
| Short name | T87 |
| Test name | |
| Test status | |
| Simulation time | 175761012 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:35:24 AM UTC 24 |
| Finished | Aug 27 07:35:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=182716419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 0.usbdev_out_iso.182716419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_stall.3020741846 |
| Short name | T77 |
| Test name | |
| Test status | |
| Simulation time | 190340468 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:35:25 AM UTC 24 |
| Finished | Aug 27 07:35:28 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3020741846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_out_stall.3020741846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_out_trans_nak.1132101088 |
| Short name | T312 |
| Test name | |
| Test status | |
| Simulation time | 143302067 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:35:26 AM UTC 24 |
| Finished | Aug 27 07:35:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132101088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_out_trans_nak.1132101088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pending_in_trans.2896437280 |
| Short name | T89 |
| Test name | |
| Test status | |
| Simulation time | 161640284 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:35:26 AM UTC 24 |
| Finished | Aug 27 07:35:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896437280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 0.usbdev_pending_in_trans.2896437280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_eop_single_bit_handling.2782457256 |
| Short name | T90 |
| Test name | |
| Test status | |
| Simulation time | 187874899 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:35:27 AM UTC 24 |
| Finished | Aug 27 07:35:30 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782457256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_eop_single_ bit_handling_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_eop_single_bit_handling.2782457256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_eop_single_bit_handling/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rand_bus_type.113424421 |
| Short name | T52 |
| Test name | |
| Test status | |
| Simulation time | 265762349 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:35:29 AM UTC 24 |
| Finished | Aug 27 07:35:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=113424421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_phy_config_rand_bus_type.113424421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_rx_dp_dn.1221281994 |
| Short name | T51 |
| Test name | |
| Test status | |
| Simulation time | 245448805 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:35:29 AM UTC 24 |
| Finished | Aug 27 07:35:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_diff_rcvr=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1221281994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_rx_dp_dn.1221281994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_rx_dp_dn/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_config_tx_use_d_se0.2617762337 |
| Short name | T91 |
| Test name | |
| Test status | |
| Simulation time | 230565516 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:35:30 AM UTC 24 |
| Finished | Aug 27 07:35:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +tx_use_d_se0=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2617762337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 0.usbdev_phy_config_tx_use_d_se0.2617762337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_config_tx_use_d_se0/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_phy_pins_sense.277503594 |
| Short name | T24 |
| Test name | |
| Test status | |
| Simulation time | 56247503 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:35:31 AM UTC 24 |
| Finished | Aug 27 07:35:33 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=277503594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_phy_pins_sense.277503594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_pkt_sent.3647335055 |
| Short name | T53 |
| Test name | |
| Test status | |
| Simulation time | 213710791 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:35:32 AM UTC 24 |
| Finished | Aug 27 07:35:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647335055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 0.usbdev_pkt_sent.3647335055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_bus_resets.1443138146 |
| Short name | T169 |
| Test name | |
| Test status | |
| Simulation time | 5953195425 ps |
| CPU time | 89.26 seconds |
| Started | Aug 27 07:35:33 AM UTC 24 |
| Finished | Aug 27 07:37:05 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1443138146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_bus_resets.1443138146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rand_suspends.43461699 |
| Short name | T70 |
| Test name | |
| Test status | |
| Simulation time | 5846489095 ps |
| CPU time | 24.48 seconds |
| Started | Aug 27 07:35:34 AM UTC 24 |
| Finished | Aug 27 07:35:59 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=43461699 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_rand_suspends.43461699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_in_transaction.3425274217 |
| Short name | T163 |
| Test name | |
| Test status | |
| Simulation time | 218403348 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:35:32 AM UTC 24 |
| Finished | Aug 27 07:35:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3425274217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 0.usbdev_random_length_in_transaction.3425274217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_random_length_out_transaction.2482288562 |
| Short name | T313 |
| Test name | |
| Test status | |
| Simulation time | 171649198 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:35:32 AM UTC 24 |
| Finished | Aug 27 07:35:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482288562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 0.usbdev_random_length_out_transaction.2482288562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_resume_link_active.1165832017 |
| Short name | T71 |
| Test name | |
| Test status | |
| Simulation time | 20208929840 ps |
| CPU time | 40.28 seconds |
| Started | Aug 27 07:35:34 AM UTC 24 |
| Finished | Aug 27 07:36:15 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1165832017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 0.usbdev_resume_link_active.1165832017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_rx_full.3527292534 |
| Short name | T19 |
| Test name | |
| Test status | |
| Simulation time | 364052751 ps |
| CPU time | 2.09 seconds |
| Started | Aug 27 07:35:36 AM UTC 24 |
| Finished | Aug 27 07:35:39 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3527292534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 0.usbdev_rx_full.3527292534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_priority_over_stall_response.3068217511 |
| Short name | T21 |
| Test name | |
| Test status | |
| Simulation time | 305605140 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:35:37 AM UTC 24 |
| Finished | Aug 27 07:35:39 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068217511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 0.usbdev_setup_priority_over_stall_response.3068217511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_setup_stage.3794216274 |
| Short name | T23 |
| Test name | |
| Test status | |
| Simulation time | 149353749 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:35:38 AM UTC 24 |
| Finished | Aug 27 07:35:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794216274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_setup_stage.3794216274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_smoke.942275285 |
| Short name | T327 |
| Test name | |
| Test status | |
| Simulation time | 248270433 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:35:39 AM UTC 24 |
| Finished | Aug 27 07:35:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=942275285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_smoke.942275285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_spurious_pids_ignored.2057711917 |
| Short name | T194 |
| Test name | |
| Test status | |
| Simulation time | 3136312474 ps |
| CPU time | 93.45 seconds |
| Started | Aug 27 07:35:39 AM UTC 24 |
| Finished | Aug 27 07:37:15 AM UTC 24 |
| Peak memory | 235376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057711917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 0.usbdev_spurious_pids_ignored.2057711917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stall_trans.2334657329 |
| Short name | T499 |
| Test name | |
| Test status | |
| Simulation time | 198383264 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:35:41 AM UTC 24 |
| Finished | Aug 27 07:35:43 AM UTC 24 |
| Peak memory | 216012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2334657329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 0.usbdev_stall_trans.2334657329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_stream_len_max.2322906903 |
| Short name | T240 |
| Test name | |
| Test status | |
| Simulation time | 576127599 ps |
| CPU time | 2.44 seconds |
| Started | Aug 27 07:35:41 AM UTC 24 |
| Finished | Aug 27 07:35:44 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2322906903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_stream_len_max.2322906903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_streaming_out.2284480156 |
| Short name | T173 |
| Test name | |
| Test status | |
| Simulation time | 2397114518 ps |
| CPU time | 30.21 seconds |
| Started | Aug 27 07:35:41 AM UTC 24 |
| Finished | Aug 27 07:36:12 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284480156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 0.usbdev_streaming_out.2284480156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_timeout_missing_host_handshake.754453698 |
| Short name | T65 |
| Test name | |
| Test status | |
| Simulation time | 3434382878 ps |
| CPU time | 25.38 seconds |
| Started | Aug 27 07:35:14 AM UTC 24 |
| Finished | Aug 27 07:35:41 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=754453698 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_timeout_missing_host_handshake.754453698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/0.usbdev_tx_rx_disruption.743338493 |
| Short name | T111 |
| Test name | |
| Test status | |
| Simulation time | 611579894 ps |
| CPU time | 2.57 seconds |
| Started | Aug 27 07:35:43 AM UTC 24 |
| Finished | Aug 27 07:35:46 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=743338493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 0.usbdev_tx_ rx_disruption.743338493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/0.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_alert_test.2973552788 |
| Short name | T207 |
| Test name | |
| Test status | |
| Simulation time | 42395678 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:36:37 AM UTC 24 |
| Finished | Aug 27 07:36:40 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973552788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 1.usbdev_alert_test.2973552788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_reset.764453173 |
| Short name | T11 |
| Test name | |
| Test status | |
| Simulation time | 21358790565 ps |
| CPU time | 41.87 seconds |
| Started | Aug 27 07:35:44 AM UTC 24 |
| Finished | Aug 27 07:36:28 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=764453173 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_reset.764453173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_aon_wake_resume.1798943465 |
| Short name | T12 |
| Test name | |
| Test status | |
| Simulation time | 24826035930 ps |
| CPU time | 42.35 seconds |
| Started | Aug 27 07:35:44 AM UTC 24 |
| Finished | Aug 27 07:36:28 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1798943465 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_aon_wake_resume.1798943465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_av_buffer.1211774364 |
| Short name | T224 |
| Test name | |
| Test status | |
| Simulation time | 159007986 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:35:46 AM UTC 24 |
| Finished | Aug 27 07:35:48 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211774364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_av_buffer.1211774364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_bitstuff_err.2564440988 |
| Short name | T85 |
| Test name | |
| Test status | |
| Simulation time | 195195478 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:35:47 AM UTC 24 |
| Finished | Aug 27 07:35:49 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2564440988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_bitstuff_err.2564440988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_clear.2891712380 |
| Short name | T117 |
| Test name | |
| Test status | |
| Simulation time | 508928860 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:35:48 AM UTC 24 |
| Finished | Aug 27 07:35:51 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891712380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 1.usbdev_data_toggle_clear.2891712380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_data_toggle_restore.1434538715 |
| Short name | T98 |
| Test name | |
| Test status | |
| Simulation time | 586242730 ps |
| CPU time | 2.82 seconds |
| Started | Aug 27 07:35:48 AM UTC 24 |
| Finished | Aug 27 07:35:52 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434538715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_data_toggle_restore.1434538715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_device_address.2186328125 |
| Short name | T123 |
| Test name | |
| Test status | |
| Simulation time | 37565217395 ps |
| CPU time | 73.13 seconds |
| Started | Aug 27 07:35:48 AM UTC 24 |
| Finished | Aug 27 07:37:03 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2186328125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_address.2186328125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_device_timeout.4182032788 |
| Short name | T190 |
| Test name | |
| Test status | |
| Simulation time | 561184460 ps |
| CPU time | 13.06 seconds |
| Started | Aug 27 07:35:48 AM UTC 24 |
| Finished | Aug 27 07:36:02 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4182032788 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_device_timeout.4182032788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_disable_endpoint.273649126 |
| Short name | T241 |
| Test name | |
| Test status | |
| Simulation time | 569516949 ps |
| CPU time | 2.59 seconds |
| Started | Aug 27 07:35:50 AM UTC 24 |
| Finished | Aug 27 07:35:54 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273649126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_disable_endpoint.273649126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_disconnected.3782460590 |
| Short name | T68 |
| Test name | |
| Test status | |
| Simulation time | 139146411 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:35:50 AM UTC 24 |
| Finished | Aug 27 07:35:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3782460590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_disconnected.3782460590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_enable.3216877099 |
| Short name | T254 |
| Test name | |
| Test status | |
| Simulation time | 76269123 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:35:51 AM UTC 24 |
| Finished | Aug 27 07:35:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3216877099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 1.usbdev_enable.3216877099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_access.1660096304 |
| Short name | T162 |
| Test name | |
| Test status | |
| Simulation time | 881962859 ps |
| CPU time | 4.13 seconds |
| Started | Aug 27 07:35:52 AM UTC 24 |
| Finished | Aug 27 07:35:58 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660096304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_access.1660096304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_endpoint_types.2306570521 |
| Short name | T121 |
| Test name | |
| Test status | |
| Simulation time | 535171640 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:35:53 AM UTC 24 |
| Finished | Aug 27 07:35:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2306570521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_endpoint_types.2306570521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_fifo_rst.2940618127 |
| Short name | T92 |
| Test name | |
| Test status | |
| Simulation time | 402450071 ps |
| CPU time | 3.21 seconds |
| Started | Aug 27 07:35:54 AM UTC 24 |
| Finished | Aug 27 07:35:58 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940618127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_fifo_rst.2940618127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk.1433888046 |
| Short name | T671 |
| Test name | |
| Test status | |
| Simulation time | 121186084569 ps |
| CPU time | 217.29 seconds |
| Started | Aug 27 07:35:55 AM UTC 24 |
| Finished | Aug 27 07:39:35 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433888046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_hiclk.1433888046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_freq_hiclk_max.1666060914 |
| Short name | T644 |
| Test name | |
| Test status | |
| Simulation time | 112350994602 ps |
| CPU time | 199.22 seconds |
| Started | Aug 27 07:35:55 AM UTC 24 |
| Finished | Aug 27 07:39:17 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1666060914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_hiclk_max.1666060914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk.3055933489 |
| Short name | T685 |
| Test name | |
| Test status | |
| Simulation time | 115118408664 ps |
| CPU time | 229.58 seconds |
| Started | Aug 27 07:35:55 AM UTC 24 |
| Finished | Aug 27 07:39:48 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3055933489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_freq_loclk.3055933489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_freq_loclk_max.3573598362 |
| Short name | T660 |
| Test name | |
| Test status | |
| Simulation time | 102219844648 ps |
| CPU time | 209.98 seconds |
| Started | Aug 27 07:35:56 AM UTC 24 |
| Finished | Aug 27 07:39:29 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3573598362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 1.usbdev_freq_loclk_max.3573598362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_freq_phase.2035565763 |
| Short name | T626 |
| Test name | |
| Test status | |
| Simulation time | 86159504562 ps |
| CPU time | 171.27 seconds |
| Started | Aug 27 07:35:56 AM UTC 24 |
| Finished | Aug 27 07:38:50 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2035565763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_freq_phase.2035565763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_iso.4042549152 |
| Short name | T114 |
| Test name | |
| Test status | |
| Simulation time | 188233739 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:35:59 AM UTC 24 |
| Finished | Aug 27 07:36:01 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4042549152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_in_iso.4042549152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_stall.3732193356 |
| Short name | T115 |
| Test name | |
| Test status | |
| Simulation time | 218879552 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:35:59 AM UTC 24 |
| Finished | Aug 27 07:36:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732193356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_stall.3732193356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_in_trans.3242000335 |
| Short name | T528 |
| Test name | |
| Test status | |
| Simulation time | 193815787 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:35:59 AM UTC 24 |
| Finished | Aug 27 07:36:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3242000335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_in_trans.3242000335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_invalid_sync.2730840522 |
| Short name | T168 |
| Test name | |
| Test status | |
| Simulation time | 4138889600 ps |
| CPU time | 41.23 seconds |
| Started | Aug 27 07:35:57 AM UTC 24 |
| Finished | Aug 27 07:36:40 AM UTC 24 |
| Peak memory | 235308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730840522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 1.usbdev_invalid_sync.2730840522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_iso_retraction.2033428010 |
| Short name | T96 |
| Test name | |
| Test status | |
| Simulation time | 12777764685 ps |
| CPU time | 103.04 seconds |
| Started | Aug 27 07:36:00 AM UTC 24 |
| Finished | Aug 27 07:37:45 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033428010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_iso_retraction.2033428010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_in_err.2744510511 |
| Short name | T529 |
| Test name | |
| Test status | |
| Simulation time | 218603633 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:36:00 AM UTC 24 |
| Finished | Aug 27 07:36:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2744510511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_in_err.2744510511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_resume.2871173392 |
| Short name | T73 |
| Test name | |
| Test status | |
| Simulation time | 32705874366 ps |
| CPU time | 61.52 seconds |
| Started | Aug 27 07:36:01 AM UTC 24 |
| Finished | Aug 27 07:37:04 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2871173392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_link_resume.2871173392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_link_suspend.3738117701 |
| Short name | T109 |
| Test name | |
| Test status | |
| Simulation time | 4355898886 ps |
| CPU time | 13.02 seconds |
| Started | Aug 27 07:36:02 AM UTC 24 |
| Finished | Aug 27 07:36:16 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738117701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_link_suspend.3738117701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_inter_pkt_delay.2764251042 |
| Short name | T172 |
| Test name | |
| Test status | |
| Simulation time | 2455925617 ps |
| CPU time | 30.32 seconds |
| Started | Aug 27 07:36:02 AM UTC 24 |
| Finished | Aug 27 07:36:34 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764251042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_inter_pkt_delay.2764251042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_in_transaction.1293429854 |
| Short name | T531 |
| Test name | |
| Test status | |
| Simulation time | 248362574 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:36:04 AM UTC 24 |
| Finished | Aug 27 07:36:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1293429854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_max_length_in_transaction.1293429854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_length_out_transaction.137127801 |
| Short name | T530 |
| Test name | |
| Test status | |
| Simulation time | 221816117 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:36:04 AM UTC 24 |
| Finished | Aug 27 07:36:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=137127801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 1.usbdev_max_length_out_transaction.137127801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_non_iso_usb_traffic.3157662791 |
| Short name | T164 |
| Test name | |
| Test status | |
| Simulation time | 1665261802 ps |
| CPU time | 17.17 seconds |
| Started | Aug 27 07:36:04 AM UTC 24 |
| Finished | Aug 27 07:36:22 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3157662791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_non_iso_usb_traffic.3157662791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_max_usb_traffic.1370756732 |
| Short name | T167 |
| Test name | |
| Test status | |
| Simulation time | 2388779583 ps |
| CPU time | 21.97 seconds |
| Started | Aug 27 07:36:05 AM UTC 24 |
| Finished | Aug 27 07:36:28 AM UTC 24 |
| Peak memory | 228492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370756732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_max_usb_traffic.1370756732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_inter_pkt_delay.1783852372 |
| Short name | T291 |
| Test name | |
| Test status | |
| Simulation time | 2907808881 ps |
| CPU time | 28.12 seconds |
| Started | Aug 27 07:36:07 AM UTC 24 |
| Finished | Aug 27 07:36:37 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783852372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_min_inter_pkt_delay.1783852372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_in_transaction.435681192 |
| Short name | T532 |
| Test name | |
| Test status | |
| Simulation time | 189266130 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:36:07 AM UTC 24 |
| Finished | Aug 27 07:36:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435681192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_in_transaction.435681192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_min_length_out_transaction.3611535035 |
| Short name | T533 |
| Test name | |
| Test status | |
| Simulation time | 172282380 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:36:10 AM UTC 24 |
| Finished | Aug 27 07:36:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3611535035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_min_length_out_transaction.3611535035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_iso.2877945600 |
| Short name | T225 |
| Test name | |
| Test status | |
| Simulation time | 210184467 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:36:14 AM UTC 24 |
| Finished | Aug 27 07:36:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2877945600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 1.usbdev_out_iso.2877945600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_stall.1736492377 |
| Short name | T534 |
| Test name | |
| Test status | |
| Simulation time | 198043155 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:36:16 AM UTC 24 |
| Finished | Aug 27 07:36:18 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1736492377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_out_stall.1736492377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_out_trans_nak.838133573 |
| Short name | T496 |
| Test name | |
| Test status | |
| Simulation time | 208727543 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:36:17 AM UTC 24 |
| Finished | Aug 27 07:36:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=838133573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_out_trans_nak.838133573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pending_in_trans.4221227960 |
| Short name | T188 |
| Test name | |
| Test status | |
| Simulation time | 171332110 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:36:17 AM UTC 24 |
| Finished | Aug 27 07:36:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221227960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 1.usbdev_pending_in_trans.4221227960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_pinflip.418058811 |
| Short name | T174 |
| Test name | |
| Test status | |
| Simulation time | 248685458 ps |
| CPU time | 1.82 seconds |
| Started | Aug 27 07:36:18 AM UTC 24 |
| Finished | Aug 27 07:36:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418058811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_pinflip.418058811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_rand_bus_type.270006934 |
| Short name | T171 |
| Test name | |
| Test status | |
| Simulation time | 224943826 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:36:19 AM UTC 24 |
| Finished | Aug 27 07:36:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270006934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_rand_bus_type.270006934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_config_usb_ref_disable.2598486439 |
| Short name | T209 |
| Test name | |
| Test status | |
| Simulation time | 152827943 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:36:20 AM UTC 24 |
| Finished | Aug 27 07:36:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2598486439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 1.usbdev_phy_config_usb_ref_disable.2598486439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_phy_pins_sense.907581219 |
| Short name | T25 |
| Test name | |
| Test status | |
| Simulation time | 42973994 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:36:20 AM UTC 24 |
| Finished | Aug 27 07:36:23 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=907581219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_phy_pins_sense.907581219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_received.912387612 |
| Short name | T342 |
| Test name | |
| Test status | |
| Simulation time | 203157502 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:36:23 AM UTC 24 |
| Finished | Aug 27 07:36:25 AM UTC 24 |
| Peak memory | 215436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=912387612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_pkt_received.912387612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_pkt_sent.2572311607 |
| Short name | T537 |
| Test name | |
| Test status | |
| Simulation time | 207602320 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:36:23 AM UTC 24 |
| Finished | Aug 27 07:36:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2572311607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 1.usbdev_pkt_sent.2572311607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_bus_resets.3870407238 |
| Short name | T560 |
| Test name | |
| Test status | |
| Simulation time | 2151913859 ps |
| CPU time | 57.8 seconds |
| Started | Aug 27 07:36:26 AM UTC 24 |
| Finished | Aug 27 07:37:26 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3870407238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_bus_resets.3870407238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rand_suspends.2257699345 |
| Short name | T573 |
| Test name | |
| Test status | |
| Simulation time | 6652488403 ps |
| CPU time | 87.33 seconds |
| Started | Aug 27 07:36:27 AM UTC 24 |
| Finished | Aug 27 07:37:56 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2257699345 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_rand_suspends.2257699345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_in_transaction.103999171 |
| Short name | T535 |
| Test name | |
| Test status | |
| Simulation time | 184306332 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:36:23 AM UTC 24 |
| Finished | Aug 27 07:36:25 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103999171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 1.usbdev_random_length_in_transaction.103999171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_random_length_out_transaction.989279774 |
| Short name | T536 |
| Test name | |
| Test status | |
| Simulation time | 178519747 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:36:23 AM UTC 24 |
| Finished | Aug 27 07:36:25 AM UTC 24 |
| Peak memory | 216260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=989279774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 1.usbdev_random_length_out_transaction.989279774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_resume_link_active.1311249546 |
| Short name | T99 |
| Test name | |
| Test status | |
| Simulation time | 20160727908 ps |
| CPU time | 25.42 seconds |
| Started | Aug 27 07:36:27 AM UTC 24 |
| Finished | Aug 27 07:36:53 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1311249546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 1.usbdev_resume_link_active.1311249546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_crc_err.759862211 |
| Short name | T78 |
| Test name | |
| Test status | |
| Simulation time | 153121123 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:36:27 AM UTC 24 |
| Finished | Aug 27 07:36:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759862211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_rx_crc_err.759862211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_rx_pid_err.1654642617 |
| Short name | T80 |
| Test name | |
| Test status | |
| Simulation time | 164625525 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:36:29 AM UTC 24 |
| Finished | Aug 27 07:36:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1654642617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 1.usbdev_rx_pid_err.1654642617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_sec_cm.1547673183 |
| Short name | T212 |
| Test name | |
| Test status | |
| Simulation time | 870369815 ps |
| CPU time | 3.14 seconds |
| Started | Aug 27 07:36:36 AM UTC 24 |
| Finished | Aug 27 07:36:40 AM UTC 24 |
| Peak memory | 252424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1547673183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 1.usbdev_sec_cm.1547673183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority.737661443 |
| Short name | T56 |
| Test name | |
| Test status | |
| Simulation time | 491024154 ps |
| CPU time | 2.58 seconds |
| Started | Aug 27 07:36:29 AM UTC 24 |
| Finished | Aug 27 07:36:33 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=737661443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 1.usbdev_setup_priority.737661443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_priority_over_stall_response.2108500411 |
| Short name | T189 |
| Test name | |
| Test status | |
| Simulation time | 232675157 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:36:29 AM UTC 24 |
| Finished | Aug 27 07:36:32 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2108500411 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 1.usbdev_setup_priority_over_stall_response.2108500411 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_stage.3246419365 |
| Short name | T538 |
| Test name | |
| Test status | |
| Simulation time | 154007824 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:36:29 AM UTC 24 |
| Finished | Aug 27 07:36:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246419365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_setup_stage.3246419365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_setup_trans_ignored.3573342413 |
| Short name | T309 |
| Test name | |
| Test status | |
| Simulation time | 149860514 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:36:30 AM UTC 24 |
| Finished | Aug 27 07:36:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3573342413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 1.usbdev_setup_trans_ignored.3573342413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_smoke.819124085 |
| Short name | T287 |
| Test name | |
| Test status | |
| Simulation time | 250681105 ps |
| CPU time | 2.07 seconds |
| Started | Aug 27 07:36:32 AM UTC 24 |
| Finished | Aug 27 07:36:35 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819124085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_smoke.819124085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_spurious_pids_ignored.990025000 |
| Short name | T261 |
| Test name | |
| Test status | |
| Simulation time | 2017703296 ps |
| CPU time | 27.47 seconds |
| Started | Aug 27 07:36:33 AM UTC 24 |
| Finished | Aug 27 07:37:02 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=990025000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 1.usbdev_spurious_pids_ignored.990025000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stall_priority_over_nak.2414576132 |
| Short name | T288 |
| Test name | |
| Test status | |
| Simulation time | 188482495 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:36:33 AM UTC 24 |
| Finished | Aug 27 07:36:35 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2414576132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stall_priority_over_nak.2414576132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stall_trans.1192920939 |
| Short name | T289 |
| Test name | |
| Test status | |
| Simulation time | 161093566 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:36:33 AM UTC 24 |
| Finished | Aug 27 07:36:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192920939 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 1.usbdev_stall_trans.1192920939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stream_len_max.3699858731 |
| Short name | T539 |
| Test name | |
| Test status | |
| Simulation time | 1296445252 ps |
| CPU time | 5.33 seconds |
| Started | Aug 27 07:36:34 AM UTC 24 |
| Finished | Aug 27 07:36:40 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3699858731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stream_len_max.3699858731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_streaming_out.2173906900 |
| Short name | T576 |
| Test name | |
| Test status | |
| Simulation time | 2853282078 ps |
| CPU time | 81.76 seconds |
| Started | Aug 27 07:36:34 AM UTC 24 |
| Finished | Aug 27 07:37:58 AM UTC 24 |
| Peak memory | 228664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2173906900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 1.usbdev_streaming_out.2173906900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_stress_usb_traffic.3549550103 |
| Short name | T83 |
| Test name | |
| Test status | |
| Simulation time | 3777333483 ps |
| CPU time | 38.05 seconds |
| Started | Aug 27 07:36:36 AM UTC 24 |
| Finished | Aug 27 07:37:15 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3549550103 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_stress_usb_traffic.3549550103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_timeout_missing_host_handshake.202095764 |
| Short name | T175 |
| Test name | |
| Test status | |
| Simulation time | 1513395199 ps |
| CPU time | 12.35 seconds |
| Started | Aug 27 07:35:49 AM UTC 24 |
| Finished | Aug 27 07:36:03 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=202095764 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_timeout_missing_host_handshake.202095764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/1.usbdev_tx_rx_disruption.3983849736 |
| Short name | T165 |
| Test name | |
| Test status | |
| Simulation time | 636974703 ps |
| CPU time | 3.08 seconds |
| Started | Aug 27 07:36:36 AM UTC 24 |
| Finished | Aug 27 07:36:40 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3983849736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 1.usbdev_tx _rx_disruption.3983849736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/1.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_alert_test.3059536331 |
| Short name | T998 |
| Test name | |
| Test status | |
| Simulation time | 42766946 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059536331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 10.usbdev_alert_test.3059536331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_disconnect.2833881922 |
| Short name | T957 |
| Test name | |
| Test status | |
| Simulation time | 4586388752 ps |
| CPU time | 7.1 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:28 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833881922 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_disconnect.2833881922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_reset.306688319 |
| Short name | T995 |
| Test name | |
| Test status | |
| Simulation time | 15935710198 ps |
| CPU time | 23.69 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:44 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=306688319 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_reset.306688319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_aon_wake_resume.1497225455 |
| Short name | T1043 |
| Test name | |
| Test status | |
| Simulation time | 28671628179 ps |
| CPU time | 41.92 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:43:03 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1497225455 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_aon_wake_resume.1497225455 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_av_buffer.272905669 |
| Short name | T947 |
| Test name | |
| Test status | |
| Simulation time | 154534873 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=272905669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_av_buffer.272905669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_bitstuff_err.2587019549 |
| Short name | T946 |
| Test name | |
| Test status | |
| Simulation time | 145487388 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2587019549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_bitstuff_err.2587019549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_clear.2227698910 |
| Short name | T948 |
| Test name | |
| Test status | |
| Simulation time | 319842442 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2227698910 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 10.usbdev_data_toggle_clear.2227698910 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_data_toggle_restore.399628918 |
| Short name | T951 |
| Test name | |
| Test status | |
| Simulation time | 431256022 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:42:21 AM UTC 24 |
| Finished | Aug 27 07:42:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=399628918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_data_toggle_restore.399628918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_device_address.733200643 |
| Short name | T504 |
| Test name | |
| Test status | |
| Simulation time | 14511885150 ps |
| CPU time | 26.35 seconds |
| Started | Aug 27 07:42:21 AM UTC 24 |
| Finished | Aug 27 07:42:49 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=733200643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_device_address.733200643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_device_timeout.3232871381 |
| Short name | T1053 |
| Test name | |
| Test status | |
| Simulation time | 7028402106 ps |
| CPU time | 43.71 seconds |
| Started | Aug 27 07:42:21 AM UTC 24 |
| Finished | Aug 27 07:43:07 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232871381 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_device_timeout.3232871381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_disable_endpoint.3186566760 |
| Short name | T955 |
| Test name | |
| Test status | |
| Simulation time | 938283716 ps |
| CPU time | 2.36 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:27 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186566760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_disable_endpoint.3186566760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_disconnected.3605572691 |
| Short name | T954 |
| Test name | |
| Test status | |
| Simulation time | 158362686 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605572691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 10.usbdev_disconnected.3605572691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_enable.4100639693 |
| Short name | T953 |
| Test name | |
| Test status | |
| Simulation time | 31576188 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4100639693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_enable.4100639693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_access.3748588343 |
| Short name | T961 |
| Test name | |
| Test status | |
| Simulation time | 935058383 ps |
| CPU time | 3.95 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:28 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3748588343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_access.3748588343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_endpoint_types.3845118584 |
| Short name | T392 |
| Test name | |
| Test status | |
| Simulation time | 477198940 ps |
| CPU time | 2.32 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:27 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3845118584 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_endpoint_types.3845118584 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_fifo_rst.560515935 |
| Short name | T962 |
| Test name | |
| Test status | |
| Simulation time | 207273561 ps |
| CPU time | 2.66 seconds |
| Started | Aug 27 07:42:25 AM UTC 24 |
| Finished | Aug 27 07:42:29 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=560515935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_fifo_rst.560515935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_in_iso.3880232226 |
| Short name | T959 |
| Test name | |
| Test status | |
| Simulation time | 193679040 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:42:25 AM UTC 24 |
| Finished | Aug 27 07:42:28 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3880232226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_in_iso.3880232226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_in_stall.2763791207 |
| Short name | T958 |
| Test name | |
| Test status | |
| Simulation time | 152231213 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:42:25 AM UTC 24 |
| Finished | Aug 27 07:42:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2763791207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_in_stall.2763791207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_in_trans.754237326 |
| Short name | T963 |
| Test name | |
| Test status | |
| Simulation time | 158939660 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:42:27 AM UTC 24 |
| Finished | Aug 27 07:42:29 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754237326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_in_trans.754237326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_invalid_sync.3379491545 |
| Short name | T1117 |
| Test name | |
| Test status | |
| Simulation time | 2712440405 ps |
| CPU time | 70.33 seconds |
| Started | Aug 27 07:42:25 AM UTC 24 |
| Finished | Aug 27 07:43:37 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379491545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 10.usbdev_invalid_sync.3379491545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_iso_retraction.3430724553 |
| Short name | T1051 |
| Test name | |
| Test status | |
| Simulation time | 5666335092 ps |
| CPU time | 37.69 seconds |
| Started | Aug 27 07:42:27 AM UTC 24 |
| Finished | Aug 27 07:43:06 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3430724553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_iso_retraction.3430724553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_link_in_err.1267529668 |
| Short name | T964 |
| Test name | |
| Test status | |
| Simulation time | 223558042 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:42:27 AM UTC 24 |
| Finished | Aug 27 07:42:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267529668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_in_err.1267529668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_link_resume.3570992360 |
| Short name | T996 |
| Test name | |
| Test status | |
| Simulation time | 7523846019 ps |
| CPU time | 15.39 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:42:45 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3570992360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_resume.3570992360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_link_suspend.521807835 |
| Short name | T204 |
| Test name | |
| Test status | |
| Simulation time | 9377632161 ps |
| CPU time | 13.82 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:42:44 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=521807835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_link_suspend.521807835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_low_speed_traffic.3378014805 |
| Short name | T1028 |
| Test name | |
| Test status | |
| Simulation time | 3685288925 ps |
| CPU time | 28.24 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:42:58 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378014805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_low_speed_traffic.3378014805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_max_inter_pkt_delay.3218990984 |
| Short name | T1181 |
| Test name | |
| Test status | |
| Simulation time | 3298800873 ps |
| CPU time | 93.16 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:44:04 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3218990984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_inter_pkt_delay.3218990984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_in_transaction.985248299 |
| Short name | T966 |
| Test name | |
| Test status | |
| Simulation time | 305470650 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:42:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=985248299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_in_transaction.985248299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_max_length_out_transaction.4277515356 |
| Short name | T965 |
| Test name | |
| Test status | |
| Simulation time | 237408374 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:42:29 AM UTC 24 |
| Finished | Aug 27 07:42:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4277515356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_max_length_out_transaction.4277515356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_max_non_iso_usb_traffic.766925918 |
| Short name | T1058 |
| Test name | |
| Test status | |
| Simulation time | 3968985351 ps |
| CPU time | 36.54 seconds |
| Started | Aug 27 07:42:31 AM UTC 24 |
| Finished | Aug 27 07:43:09 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=766925918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_non_iso_usb_traffic.766925918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_max_usb_traffic.1074587246 |
| Short name | T1156 |
| Test name | |
| Test status | |
| Simulation time | 3044861257 ps |
| CPU time | 81.79 seconds |
| Started | Aug 27 07:42:31 AM UTC 24 |
| Finished | Aug 27 07:43:55 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074587246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_max_usb_traffic.1074587246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_min_inter_pkt_delay.3269320936 |
| Short name | T1031 |
| Test name | |
| Test status | |
| Simulation time | 2387457221 ps |
| CPU time | 27.72 seconds |
| Started | Aug 27 07:42:31 AM UTC 24 |
| Finished | Aug 27 07:43:00 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269320936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_min_inter_pkt_delay.3269320936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_in_transaction.182612327 |
| Short name | T969 |
| Test name | |
| Test status | |
| Simulation time | 156918816 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:42:31 AM UTC 24 |
| Finished | Aug 27 07:42:34 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182612327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_in_transaction.182612327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_min_length_out_transaction.3799757744 |
| Short name | T970 |
| Test name | |
| Test status | |
| Simulation time | 150112233 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:42:31 AM UTC 24 |
| Finished | Aug 27 07:42:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3799757744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 10.usbdev_min_length_out_transaction.3799757744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_out_iso.1350895775 |
| Short name | T971 |
| Test name | |
| Test status | |
| Simulation time | 152157731 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:42:33 AM UTC 24 |
| Finished | Aug 27 07:42:35 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1350895775 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 10.usbdev_out_iso.1350895775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_out_stall.3421243720 |
| Short name | T972 |
| Test name | |
| Test status | |
| Simulation time | 220995626 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:42:33 AM UTC 24 |
| Finished | Aug 27 07:42:36 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3421243720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_out_stall.3421243720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_out_trans_nak.4105938329 |
| Short name | T974 |
| Test name | |
| Test status | |
| Simulation time | 142549454 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:42:35 AM UTC 24 |
| Finished | Aug 27 07:42:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4105938329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_out_trans_nak.4105938329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_pending_in_trans.3792298794 |
| Short name | T975 |
| Test name | |
| Test status | |
| Simulation time | 149568846 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:42:35 AM UTC 24 |
| Finished | Aug 27 07:42:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792298794 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_pending_in_trans.3792298794 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_pinflip.2457056418 |
| Short name | T977 |
| Test name | |
| Test status | |
| Simulation time | 245642809 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:42:35 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2457056418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_config_pinflip.2457056418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_phy_config_usb_ref_disable.648922942 |
| Short name | T982 |
| Test name | |
| Test status | |
| Simulation time | 138448344 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:42:37 AM UTC 24 |
| Finished | Aug 27 07:42:39 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=648922942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 10.usbdev_phy_config_usb_ref_disable.648922942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_phy_pins_sense.3355189086 |
| Short name | T983 |
| Test name | |
| Test status | |
| Simulation time | 42058087 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:42:37 AM UTC 24 |
| Finished | Aug 27 07:42:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3355189086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_phy_pins_sense.3355189086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_buffer.270172447 |
| Short name | T1105 |
| Test name | |
| Test status | |
| Simulation time | 19613590658 ps |
| CPU time | 51.79 seconds |
| Started | Aug 27 07:42:37 AM UTC 24 |
| Finished | Aug 27 07:43:30 AM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=270172447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_pkt_buffer.270172447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_received.878564916 |
| Short name | T984 |
| Test name | |
| Test status | |
| Simulation time | 171262602 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:42:37 AM UTC 24 |
| Finished | Aug 27 07:42:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878564916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_pkt_received.878564916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_pkt_sent.3252618453 |
| Short name | T993 |
| Test name | |
| Test status | |
| Simulation time | 247018543 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252618453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 10.usbdev_pkt_sent.3252618453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_in_transaction.3464067481 |
| Short name | T990 |
| Test name | |
| Test status | |
| Simulation time | 195358869 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464067481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 10.usbdev_random_length_in_transaction.3464067481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_random_length_out_transaction.1821403280 |
| Short name | T988 |
| Test name | |
| Test status | |
| Simulation time | 196303382 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821403280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 10.usbdev_random_length_out_transaction.1821403280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_resume_link_active.47898356 |
| Short name | T1067 |
| Test name | |
| Test status | |
| Simulation time | 20165642385 ps |
| CPU time | 32.02 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:43:13 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47898356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 10.usbdev_resume_link_active.47898356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_rx_crc_err.750819779 |
| Short name | T989 |
| Test name | |
| Test status | |
| Simulation time | 153407148 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750819779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_rx_crc_err.750819779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_rx_full.496850817 |
| Short name | T302 |
| Test name | |
| Test status | |
| Simulation time | 251856911 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=496850817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 10.usbdev_rx_full.496850817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_setup_stage.1026171021 |
| Short name | T991 |
| Test name | |
| Test status | |
| Simulation time | 217924737 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026171021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_setup_stage.1026171021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_setup_trans_ignored.3277571746 |
| Short name | T992 |
| Test name | |
| Test status | |
| Simulation time | 164023178 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277571746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 10.usbdev_setup_trans_ignored.3277571746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_smoke.3835357620 |
| Short name | T994 |
| Test name | |
| Test status | |
| Simulation time | 247714504 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:42:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3835357620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_smoke.3835357620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_spurious_pids_ignored.4259751832 |
| Short name | T1123 |
| Test name | |
| Test status | |
| Simulation time | 2217275240 ps |
| CPU time | 58.13 seconds |
| Started | Aug 27 07:42:40 AM UTC 24 |
| Finished | Aug 27 07:43:40 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4259751832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 10.usbdev_spurious_pids_ignored.4259751832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_stall_priority_over_nak.3949402093 |
| Short name | T999 |
| Test name | |
| Test status | |
| Simulation time | 187807390 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:42:43 AM UTC 24 |
| Finished | Aug 27 07:42:46 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3949402093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stall_priority_over_nak.3949402093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_stall_trans.1762689929 |
| Short name | T1001 |
| Test name | |
| Test status | |
| Simulation time | 187364375 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:46 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1762689929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 10.usbdev_stall_trans.1762689929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_stream_len_max.2321855495 |
| Short name | T1003 |
| Test name | |
| Test status | |
| Simulation time | 451595571 ps |
| CPU time | 2.46 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:47 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321855495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_stream_len_max.2321855495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_streaming_out.1442301127 |
| Short name | T1046 |
| Test name | |
| Test status | |
| Simulation time | 2333960926 ps |
| CPU time | 19 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:43:04 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442301127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 10.usbdev_streaming_out.1442301127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_timeout_missing_host_handshake.2340632641 |
| Short name | T976 |
| Test name | |
| Test status | |
| Simulation time | 1597691664 ps |
| CPU time | 13.08 seconds |
| Started | Aug 27 07:42:23 AM UTC 24 |
| Finished | Aug 27 07:42:37 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2340632641 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_timeout_missing_host_handshake.2340632641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/10.usbdev_tx_rx_disruption.1979776170 |
| Short name | T1005 |
| Test name | |
| Test status | |
| Simulation time | 578162512 ps |
| CPU time | 2.89 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:48 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1979776170 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 10.usbdev_t x_rx_disruption.1979776170 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/10.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/100.usbdev_endpoint_types.624012415 |
| Short name | T468 |
| Test name | |
| Test status | |
| Simulation time | 215598699 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=624012415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 100.usbdev_endpoint_types.624012415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/100.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/100.usbdev_tx_rx_disruption.3306535315 |
| Short name | T3195 |
| Test name | |
| Test status | |
| Simulation time | 605135222 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3306535315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 100.usbdev_ tx_rx_disruption.3306535315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/100.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/101.usbdev_endpoint_types.3675558447 |
| Short name | T411 |
| Test name | |
| Test status | |
| Simulation time | 410231462 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675558447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_endpoint_types.3675558447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/101.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/101.usbdev_tx_rx_disruption.2775587708 |
| Short name | T3198 |
| Test name | |
| Test status | |
| Simulation time | 579402887 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2775587708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 101.usbdev_ tx_rx_disruption.2775587708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/101.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/102.usbdev_endpoint_types.1913275565 |
| Short name | T404 |
| Test name | |
| Test status | |
| Simulation time | 256669428 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1913275565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_endpoint_types.1913275565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/102.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/102.usbdev_tx_rx_disruption.2190156716 |
| Short name | T3192 |
| Test name | |
| Test status | |
| Simulation time | 528049585 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2190156716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 102.usbdev_ tx_rx_disruption.2190156716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/102.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/103.usbdev_tx_rx_disruption.1810716867 |
| Short name | T3197 |
| Test name | |
| Test status | |
| Simulation time | 537835151 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1810716867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 103.usbdev_ tx_rx_disruption.1810716867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/103.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/104.usbdev_endpoint_types.685575392 |
| Short name | T380 |
| Test name | |
| Test status | |
| Simulation time | 864073567 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=685575392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 104.usbdev_endpoint_types.685575392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/104.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/104.usbdev_tx_rx_disruption.3873506482 |
| Short name | T3205 |
| Test name | |
| Test status | |
| Simulation time | 664660597 ps |
| CPU time | 2.21 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:23 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3873506482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 104.usbdev_ tx_rx_disruption.3873506482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/104.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/105.usbdev_endpoint_types.3290517861 |
| Short name | T375 |
| Test name | |
| Test status | |
| Simulation time | 462143601 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3290517861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 105.usbdev_endpoint_types.3290517861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/105.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/106.usbdev_endpoint_types.3398590235 |
| Short name | T471 |
| Test name | |
| Test status | |
| Simulation time | 370978999 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398590235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_endpoint_types.3398590235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/106.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/106.usbdev_tx_rx_disruption.1315046699 |
| Short name | T3196 |
| Test name | |
| Test status | |
| Simulation time | 575596769 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1315046699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 106.usbdev_ tx_rx_disruption.1315046699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/106.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/107.usbdev_endpoint_types.2777115006 |
| Short name | T3190 |
| Test name | |
| Test status | |
| Simulation time | 212991765 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777115006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_endpoint_types.2777115006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/107.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/107.usbdev_tx_rx_disruption.11481532 |
| Short name | T3201 |
| Test name | |
| Test status | |
| Simulation time | 494541072 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=11481532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 107.usbdev_tx _rx_disruption.11481532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/107.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/108.usbdev_tx_rx_disruption.266158064 |
| Short name | T3202 |
| Test name | |
| Test status | |
| Simulation time | 640151091 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=266158064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 108.usbdev_t x_rx_disruption.266158064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/108.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/109.usbdev_endpoint_types.2959548277 |
| Short name | T3193 |
| Test name | |
| Test status | |
| Simulation time | 345354417 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2959548277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_endpoint_types.2959548277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/109.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/109.usbdev_tx_rx_disruption.2467905347 |
| Short name | T3204 |
| Test name | |
| Test status | |
| Simulation time | 709992836 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:23 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2467905347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 109.usbdev_ tx_rx_disruption.2467905347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/109.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_alert_test.2828447618 |
| Short name | T1054 |
| Test name | |
| Test status | |
| Simulation time | 105318196 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828447618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 11.usbdev_alert_test.2828447618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_disconnect.3792796127 |
| Short name | T235 |
| Test name | |
| Test status | |
| Simulation time | 9825917564 ps |
| CPU time | 16.46 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:43:02 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3792796127 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_disconnect.3792796127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_reset.353292416 |
| Short name | T1052 |
| Test name | |
| Test status | |
| Simulation time | 15637197252 ps |
| CPU time | 21.47 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:43:07 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=353292416 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_reset.353292416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_aon_wake_resume.525392812 |
| Short name | T1086 |
| Test name | |
| Test status | |
| Simulation time | 25929585983 ps |
| CPU time | 36.41 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:43:22 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525392812 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_aon_wake_resume.525392812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_av_buffer.3991382235 |
| Short name | T1000 |
| Test name | |
| Test status | |
| Simulation time | 182244505 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3991382235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_av_buffer.3991382235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_bitstuff_err.456028100 |
| Short name | T1002 |
| Test name | |
| Test status | |
| Simulation time | 165337284 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=456028100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_bitstuff_err.456028100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_clear.433066256 |
| Short name | T1004 |
| Test name | |
| Test status | |
| Simulation time | 586092962 ps |
| CPU time | 2.24 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:47 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=433066256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_data_toggle_clear.433066256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_data_toggle_restore.1010663340 |
| Short name | T1007 |
| Test name | |
| Test status | |
| Simulation time | 626908647 ps |
| CPU time | 3.3 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:42:48 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010663340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_data_toggle_restore.1010663340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_device_address.651604482 |
| Short name | T1070 |
| Test name | |
| Test status | |
| Simulation time | 18957042941 ps |
| CPU time | 29.99 seconds |
| Started | Aug 27 07:42:44 AM UTC 24 |
| Finished | Aug 27 07:43:15 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=651604482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_device_address.651604482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_device_timeout.1579096665 |
| Short name | T1006 |
| Test name | |
| Test status | |
| Simulation time | 173236618 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:42:45 AM UTC 24 |
| Finished | Aug 27 07:42:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1579096665 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_device_timeout.1579096665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_disable_endpoint.4272167629 |
| Short name | T1009 |
| Test name | |
| Test status | |
| Simulation time | 929141103 ps |
| CPU time | 2.62 seconds |
| Started | Aug 27 07:42:46 AM UTC 24 |
| Finished | Aug 27 07:42:49 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272167629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_disable_endpoint.4272167629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_disconnected.2507296131 |
| Short name | T1011 |
| Test name | |
| Test status | |
| Simulation time | 143764003 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:42:47 AM UTC 24 |
| Finished | Aug 27 07:42:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507296131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_disconnected.2507296131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_enable.4006565106 |
| Short name | T1010 |
| Test name | |
| Test status | |
| Simulation time | 51642111 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:42:47 AM UTC 24 |
| Finished | Aug 27 07:42:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4006565106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 11.usbdev_enable.4006565106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_access.798228199 |
| Short name | T1016 |
| Test name | |
| Test status | |
| Simulation time | 1009552581 ps |
| CPU time | 3.94 seconds |
| Started | Aug 27 07:42:48 AM UTC 24 |
| Finished | Aug 27 07:42:52 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798228199 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_access.798228199 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_endpoint_types.3258269836 |
| Short name | T474 |
| Test name | |
| Test status | |
| Simulation time | 265696024 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:42:48 AM UTC 24 |
| Finished | Aug 27 07:42:50 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258269836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_endpoint_types.3258269836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_fifo_rst.1814044513 |
| Short name | T1012 |
| Test name | |
| Test status | |
| Simulation time | 206636950 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:42:48 AM UTC 24 |
| Finished | Aug 27 07:42:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814044513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_fifo_rst.1814044513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_in_iso.1200347965 |
| Short name | T1013 |
| Test name | |
| Test status | |
| Simulation time | 220624425 ps |
| CPU time | 1.84 seconds |
| Started | Aug 27 07:42:48 AM UTC 24 |
| Finished | Aug 27 07:42:51 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1200347965 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_in_iso.1200347965 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_in_stall.1520652908 |
| Short name | T1015 |
| Test name | |
| Test status | |
| Simulation time | 141385117 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:42:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520652908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_stall.1520652908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_in_trans.1056057566 |
| Short name | T1014 |
| Test name | |
| Test status | |
| Simulation time | 240248730 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:42:52 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1056057566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_in_trans.1056057566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_invalid_sync.3749325565 |
| Short name | T1228 |
| Test name | |
| Test status | |
| Simulation time | 3238614091 ps |
| CPU time | 90.99 seconds |
| Started | Aug 27 07:42:48 AM UTC 24 |
| Finished | Aug 27 07:44:21 AM UTC 24 |
| Peak memory | 230452 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3749325565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 11.usbdev_invalid_sync.3749325565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_iso_retraction.4078554709 |
| Short name | T1125 |
| Test name | |
| Test status | |
| Simulation time | 4427273510 ps |
| CPU time | 50.36 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:43:42 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078554709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_iso_retraction.4078554709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_link_in_err.561024326 |
| Short name | T1017 |
| Test name | |
| Test status | |
| Simulation time | 226933984 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:42:53 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561024326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_link_in_err.561024326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_link_suspend.1673095392 |
| Short name | T1037 |
| Test name | |
| Test status | |
| Simulation time | 3898074037 ps |
| CPU time | 9.46 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:43:01 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673095392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_link_suspend.1673095392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_low_speed_traffic.418042010 |
| Short name | T1276 |
| Test name | |
| Test status | |
| Simulation time | 4398782211 ps |
| CPU time | 110.68 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:44:43 AM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=418042010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_low_speed_traffic.418042010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_max_inter_pkt_delay.1493687898 |
| Short name | T1214 |
| Test name | |
| Test status | |
| Simulation time | 3109085201 ps |
| CPU time | 82.73 seconds |
| Started | Aug 27 07:42:50 AM UTC 24 |
| Finished | Aug 27 07:44:15 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493687898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_inter_pkt_delay.1493687898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_in_transaction.3240336985 |
| Short name | T1021 |
| Test name | |
| Test status | |
| Simulation time | 251199558 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:42:52 AM UTC 24 |
| Finished | Aug 27 07:42:55 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240336985 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_in_transaction.3240336985 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_max_length_out_transaction.3707171641 |
| Short name | T1022 |
| Test name | |
| Test status | |
| Simulation time | 228924510 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:42:52 AM UTC 24 |
| Finished | Aug 27 07:42:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707171641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_max_length_out_transaction.3707171641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_max_non_iso_usb_traffic.1194327967 |
| Short name | T1161 |
| Test name | |
| Test status | |
| Simulation time | 2249893054 ps |
| CPU time | 62.29 seconds |
| Started | Aug 27 07:42:52 AM UTC 24 |
| Finished | Aug 27 07:43:57 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1194327967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_non_iso_usb_traffic.1194327967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_max_usb_traffic.1391486138 |
| Short name | T1176 |
| Test name | |
| Test status | |
| Simulation time | 2404492319 ps |
| CPU time | 68.09 seconds |
| Started | Aug 27 07:42:53 AM UTC 24 |
| Finished | Aug 27 07:44:02 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391486138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_max_usb_traffic.1391486138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_min_inter_pkt_delay.2084648996 |
| Short name | T1186 |
| Test name | |
| Test status | |
| Simulation time | 2875921880 ps |
| CPU time | 70.88 seconds |
| Started | Aug 27 07:42:53 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2084648996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_min_inter_pkt_delay.2084648996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_in_transaction.440588173 |
| Short name | T1020 |
| Test name | |
| Test status | |
| Simulation time | 189792934 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:42:53 AM UTC 24 |
| Finished | Aug 27 07:42:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440588173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_in_transaction.440588173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_min_length_out_transaction.1033577050 |
| Short name | T1019 |
| Test name | |
| Test status | |
| Simulation time | 152521927 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:42:53 AM UTC 24 |
| Finished | Aug 27 07:42:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1033577050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_min_length_out_transaction.1033577050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_out_iso.3803418298 |
| Short name | T1024 |
| Test name | |
| Test status | |
| Simulation time | 171619808 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:42:54 AM UTC 24 |
| Finished | Aug 27 07:42:57 AM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3803418298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_out_iso.3803418298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_out_stall.2710848356 |
| Short name | T1025 |
| Test name | |
| Test status | |
| Simulation time | 171392943 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:42:54 AM UTC 24 |
| Finished | Aug 27 07:42:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2710848356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_out_stall.2710848356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_out_trans_nak.2260659020 |
| Short name | T1026 |
| Test name | |
| Test status | |
| Simulation time | 173180494 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:42:54 AM UTC 24 |
| Finished | Aug 27 07:42:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260659020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_out_trans_nak.2260659020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_pending_in_trans.2431422568 |
| Short name | T1023 |
| Test name | |
| Test status | |
| Simulation time | 153771541 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:42:54 AM UTC 24 |
| Finished | Aug 27 07:42:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2431422568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 11.usbdev_pending_in_trans.2431422568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_pinflip.1188807879 |
| Short name | T1030 |
| Test name | |
| Test status | |
| Simulation time | 187712306 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:42:56 AM UTC 24 |
| Finished | Aug 27 07:42:59 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188807879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_pinflip.1188807879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_phy_config_usb_ref_disable.1144408042 |
| Short name | T1029 |
| Test name | |
| Test status | |
| Simulation time | 181522295 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:42:56 AM UTC 24 |
| Finished | Aug 27 07:42:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1144408042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 11.usbdev_phy_config_usb_ref_disable.1144408042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_buffer.1183364973 |
| Short name | T1107 |
| Test name | |
| Test status | |
| Simulation time | 13321982604 ps |
| CPU time | 33.92 seconds |
| Started | Aug 27 07:42:56 AM UTC 24 |
| Finished | Aug 27 07:43:31 AM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183364973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_pkt_buffer.1183364973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_received.3401933436 |
| Short name | T1032 |
| Test name | |
| Test status | |
| Simulation time | 169989947 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:42:58 AM UTC 24 |
| Finished | Aug 27 07:43:00 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3401933436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 11.usbdev_pkt_received.3401933436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_pkt_sent.2203438467 |
| Short name | T1035 |
| Test name | |
| Test status | |
| Simulation time | 229849191 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:42:58 AM UTC 24 |
| Finished | Aug 27 07:43:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203438467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 11.usbdev_pkt_sent.2203438467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_in_transaction.2360460739 |
| Short name | T1033 |
| Test name | |
| Test status | |
| Simulation time | 189253597 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:42:58 AM UTC 24 |
| Finished | Aug 27 07:43:00 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2360460739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 11.usbdev_random_length_in_transaction.2360460739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_random_length_out_transaction.2563964366 |
| Short name | T1034 |
| Test name | |
| Test status | |
| Simulation time | 181209904 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:42:58 AM UTC 24 |
| Finished | Aug 27 07:43:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563964366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 11.usbdev_random_length_out_transaction.2563964366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_resume_link_active.1545346803 |
| Short name | T1108 |
| Test name | |
| Test status | |
| Simulation time | 20192528358 ps |
| CPU time | 31.08 seconds |
| Started | Aug 27 07:43:00 AM UTC 24 |
| Finished | Aug 27 07:43:32 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545346803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 11.usbdev_resume_link_active.1545346803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_rx_crc_err.1660366301 |
| Short name | T1038 |
| Test name | |
| Test status | |
| Simulation time | 138361625 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:43:00 AM UTC 24 |
| Finished | Aug 27 07:43:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660366301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_rx_crc_err.1660366301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_rx_full.1564117043 |
| Short name | T1042 |
| Test name | |
| Test status | |
| Simulation time | 258654590 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:43:00 AM UTC 24 |
| Finished | Aug 27 07:43:03 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564117043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 11.usbdev_rx_full.1564117043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_setup_stage.1765643929 |
| Short name | T1040 |
| Test name | |
| Test status | |
| Simulation time | 159027966 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:43:00 AM UTC 24 |
| Finished | Aug 27 07:43:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765643929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 11.usbdev_setup_stage.1765643929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_setup_trans_ignored.2430351256 |
| Short name | T1039 |
| Test name | |
| Test status | |
| Simulation time | 161362881 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:43:00 AM UTC 24 |
| Finished | Aug 27 07:43:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2430351256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 11.usbdev_setup_trans_ignored.2430351256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_smoke.2629146104 |
| Short name | T1049 |
| Test name | |
| Test status | |
| Simulation time | 278629556 ps |
| CPU time | 1.94 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629146104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_smoke.2629146104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_spurious_pids_ignored.2476836619 |
| Short name | T1087 |
| Test name | |
| Test status | |
| Simulation time | 2140789104 ps |
| CPU time | 19.74 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:23 AM UTC 24 |
| Peak memory | 228368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476836619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 11.usbdev_spurious_pids_ignored.2476836619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_stall_priority_over_nak.184453679 |
| Short name | T1047 |
| Test name | |
| Test status | |
| Simulation time | 163440804 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:05 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=184453679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stall_priority_over_nak.184453679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_stall_trans.356833888 |
| Short name | T1048 |
| Test name | |
| Test status | |
| Simulation time | 167757262 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:05 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356833888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 11.usbdev_stall_trans.356833888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_stream_len_max.4024992574 |
| Short name | T1050 |
| Test name | |
| Test status | |
| Simulation time | 396053553 ps |
| CPU time | 2.2 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:06 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4024992574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_stream_len_max.4024992574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_streaming_out.3328902862 |
| Short name | T1166 |
| Test name | |
| Test status | |
| Simulation time | 2370987982 ps |
| CPU time | 55.89 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:44:00 AM UTC 24 |
| Peak memory | 228372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328902862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 11.usbdev_streaming_out.3328902862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_timeout_missing_host_handshake.1788406801 |
| Short name | T1059 |
| Test name | |
| Test status | |
| Simulation time | 3666373062 ps |
| CPU time | 22.43 seconds |
| Started | Aug 27 07:42:46 AM UTC 24 |
| Finished | Aug 27 07:43:09 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1788406801 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_timeout_missing_host_handshake.1788406801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/11.usbdev_tx_rx_disruption.3517443643 |
| Short name | T216 |
| Test name | |
| Test status | |
| Simulation time | 612055377 ps |
| CPU time | 2.81 seconds |
| Started | Aug 27 07:43:02 AM UTC 24 |
| Finished | Aug 27 07:43:06 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3517443643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 11.usbdev_t x_rx_disruption.3517443643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/11.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/110.usbdev_tx_rx_disruption.670304240 |
| Short name | T3203 |
| Test name | |
| Test status | |
| Simulation time | 558715815 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:54:20 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=670304240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 110.usbdev_t x_rx_disruption.670304240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/110.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/111.usbdev_endpoint_types.775711744 |
| Short name | T405 |
| Test name | |
| Test status | |
| Simulation time | 410281811 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:20 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=775711744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 111.usbdev_endpoint_types.775711744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/111.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/112.usbdev_endpoint_types.326280923 |
| Short name | T3207 |
| Test name | |
| Test status | |
| Simulation time | 396502577 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=326280923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 112.usbdev_endpoint_types.326280923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/112.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/112.usbdev_tx_rx_disruption.2796594218 |
| Short name | T3208 |
| Test name | |
| Test status | |
| Simulation time | 460049366 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2796594218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 112.usbdev_ tx_rx_disruption.2796594218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/112.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/113.usbdev_tx_rx_disruption.936886956 |
| Short name | T3209 |
| Test name | |
| Test status | |
| Simulation time | 439018586 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 215460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=936886956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 113.usbdev_t x_rx_disruption.936886956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/113.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/114.usbdev_tx_rx_disruption.870172851 |
| Short name | T3210 |
| Test name | |
| Test status | |
| Simulation time | 542714998 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=870172851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 114.usbdev_t x_rx_disruption.870172851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/114.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/115.usbdev_endpoint_types.2442337783 |
| Short name | T364 |
| Test name | |
| Test status | |
| Simulation time | 559458274 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442337783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_endpoint_types.2442337783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/115.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/115.usbdev_tx_rx_disruption.3263333997 |
| Short name | T3212 |
| Test name | |
| Test status | |
| Simulation time | 686702590 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3263333997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 115.usbdev_ tx_rx_disruption.3263333997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/115.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/116.usbdev_tx_rx_disruption.631434811 |
| Short name | T3211 |
| Test name | |
| Test status | |
| Simulation time | 564768830 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=631434811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 116.usbdev_t x_rx_disruption.631434811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/116.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/117.usbdev_tx_rx_disruption.785840103 |
| Short name | T3213 |
| Test name | |
| Test status | |
| Simulation time | 669590070 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:54:25 AM UTC 24 |
| Finished | Aug 27 07:54:28 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=785840103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 117.usbdev_t x_rx_disruption.785840103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/117.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/118.usbdev_endpoint_types.2820044865 |
| Short name | T425 |
| Test name | |
| Test status | |
| Simulation time | 440728786 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820044865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_endpoint_types.2820044865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/118.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/118.usbdev_tx_rx_disruption.2779872041 |
| Short name | T3217 |
| Test name | |
| Test status | |
| Simulation time | 520071029 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2779872041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 118.usbdev_ tx_rx_disruption.2779872041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/118.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/119.usbdev_endpoint_types.2134705040 |
| Short name | T472 |
| Test name | |
| Test status | |
| Simulation time | 476109192 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2134705040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_endpoint_types.2134705040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/119.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/119.usbdev_tx_rx_disruption.3228159988 |
| Short name | T3219 |
| Test name | |
| Test status | |
| Simulation time | 528617329 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3228159988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 119.usbdev_ tx_rx_disruption.3228159988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/119.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_alert_test.2714265447 |
| Short name | T1098 |
| Test name | |
| Test status | |
| Simulation time | 66516552 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:43:26 AM UTC 24 |
| Finished | Aug 27 07:43:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714265447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 12.usbdev_alert_test.2714265447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_disconnect.1485277937 |
| Short name | T1068 |
| Test name | |
| Test status | |
| Simulation time | 4081105086 ps |
| CPU time | 7.55 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:14 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485277937 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_disconnect.1485277937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_reset.72044500 |
| Short name | T1097 |
| Test name | |
| Test status | |
| Simulation time | 14544871034 ps |
| CPU time | 20.64 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:27 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=72044500 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_reset.72044500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_aon_wake_resume.537363163 |
| Short name | T1165 |
| Test name | |
| Test status | |
| Simulation time | 23543498221 ps |
| CPU time | 52.28 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:59 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=537363163 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_aon_wake_resume.537363163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_av_buffer.2294875849 |
| Short name | T1056 |
| Test name | |
| Test status | |
| Simulation time | 189686453 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:08 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2294875849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_av_buffer.2294875849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_bitstuff_err.2623544861 |
| Short name | T1055 |
| Test name | |
| Test status | |
| Simulation time | 158480433 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2623544861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_bitstuff_err.2623544861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_data_toggle_clear.2081084960 |
| Short name | T1057 |
| Test name | |
| Test status | |
| Simulation time | 349624550 ps |
| CPU time | 1.99 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:43:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081084960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 12.usbdev_data_toggle_clear.2081084960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_device_address.3167836565 |
| Short name | T1255 |
| Test name | |
| Test status | |
| Simulation time | 44006547044 ps |
| CPU time | 86.56 seconds |
| Started | Aug 27 07:43:05 AM UTC 24 |
| Finished | Aug 27 07:44:34 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3167836565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_address.3167836565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_device_timeout.972196323 |
| Short name | T1096 |
| Test name | |
| Test status | |
| Simulation time | 1566926084 ps |
| CPU time | 17.39 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:26 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=972196323 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_device_timeout.972196323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_disable_endpoint.1010199537 |
| Short name | T1061 |
| Test name | |
| Test status | |
| Simulation time | 468169461 ps |
| CPU time | 2.06 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:10 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1010199537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 12.usbdev_disable_endpoint.1010199537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_disconnected.3491139740 |
| Short name | T1060 |
| Test name | |
| Test status | |
| Simulation time | 202048817 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491139740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_disconnected.3491139740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_enable.1613139805 |
| Short name | T997 |
| Test name | |
| Test status | |
| Simulation time | 43804415 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613139805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 12.usbdev_enable.1613139805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_access.3752487668 |
| Short name | T1065 |
| Test name | |
| Test status | |
| Simulation time | 868245414 ps |
| CPU time | 4 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:12 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3752487668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_access.3752487668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_endpoint_types.1008330899 |
| Short name | T490 |
| Test name | |
| Test status | |
| Simulation time | 386670222 ps |
| CPU time | 2.21 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:12 AM UTC 24 |
| Peak memory | 217696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1008330899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_endpoint_types.1008330899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_fifo_rst.1943934873 |
| Short name | T1066 |
| Test name | |
| Test status | |
| Simulation time | 174321670 ps |
| CPU time | 2.25 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:13 AM UTC 24 |
| Peak memory | 217648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1943934873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_fifo_rst.1943934873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_in_iso.1474029694 |
| Short name | T1063 |
| Test name | |
| Test status | |
| Simulation time | 169279293 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:12 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474029694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_in_iso.1474029694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_in_stall.572426047 |
| Short name | T1062 |
| Test name | |
| Test status | |
| Simulation time | 148661329 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:12 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=572426047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_in_stall.572426047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_in_trans.1713935157 |
| Short name | T1064 |
| Test name | |
| Test status | |
| Simulation time | 247430960 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:12 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713935157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_in_trans.1713935157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_invalid_sync.1732526390 |
| Short name | T1119 |
| Test name | |
| Test status | |
| Simulation time | 2447859817 ps |
| CPU time | 27.01 seconds |
| Started | Aug 27 07:43:09 AM UTC 24 |
| Finished | Aug 27 07:43:38 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1732526390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 12.usbdev_invalid_sync.1732526390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_iso_retraction.1970619995 |
| Short name | T1256 |
| Test name | |
| Test status | |
| Simulation time | 11428721920 ps |
| CPU time | 80.87 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:44:34 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1970619995 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_iso_retraction.1970619995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_link_in_err.2536901196 |
| Short name | T1069 |
| Test name | |
| Test status | |
| Simulation time | 220242908 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:43:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536901196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_in_err.2536901196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_link_resume.3283781723 |
| Short name | T1183 |
| Test name | |
| Test status | |
| Simulation time | 29502257569 ps |
| CPU time | 52.06 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283781723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_link_resume.3283781723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_link_suspend.2859612852 |
| Short name | T1082 |
| Test name | |
| Test status | |
| Simulation time | 3555992901 ps |
| CPU time | 7.35 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:43:20 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859612852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_link_suspend.2859612852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_low_speed_traffic.1123819093 |
| Short name | T1364 |
| Test name | |
| Test status | |
| Simulation time | 4168314030 ps |
| CPU time | 120.01 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:45:14 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123819093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_low_speed_traffic.1123819093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_max_inter_pkt_delay.4257338465 |
| Short name | T1106 |
| Test name | |
| Test status | |
| Simulation time | 2467874963 ps |
| CPU time | 18.05 seconds |
| Started | Aug 27 07:43:11 AM UTC 24 |
| Finished | Aug 27 07:43:31 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4257338465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_inter_pkt_delay.4257338465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_in_transaction.3029715147 |
| Short name | T1072 |
| Test name | |
| Test status | |
| Simulation time | 255379919 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:43:13 AM UTC 24 |
| Finished | Aug 27 07:43:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029715147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_in_transaction.3029715147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_max_length_out_transaction.1749985054 |
| Short name | T1071 |
| Test name | |
| Test status | |
| Simulation time | 192976658 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:43:13 AM UTC 24 |
| Finished | Aug 27 07:43:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749985054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_max_length_out_transaction.1749985054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_max_non_iso_usb_traffic.962866254 |
| Short name | T1130 |
| Test name | |
| Test status | |
| Simulation time | 2964524701 ps |
| CPU time | 28.7 seconds |
| Started | Aug 27 07:43:13 AM UTC 24 |
| Finished | Aug 27 07:43:43 AM UTC 24 |
| Peak memory | 235172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962866254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_non_iso_usb_traffic.962866254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_max_usb_traffic.2141995852 |
| Short name | T1318 |
| Test name | |
| Test status | |
| Simulation time | 3469690772 ps |
| CPU time | 100.5 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:44:57 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141995852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_max_usb_traffic.2141995852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_min_inter_pkt_delay.27988982 |
| Short name | T1180 |
| Test name | |
| Test status | |
| Simulation time | 1830452099 ps |
| CPU time | 47.33 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:44:04 AM UTC 24 |
| Peak memory | 228064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=27988982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TE ST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_min_inter_pkt_delay.27988982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_in_transaction.4103844460 |
| Short name | T1075 |
| Test name | |
| Test status | |
| Simulation time | 178564862 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:43:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103844460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_in_transaction.4103844460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_min_length_out_transaction.3222508055 |
| Short name | T1074 |
| Test name | |
| Test status | |
| Simulation time | 170934433 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:43:17 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3222508055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_min_length_out_transaction.3222508055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_out_iso.3030892848 |
| Short name | T1076 |
| Test name | |
| Test status | |
| Simulation time | 177333044 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:43:15 AM UTC 24 |
| Finished | Aug 27 07:43:18 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030892848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_out_iso.3030892848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_out_stall.211229138 |
| Short name | T1079 |
| Test name | |
| Test status | |
| Simulation time | 224998719 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:43:17 AM UTC 24 |
| Finished | Aug 27 07:43:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=211229138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_out_stall.211229138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_out_trans_nak.1007260004 |
| Short name | T1080 |
| Test name | |
| Test status | |
| Simulation time | 237852806 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:43:17 AM UTC 24 |
| Finished | Aug 27 07:43:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1007260004 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_out_trans_nak.1007260004 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_pending_in_trans.738319727 |
| Short name | T1078 |
| Test name | |
| Test status | |
| Simulation time | 145435372 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:43:17 AM UTC 24 |
| Finished | Aug 27 07:43:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=738319727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_pending_in_trans.738319727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_pinflip.260472803 |
| Short name | T1081 |
| Test name | |
| Test status | |
| Simulation time | 214554299 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:43:17 AM UTC 24 |
| Finished | Aug 27 07:43:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=260472803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_pinflip.260472803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_phy_config_usb_ref_disable.1296304979 |
| Short name | T1084 |
| Test name | |
| Test status | |
| Simulation time | 153092443 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:43:19 AM UTC 24 |
| Finished | Aug 27 07:43:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296304979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 12.usbdev_phy_config_usb_ref_disable.1296304979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_phy_pins_sense.3864430020 |
| Short name | T1083 |
| Test name | |
| Test status | |
| Simulation time | 38351312 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:43:19 AM UTC 24 |
| Finished | Aug 27 07:43:21 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864430020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_phy_pins_sense.3864430020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_buffer.2012587797 |
| Short name | T1167 |
| Test name | |
| Test status | |
| Simulation time | 15213413492 ps |
| CPU time | 39.99 seconds |
| Started | Aug 27 07:43:19 AM UTC 24 |
| Finished | Aug 27 07:44:00 AM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012587797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_pkt_buffer.2012587797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_received.1192147203 |
| Short name | T1085 |
| Test name | |
| Test status | |
| Simulation time | 167404404 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:43:19 AM UTC 24 |
| Finished | Aug 27 07:43:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192147203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 12.usbdev_pkt_received.1192147203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_pkt_sent.2653468128 |
| Short name | T1089 |
| Test name | |
| Test status | |
| Simulation time | 216435112 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653468128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 12.usbdev_pkt_sent.2653468128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_in_transaction.2818860367 |
| Short name | T1090 |
| Test name | |
| Test status | |
| Simulation time | 185760820 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818860367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 12.usbdev_random_length_in_transaction.2818860367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_random_length_out_transaction.2021557289 |
| Short name | T1092 |
| Test name | |
| Test status | |
| Simulation time | 191396303 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2021557289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 12.usbdev_random_length_out_transaction.2021557289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_resume_link_active.3947606852 |
| Short name | T1173 |
| Test name | |
| Test status | |
| Simulation time | 20174446877 ps |
| CPU time | 38.56 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:44:01 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3947606852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 12.usbdev_resume_link_active.3947606852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_rx_crc_err.2911159116 |
| Short name | T1093 |
| Test name | |
| Test status | |
| Simulation time | 180014729 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2911159116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_rx_crc_err.2911159116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_rx_full.3705819793 |
| Short name | T303 |
| Test name | |
| Test status | |
| Simulation time | 251874850 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3705819793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 12.usbdev_rx_full.3705819793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_setup_stage.1017833873 |
| Short name | T1088 |
| Test name | |
| Test status | |
| Simulation time | 180037065 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1017833873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 12.usbdev_setup_stage.1017833873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_setup_trans_ignored.1344272573 |
| Short name | T1091 |
| Test name | |
| Test status | |
| Simulation time | 155707833 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:43:21 AM UTC 24 |
| Finished | Aug 27 07:43:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344272573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 12.usbdev_setup_trans_ignored.1344272573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_smoke.911653486 |
| Short name | T1095 |
| Test name | |
| Test status | |
| Simulation time | 184483409 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:43:23 AM UTC 24 |
| Finished | Aug 27 07:43:26 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911653486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_smoke.911653486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_spurious_pids_ignored.1622949431 |
| Short name | T1163 |
| Test name | |
| Test status | |
| Simulation time | 3301548999 ps |
| CPU time | 33.95 seconds |
| Started | Aug 27 07:43:23 AM UTC 24 |
| Finished | Aug 27 07:43:58 AM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622949431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 12.usbdev_spurious_pids_ignored.1622949431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_stall_priority_over_nak.2016593268 |
| Short name | T1094 |
| Test name | |
| Test status | |
| Simulation time | 175976278 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:43:23 AM UTC 24 |
| Finished | Aug 27 07:43:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016593268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stall_priority_over_nak.2016593268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_stall_trans.436248667 |
| Short name | T1099 |
| Test name | |
| Test status | |
| Simulation time | 190185984 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:43:25 AM UTC 24 |
| Finished | Aug 27 07:43:28 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=436248667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 12.usbdev_stall_trans.436248667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_stream_len_max.4281918899 |
| Short name | T1102 |
| Test name | |
| Test status | |
| Simulation time | 551090230 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:43:25 AM UTC 24 |
| Finished | Aug 27 07:43:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4281918899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_stream_len_max.4281918899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_streaming_out.2643582519 |
| Short name | T1132 |
| Test name | |
| Test status | |
| Simulation time | 2116349768 ps |
| CPU time | 18.68 seconds |
| Started | Aug 27 07:43:25 AM UTC 24 |
| Finished | Aug 27 07:43:45 AM UTC 24 |
| Peak memory | 234412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2643582519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 12.usbdev_streaming_out.2643582519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_timeout_missing_host_handshake.454325432 |
| Short name | T1073 |
| Test name | |
| Test status | |
| Simulation time | 426912084 ps |
| CPU time | 7.93 seconds |
| Started | Aug 27 07:43:07 AM UTC 24 |
| Finished | Aug 27 07:43:16 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=454325432 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_timeout_missing_host_handshake.454325432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/12.usbdev_tx_rx_disruption.3745454066 |
| Short name | T1100 |
| Test name | |
| Test status | |
| Simulation time | 480715623 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:43:25 AM UTC 24 |
| Finished | Aug 27 07:43:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3745454066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 12.usbdev_t x_rx_disruption.3745454066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/12.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/120.usbdev_endpoint_types.2791180213 |
| Short name | T475 |
| Test name | |
| Test status | |
| Simulation time | 185555418 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791180213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_endpoint_types.2791180213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/120.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/120.usbdev_tx_rx_disruption.2223984543 |
| Short name | T3218 |
| Test name | |
| Test status | |
| Simulation time | 481600483 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223984543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 120.usbdev_ tx_rx_disruption.2223984543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/120.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/121.usbdev_endpoint_types.1188753880 |
| Short name | T3216 |
| Test name | |
| Test status | |
| Simulation time | 186773290 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188753880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_endpoint_types.1188753880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/121.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/121.usbdev_tx_rx_disruption.1071078587 |
| Short name | T3224 |
| Test name | |
| Test status | |
| Simulation time | 573790643 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071078587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 121.usbdev_ tx_rx_disruption.1071078587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/121.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/122.usbdev_tx_rx_disruption.456377682 |
| Short name | T3220 |
| Test name | |
| Test status | |
| Simulation time | 535566164 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=456377682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 122.usbdev_t x_rx_disruption.456377682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/122.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/123.usbdev_endpoint_types.2818000176 |
| Short name | T3215 |
| Test name | |
| Test status | |
| Simulation time | 246376474 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2818000176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_endpoint_types.2818000176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/123.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/123.usbdev_tx_rx_disruption.1390191045 |
| Short name | T3221 |
| Test name | |
| Test status | |
| Simulation time | 561536174 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1390191045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 123.usbdev_ tx_rx_disruption.1390191045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/123.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/124.usbdev_tx_rx_disruption.2181710733 |
| Short name | T3223 |
| Test name | |
| Test status | |
| Simulation time | 567315369 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2181710733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 124.usbdev_ tx_rx_disruption.2181710733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/124.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/125.usbdev_tx_rx_disruption.542865807 |
| Short name | T3226 |
| Test name | |
| Test status | |
| Simulation time | 551055492 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=542865807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 125.usbdev_t x_rx_disruption.542865807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/125.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/126.usbdev_endpoint_types.3855063523 |
| Short name | T479 |
| Test name | |
| Test status | |
| Simulation time | 218639445 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3855063523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_endpoint_types.3855063523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/126.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/126.usbdev_tx_rx_disruption.1652523763 |
| Short name | T3232 |
| Test name | |
| Test status | |
| Simulation time | 445770988 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1652523763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 126.usbdev_ tx_rx_disruption.1652523763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/126.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/127.usbdev_tx_rx_disruption.3513480999 |
| Short name | T3228 |
| Test name | |
| Test status | |
| Simulation time | 474168327 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:36 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3513480999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 127.usbdev_ tx_rx_disruption.3513480999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/127.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/128.usbdev_endpoint_types.3961933046 |
| Short name | T507 |
| Test name | |
| Test status | |
| Simulation time | 236748570 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961933046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_endpoint_types.3961933046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/128.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/128.usbdev_tx_rx_disruption.504432660 |
| Short name | T3235 |
| Test name | |
| Test status | |
| Simulation time | 553202542 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=504432660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 128.usbdev_t x_rx_disruption.504432660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/128.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/129.usbdev_endpoint_types.2086207696 |
| Short name | T3230 |
| Test name | |
| Test status | |
| Simulation time | 330644383 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086207696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_endpoint_types.2086207696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/129.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/129.usbdev_tx_rx_disruption.455571700 |
| Short name | T3237 |
| Test name | |
| Test status | |
| Simulation time | 516193825 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=455571700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 129.usbdev_t x_rx_disruption.455571700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/129.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_alert_test.1438744310 |
| Short name | T1155 |
| Test name | |
| Test status | |
| Simulation time | 80005304 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:43:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438744310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 13.usbdev_alert_test.1438744310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_disconnect.1176926990 |
| Short name | T1124 |
| Test name | |
| Test status | |
| Simulation time | 9517539224 ps |
| CPU time | 14.97 seconds |
| Started | Aug 27 07:43:26 AM UTC 24 |
| Finished | Aug 27 07:43:42 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176926990 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_disconnect.1176926990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_reset.2632462117 |
| Short name | T1136 |
| Test name | |
| Test status | |
| Simulation time | 14189385655 ps |
| CPU time | 19.4 seconds |
| Started | Aug 27 07:43:26 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2632462117 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_reset.2632462117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_aon_wake_resume.1142574458 |
| Short name | T1189 |
| Test name | |
| Test status | |
| Simulation time | 29388769755 ps |
| CPU time | 38.7 seconds |
| Started | Aug 27 07:43:27 AM UTC 24 |
| Finished | Aug 27 07:44:07 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1142574458 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_aon_wake_resume.1142574458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_av_buffer.2896799437 |
| Short name | T1104 |
| Test name | |
| Test status | |
| Simulation time | 227683572 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:43:27 AM UTC 24 |
| Finished | Aug 27 07:43:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2896799437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_av_buffer.2896799437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_bitstuff_err.909924633 |
| Short name | T1103 |
| Test name | |
| Test status | |
| Simulation time | 212123875 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:43:27 AM UTC 24 |
| Finished | Aug 27 07:43:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909924633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_bitstuff_err.909924633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_clear.3657027482 |
| Short name | T1109 |
| Test name | |
| Test status | |
| Simulation time | 614736618 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:43:29 AM UTC 24 |
| Finished | Aug 27 07:43:32 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3657027482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 13.usbdev_data_toggle_clear.3657027482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_data_toggle_restore.3248908156 |
| Short name | T316 |
| Test name | |
| Test status | |
| Simulation time | 874180371 ps |
| CPU time | 3.76 seconds |
| Started | Aug 27 07:43:29 AM UTC 24 |
| Finished | Aug 27 07:43:34 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248908156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_data_toggle_restore.3248908156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_device_address.283574817 |
| Short name | T1175 |
| Test name | |
| Test status | |
| Simulation time | 13899002674 ps |
| CPU time | 31.83 seconds |
| Started | Aug 27 07:43:29 AM UTC 24 |
| Finished | Aug 27 07:44:02 AM UTC 24 |
| Peak memory | 218420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=283574817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_device_address.283574817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_device_timeout.1055410025 |
| Short name | T1149 |
| Test name | |
| Test status | |
| Simulation time | 2950764772 ps |
| CPU time | 20.42 seconds |
| Started | Aug 27 07:43:29 AM UTC 24 |
| Finished | Aug 27 07:43:51 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1055410025 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_device_timeout.1055410025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_disable_endpoint.1009329968 |
| Short name | T1112 |
| Test name | |
| Test status | |
| Simulation time | 591248011 ps |
| CPU time | 2.56 seconds |
| Started | Aug 27 07:43:31 AM UTC 24 |
| Finished | Aug 27 07:43:35 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009329968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 13.usbdev_disable_endpoint.1009329968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_disconnected.3016459213 |
| Short name | T1111 |
| Test name | |
| Test status | |
| Simulation time | 140403943 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:43:31 AM UTC 24 |
| Finished | Aug 27 07:43:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016459213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_disconnected.3016459213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_enable.2303708887 |
| Short name | T1110 |
| Test name | |
| Test status | |
| Simulation time | 45104021 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:43:31 AM UTC 24 |
| Finished | Aug 27 07:43:34 AM UTC 24 |
| Peak memory | 215944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303708887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 13.usbdev_enable.2303708887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_access.1285266576 |
| Short name | T1115 |
| Test name | |
| Test status | |
| Simulation time | 843605369 ps |
| CPU time | 4.39 seconds |
| Started | Aug 27 07:43:31 AM UTC 24 |
| Finished | Aug 27 07:43:37 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1285266576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_access.1285266576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_endpoint_types.937266070 |
| Short name | T381 |
| Test name | |
| Test status | |
| Simulation time | 280918429 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:43:33 AM UTC 24 |
| Finished | Aug 27 07:43:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=937266070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 13.usbdev_endpoint_types.937266070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_fifo_rst.2799290498 |
| Short name | T1118 |
| Test name | |
| Test status | |
| Simulation time | 206009434 ps |
| CPU time | 3.03 seconds |
| Started | Aug 27 07:43:33 AM UTC 24 |
| Finished | Aug 27 07:43:37 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2799290498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_fifo_rst.2799290498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_in_iso.1356238179 |
| Short name | T1114 |
| Test name | |
| Test status | |
| Simulation time | 196545977 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:43:33 AM UTC 24 |
| Finished | Aug 27 07:43:36 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356238179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_in_iso.1356238179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_in_stall.356782964 |
| Short name | T1113 |
| Test name | |
| Test status | |
| Simulation time | 211641253 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:43:33 AM UTC 24 |
| Finished | Aug 27 07:43:36 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=356782964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_in_stall.356782964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_in_trans.1489957203 |
| Short name | T1120 |
| Test name | |
| Test status | |
| Simulation time | 175408306 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:43:35 AM UTC 24 |
| Finished | Aug 27 07:43:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1489957203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 13.usbdev_in_trans.1489957203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_invalid_sync.244699574 |
| Short name | T1370 |
| Test name | |
| Test status | |
| Simulation time | 3870495986 ps |
| CPU time | 100.54 seconds |
| Started | Aug 27 07:43:33 AM UTC 24 |
| Finished | Aug 27 07:45:16 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=244699574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_invalid_sync.244699574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_iso_retraction.1601009039 |
| Short name | T1288 |
| Test name | |
| Test status | |
| Simulation time | 9831073986 ps |
| CPU time | 69.64 seconds |
| Started | Aug 27 07:43:35 AM UTC 24 |
| Finished | Aug 27 07:44:46 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601009039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_iso_retraction.1601009039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_link_in_err.359168223 |
| Short name | T1121 |
| Test name | |
| Test status | |
| Simulation time | 241717148 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:43:35 AM UTC 24 |
| Finished | Aug 27 07:43:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359168223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_link_in_err.359168223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_link_resume.1264040658 |
| Short name | T1182 |
| Test name | |
| Test status | |
| Simulation time | 15283831952 ps |
| CPU time | 26.97 seconds |
| Started | Aug 27 07:43:36 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264040658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_link_resume.1264040658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_low_speed_traffic.1216978317 |
| Short name | T1459 |
| Test name | |
| Test status | |
| Simulation time | 4697836616 ps |
| CPU time | 129.71 seconds |
| Started | Aug 27 07:43:38 AM UTC 24 |
| Finished | Aug 27 07:45:50 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216978317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_low_speed_traffic.1216978317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_max_inter_pkt_delay.2971686534 |
| Short name | T1171 |
| Test name | |
| Test status | |
| Simulation time | 2915449464 ps |
| CPU time | 21.79 seconds |
| Started | Aug 27 07:43:38 AM UTC 24 |
| Finished | Aug 27 07:44:01 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2971686534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_inter_pkt_delay.2971686534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_in_transaction.655669744 |
| Short name | T1128 |
| Test name | |
| Test status | |
| Simulation time | 237790724 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:43:43 AM UTC 24 |
| Peak memory | 215756 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=655669744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_in_transaction.655669744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_max_length_out_transaction.4142632394 |
| Short name | T1127 |
| Test name | |
| Test status | |
| Simulation time | 181163716 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:43:43 AM UTC 24 |
| Peak memory | 215612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4142632394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_max_length_out_transaction.4142632394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_max_non_iso_usb_traffic.2380187385 |
| Short name | T1274 |
| Test name | |
| Test status | |
| Simulation time | 2221015730 ps |
| CPU time | 60.14 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:44:42 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2380187385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_non_iso_usb_traffic.2380187385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_max_usb_traffic.646135848 |
| Short name | T1205 |
| Test name | |
| Test status | |
| Simulation time | 3028779670 ps |
| CPU time | 32.05 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=646135848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_max_usb_traffic.646135848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_min_inter_pkt_delay.1131057763 |
| Short name | T1164 |
| Test name | |
| Test status | |
| Simulation time | 1604358733 ps |
| CPU time | 17.26 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:43:59 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131057763 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_min_inter_pkt_delay.1131057763 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_in_transaction.3971976751 |
| Short name | T1129 |
| Test name | |
| Test status | |
| Simulation time | 160173669 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:43:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971976751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_in_transaction.3971976751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_min_length_out_transaction.4119606758 |
| Short name | T1126 |
| Test name | |
| Test status | |
| Simulation time | 152834570 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:43:40 AM UTC 24 |
| Finished | Aug 27 07:43:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119606758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_min_length_out_transaction.4119606758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_out_iso.3945874257 |
| Short name | T1045 |
| Test name | |
| Test status | |
| Simulation time | 238810028 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:43:42 AM UTC 24 |
| Finished | Aug 27 07:43:44 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945874257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_out_iso.3945874257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_out_stall.3811498523 |
| Short name | T1139 |
| Test name | |
| Test status | |
| Simulation time | 235307433 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811498523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_out_stall.3811498523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_out_trans_nak.837922979 |
| Short name | T1135 |
| Test name | |
| Test status | |
| Simulation time | 172640213 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=837922979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_out_trans_nak.837922979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_pending_in_trans.766467457 |
| Short name | T1134 |
| Test name | |
| Test status | |
| Simulation time | 156700266 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=766467457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_pending_in_trans.766467457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_pinflip.513618784 |
| Short name | T1137 |
| Test name | |
| Test status | |
| Simulation time | 211845979 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=513618784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_pinflip.513618784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_phy_config_usb_ref_disable.2502285149 |
| Short name | T1138 |
| Test name | |
| Test status | |
| Simulation time | 160056523 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502285149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 13.usbdev_phy_config_usb_ref_disable.2502285149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_phy_pins_sense.208486294 |
| Short name | T1133 |
| Test name | |
| Test status | |
| Simulation time | 47375480 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:43:44 AM UTC 24 |
| Finished | Aug 27 07:43:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=208486294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_phy_pins_sense.208486294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_buffer.2461844324 |
| Short name | T1237 |
| Test name | |
| Test status | |
| Simulation time | 11848358913 ps |
| CPU time | 39.15 seconds |
| Started | Aug 27 07:43:45 AM UTC 24 |
| Finished | Aug 27 07:44:26 AM UTC 24 |
| Peak memory | 228696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461844324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_pkt_buffer.2461844324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_received.1264726626 |
| Short name | T1140 |
| Test name | |
| Test status | |
| Simulation time | 154090398 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:43:45 AM UTC 24 |
| Finished | Aug 27 07:43:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1264726626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 13.usbdev_pkt_received.1264726626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_pkt_sent.231768493 |
| Short name | T1141 |
| Test name | |
| Test status | |
| Simulation time | 219338641 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:43:46 AM UTC 24 |
| Finished | Aug 27 07:43:48 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231768493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_pkt_sent.231768493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_in_transaction.1291076586 |
| Short name | T1146 |
| Test name | |
| Test status | |
| Simulation time | 205042044 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:43:47 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291076586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 13.usbdev_random_length_in_transaction.1291076586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_random_length_out_transaction.4063443943 |
| Short name | T1142 |
| Test name | |
| Test status | |
| Simulation time | 184592400 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:43:47 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4063443943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 13.usbdev_random_length_out_transaction.4063443943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_resume_link_active.3034060122 |
| Short name | T1219 |
| Test name | |
| Test status | |
| Simulation time | 20170988402 ps |
| CPU time | 27.83 seconds |
| Started | Aug 27 07:43:47 AM UTC 24 |
| Finished | Aug 27 07:44:17 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034060122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 13.usbdev_resume_link_active.3034060122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_rx_crc_err.1454719682 |
| Short name | T1143 |
| Test name | |
| Test status | |
| Simulation time | 195601607 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:43:48 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1454719682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_rx_crc_err.1454719682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_rx_full.2409382880 |
| Short name | T1148 |
| Test name | |
| Test status | |
| Simulation time | 275813417 ps |
| CPU time | 1.98 seconds |
| Started | Aug 27 07:43:48 AM UTC 24 |
| Finished | Aug 27 07:43:51 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409382880 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 13.usbdev_rx_full.2409382880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_setup_stage.922975982 |
| Short name | T1144 |
| Test name | |
| Test status | |
| Simulation time | 160664547 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:43:48 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=922975982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 13.usbdev_setup_stage.922975982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_setup_trans_ignored.1863205422 |
| Short name | T1145 |
| Test name | |
| Test status | |
| Simulation time | 156825985 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:43:48 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1863205422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 13.usbdev_setup_trans_ignored.1863205422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_smoke.440504872 |
| Short name | T1147 |
| Test name | |
| Test status | |
| Simulation time | 233391666 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:43:48 AM UTC 24 |
| Finished | Aug 27 07:43:50 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440504872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_smoke.440504872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_spurious_pids_ignored.2483919934 |
| Short name | T1283 |
| Test name | |
| Test status | |
| Simulation time | 1954565675 ps |
| CPU time | 54.27 seconds |
| Started | Aug 27 07:43:49 AM UTC 24 |
| Finished | Aug 27 07:44:45 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2483919934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 13.usbdev_spurious_pids_ignored.2483919934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_stall_priority_over_nak.561738010 |
| Short name | T1151 |
| Test name | |
| Test status | |
| Simulation time | 194321054 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:43:49 AM UTC 24 |
| Finished | Aug 27 07:43:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561738010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stall_priority_over_nak.561738010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_stall_trans.4152078112 |
| Short name | T1152 |
| Test name | |
| Test status | |
| Simulation time | 170831845 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:43:50 AM UTC 24 |
| Finished | Aug 27 07:43:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152078112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 13.usbdev_stall_trans.4152078112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_stream_len_max.2411946378 |
| Short name | T1162 |
| Test name | |
| Test status | |
| Simulation time | 1019224364 ps |
| CPU time | 4.25 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:43:58 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2411946378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_stream_len_max.2411946378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_streaming_out.2416343144 |
| Short name | T1227 |
| Test name | |
| Test status | |
| Simulation time | 2761429029 ps |
| CPU time | 27.01 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:44:21 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2416343144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 13.usbdev_streaming_out.2416343144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_timeout_missing_host_handshake.353918415 |
| Short name | T1150 |
| Test name | |
| Test status | |
| Simulation time | 707388624 ps |
| CPU time | 19.08 seconds |
| Started | Aug 27 07:43:31 AM UTC 24 |
| Finished | Aug 27 07:43:52 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=353918415 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_timeout_missing_host_handshake.353918415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/13.usbdev_tx_rx_disruption.2440546319 |
| Short name | T1157 |
| Test name | |
| Test status | |
| Simulation time | 577041291 ps |
| CPU time | 2.23 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:43:55 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2440546319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 13.usbdev_t x_rx_disruption.2440546319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/13.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/130.usbdev_tx_rx_disruption.1206129225 |
| Short name | T3236 |
| Test name | |
| Test status | |
| Simulation time | 596096189 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1206129225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 130.usbdev_ tx_rx_disruption.1206129225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/130.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/131.usbdev_endpoint_types.388805045 |
| Short name | T430 |
| Test name | |
| Test status | |
| Simulation time | 635435084 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:26 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=388805045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 131.usbdev_endpoint_types.388805045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/131.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/131.usbdev_tx_rx_disruption.1396143493 |
| Short name | T3222 |
| Test name | |
| Test status | |
| Simulation time | 490266720 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1396143493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 131.usbdev_ tx_rx_disruption.1396143493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/131.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/132.usbdev_endpoint_types.1211307155 |
| Short name | T3231 |
| Test name | |
| Test status | |
| Simulation time | 445623664 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:41 AM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211307155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_endpoint_types.1211307155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/132.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/132.usbdev_tx_rx_disruption.4127611522 |
| Short name | T3238 |
| Test name | |
| Test status | |
| Simulation time | 615487270 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4127611522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 132.usbdev_ tx_rx_disruption.4127611522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/132.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/133.usbdev_endpoint_types.203471124 |
| Short name | T3229 |
| Test name | |
| Test status | |
| Simulation time | 173002227 ps |
| CPU time | 0.81 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=203471124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 133.usbdev_endpoint_types.203471124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/133.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/133.usbdev_tx_rx_disruption.1848270236 |
| Short name | T3234 |
| Test name | |
| Test status | |
| Simulation time | 502236234 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1848270236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 133.usbdev_ tx_rx_disruption.1848270236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/133.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/134.usbdev_tx_rx_disruption.4203170616 |
| Short name | T3239 |
| Test name | |
| Test status | |
| Simulation time | 652424607 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 216324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4203170616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 134.usbdev_ tx_rx_disruption.4203170616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/134.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/135.usbdev_endpoint_types.35128038 |
| Short name | T3233 |
| Test name | |
| Test status | |
| Simulation time | 245841664 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:54:28 AM UTC 24 |
| Finished | Aug 27 07:54:42 AM UTC 24 |
| Peak memory | 214584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=35128038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 135.usbdev_endpoint_types.35128038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/135.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/135.usbdev_tx_rx_disruption.4209580918 |
| Short name | T3242 |
| Test name | |
| Test status | |
| Simulation time | 429038981 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:54:30 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4209580918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 135.usbdev_ tx_rx_disruption.4209580918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/135.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/136.usbdev_tx_rx_disruption.234856174 |
| Short name | T3241 |
| Test name | |
| Test status | |
| Simulation time | 391335437 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:54:30 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=234856174 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 136.usbdev_t x_rx_disruption.234856174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/136.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/137.usbdev_endpoint_types.1556414500 |
| Short name | T484 |
| Test name | |
| Test status | |
| Simulation time | 315734200 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:54:30 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556414500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_endpoint_types.1556414500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/137.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/137.usbdev_tx_rx_disruption.2033834073 |
| Short name | T3247 |
| Test name | |
| Test status | |
| Simulation time | 495653214 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2033834073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 137.usbdev_ tx_rx_disruption.2033834073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/137.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/138.usbdev_endpoint_types.1158904636 |
| Short name | T415 |
| Test name | |
| Test status | |
| Simulation time | 437395727 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158904636 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_endpoint_types.1158904636 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/138.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/138.usbdev_tx_rx_disruption.3053461034 |
| Short name | T3245 |
| Test name | |
| Test status | |
| Simulation time | 638029741 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3053461034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 138.usbdev_ tx_rx_disruption.3053461034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/138.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/139.usbdev_tx_rx_disruption.138203762 |
| Short name | T3250 |
| Test name | |
| Test status | |
| Simulation time | 613106133 ps |
| CPU time | 1.9 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 215900 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=138203762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 139.usbdev_t x_rx_disruption.138203762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/139.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_alert_test.40788966 |
| Short name | T1220 |
| Test name | |
| Test status | |
| Simulation time | 49975647 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=40788966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_alert_test.40788966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_disconnect.3440787475 |
| Short name | T1195 |
| Test name | |
| Test status | |
| Simulation time | 9560848419 ps |
| CPU time | 15.14 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:44:09 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3440787475 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_disconnect.3440787475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_reset.2968391456 |
| Short name | T1203 |
| Test name | |
| Test status | |
| Simulation time | 13445914652 ps |
| CPU time | 18.51 seconds |
| Started | Aug 27 07:43:52 AM UTC 24 |
| Finished | Aug 27 07:44:12 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2968391456 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_reset.2968391456 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_aon_wake_resume.3420079124 |
| Short name | T1243 |
| Test name | |
| Test status | |
| Simulation time | 23971778381 ps |
| CPU time | 34.13 seconds |
| Started | Aug 27 07:43:53 AM UTC 24 |
| Finished | Aug 27 07:44:29 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3420079124 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_aon_wake_resume.3420079124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_av_buffer.3288502495 |
| Short name | T1158 |
| Test name | |
| Test status | |
| Simulation time | 182246037 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:43:53 AM UTC 24 |
| Finished | Aug 27 07:43:56 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3288502495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_av_buffer.3288502495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_bitstuff_err.364677545 |
| Short name | T1159 |
| Test name | |
| Test status | |
| Simulation time | 144876503 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:43:54 AM UTC 24 |
| Finished | Aug 27 07:43:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=364677545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_bitstuff_err.364677545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_clear.3861312398 |
| Short name | T1160 |
| Test name | |
| Test status | |
| Simulation time | 243902252 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:43:54 AM UTC 24 |
| Finished | Aug 27 07:43:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861312398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 14.usbdev_data_toggle_clear.3861312398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_data_toggle_restore.1569922255 |
| Short name | T320 |
| Test name | |
| Test status | |
| Simulation time | 1158806248 ps |
| CPU time | 4.08 seconds |
| Started | Aug 27 07:43:55 AM UTC 24 |
| Finished | Aug 27 07:44:00 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1569922255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_data_toggle_restore.1569922255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_device_timeout.1806049145 |
| Short name | T1216 |
| Test name | |
| Test status | |
| Simulation time | 868166905 ps |
| CPU time | 17.39 seconds |
| Started | Aug 27 07:43:56 AM UTC 24 |
| Finished | Aug 27 07:44:15 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806049145 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_device_timeout.1806049145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_disable_endpoint.1949211480 |
| Short name | T1170 |
| Test name | |
| Test status | |
| Simulation time | 859691059 ps |
| CPU time | 3.22 seconds |
| Started | Aug 27 07:43:57 AM UTC 24 |
| Finished | Aug 27 07:44:01 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1949211480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_disable_endpoint.1949211480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_disconnected.3574310466 |
| Short name | T1169 |
| Test name | |
| Test status | |
| Simulation time | 138659234 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:43:58 AM UTC 24 |
| Finished | Aug 27 07:44:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3574310466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_disconnected.3574310466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_enable.149118869 |
| Short name | T1168 |
| Test name | |
| Test status | |
| Simulation time | 44154830 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:43:58 AM UTC 24 |
| Finished | Aug 27 07:44:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=149118869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_enable.149118869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_access.3816902021 |
| Short name | T1177 |
| Test name | |
| Test status | |
| Simulation time | 858705296 ps |
| CPU time | 3.38 seconds |
| Started | Aug 27 07:43:58 AM UTC 24 |
| Finished | Aug 27 07:44:03 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816902021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_access.3816902021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_endpoint_types.476877173 |
| Short name | T1172 |
| Test name | |
| Test status | |
| Simulation time | 293578136 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:43:58 AM UTC 24 |
| Finished | Aug 27 07:44:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=476877173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 14.usbdev_endpoint_types.476877173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_fifo_rst.3452949831 |
| Short name | T1179 |
| Test name | |
| Test status | |
| Simulation time | 156133572 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:44:00 AM UTC 24 |
| Finished | Aug 27 07:44:03 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3452949831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_fifo_rst.3452949831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_in_iso.1515347997 |
| Short name | T1178 |
| Test name | |
| Test status | |
| Simulation time | 294983155 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:44:00 AM UTC 24 |
| Finished | Aug 27 07:44:03 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515347997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 14.usbdev_in_iso.1515347997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_in_stall.2170418533 |
| Short name | T1174 |
| Test name | |
| Test status | |
| Simulation time | 148215359 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:44:00 AM UTC 24 |
| Finished | Aug 27 07:44:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2170418533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_stall.2170418533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_in_trans.1774639693 |
| Short name | T1184 |
| Test name | |
| Test status | |
| Simulation time | 197196716 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1774639693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_in_trans.1774639693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_invalid_sync.1505432779 |
| Short name | T1404 |
| Test name | |
| Test status | |
| Simulation time | 3604192018 ps |
| CPU time | 89.67 seconds |
| Started | Aug 27 07:44:00 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505432779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 14.usbdev_invalid_sync.1505432779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_iso_retraction.3514685033 |
| Short name | T1265 |
| Test name | |
| Test status | |
| Simulation time | 5675948012 ps |
| CPU time | 34.89 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:39 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3514685033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_iso_retraction.3514685033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_link_in_err.1260949990 |
| Short name | T1185 |
| Test name | |
| Test status | |
| Simulation time | 172538626 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1260949990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_in_err.1260949990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_link_resume.3955519311 |
| Short name | T1334 |
| Test name | |
| Test status | |
| Simulation time | 34348041815 ps |
| CPU time | 58.24 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:45:02 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955519311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_link_resume.3955519311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_link_suspend.3458976165 |
| Short name | T1218 |
| Test name | |
| Test status | |
| Simulation time | 10405705311 ps |
| CPU time | 12.69 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:17 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3458976165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_link_suspend.3458976165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_low_speed_traffic.999311025 |
| Short name | T1257 |
| Test name | |
| Test status | |
| Simulation time | 2909650652 ps |
| CPU time | 31.06 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:35 AM UTC 24 |
| Peak memory | 230432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=999311025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_low_speed_traffic.999311025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_max_inter_pkt_delay.3665981626 |
| Short name | T1347 |
| Test name | |
| Test status | |
| Simulation time | 2493721908 ps |
| CPU time | 61.58 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665981626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_inter_pkt_delay.3665981626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_in_transaction.1548993938 |
| Short name | T1187 |
| Test name | |
| Test status | |
| Simulation time | 231930363 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:05 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548993938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_in_transaction.1548993938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_max_length_out_transaction.3280669222 |
| Short name | T1188 |
| Test name | |
| Test status | |
| Simulation time | 186365343 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3280669222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_max_length_out_transaction.3280669222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_max_non_iso_usb_traffic.759160917 |
| Short name | T1310 |
| Test name | |
| Test status | |
| Simulation time | 1938639858 ps |
| CPU time | 49.7 seconds |
| Started | Aug 27 07:44:03 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=759160917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_non_iso_usb_traffic.759160917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_max_usb_traffic.1227210501 |
| Short name | T1399 |
| Test name | |
| Test status | |
| Simulation time | 3139911682 ps |
| CPU time | 83.69 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227210501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_max_usb_traffic.1227210501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_min_inter_pkt_delay.1791344427 |
| Short name | T1338 |
| Test name | |
| Test status | |
| Simulation time | 2305037017 ps |
| CPU time | 57.01 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:45:04 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1791344427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_min_inter_pkt_delay.1791344427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_in_transaction.1523307793 |
| Short name | T1191 |
| Test name | |
| Test status | |
| Simulation time | 150298028 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:44:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523307793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_in_transaction.1523307793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_min_length_out_transaction.2759014165 |
| Short name | T1192 |
| Test name | |
| Test status | |
| Simulation time | 143082862 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:44:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2759014165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_min_length_out_transaction.2759014165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_nak_trans.771880032 |
| Short name | T155 |
| Test name | |
| Test status | |
| Simulation time | 192011758 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:44:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=771880032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_nak_trans.771880032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_out_iso.2072175945 |
| Short name | T1193 |
| Test name | |
| Test status | |
| Simulation time | 166771913 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:44:05 AM UTC 24 |
| Finished | Aug 27 07:44:08 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072175945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_out_iso.2072175945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_out_stall.2866312125 |
| Short name | T1197 |
| Test name | |
| Test status | |
| Simulation time | 211851083 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2866312125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_out_stall.2866312125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_out_trans_nak.1074482192 |
| Short name | T1199 |
| Test name | |
| Test status | |
| Simulation time | 163446318 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074482192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_out_trans_nak.1074482192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_pending_in_trans.2553546797 |
| Short name | T1196 |
| Test name | |
| Test status | |
| Simulation time | 178680258 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553546797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 14.usbdev_pending_in_trans.2553546797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_pinflip.3471506310 |
| Short name | T1202 |
| Test name | |
| Test status | |
| Simulation time | 226075712 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3471506310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_pinflip.3471506310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_phy_config_usb_ref_disable.2429855922 |
| Short name | T1201 |
| Test name | |
| Test status | |
| Simulation time | 159364109 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2429855922 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 14.usbdev_phy_config_usb_ref_disable.2429855922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_phy_pins_sense.1051068095 |
| Short name | T1198 |
| Test name | |
| Test status | |
| Simulation time | 55643959 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1051068095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_phy_pins_sense.1051068095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_buffer.592453295 |
| Short name | T1336 |
| Test name | |
| Test status | |
| Simulation time | 18740516259 ps |
| CPU time | 53.54 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:45:03 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=592453295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_pkt_buffer.592453295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_received.2940024236 |
| Short name | T1200 |
| Test name | |
| Test status | |
| Simulation time | 147770887 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:44:08 AM UTC 24 |
| Finished | Aug 27 07:44:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2940024236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 14.usbdev_pkt_received.2940024236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_pkt_sent.2582326255 |
| Short name | T1131 |
| Test name | |
| Test status | |
| Simulation time | 221585380 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2582326255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 14.usbdev_pkt_sent.2582326255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_in_transaction.2677578536 |
| Short name | T1209 |
| Test name | |
| Test status | |
| Simulation time | 249768523 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2677578536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 14.usbdev_random_length_in_transaction.2677578536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_random_length_out_transaction.2930166679 |
| Short name | T1204 |
| Test name | |
| Test status | |
| Simulation time | 191251626 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930166679 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 14.usbdev_random_length_out_transaction.2930166679 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_resume_link_active.2636931349 |
| Short name | T1280 |
| Test name | |
| Test status | |
| Simulation time | 20171627034 ps |
| CPU time | 31.69 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:44 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2636931349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_resume_link_active.2636931349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_rx_crc_err.4178284190 |
| Short name | T1207 |
| Test name | |
| Test status | |
| Simulation time | 165671920 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4178284190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 14.usbdev_rx_crc_err.4178284190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_rx_full.2025940639 |
| Short name | T1211 |
| Test name | |
| Test status | |
| Simulation time | 342183403 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025940639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 14.usbdev_rx_full.2025940639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_setup_stage.2315283013 |
| Short name | T1210 |
| Test name | |
| Test status | |
| Simulation time | 150793800 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2315283013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_setup_stage.2315283013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_setup_trans_ignored.887436854 |
| Short name | T1208 |
| Test name | |
| Test status | |
| Simulation time | 251664539 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:44:11 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887436854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 14.usbdev_setup_trans_ignored.887436854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_smoke.2972009941 |
| Short name | T1213 |
| Test name | |
| Test status | |
| Simulation time | 294370853 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972009941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_smoke.2972009941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_spurious_pids_ignored.426864663 |
| Short name | T1348 |
| Test name | |
| Test status | |
| Simulation time | 2116097878 ps |
| CPU time | 53.37 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426864663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 14.usbdev_spurious_pids_ignored.426864663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_stall_priority_over_nak.367116559 |
| Short name | T1206 |
| Test name | |
| Test status | |
| Simulation time | 223972014 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=367116559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stall_priority_over_nak.367116559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_stall_trans.1437850510 |
| Short name | T1212 |
| Test name | |
| Test status | |
| Simulation time | 150311161 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1437850510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 14.usbdev_stall_trans.1437850510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_stream_len_max.3626617017 |
| Short name | T1217 |
| Test name | |
| Test status | |
| Simulation time | 675233963 ps |
| CPU time | 3.13 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:16 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3626617017 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_stream_len_max.3626617017 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_streaming_out.1935815513 |
| Short name | T1261 |
| Test name | |
| Test status | |
| Simulation time | 2525212773 ps |
| CPU time | 23.03 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:36 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935815513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 14.usbdev_streaming_out.1935815513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_timeout_missing_host_handshake.227882685 |
| Short name | T1190 |
| Test name | |
| Test status | |
| Simulation time | 1487826811 ps |
| CPU time | 9.68 seconds |
| Started | Aug 27 07:43:56 AM UTC 24 |
| Finished | Aug 27 07:44:08 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=227882685 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_timeout_missing_host_handshake.227882685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/14.usbdev_tx_rx_disruption.1813977372 |
| Short name | T1215 |
| Test name | |
| Test status | |
| Simulation time | 525084596 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:44:12 AM UTC 24 |
| Finished | Aug 27 07:44:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1813977372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 14.usbdev_t x_rx_disruption.1813977372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/14.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/140.usbdev_endpoint_types.811369446 |
| Short name | T438 |
| Test name | |
| Test status | |
| Simulation time | 556802462 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:54:31 AM UTC 24 |
| Finished | Aug 27 07:54:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=811369446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 140.usbdev_endpoint_types.811369446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/140.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/140.usbdev_tx_rx_disruption.1267165259 |
| Short name | T3246 |
| Test name | |
| Test status | |
| Simulation time | 453378944 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 215912 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1267165259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 140.usbdev_ tx_rx_disruption.1267165259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/140.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/141.usbdev_endpoint_types.3648504970 |
| Short name | T409 |
| Test name | |
| Test status | |
| Simulation time | 481421935 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648504970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_endpoint_types.3648504970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/141.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/141.usbdev_tx_rx_disruption.2645683842 |
| Short name | T3249 |
| Test name | |
| Test status | |
| Simulation time | 503204823 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2645683842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 141.usbdev_ tx_rx_disruption.2645683842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/141.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/142.usbdev_endpoint_types.3546930630 |
| Short name | T400 |
| Test name | |
| Test status | |
| Simulation time | 553008981 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3546930630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_endpoint_types.3546930630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/142.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/142.usbdev_tx_rx_disruption.1924178252 |
| Short name | T3253 |
| Test name | |
| Test status | |
| Simulation time | 491152297 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1924178252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 142.usbdev_ tx_rx_disruption.1924178252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/142.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/143.usbdev_tx_rx_disruption.1370333208 |
| Short name | T3266 |
| Test name | |
| Test status | |
| Simulation time | 619908740 ps |
| CPU time | 2.22 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1370333208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 143.usbdev_ tx_rx_disruption.1370333208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/143.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/144.usbdev_endpoint_types.3850523279 |
| Short name | T352 |
| Test name | |
| Test status | |
| Simulation time | 536656228 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850523279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_endpoint_types.3850523279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/144.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/144.usbdev_tx_rx_disruption.77633851 |
| Short name | T3262 |
| Test name | |
| Test status | |
| Simulation time | 548135580 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 217580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=77633851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 144.usbdev_tx _rx_disruption.77633851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/144.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/145.usbdev_endpoint_types.4032189754 |
| Short name | T3265 |
| Test name | |
| Test status | |
| Simulation time | 632884297 ps |
| CPU time | 2.04 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 217780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4032189754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_endpoint_types.4032189754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/145.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/145.usbdev_tx_rx_disruption.2687035539 |
| Short name | T3255 |
| Test name | |
| Test status | |
| Simulation time | 602733136 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2687035539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 145.usbdev_ tx_rx_disruption.2687035539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/145.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/146.usbdev_tx_rx_disruption.919373628 |
| Short name | T3258 |
| Test name | |
| Test status | |
| Simulation time | 508541251 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=919373628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 146.usbdev_t x_rx_disruption.919373628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/146.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/147.usbdev_endpoint_types.887481892 |
| Short name | T500 |
| Test name | |
| Test status | |
| Simulation time | 740201038 ps |
| CPU time | 1.9 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=887481892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 147.usbdev_endpoint_types.887481892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/147.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/147.usbdev_tx_rx_disruption.403764396 |
| Short name | T3257 |
| Test name | |
| Test status | |
| Simulation time | 461503935 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=403764396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 147.usbdev_t x_rx_disruption.403764396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/147.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/148.usbdev_endpoint_types.2620021458 |
| Short name | T3248 |
| Test name | |
| Test status | |
| Simulation time | 368194496 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620021458 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_endpoint_types.2620021458 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/148.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/148.usbdev_tx_rx_disruption.1013256512 |
| Short name | T3267 |
| Test name | |
| Test status | |
| Simulation time | 592236761 ps |
| CPU time | 1.97 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1013256512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 148.usbdev_ tx_rx_disruption.1013256512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/148.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/149.usbdev_endpoint_types.483229412 |
| Short name | T491 |
| Test name | |
| Test status | |
| Simulation time | 495343164 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=483229412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 149.usbdev_endpoint_types.483229412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/149.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/149.usbdev_tx_rx_disruption.3132895894 |
| Short name | T3263 |
| Test name | |
| Test status | |
| Simulation time | 522045453 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3132895894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 149.usbdev_ tx_rx_disruption.3132895894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/149.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_alert_test.1262889616 |
| Short name | T1269 |
| Test name | |
| Test status | |
| Simulation time | 37583939 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:44:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262889616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 15.usbdev_alert_test.1262889616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_disconnect.827683541 |
| Short name | T236 |
| Test name | |
| Test status | |
| Simulation time | 4820673383 ps |
| CPU time | 9.57 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:26 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=827683541 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_disconnect.827683541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_reset.2355689877 |
| Short name | T1275 |
| Test name | |
| Test status | |
| Simulation time | 21284537079 ps |
| CPU time | 25.63 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:43 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355689877 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_reset.2355689877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_aon_wake_resume.839985213 |
| Short name | T1320 |
| Test name | |
| Test status | |
| Simulation time | 31102763492 ps |
| CPU time | 50.74 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:45:08 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=839985213 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_aon_wake_resume.839985213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_av_buffer.4030614164 |
| Short name | T1222 |
| Test name | |
| Test status | |
| Simulation time | 156404784 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030614164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_av_buffer.4030614164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_bitstuff_err.323052401 |
| Short name | T1221 |
| Test name | |
| Test status | |
| Simulation time | 161451014 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=323052401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_bitstuff_err.323052401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_clear.39323527 |
| Short name | T1224 |
| Test name | |
| Test status | |
| Simulation time | 252385007 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:19 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=39323527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_clear.39323527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_data_toggle_restore.3971922571 |
| Short name | T322 |
| Test name | |
| Test status | |
| Simulation time | 938057061 ps |
| CPU time | 4.64 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:22 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3971922571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_data_toggle_restore.3971922571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_device_address.1543038940 |
| Short name | T1411 |
| Test name | |
| Test status | |
| Simulation time | 48900980960 ps |
| CPU time | 75.92 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:45:34 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1543038940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_address.1543038940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_device_timeout.1866064063 |
| Short name | T1249 |
| Test name | |
| Test status | |
| Simulation time | 1576860509 ps |
| CPU time | 13.8 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:31 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1866064063 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_device_timeout.1866064063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_disable_endpoint.3758569131 |
| Short name | T1225 |
| Test name | |
| Test status | |
| Simulation time | 457857051 ps |
| CPU time | 1.98 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758569131 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_disable_endpoint.3758569131 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_disconnected.1149322106 |
| Short name | T1223 |
| Test name | |
| Test status | |
| Simulation time | 167968169 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1149322106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_disconnected.1149322106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_enable.3772651515 |
| Short name | T1226 |
| Test name | |
| Test status | |
| Simulation time | 33195073 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:20 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772651515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_enable.3772651515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_access.3443055963 |
| Short name | T1234 |
| Test name | |
| Test status | |
| Simulation time | 824664476 ps |
| CPU time | 3.75 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:23 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3443055963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_access.3443055963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_endpoint_types.768854523 |
| Short name | T372 |
| Test name | |
| Test status | |
| Simulation time | 527669662 ps |
| CPU time | 1.94 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=768854523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 15.usbdev_endpoint_types.768854523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_fifo_rst.3042662441 |
| Short name | T1233 |
| Test name | |
| Test status | |
| Simulation time | 339243192 ps |
| CPU time | 3.41 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:23 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3042662441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_fifo_rst.3042662441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_in_iso.2179948760 |
| Short name | T1229 |
| Test name | |
| Test status | |
| Simulation time | 265452575 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:21 AM UTC 24 |
| Peak memory | 234044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2179948760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 15.usbdev_in_iso.2179948760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_in_stall.3328132228 |
| Short name | T1230 |
| Test name | |
| Test status | |
| Simulation time | 161046666 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:44:20 AM UTC 24 |
| Finished | Aug 27 07:44:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3328132228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_stall.3328132228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_in_trans.3307218868 |
| Short name | T1232 |
| Test name | |
| Test status | |
| Simulation time | 195031941 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:44:20 AM UTC 24 |
| Finished | Aug 27 07:44:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3307218868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_in_trans.3307218868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_invalid_sync.2923828108 |
| Short name | T1309 |
| Test name | |
| Test status | |
| Simulation time | 3163325545 ps |
| CPU time | 34.3 seconds |
| Started | Aug 27 07:44:18 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923828108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 15.usbdev_invalid_sync.2923828108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_iso_retraction.1786080293 |
| Short name | T1325 |
| Test name | |
| Test status | |
| Simulation time | 3383314224 ps |
| CPU time | 37.87 seconds |
| Started | Aug 27 07:44:20 AM UTC 24 |
| Finished | Aug 27 07:44:59 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1786080293 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_iso_retraction.1786080293 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_link_in_err.3587538005 |
| Short name | T1231 |
| Test name | |
| Test status | |
| Simulation time | 210254589 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:44:20 AM UTC 24 |
| Finished | Aug 27 07:44:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3587538005 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_in_err.3587538005 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_link_resume.1611489374 |
| Short name | T1345 |
| Test name | |
| Test status | |
| Simulation time | 24895746893 ps |
| CPU time | 44.19 seconds |
| Started | Aug 27 07:44:20 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611489374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_link_resume.1611489374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_link_suspend.4156085229 |
| Short name | T1266 |
| Test name | |
| Test status | |
| Simulation time | 10602248414 ps |
| CPU time | 16.47 seconds |
| Started | Aug 27 07:44:22 AM UTC 24 |
| Finished | Aug 27 07:44:40 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4156085229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_link_suspend.4156085229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_low_speed_traffic.3394227768 |
| Short name | T1317 |
| Test name | |
| Test status | |
| Simulation time | 3668317795 ps |
| CPU time | 33.47 seconds |
| Started | Aug 27 07:44:22 AM UTC 24 |
| Finished | Aug 27 07:44:57 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394227768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_low_speed_traffic.3394227768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_max_inter_pkt_delay.1356484207 |
| Short name | T1296 |
| Test name | |
| Test status | |
| Simulation time | 2859323275 ps |
| CPU time | 27.51 seconds |
| Started | Aug 27 07:44:22 AM UTC 24 |
| Finished | Aug 27 07:44:51 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356484207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_inter_pkt_delay.1356484207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_in_transaction.3834806691 |
| Short name | T1236 |
| Test name | |
| Test status | |
| Simulation time | 273173988 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:44:22 AM UTC 24 |
| Finished | Aug 27 07:44:25 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3834806691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_in_transaction.3834806691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_max_length_out_transaction.1488982482 |
| Short name | T1235 |
| Test name | |
| Test status | |
| Simulation time | 219779025 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:44:22 AM UTC 24 |
| Finished | Aug 27 07:44:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1488982482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_max_length_out_transaction.1488982482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_max_non_iso_usb_traffic.2724916592 |
| Short name | T1273 |
| Test name | |
| Test status | |
| Simulation time | 1732141031 ps |
| CPU time | 16.5 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:44:42 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2724916592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_max_non_iso_usb_traffic.2724916592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_min_inter_pkt_delay.1058813387 |
| Short name | T1342 |
| Test name | |
| Test status | |
| Simulation time | 1476610407 ps |
| CPU time | 39.99 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:45:05 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058813387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_min_inter_pkt_delay.1058813387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_in_transaction.2693084811 |
| Short name | T1239 |
| Test name | |
| Test status | |
| Simulation time | 155821266 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:44:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693084811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_in_transaction.2693084811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_min_length_out_transaction.2304183055 |
| Short name | T1238 |
| Test name | |
| Test status | |
| Simulation time | 199183641 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:44:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304183055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_min_length_out_transaction.2304183055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_out_iso.3767128544 |
| Short name | T1240 |
| Test name | |
| Test status | |
| Simulation time | 168014570 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:44:24 AM UTC 24 |
| Finished | Aug 27 07:44:27 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767128544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 15.usbdev_out_iso.3767128544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_out_stall.2259352084 |
| Short name | T1241 |
| Test name | |
| Test status | |
| Simulation time | 191303561 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:44:26 AM UTC 24 |
| Finished | Aug 27 07:44:28 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259352084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_out_stall.2259352084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_out_trans_nak.2303013712 |
| Short name | T1242 |
| Test name | |
| Test status | |
| Simulation time | 201145199 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:44:26 AM UTC 24 |
| Finished | Aug 27 07:44:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2303013712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_out_trans_nak.2303013712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_pending_in_trans.3765696674 |
| Short name | T1246 |
| Test name | |
| Test status | |
| Simulation time | 165987222 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:44:27 AM UTC 24 |
| Finished | Aug 27 07:44:30 AM UTC 24 |
| Peak memory | 215948 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3765696674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 15.usbdev_pending_in_trans.3765696674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_pinflip.2137954977 |
| Short name | T1248 |
| Test name | |
| Test status | |
| Simulation time | 227527552 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:44:27 AM UTC 24 |
| Finished | Aug 27 07:44:30 AM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2137954977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_pinflip.2137954977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_phy_config_usb_ref_disable.1994732359 |
| Short name | T1245 |
| Test name | |
| Test status | |
| Simulation time | 143136332 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:44:27 AM UTC 24 |
| Finished | Aug 27 07:44:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994732359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 15.usbdev_phy_config_usb_ref_disable.1994732359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_phy_pins_sense.3603379086 |
| Short name | T1244 |
| Test name | |
| Test status | |
| Simulation time | 31018982 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:44:27 AM UTC 24 |
| Finished | Aug 27 07:44:29 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603379086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_phy_pins_sense.3603379086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_buffer.135044621 |
| Short name | T1413 |
| Test name | |
| Test status | |
| Simulation time | 22026900755 ps |
| CPU time | 66.78 seconds |
| Started | Aug 27 07:44:28 AM UTC 24 |
| Finished | Aug 27 07:45:36 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135044621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 15.usbdev_pkt_buffer.135044621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_received.2663211900 |
| Short name | T1247 |
| Test name | |
| Test status | |
| Simulation time | 179637282 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:44:28 AM UTC 24 |
| Finished | Aug 27 07:44:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663211900 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 15.usbdev_pkt_received.2663211900 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_pkt_sent.2950847391 |
| Short name | T1251 |
| Test name | |
| Test status | |
| Simulation time | 187910160 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:44:29 AM UTC 24 |
| Finished | Aug 27 07:44:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950847391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_pkt_sent.2950847391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_in_transaction.3509457920 |
| Short name | T1250 |
| Test name | |
| Test status | |
| Simulation time | 207183112 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:44:29 AM UTC 24 |
| Finished | Aug 27 07:44:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509457920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 15.usbdev_random_length_in_transaction.3509457920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_random_length_out_transaction.2758529342 |
| Short name | T1252 |
| Test name | |
| Test status | |
| Simulation time | 169256487 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:44:31 AM UTC 24 |
| Finished | Aug 27 07:44:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2758529342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 15.usbdev_random_length_out_transaction.2758529342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_resume_link_active.4279129818 |
| Short name | T1327 |
| Test name | |
| Test status | |
| Simulation time | 20157974871 ps |
| CPU time | 28.36 seconds |
| Started | Aug 27 07:44:31 AM UTC 24 |
| Finished | Aug 27 07:45:00 AM UTC 24 |
| Peak memory | 217956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4279129818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 15.usbdev_resume_link_active.4279129818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_rx_crc_err.1827699633 |
| Short name | T1253 |
| Test name | |
| Test status | |
| Simulation time | 178133218 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:44:31 AM UTC 24 |
| Finished | Aug 27 07:44:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1827699633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 15.usbdev_rx_crc_err.1827699633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_rx_full.620088479 |
| Short name | T304 |
| Test name | |
| Test status | |
| Simulation time | 301258094 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:44:31 AM UTC 24 |
| Finished | Aug 27 07:44:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620088479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 15.usbdev_rx_full.620088479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_setup_stage.2830608669 |
| Short name | T1254 |
| Test name | |
| Test status | |
| Simulation time | 156599566 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:44:31 AM UTC 24 |
| Finished | Aug 27 07:44:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2830608669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_setup_stage.2830608669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_setup_trans_ignored.2597630993 |
| Short name | T1258 |
| Test name | |
| Test status | |
| Simulation time | 160464868 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:44:33 AM UTC 24 |
| Finished | Aug 27 07:44:35 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597630993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 15.usbdev_setup_trans_ignored.2597630993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_smoke.47074892 |
| Short name | T1260 |
| Test name | |
| Test status | |
| Simulation time | 259254183 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:44:33 AM UTC 24 |
| Finished | Aug 27 07:44:36 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=47074892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 15.usbdev_smoke.47074892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_spurious_pids_ignored.973226960 |
| Short name | T1295 |
| Test name | |
| Test status | |
| Simulation time | 1946440967 ps |
| CPU time | 15.94 seconds |
| Started | Aug 27 07:44:33 AM UTC 24 |
| Finished | Aug 27 07:44:50 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=973226960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 15.usbdev_spurious_pids_ignored.973226960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_stall_priority_over_nak.3537002349 |
| Short name | T1259 |
| Test name | |
| Test status | |
| Simulation time | 173964414 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:44:33 AM UTC 24 |
| Finished | Aug 27 07:44:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537002349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stall_priority_over_nak.3537002349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_stall_trans.2505677030 |
| Short name | T1262 |
| Test name | |
| Test status | |
| Simulation time | 152211993 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:44:35 AM UTC 24 |
| Finished | Aug 27 07:44:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2505677030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 15.usbdev_stall_trans.2505677030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_stream_len_max.3323061444 |
| Short name | T1267 |
| Test name | |
| Test status | |
| Simulation time | 1117387842 ps |
| CPU time | 3.79 seconds |
| Started | Aug 27 07:44:35 AM UTC 24 |
| Finished | Aug 27 07:44:40 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3323061444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_stream_len_max.3323061444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_streaming_out.880600971 |
| Short name | T1311 |
| Test name | |
| Test status | |
| Simulation time | 2187693874 ps |
| CPU time | 18.81 seconds |
| Started | Aug 27 07:44:35 AM UTC 24 |
| Finished | Aug 27 07:44:55 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=880600971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 15.usbdev_streaming_out.880600971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_timeout_missing_host_handshake.4102478949 |
| Short name | T1290 |
| Test name | |
| Test status | |
| Simulation time | 1131613584 ps |
| CPU time | 29.78 seconds |
| Started | Aug 27 07:44:16 AM UTC 24 |
| Finished | Aug 27 07:44:47 AM UTC 24 |
| Peak memory | 218020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102478949 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_timeout_missing_host_handshake.4102478949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/15.usbdev_tx_rx_disruption.286113001 |
| Short name | T1263 |
| Test name | |
| Test status | |
| Simulation time | 630571091 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:44:35 AM UTC 24 |
| Finished | Aug 27 07:44:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=286113001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 15.usbdev_tx _rx_disruption.286113001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/15.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/150.usbdev_endpoint_types.2118035504 |
| Short name | T460 |
| Test name | |
| Test status | |
| Simulation time | 429849656 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:34 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2118035504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_endpoint_types.2118035504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/150.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/150.usbdev_tx_rx_disruption.1261628127 |
| Short name | T3271 |
| Test name | |
| Test status | |
| Simulation time | 479839689 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:36 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1261628127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 150.usbdev_ tx_rx_disruption.1261628127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/150.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/151.usbdev_endpoint_types.2932316658 |
| Short name | T3269 |
| Test name | |
| Test status | |
| Simulation time | 305448694 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:54:36 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2932316658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_endpoint_types.2932316658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/151.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/151.usbdev_tx_rx_disruption.656896827 |
| Short name | T128 |
| Test name | |
| Test status | |
| Simulation time | 710857585 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:54:37 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=656896827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 151.usbdev_t x_rx_disruption.656896827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/151.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/152.usbdev_tx_rx_disruption.3631990117 |
| Short name | T3270 |
| Test name | |
| Test status | |
| Simulation time | 637453704 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3631990117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 152.usbdev_ tx_rx_disruption.3631990117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/152.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/153.usbdev_endpoint_types.3614231367 |
| Short name | T3251 |
| Test name | |
| Test status | |
| Simulation time | 187760655 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3614231367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_endpoint_types.3614231367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/153.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/153.usbdev_tx_rx_disruption.705333781 |
| Short name | T3256 |
| Test name | |
| Test status | |
| Simulation time | 488687098 ps |
| CPU time | 1.99 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=705333781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 153.usbdev_t x_rx_disruption.705333781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/153.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/154.usbdev_endpoint_types.1619940326 |
| Short name | T486 |
| Test name | |
| Test status | |
| Simulation time | 392929582 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1619940326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_endpoint_types.1619940326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/154.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/154.usbdev_tx_rx_disruption.661846234 |
| Short name | T3254 |
| Test name | |
| Test status | |
| Simulation time | 476757629 ps |
| CPU time | 1.84 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=661846234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 154.usbdev_t x_rx_disruption.661846234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/154.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/155.usbdev_endpoint_types.4051118611 |
| Short name | T3244 |
| Test name | |
| Test status | |
| Simulation time | 149157889 ps |
| CPU time | 0.81 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4051118611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_endpoint_types.4051118611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/155.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/155.usbdev_tx_rx_disruption.540612043 |
| Short name | T3259 |
| Test name | |
| Test status | |
| Simulation time | 626392213 ps |
| CPU time | 1.89 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=540612043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 155.usbdev_t x_rx_disruption.540612043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/155.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/156.usbdev_endpoint_types.880229479 |
| Short name | T469 |
| Test name | |
| Test status | |
| Simulation time | 555654503 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=880229479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 156.usbdev_endpoint_types.880229479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/156.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/156.usbdev_tx_rx_disruption.782715062 |
| Short name | T3261 |
| Test name | |
| Test status | |
| Simulation time | 454535661 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=782715062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 156.usbdev_t x_rx_disruption.782715062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/156.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/157.usbdev_endpoint_types.1927175835 |
| Short name | T489 |
| Test name | |
| Test status | |
| Simulation time | 400719796 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927175835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_endpoint_types.1927175835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/157.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/157.usbdev_tx_rx_disruption.4231798871 |
| Short name | T3252 |
| Test name | |
| Test status | |
| Simulation time | 562045646 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4231798871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 157.usbdev_ tx_rx_disruption.4231798871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/157.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/158.usbdev_endpoint_types.2855608973 |
| Short name | T487 |
| Test name | |
| Test status | |
| Simulation time | 541425723 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2855608973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_endpoint_types.2855608973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/158.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/158.usbdev_tx_rx_disruption.1106327999 |
| Short name | T3260 |
| Test name | |
| Test status | |
| Simulation time | 540219697 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1106327999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 158.usbdev_ tx_rx_disruption.1106327999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/158.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/159.usbdev_endpoint_types.4188134264 |
| Short name | T483 |
| Test name | |
| Test status | |
| Simulation time | 244264886 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188134264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_endpoint_types.4188134264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/159.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/159.usbdev_tx_rx_disruption.4188921853 |
| Short name | T3268 |
| Test name | |
| Test status | |
| Simulation time | 543010595 ps |
| CPU time | 2.17 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4188921853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 159.usbdev_ tx_rx_disruption.4188921853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/159.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_alert_test.1697581148 |
| Short name | T1321 |
| Test name | |
| Test status | |
| Simulation time | 61560091 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:44:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697581148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 16.usbdev_alert_test.1697581148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_disconnect.2033264322 |
| Short name | T1286 |
| Test name | |
| Test status | |
| Simulation time | 4498546223 ps |
| CPU time | 7.28 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:44:46 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2033264322 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_disconnect.2033264322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_reset.1458620686 |
| Short name | T1326 |
| Test name | |
| Test status | |
| Simulation time | 14393615229 ps |
| CPU time | 20.52 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:45:00 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1458620686 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_reset.1458620686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_aon_wake_resume.2427183417 |
| Short name | T1358 |
| Test name | |
| Test status | |
| Simulation time | 24653157936 ps |
| CPU time | 32.82 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:45:12 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427183417 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_aon_wake_resume.2427183417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_av_buffer.3847226997 |
| Short name | T1271 |
| Test name | |
| Test status | |
| Simulation time | 232897450 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:44:41 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3847226997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_av_buffer.3847226997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_bitstuff_err.2970716039 |
| Short name | T1270 |
| Test name | |
| Test status | |
| Simulation time | 141261248 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:44:40 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970716039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_bitstuff_err.2970716039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_clear.2005834747 |
| Short name | T1272 |
| Test name | |
| Test status | |
| Simulation time | 292738722 ps |
| CPU time | 1.9 seconds |
| Started | Aug 27 07:44:38 AM UTC 24 |
| Finished | Aug 27 07:44:41 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005834747 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 16.usbdev_data_toggle_clear.2005834747 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_data_toggle_restore.773051956 |
| Short name | T324 |
| Test name | |
| Test status | |
| Simulation time | 417610795 ps |
| CPU time | 2.54 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:44 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=773051956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_data_toggle_restore.773051956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_device_address.293914806 |
| Short name | T1407 |
| Test name | |
| Test status | |
| Simulation time | 23273564898 ps |
| CPU time | 50.57 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:45:33 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=293914806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_device_address.293914806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_device_timeout.3685488343 |
| Short name | T1386 |
| Test name | |
| Test status | |
| Simulation time | 1821370375 ps |
| CPU time | 40.58 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:45:23 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3685488343 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_device_timeout.3685488343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_disable_endpoint.3754054288 |
| Short name | T1279 |
| Test name | |
| Test status | |
| Simulation time | 483060414 ps |
| CPU time | 2.23 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:44 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3754054288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 16.usbdev_disable_endpoint.3754054288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_disconnected.3047887348 |
| Short name | T1268 |
| Test name | |
| Test status | |
| Simulation time | 159528582 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047887348 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_disconnected.3047887348 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_enable.2048319388 |
| Short name | T1277 |
| Test name | |
| Test status | |
| Simulation time | 60078052 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2048319388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_enable.2048319388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_access.2776012090 |
| Short name | T1287 |
| Test name | |
| Test status | |
| Simulation time | 804481255 ps |
| CPU time | 4.26 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:46 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776012090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_access.2776012090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_endpoint_types.2178512877 |
| Short name | T476 |
| Test name | |
| Test status | |
| Simulation time | 197343467 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2178512877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_endpoint_types.2178512877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_fifo_rst.2459480882 |
| Short name | T1285 |
| Test name | |
| Test status | |
| Simulation time | 171840929 ps |
| CPU time | 2.25 seconds |
| Started | Aug 27 07:44:43 AM UTC 24 |
| Finished | Aug 27 07:44:46 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2459480882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_fifo_rst.2459480882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_in_iso.973892179 |
| Short name | T1281 |
| Test name | |
| Test status | |
| Simulation time | 150838034 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:44:43 AM UTC 24 |
| Finished | Aug 27 07:44:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=973892179 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_in_iso.973892179 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_in_stall.595955537 |
| Short name | T1282 |
| Test name | |
| Test status | |
| Simulation time | 143500167 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:44:43 AM UTC 24 |
| Finished | Aug 27 07:44:45 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=595955537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 16.usbdev_in_stall.595955537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_in_trans.2124908127 |
| Short name | T1284 |
| Test name | |
| Test status | |
| Simulation time | 218838563 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:44:43 AM UTC 24 |
| Finished | Aug 27 07:44:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124908127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_in_trans.2124908127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_invalid_sync.4036247423 |
| Short name | T1503 |
| Test name | |
| Test status | |
| Simulation time | 2856428782 ps |
| CPU time | 81.06 seconds |
| Started | Aug 27 07:44:43 AM UTC 24 |
| Finished | Aug 27 07:46:06 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4036247423 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 16.usbdev_invalid_sync.4036247423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_iso_retraction.2183180176 |
| Short name | T1512 |
| Test name | |
| Test status | |
| Simulation time | 13822186422 ps |
| CPU time | 83.8 seconds |
| Started | Aug 27 07:44:45 AM UTC 24 |
| Finished | Aug 27 07:46:10 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2183180176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_iso_retraction.2183180176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_link_in_err.3918915729 |
| Short name | T1289 |
| Test name | |
| Test status | |
| Simulation time | 207036679 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:44:45 AM UTC 24 |
| Finished | Aug 27 07:44:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3918915729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_in_err.3918915729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_link_resume.3500686694 |
| Short name | T1425 |
| Test name | |
| Test status | |
| Simulation time | 31374244449 ps |
| CPU time | 51.65 seconds |
| Started | Aug 27 07:44:45 AM UTC 24 |
| Finished | Aug 27 07:45:38 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3500686694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_link_resume.3500686694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_link_suspend.3252472928 |
| Short name | T1306 |
| Test name | |
| Test status | |
| Simulation time | 5671731823 ps |
| CPU time | 7.93 seconds |
| Started | Aug 27 07:44:45 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3252472928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_link_suspend.3252472928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_low_speed_traffic.3863661176 |
| Short name | T1365 |
| Test name | |
| Test status | |
| Simulation time | 3849109930 ps |
| CPU time | 27.74 seconds |
| Started | Aug 27 07:44:45 AM UTC 24 |
| Finished | Aug 27 07:45:14 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863661176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_low_speed_traffic.3863661176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_max_inter_pkt_delay.2787026937 |
| Short name | T1502 |
| Test name | |
| Test status | |
| Simulation time | 2952548448 ps |
| CPU time | 76.54 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:46:05 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787026937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_inter_pkt_delay.2787026937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_in_transaction.1980363755 |
| Short name | T1292 |
| Test name | |
| Test status | |
| Simulation time | 241525153 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:44:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980363755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_max_length_in_transaction.1980363755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_max_length_out_transaction.568357878 |
| Short name | T1293 |
| Test name | |
| Test status | |
| Simulation time | 190733912 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:44:49 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=568357878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 16.usbdev_max_length_out_transaction.568357878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_max_non_iso_usb_traffic.4039441512 |
| Short name | T1378 |
| Test name | |
| Test status | |
| Simulation time | 3241297892 ps |
| CPU time | 30.39 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:45:19 AM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4039441512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_max_non_iso_usb_traffic.4039441512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_min_inter_pkt_delay.3316168735 |
| Short name | T1446 |
| Test name | |
| Test status | |
| Simulation time | 2093540777 ps |
| CPU time | 56.21 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:45:45 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3316168735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_min_inter_pkt_delay.3316168735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_in_transaction.1439451803 |
| Short name | T1294 |
| Test name | |
| Test status | |
| Simulation time | 220552251 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:44:50 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439451803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_in_transaction.1439451803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_min_length_out_transaction.3605820796 |
| Short name | T1291 |
| Test name | |
| Test status | |
| Simulation time | 151869401 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:44:47 AM UTC 24 |
| Finished | Aug 27 07:44:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605820796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_min_length_out_transaction.3605820796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_out_iso.40830066 |
| Short name | T1300 |
| Test name | |
| Test status | |
| Simulation time | 194131265 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:44:49 AM UTC 24 |
| Finished | Aug 27 07:44:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40830066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_out_iso.40830066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_out_stall.3566811664 |
| Short name | T1299 |
| Test name | |
| Test status | |
| Simulation time | 168458393 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:44:49 AM UTC 24 |
| Finished | Aug 27 07:44:52 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3566811664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_out_stall.3566811664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_out_trans_nak.780119457 |
| Short name | T1297 |
| Test name | |
| Test status | |
| Simulation time | 183754729 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:44:49 AM UTC 24 |
| Finished | Aug 27 07:44:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=780119457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_out_trans_nak.780119457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_pending_in_trans.762477818 |
| Short name | T1298 |
| Test name | |
| Test status | |
| Simulation time | 151844546 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:44:49 AM UTC 24 |
| Finished | Aug 27 07:44:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=762477818 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_pending_in_trans.762477818 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_pinflip.1568962916 |
| Short name | T1301 |
| Test name | |
| Test status | |
| Simulation time | 236137045 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:44:49 AM UTC 24 |
| Finished | Aug 27 07:44:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568962916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_pinflip.1568962916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_phy_config_usb_ref_disable.4221404204 |
| Short name | T1304 |
| Test name | |
| Test status | |
| Simulation time | 137626645 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221404204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 16.usbdev_phy_config_usb_ref_disable.4221404204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_phy_pins_sense.1759215450 |
| Short name | T1302 |
| Test name | |
| Test status | |
| Simulation time | 85432787 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1759215450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_phy_pins_sense.1759215450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_buffer.3371007918 |
| Short name | T1428 |
| Test name | |
| Test status | |
| Simulation time | 14180621460 ps |
| CPU time | 47.55 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:45:40 AM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3371007918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_pkt_buffer.3371007918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_received.3255407368 |
| Short name | T1303 |
| Test name | |
| Test status | |
| Simulation time | 185108938 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3255407368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 16.usbdev_pkt_received.3255407368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_pkt_sent.4283148573 |
| Short name | T1307 |
| Test name | |
| Test status | |
| Simulation time | 230338115 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4283148573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 16.usbdev_pkt_sent.4283148573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_in_transaction.1715548984 |
| Short name | T1308 |
| Test name | |
| Test status | |
| Simulation time | 234038601 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715548984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 16.usbdev_random_length_in_transaction.1715548984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_random_length_out_transaction.1259334789 |
| Short name | T1305 |
| Test name | |
| Test status | |
| Simulation time | 188156063 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:44:51 AM UTC 24 |
| Finished | Aug 27 07:44:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1259334789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 16.usbdev_random_length_out_transaction.1259334789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_resume_link_active.1047997482 |
| Short name | T1391 |
| Test name | |
| Test status | |
| Simulation time | 20167359034 ps |
| CPU time | 30.01 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:45:24 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1047997482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 16.usbdev_resume_link_active.1047997482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_rx_crc_err.1651910275 |
| Short name | T1312 |
| Test name | |
| Test status | |
| Simulation time | 140158328 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:44:56 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651910275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_rx_crc_err.1651910275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_rx_full.907252398 |
| Short name | T1316 |
| Test name | |
| Test status | |
| Simulation time | 347026700 ps |
| CPU time | 2.03 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:44:56 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=907252398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 16.usbdev_rx_full.907252398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_setup_stage.2276096317 |
| Short name | T1314 |
| Test name | |
| Test status | |
| Simulation time | 178169110 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:44:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2276096317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 16.usbdev_setup_stage.2276096317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_setup_trans_ignored.3948198888 |
| Short name | T1313 |
| Test name | |
| Test status | |
| Simulation time | 156646638 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:44:56 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3948198888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 16.usbdev_setup_trans_ignored.3948198888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_smoke.3861478208 |
| Short name | T1315 |
| Test name | |
| Test status | |
| Simulation time | 270972607 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:44:53 AM UTC 24 |
| Finished | Aug 27 07:44:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861478208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_smoke.3861478208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_spurious_pids_ignored.1548807014 |
| Short name | T1427 |
| Test name | |
| Test status | |
| Simulation time | 1603600523 ps |
| CPU time | 41.23 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:45:38 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1548807014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 16.usbdev_spurious_pids_ignored.1548807014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_stall_priority_over_nak.3086550030 |
| Short name | T1319 |
| Test name | |
| Test status | |
| Simulation time | 173347157 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:44:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3086550030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stall_priority_over_nak.3086550030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_stall_trans.878780955 |
| Short name | T1322 |
| Test name | |
| Test status | |
| Simulation time | 195352733 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:44:58 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878780955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 16.usbdev_stall_trans.878780955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_stream_len_max.1477781385 |
| Short name | T1331 |
| Test name | |
| Test status | |
| Simulation time | 1323737357 ps |
| CPU time | 4.31 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:45:01 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1477781385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_stream_len_max.1477781385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_streaming_out.3174030757 |
| Short name | T1631 |
| Test name | |
| Test status | |
| Simulation time | 4072471627 ps |
| CPU time | 110.5 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:46:48 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174030757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 16.usbdev_streaming_out.3174030757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_timeout_missing_host_handshake.2562900454 |
| Short name | T1324 |
| Test name | |
| Test status | |
| Simulation time | 882289958 ps |
| CPU time | 17.14 seconds |
| Started | Aug 27 07:44:41 AM UTC 24 |
| Finished | Aug 27 07:44:59 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2562900454 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_timeout_missing_host_handshake.2562900454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/16.usbdev_tx_rx_disruption.2489132473 |
| Short name | T1323 |
| Test name | |
| Test status | |
| Simulation time | 507813362 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:44:56 AM UTC 24 |
| Finished | Aug 27 07:44:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2489132473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 16.usbdev_t x_rx_disruption.2489132473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/16.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/160.usbdev_tx_rx_disruption.1126716451 |
| Short name | T3264 |
| Test name | |
| Test status | |
| Simulation time | 636709364 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:54:44 AM UTC 24 |
| Finished | Aug 27 07:54:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1126716451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 160.usbdev_ tx_rx_disruption.1126716451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/160.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/161.usbdev_tx_rx_disruption.3762393791 |
| Short name | T201 |
| Test name | |
| Test status | |
| Simulation time | 544090669 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:54:46 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3762393791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 161.usbdev_ tx_rx_disruption.3762393791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/161.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/162.usbdev_endpoint_types.1003288642 |
| Short name | T3274 |
| Test name | |
| Test status | |
| Simulation time | 185953829 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:54:46 AM UTC 24 |
| Finished | Aug 27 07:54:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003288642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_endpoint_types.1003288642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/162.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/162.usbdev_tx_rx_disruption.1361963247 |
| Short name | T3272 |
| Test name | |
| Test status | |
| Simulation time | 598792348 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:54:46 AM UTC 24 |
| Finished | Aug 27 07:54:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1361963247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 162.usbdev_ tx_rx_disruption.1361963247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/162.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/163.usbdev_endpoint_types.3511849593 |
| Short name | T349 |
| Test name | |
| Test status | |
| Simulation time | 566650574 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:46 AM UTC 24 |
| Finished | Aug 27 07:54:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3511849593 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_endpoint_types.3511849593 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/163.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/163.usbdev_tx_rx_disruption.3188146336 |
| Short name | T3276 |
| Test name | |
| Test status | |
| Simulation time | 443776786 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3188146336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 163.usbdev_ tx_rx_disruption.3188146336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/163.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/164.usbdev_tx_rx_disruption.2700357604 |
| Short name | T3279 |
| Test name | |
| Test status | |
| Simulation time | 608250830 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2700357604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 164.usbdev_ tx_rx_disruption.2700357604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/164.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/165.usbdev_endpoint_types.3756124137 |
| Short name | T3278 |
| Test name | |
| Test status | |
| Simulation time | 582508641 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3756124137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_endpoint_types.3756124137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/165.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/165.usbdev_tx_rx_disruption.2790886253 |
| Short name | T3280 |
| Test name | |
| Test status | |
| Simulation time | 616068872 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 215456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2790886253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 165.usbdev_ tx_rx_disruption.2790886253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/165.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/166.usbdev_endpoint_types.3347267927 |
| Short name | T494 |
| Test name | |
| Test status | |
| Simulation time | 293470053 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347267927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_endpoint_types.3347267927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/166.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/166.usbdev_tx_rx_disruption.2509181010 |
| Short name | T3283 |
| Test name | |
| Test status | |
| Simulation time | 594968435 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2509181010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 166.usbdev_ tx_rx_disruption.2509181010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/166.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/167.usbdev_endpoint_types.2372821767 |
| Short name | T386 |
| Test name | |
| Test status | |
| Simulation time | 341806261 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372821767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_endpoint_types.2372821767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/167.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/167.usbdev_tx_rx_disruption.3423950028 |
| Short name | T3288 |
| Test name | |
| Test status | |
| Simulation time | 527518425 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3423950028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 167.usbdev_ tx_rx_disruption.3423950028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/167.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/168.usbdev_endpoint_types.104124704 |
| Short name | T3281 |
| Test name | |
| Test status | |
| Simulation time | 258039835 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=104124704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 168.usbdev_endpoint_types.104124704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/168.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/168.usbdev_tx_rx_disruption.3293114443 |
| Short name | T3287 |
| Test name | |
| Test status | |
| Simulation time | 484594203 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3293114443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 168.usbdev_ tx_rx_disruption.3293114443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/168.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/169.usbdev_endpoint_types.1236003793 |
| Short name | T3282 |
| Test name | |
| Test status | |
| Simulation time | 219549890 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1236003793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_endpoint_types.1236003793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/169.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/169.usbdev_tx_rx_disruption.1363555534 |
| Short name | T3286 |
| Test name | |
| Test status | |
| Simulation time | 499637628 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1363555534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 169.usbdev_ tx_rx_disruption.1363555534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/169.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_alert_test.4011087288 |
| Short name | T1373 |
| Test name | |
| Test status | |
| Simulation time | 34663342 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:45:15 AM UTC 24 |
| Finished | Aug 27 07:45:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4011087288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 17.usbdev_alert_test.4011087288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_disconnect.330025430 |
| Short name | T1349 |
| Test name | |
| Test status | |
| Simulation time | 3993196621 ps |
| CPU time | 8.1 seconds |
| Started | Aug 27 07:44:58 AM UTC 24 |
| Finished | Aug 27 07:45:08 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=330025430 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_disconnect.330025430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_reset.2319879196 |
| Short name | T1396 |
| Test name | |
| Test status | |
| Simulation time | 20090339612 ps |
| CPU time | 27.46 seconds |
| Started | Aug 27 07:44:58 AM UTC 24 |
| Finished | Aug 27 07:45:27 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2319879196 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_reset.2319879196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_aon_wake_resume.3026078205 |
| Short name | T1454 |
| Test name | |
| Test status | |
| Simulation time | 29846417598 ps |
| CPU time | 48.16 seconds |
| Started | Aug 27 07:44:58 AM UTC 24 |
| Finished | Aug 27 07:45:48 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3026078205 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_aon_wake_resume.3026078205 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_av_buffer.3092150172 |
| Short name | T1328 |
| Test name | |
| Test status | |
| Simulation time | 195088997 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:01 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3092150172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_av_buffer.3092150172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_bitstuff_err.51266330 |
| Short name | T1329 |
| Test name | |
| Test status | |
| Simulation time | 142829515 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:01 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=51266330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_bitstuff_err.51266330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_clear.260883189 |
| Short name | T1330 |
| Test name | |
| Test status | |
| Simulation time | 196139577 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=260883189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_data_toggle_clear.260883189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_data_toggle_restore.280395523 |
| Short name | T1332 |
| Test name | |
| Test status | |
| Simulation time | 406444082 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280395523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_data_toggle_restore.280395523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_device_address.202936081 |
| Short name | T1549 |
| Test name | |
| Test status | |
| Simulation time | 48889060736 ps |
| CPU time | 81.91 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:46:22 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=202936081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_device_address.202936081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_device_timeout.367158888 |
| Short name | T1444 |
| Test name | |
| Test status | |
| Simulation time | 6086427371 ps |
| CPU time | 44.07 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:44 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=367158888 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_device_timeout.367158888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_disable_endpoint.4007883522 |
| Short name | T1333 |
| Test name | |
| Test status | |
| Simulation time | 661769850 ps |
| CPU time | 2.31 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:02 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4007883522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_disable_endpoint.4007883522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_disconnected.1006087000 |
| Short name | T1337 |
| Test name | |
| Test status | |
| Simulation time | 177637060 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:45:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006087000 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_disconnected.1006087000 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_enable.1445040486 |
| Short name | T1335 |
| Test name | |
| Test status | |
| Simulation time | 39781102 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:45:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1445040486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_enable.1445040486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_access.4144521673 |
| Short name | T1343 |
| Test name | |
| Test status | |
| Simulation time | 885994424 ps |
| CPU time | 3.68 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 217444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4144521673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_access.4144521673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_endpoint_types.1823289951 |
| Short name | T439 |
| Test name | |
| Test status | |
| Simulation time | 355130422 ps |
| CPU time | 2.12 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:45:04 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1823289951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_endpoint_types.1823289951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_fifo_rst.2235388035 |
| Short name | T1339 |
| Test name | |
| Test status | |
| Simulation time | 152117244 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:45:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2235388035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_fifo_rst.2235388035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_in_iso.1186644449 |
| Short name | T1344 |
| Test name | |
| Test status | |
| Simulation time | 205798130 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 226020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186644449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_in_iso.1186644449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_in_stall.2482648289 |
| Short name | T1340 |
| Test name | |
| Test status | |
| Simulation time | 139991546 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:05 AM UTC 24 |
| Peak memory | 215788 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2482648289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_stall.2482648289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_in_trans.1251536398 |
| Short name | T1341 |
| Test name | |
| Test status | |
| Simulation time | 187240124 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251536398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_in_trans.1251536398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_invalid_sync.2418474738 |
| Short name | T1577 |
| Test name | |
| Test status | |
| Simulation time | 3515939069 ps |
| CPU time | 87.48 seconds |
| Started | Aug 27 07:45:01 AM UTC 24 |
| Finished | Aug 27 07:46:30 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2418474738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 17.usbdev_invalid_sync.2418474738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_iso_retraction.3388137572 |
| Short name | T1579 |
| Test name | |
| Test status | |
| Simulation time | 12871645474 ps |
| CPU time | 85.75 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:46:31 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388137572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_iso_retraction.3388137572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_link_in_err.1966991769 |
| Short name | T1346 |
| Test name | |
| Test status | |
| Simulation time | 245269040 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966991769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_link_in_err.1966991769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_link_resume.178309852 |
| Short name | T1464 |
| Test name | |
| Test status | |
| Simulation time | 30836482748 ps |
| CPU time | 46.87 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=178309852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_link_resume.178309852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_link_suspend.2406893043 |
| Short name | T1371 |
| Test name | |
| Test status | |
| Simulation time | 6127086221 ps |
| CPU time | 11.94 seconds |
| Started | Aug 27 07:45:03 AM UTC 24 |
| Finished | Aug 27 07:45:16 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406893043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_link_suspend.2406893043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_low_speed_traffic.3588654165 |
| Short name | T1432 |
| Test name | |
| Test status | |
| Simulation time | 5090053526 ps |
| CPU time | 34.28 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588654165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_low_speed_traffic.3588654165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_max_inter_pkt_delay.1159179758 |
| Short name | T1410 |
| Test name | |
| Test status | |
| Simulation time | 2837156026 ps |
| CPU time | 26.98 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:33 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1159179758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_inter_pkt_delay.1159179758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_in_transaction.2260795111 |
| Short name | T1352 |
| Test name | |
| Test status | |
| Simulation time | 250311748 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:08 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2260795111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_in_transaction.2260795111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_max_length_out_transaction.3851958113 |
| Short name | T1350 |
| Test name | |
| Test status | |
| Simulation time | 192677113 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:08 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3851958113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_max_length_out_transaction.3851958113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_max_non_iso_usb_traffic.1131576549 |
| Short name | T1400 |
| Test name | |
| Test status | |
| Simulation time | 3301038621 ps |
| CPU time | 24.08 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1131576549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_max_non_iso_usb_traffic.1131576549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_min_inter_pkt_delay.4098283789 |
| Short name | T1406 |
| Test name | |
| Test status | |
| Simulation time | 2643202022 ps |
| CPU time | 25.39 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:32 AM UTC 24 |
| Peak memory | 228380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4098283789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_min_inter_pkt_delay.4098283789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_in_transaction.4249578777 |
| Short name | T1351 |
| Test name | |
| Test status | |
| Simulation time | 173955393 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:45:05 AM UTC 24 |
| Finished | Aug 27 07:45:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4249578777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 17.usbdev_min_length_in_transaction.4249578777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_min_length_out_transaction.410066872 |
| Short name | T1353 |
| Test name | |
| Test status | |
| Simulation time | 180799514 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:45:07 AM UTC 24 |
| Finished | Aug 27 07:45:11 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=410066872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 17.usbdev_min_length_out_transaction.410066872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_nak_trans.1197254774 |
| Short name | T149 |
| Test name | |
| Test status | |
| Simulation time | 187258242 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:11 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1197254774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_nak_trans.1197254774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_out_iso.803380596 |
| Short name | T1278 |
| Test name | |
| Test status | |
| Simulation time | 170884374 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803380596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 17.usbdev_out_iso.803380596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_out_stall.1758531551 |
| Short name | T1154 |
| Test name | |
| Test status | |
| Simulation time | 194263586 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:10 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758531551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_out_stall.1758531551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_out_trans_nak.620081538 |
| Short name | T1355 |
| Test name | |
| Test status | |
| Simulation time | 189015009 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620081538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_out_trans_nak.620081538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_pending_in_trans.1686598304 |
| Short name | T1354 |
| Test name | |
| Test status | |
| Simulation time | 165008328 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1686598304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 17.usbdev_pending_in_trans.1686598304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_pinflip.1723010053 |
| Short name | T1356 |
| Test name | |
| Test status | |
| Simulation time | 201976931 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:45:08 AM UTC 24 |
| Finished | Aug 27 07:45:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723010053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_pinflip.1723010053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_phy_config_usb_ref_disable.2926893716 |
| Short name | T1359 |
| Test name | |
| Test status | |
| Simulation time | 138623895 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2926893716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 17.usbdev_phy_config_usb_ref_disable.2926893716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_phy_pins_sense.947154489 |
| Short name | T1357 |
| Test name | |
| Test status | |
| Simulation time | 28203970 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=947154489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_phy_pins_sense.947154489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_buffer.2361441941 |
| Short name | T1526 |
| Test name | |
| Test status | |
| Simulation time | 23063854180 ps |
| CPU time | 63.3 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:46:15 AM UTC 24 |
| Peak memory | 228428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361441941 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_pkt_buffer.2361441941 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_received.2786369788 |
| Short name | T1360 |
| Test name | |
| Test status | |
| Simulation time | 191093051 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:13 AM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2786369788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 17.usbdev_pkt_received.2786369788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_pkt_sent.924707243 |
| Short name | T1363 |
| Test name | |
| Test status | |
| Simulation time | 238680694 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:13 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924707243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_pkt_sent.924707243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_in_transaction.3813479948 |
| Short name | T1361 |
| Test name | |
| Test status | |
| Simulation time | 302204113 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3813479948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 17.usbdev_random_length_in_transaction.3813479948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_random_length_out_transaction.998365693 |
| Short name | T1362 |
| Test name | |
| Test status | |
| Simulation time | 213803233 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:45:10 AM UTC 24 |
| Finished | Aug 27 07:45:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998365693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 17.usbdev_random_length_out_transaction.998365693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_resume_link_active.1183584007 |
| Short name | T1419 |
| Test name | |
| Test status | |
| Simulation time | 20198391362 ps |
| CPU time | 23.8 seconds |
| Started | Aug 27 07:45:12 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1183584007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 17.usbdev_resume_link_active.1183584007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_rx_crc_err.558652192 |
| Short name | T1366 |
| Test name | |
| Test status | |
| Simulation time | 144507045 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:45:12 AM UTC 24 |
| Finished | Aug 27 07:45:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=558652192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 17.usbdev_rx_crc_err.558652192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_rx_full.3175251925 |
| Short name | T1369 |
| Test name | |
| Test status | |
| Simulation time | 243932872 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:45:12 AM UTC 24 |
| Finished | Aug 27 07:45:15 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3175251925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 17.usbdev_rx_full.3175251925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_setup_stage.962620404 |
| Short name | T1368 |
| Test name | |
| Test status | |
| Simulation time | 163872660 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:45:12 AM UTC 24 |
| Finished | Aug 27 07:45:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=962620404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 17.usbdev_setup_stage.962620404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_setup_trans_ignored.2145919803 |
| Short name | T1367 |
| Test name | |
| Test status | |
| Simulation time | 168510926 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:45:12 AM UTC 24 |
| Finished | Aug 27 07:45:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2145919803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 17.usbdev_setup_trans_ignored.2145919803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_smoke.3755176202 |
| Short name | T1375 |
| Test name | |
| Test status | |
| Simulation time | 209938228 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:45:14 AM UTC 24 |
| Finished | Aug 27 07:45:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755176202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_smoke.3755176202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_spurious_pids_ignored.2609876441 |
| Short name | T1458 |
| Test name | |
| Test status | |
| Simulation time | 3435733638 ps |
| CPU time | 34.47 seconds |
| Started | Aug 27 07:45:14 AM UTC 24 |
| Finished | Aug 27 07:45:50 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2609876441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 17.usbdev_spurious_pids_ignored.2609876441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_stall_priority_over_nak.1783766695 |
| Short name | T1374 |
| Test name | |
| Test status | |
| Simulation time | 156604770 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:45:14 AM UTC 24 |
| Finished | Aug 27 07:45:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783766695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stall_priority_over_nak.1783766695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_stall_trans.1114274261 |
| Short name | T1376 |
| Test name | |
| Test status | |
| Simulation time | 208087796 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:45:14 AM UTC 24 |
| Finished | Aug 27 07:45:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114274261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 17.usbdev_stall_trans.1114274261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_stream_len_max.3806643115 |
| Short name | T1382 |
| Test name | |
| Test status | |
| Simulation time | 1351656877 ps |
| CPU time | 3.65 seconds |
| Started | Aug 27 07:45:15 AM UTC 24 |
| Finished | Aug 27 07:45:19 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3806643115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_stream_len_max.3806643115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_streaming_out.696491828 |
| Short name | T1412 |
| Test name | |
| Test status | |
| Simulation time | 2663589117 ps |
| CPU time | 19.57 seconds |
| Started | Aug 27 07:45:14 AM UTC 24 |
| Finished | Aug 27 07:45:35 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=696491828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 17.usbdev_streaming_out.696491828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_timeout_missing_host_handshake.1920704014 |
| Short name | T1394 |
| Test name | |
| Test status | |
| Simulation time | 1258253215 ps |
| CPU time | 25.75 seconds |
| Started | Aug 27 07:44:59 AM UTC 24 |
| Finished | Aug 27 07:45:26 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1920704014 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_timeout_missing_host_handshake.1920704014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/17.usbdev_tx_rx_disruption.2790672225 |
| Short name | T1377 |
| Test name | |
| Test status | |
| Simulation time | 508774352 ps |
| CPU time | 2.53 seconds |
| Started | Aug 27 07:45:15 AM UTC 24 |
| Finished | Aug 27 07:45:18 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2790672225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 17.usbdev_t x_rx_disruption.2790672225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/17.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/170.usbdev_endpoint_types.4017803377 |
| Short name | T410 |
| Test name | |
| Test status | |
| Simulation time | 473028870 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017803377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_endpoint_types.4017803377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/170.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/170.usbdev_tx_rx_disruption.2074759187 |
| Short name | T3289 |
| Test name | |
| Test status | |
| Simulation time | 628006671 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2074759187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 170.usbdev_ tx_rx_disruption.2074759187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/170.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/171.usbdev_endpoint_types.77790457 |
| Short name | T502 |
| Test name | |
| Test status | |
| Simulation time | 619838118 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:54:52 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=77790457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 171.usbdev_endpoint_types.77790457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/171.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/171.usbdev_tx_rx_disruption.1360813883 |
| Short name | T3291 |
| Test name | |
| Test status | |
| Simulation time | 502529838 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1360813883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 171.usbdev_ tx_rx_disruption.1360813883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/171.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/172.usbdev_endpoint_types.3434408445 |
| Short name | T3284 |
| Test name | |
| Test status | |
| Simulation time | 345192210 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434408445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_endpoint_types.3434408445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/172.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/172.usbdev_tx_rx_disruption.4249330431 |
| Short name | T3290 |
| Test name | |
| Test status | |
| Simulation time | 506403585 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4249330431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 172.usbdev_ tx_rx_disruption.4249330431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/172.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/173.usbdev_endpoint_types.2101001250 |
| Short name | T426 |
| Test name | |
| Test status | |
| Simulation time | 285497285 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101001250 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_endpoint_types.2101001250 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/173.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/173.usbdev_tx_rx_disruption.1254752443 |
| Short name | T3304 |
| Test name | |
| Test status | |
| Simulation time | 507345464 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1254752443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 173.usbdev_ tx_rx_disruption.1254752443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/173.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/174.usbdev_endpoint_types.3532522533 |
| Short name | T3298 |
| Test name | |
| Test status | |
| Simulation time | 166486096 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3532522533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_endpoint_types.3532522533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/174.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/174.usbdev_tx_rx_disruption.1727376907 |
| Short name | T3305 |
| Test name | |
| Test status | |
| Simulation time | 464221154 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1727376907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 174.usbdev_ tx_rx_disruption.1727376907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/174.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/175.usbdev_endpoint_types.1847108935 |
| Short name | T3302 |
| Test name | |
| Test status | |
| Simulation time | 421568327 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1847108935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_endpoint_types.1847108935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/175.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/175.usbdev_tx_rx_disruption.3091087337 |
| Short name | T3307 |
| Test name | |
| Test status | |
| Simulation time | 684803897 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3091087337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 175.usbdev_ tx_rx_disruption.3091087337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/175.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/176.usbdev_endpoint_types.2656603597 |
| Short name | T3309 |
| Test name | |
| Test status | |
| Simulation time | 585218718 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2656603597 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_endpoint_types.2656603597 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/176.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/176.usbdev_tx_rx_disruption.3485079581 |
| Short name | T3310 |
| Test name | |
| Test status | |
| Simulation time | 657173010 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3485079581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 176.usbdev_ tx_rx_disruption.3485079581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/176.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/177.usbdev_endpoint_types.83502490 |
| Short name | T3306 |
| Test name | |
| Test status | |
| Simulation time | 516696755 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=83502490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 177.usbdev_endpoint_types.83502490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/177.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/177.usbdev_tx_rx_disruption.1641860924 |
| Short name | T3308 |
| Test name | |
| Test status | |
| Simulation time | 557390269 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 215852 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1641860924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 177.usbdev_ tx_rx_disruption.1641860924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/177.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/178.usbdev_endpoint_types.1040538632 |
| Short name | T435 |
| Test name | |
| Test status | |
| Simulation time | 244745850 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040538632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_endpoint_types.1040538632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/178.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/178.usbdev_tx_rx_disruption.3228593203 |
| Short name | T3313 |
| Test name | |
| Test status | |
| Simulation time | 543316162 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3228593203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 178.usbdev_ tx_rx_disruption.3228593203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/178.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/179.usbdev_endpoint_types.2143978859 |
| Short name | T3300 |
| Test name | |
| Test status | |
| Simulation time | 147813371 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2143978859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_endpoint_types.2143978859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/179.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/179.usbdev_tx_rx_disruption.1512643807 |
| Short name | T3311 |
| Test name | |
| Test status | |
| Simulation time | 480732055 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1512643807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 179.usbdev_ tx_rx_disruption.1512643807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/179.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_alert_test.2601618682 |
| Short name | T1437 |
| Test name | |
| Test status | |
| Simulation time | 39657437 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2601618682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 18.usbdev_alert_test.2601618682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_disconnect.1622425559 |
| Short name | T1414 |
| Test name | |
| Test status | |
| Simulation time | 9960872215 ps |
| CPU time | 18.44 seconds |
| Started | Aug 27 07:45:17 AM UTC 24 |
| Finished | Aug 27 07:45:36 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1622425559 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_disconnect.1622425559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_aon_wake_reset.2024854968 |
| Short name | T1442 |
| Test name | |
| Test status | |
| Simulation time | 20857585401 ps |
| CPU time | 26.24 seconds |
| Started | Aug 27 07:45:17 AM UTC 24 |
| Finished | Aug 27 07:45:44 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2024854968 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_aon_wake_reset.2024854968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_av_buffer.3528143354 |
| Short name | T1381 |
| Test name | |
| Test status | |
| Simulation time | 193470540 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:45:17 AM UTC 24 |
| Finished | Aug 27 07:45:19 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3528143354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_av_buffer.3528143354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_bitstuff_err.4138148705 |
| Short name | T1379 |
| Test name | |
| Test status | |
| Simulation time | 153767922 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:45:17 AM UTC 24 |
| Finished | Aug 27 07:45:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138148705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_bitstuff_err.4138148705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_clear.3372078009 |
| Short name | T1380 |
| Test name | |
| Test status | |
| Simulation time | 190131416 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:45:17 AM UTC 24 |
| Finished | Aug 27 07:45:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372078009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_data_toggle_clear.3372078009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_data_toggle_restore.545942899 |
| Short name | T1385 |
| Test name | |
| Test status | |
| Simulation time | 297343611 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:45:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=545942899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_data_toggle_restore.545942899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_device_address.2939356626 |
| Short name | T1519 |
| Test name | |
| Test status | |
| Simulation time | 31074471836 ps |
| CPU time | 51.84 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:46:12 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2939356626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_address.2939356626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_device_timeout.142889200 |
| Short name | T1372 |
| Test name | |
| Test status | |
| Simulation time | 2005298978 ps |
| CPU time | 19.15 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:45:39 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142889200 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_device_timeout.142889200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_disable_endpoint.3648083579 |
| Short name | T1389 |
| Test name | |
| Test status | |
| Simulation time | 921795798 ps |
| CPU time | 3.91 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:45:24 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3648083579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_disable_endpoint.3648083579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_disconnected.2848540724 |
| Short name | T1384 |
| Test name | |
| Test status | |
| Simulation time | 181791240 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:45:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848540724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_disconnected.2848540724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_enable.2088531062 |
| Short name | T1383 |
| Test name | |
| Test status | |
| Simulation time | 43952486 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:45:21 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2088531062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_enable.2088531062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_endpoint_access.261281190 |
| Short name | T1395 |
| Test name | |
| Test status | |
| Simulation time | 923933394 ps |
| CPU time | 4.31 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:26 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=261281190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_endpoint_access.261281190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_fifo_rst.792829898 |
| Short name | T1390 |
| Test name | |
| Test status | |
| Simulation time | 164445795 ps |
| CPU time | 2.13 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:24 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=792829898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 18.usbdev_fifo_rst.792829898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_in_iso.91939795 |
| Short name | T1388 |
| Test name | |
| Test status | |
| Simulation time | 200240331 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:24 AM UTC 24 |
| Peak memory | 226436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91939795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_in_iso.91939795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_in_stall.3945717738 |
| Short name | T1387 |
| Test name | |
| Test status | |
| Simulation time | 151485561 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3945717738 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_stall.3945717738 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_in_trans.2379319167 |
| Short name | T1392 |
| Test name | |
| Test status | |
| Simulation time | 263303484 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:45:23 AM UTC 24 |
| Finished | Aug 27 07:45:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2379319167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_in_trans.2379319167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_invalid_sync.3229460970 |
| Short name | T1466 |
| Test name | |
| Test status | |
| Simulation time | 4203371372 ps |
| CPU time | 28.91 seconds |
| Started | Aug 27 07:45:21 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 228496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3229460970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 18.usbdev_invalid_sync.3229460970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_iso_retraction.2218207049 |
| Short name | T1700 |
| Test name | |
| Test status | |
| Simulation time | 9665987265 ps |
| CPU time | 116.33 seconds |
| Started | Aug 27 07:45:23 AM UTC 24 |
| Finished | Aug 27 07:47:22 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2218207049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_iso_retraction.2218207049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_link_in_err.3029894165 |
| Short name | T1393 |
| Test name | |
| Test status | |
| Simulation time | 210281905 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:45:23 AM UTC 24 |
| Finished | Aug 27 07:45:26 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3029894165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_in_err.3029894165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_link_resume.1251207388 |
| Short name | T1426 |
| Test name | |
| Test status | |
| Simulation time | 7192812996 ps |
| CPU time | 12.76 seconds |
| Started | Aug 27 07:45:24 AM UTC 24 |
| Finished | Aug 27 07:45:38 AM UTC 24 |
| Peak memory | 228344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1251207388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_link_resume.1251207388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_link_suspend.1286301887 |
| Short name | T1429 |
| Test name | |
| Test status | |
| Simulation time | 8551847947 ps |
| CPU time | 12.88 seconds |
| Started | Aug 27 07:45:26 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286301887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 18.usbdev_link_suspend.1286301887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_low_speed_traffic.2396319797 |
| Short name | T1534 |
| Test name | |
| Test status | |
| Simulation time | 5028255075 ps |
| CPU time | 48.27 seconds |
| Started | Aug 27 07:45:26 AM UTC 24 |
| Finished | Aug 27 07:46:16 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2396319797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_low_speed_traffic.2396319797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_max_inter_pkt_delay.98165588 |
| Short name | T1575 |
| Test name | |
| Test status | |
| Simulation time | 2337424072 ps |
| CPU time | 61.9 seconds |
| Started | Aug 27 07:45:26 AM UTC 24 |
| Finished | Aug 27 07:46:30 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=98165588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_inter_pkt_delay.98165588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_in_transaction.4287678187 |
| Short name | T1398 |
| Test name | |
| Test status | |
| Simulation time | 236174106 ps |
| CPU time | 1.82 seconds |
| Started | Aug 27 07:45:26 AM UTC 24 |
| Finished | Aug 27 07:45:30 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4287678187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_max_length_in_transaction.4287678187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_max_length_out_transaction.755728919 |
| Short name | T1397 |
| Test name | |
| Test status | |
| Simulation time | 194855788 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:45:27 AM UTC 24 |
| Finished | Aug 27 07:45:29 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=755728919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 18.usbdev_max_length_out_transaction.755728919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_max_non_iso_usb_traffic.2535200805 |
| Short name | T1477 |
| Test name | |
| Test status | |
| Simulation time | 2772668319 ps |
| CPU time | 27.64 seconds |
| Started | Aug 27 07:45:27 AM UTC 24 |
| Finished | Aug 27 07:45:56 AM UTC 24 |
| Peak memory | 228656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2535200805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_max_non_iso_usb_traffic.2535200805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_min_inter_pkt_delay.2216930091 |
| Short name | T1461 |
| Test name | |
| Test status | |
| Simulation time | 2865617810 ps |
| CPU time | 22.52 seconds |
| Started | Aug 27 07:45:27 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2216930091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_min_inter_pkt_delay.2216930091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_in_transaction.1760022107 |
| Short name | T1401 |
| Test name | |
| Test status | |
| Simulation time | 152170755 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:45:28 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760022107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_in_transaction.1760022107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_min_length_out_transaction.2859810288 |
| Short name | T1402 |
| Test name | |
| Test status | |
| Simulation time | 150246367 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:45:28 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859810288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_min_length_out_transaction.2859810288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_nak_trans.871515553 |
| Short name | T134 |
| Test name | |
| Test status | |
| Simulation time | 276292768 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:45:28 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=871515553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_nak_trans.871515553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_out_iso.518315703 |
| Short name | T1403 |
| Test name | |
| Test status | |
| Simulation time | 215143760 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:45:28 AM UTC 24 |
| Finished | Aug 27 07:45:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=518315703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_out_iso.518315703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_out_stall.1054048187 |
| Short name | T1405 |
| Test name | |
| Test status | |
| Simulation time | 183918064 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:45:30 AM UTC 24 |
| Finished | Aug 27 07:45:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054048187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 18.usbdev_out_stall.1054048187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_out_trans_nak.3721744103 |
| Short name | T1408 |
| Test name | |
| Test status | |
| Simulation time | 190069073 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:45:31 AM UTC 24 |
| Finished | Aug 27 07:45:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3721744103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_out_trans_nak.3721744103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_pending_in_trans.2049882151 |
| Short name | T1409 |
| Test name | |
| Test status | |
| Simulation time | 151951750 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:45:31 AM UTC 24 |
| Finished | Aug 27 07:45:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049882151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 18.usbdev_pending_in_trans.2049882151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_pinflip.2135915464 |
| Short name | T1417 |
| Test name | |
| Test status | |
| Simulation time | 215348606 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135915464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_pinflip.2135915464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_phy_config_usb_ref_disable.3019738586 |
| Short name | T1418 |
| Test name | |
| Test status | |
| Simulation time | 150504200 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3019738586 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 18.usbdev_phy_config_usb_ref_disable.3019738586 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_phy_pins_sense.540775192 |
| Short name | T1415 |
| Test name | |
| Test status | |
| Simulation time | 49124312 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=540775192 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_phy_pins_sense.540775192 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_buffer.3726455958 |
| Short name | T1525 |
| Test name | |
| Test status | |
| Simulation time | 14827810949 ps |
| CPU time | 38.94 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:46:15 AM UTC 24 |
| Peak memory | 228640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3726455958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_pkt_buffer.3726455958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_received.379117378 |
| Short name | T1416 |
| Test name | |
| Test status | |
| Simulation time | 176854207 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=379117378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_pkt_received.379117378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_pkt_sent.1935316150 |
| Short name | T1423 |
| Test name | |
| Test status | |
| Simulation time | 244079982 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935316150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_pkt_sent.1935316150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_in_transaction.4237502204 |
| Short name | T1420 |
| Test name | |
| Test status | |
| Simulation time | 253630321 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4237502204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 18.usbdev_random_length_in_transaction.4237502204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_random_length_out_transaction.3571661152 |
| Short name | T1421 |
| Test name | |
| Test status | |
| Simulation time | 162106534 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571661152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 18.usbdev_random_length_out_transaction.3571661152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_resume_link_active.328529457 |
| Short name | T1492 |
| Test name | |
| Test status | |
| Simulation time | 20171028653 ps |
| CPU time | 22.94 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:59 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328529457 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 18.usbdev_resume_link_active.328529457 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_rx_crc_err.3176713696 |
| Short name | T1424 |
| Test name | |
| Test status | |
| Simulation time | 235160457 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:45:34 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3176713696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_rx_crc_err.3176713696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_rx_full.573046014 |
| Short name | T1422 |
| Test name | |
| Test status | |
| Simulation time | 251757822 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:45:35 AM UTC 24 |
| Finished | Aug 27 07:45:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573046014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 18.usbdev_rx_full.573046014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_setup_stage.1128018923 |
| Short name | T1439 |
| Test name | |
| Test status | |
| Simulation time | 154101513 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128018923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 18.usbdev_setup_stage.1128018923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_setup_trans_ignored.2159429708 |
| Short name | T1436 |
| Test name | |
| Test status | |
| Simulation time | 161331846 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2159429708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 18.usbdev_setup_trans_ignored.2159429708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_smoke.3171224857 |
| Short name | T1435 |
| Test name | |
| Test status | |
| Simulation time | 221695136 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171224857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_smoke.3171224857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_spurious_pids_ignored.1243256872 |
| Short name | T1475 |
| Test name | |
| Test status | |
| Simulation time | 2040970353 ps |
| CPU time | 15.33 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:56 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243256872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 18.usbdev_spurious_pids_ignored.1243256872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_stall_priority_over_nak.3985002649 |
| Short name | T1434 |
| Test name | |
| Test status | |
| Simulation time | 166504672 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3985002649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stall_priority_over_nak.3985002649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_stall_trans.745756003 |
| Short name | T1430 |
| Test name | |
| Test status | |
| Simulation time | 180130494 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=745756003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 18.usbdev_stall_trans.745756003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_stream_len_max.1182720358 |
| Short name | T1441 |
| Test name | |
| Test status | |
| Simulation time | 835278694 ps |
| CPU time | 2.63 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:43 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1182720358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_stream_len_max.1182720358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_streaming_out.798052026 |
| Short name | T1480 |
| Test name | |
| Test status | |
| Simulation time | 3135645409 ps |
| CPU time | 23.88 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:46:04 AM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=798052026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 18.usbdev_streaming_out.798052026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/18.usbdev_timeout_missing_host_handshake.3667653453 |
| Short name | T1532 |
| Test name | |
| Test status | |
| Simulation time | 6144090466 ps |
| CPU time | 55.13 seconds |
| Started | Aug 27 07:45:19 AM UTC 24 |
| Finished | Aug 27 07:46:16 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667653453 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 18.usbdev_timeout_missing_host_handshake.3667653453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/18.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/180.usbdev_endpoint_types.56803177 |
| Short name | T424 |
| Test name | |
| Test status | |
| Simulation time | 404953056 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=56803177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 180.usbdev_endpoint_types.56803177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/180.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/180.usbdev_tx_rx_disruption.132044575 |
| Short name | T3323 |
| Test name | |
| Test status | |
| Simulation time | 527002258 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=132044575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 180.usbdev_t x_rx_disruption.132044575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/180.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/181.usbdev_endpoint_types.1716112826 |
| Short name | T3320 |
| Test name | |
| Test status | |
| Simulation time | 419926376 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1716112826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_endpoint_types.1716112826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/181.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/181.usbdev_tx_rx_disruption.3579450344 |
| Short name | T3312 |
| Test name | |
| Test status | |
| Simulation time | 619100090 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3579450344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 181.usbdev_ tx_rx_disruption.3579450344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/181.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/182.usbdev_endpoint_types.1312714095 |
| Short name | T3318 |
| Test name | |
| Test status | |
| Simulation time | 231146890 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:16 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1312714095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_endpoint_types.1312714095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/182.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/182.usbdev_tx_rx_disruption.2818835928 |
| Short name | T3322 |
| Test name | |
| Test status | |
| Simulation time | 468210604 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2818835928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 182.usbdev_ tx_rx_disruption.2818835928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/182.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/183.usbdev_endpoint_types.2548013463 |
| Short name | T365 |
| Test name | |
| Test status | |
| Simulation time | 557759171 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2548013463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_endpoint_types.2548013463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/183.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/183.usbdev_tx_rx_disruption.3788737146 |
| Short name | T3314 |
| Test name | |
| Test status | |
| Simulation time | 679033511 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3788737146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 183.usbdev_ tx_rx_disruption.3788737146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/183.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/184.usbdev_endpoint_types.2089297449 |
| Short name | T461 |
| Test name | |
| Test status | |
| Simulation time | 207619517 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2089297449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_endpoint_types.2089297449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/184.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/184.usbdev_tx_rx_disruption.225843955 |
| Short name | T3324 |
| Test name | |
| Test status | |
| Simulation time | 699977101 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=225843955 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 184.usbdev_t x_rx_disruption.225843955 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/184.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/185.usbdev_tx_rx_disruption.4292550658 |
| Short name | T3321 |
| Test name | |
| Test status | |
| Simulation time | 494235745 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4292550658 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 185.usbdev_ tx_rx_disruption.4292550658 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/185.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/186.usbdev_endpoint_types.55304275 |
| Short name | T358 |
| Test name | |
| Test status | |
| Simulation time | 700310294 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=55304275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/covera ge/default.vdb -cm_log /dev/null -cm_name 186.usbdev_endpoint_types.55304275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/186.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/186.usbdev_tx_rx_disruption.377537649 |
| Short name | T3326 |
| Test name | |
| Test status | |
| Simulation time | 619859047 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=377537649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 186.usbdev_t x_rx_disruption.377537649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/186.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/187.usbdev_endpoint_types.2829489991 |
| Short name | T452 |
| Test name | |
| Test status | |
| Simulation time | 259733968 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829489991 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_endpoint_types.2829489991 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/187.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/187.usbdev_tx_rx_disruption.2755336417 |
| Short name | T3330 |
| Test name | |
| Test status | |
| Simulation time | 701332940 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:54:53 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2755336417 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 187.usbdev_ tx_rx_disruption.2755336417 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/187.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/188.usbdev_endpoint_types.3743949365 |
| Short name | T3328 |
| Test name | |
| Test status | |
| Simulation time | 498492064 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:54:55 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3743949365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_endpoint_types.3743949365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/188.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/188.usbdev_tx_rx_disruption.1370847079 |
| Short name | T3332 |
| Test name | |
| Test status | |
| Simulation time | 526914500 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:54:55 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1370847079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 188.usbdev_ tx_rx_disruption.1370847079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/188.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/189.usbdev_endpoint_types.2147034279 |
| Short name | T463 |
| Test name | |
| Test status | |
| Simulation time | 619032146 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:54:55 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147034279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_endpoint_types.2147034279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/189.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/189.usbdev_tx_rx_disruption.225966329 |
| Short name | T3294 |
| Test name | |
| Test status | |
| Simulation time | 635034930 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:02 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=225966329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 189.usbdev_t x_rx_disruption.225966329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/189.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_alert_test.1364852253 |
| Short name | T1490 |
| Test name | |
| Test status | |
| Simulation time | 42784048 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:45:56 AM UTC 24 |
| Finished | Aug 27 07:45:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364852253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 19.usbdev_alert_test.1364852253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_disconnect.4244209827 |
| Short name | T1476 |
| Test name | |
| Test status | |
| Simulation time | 10160157581 ps |
| CPU time | 15.21 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:56 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244209827 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_disconnect.4244209827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_reset.817180295 |
| Short name | T1493 |
| Test name | |
| Test status | |
| Simulation time | 15373200658 ps |
| CPU time | 21.43 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:46:02 AM UTC 24 |
| Peak memory | 227880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=817180295 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_reset.817180295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_aon_wake_resume.2846221812 |
| Short name | T1558 |
| Test name | |
| Test status | |
| Simulation time | 31299887349 ps |
| CPU time | 44.05 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:46:25 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846221812 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_aon_wake_resume.2846221812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_av_buffer.2698028097 |
| Short name | T1440 |
| Test name | |
| Test status | |
| Simulation time | 172183014 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2698028097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_av_buffer.2698028097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_bitstuff_err.406391569 |
| Short name | T1438 |
| Test name | |
| Test status | |
| Simulation time | 155596059 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:45:39 AM UTC 24 |
| Finished | Aug 27 07:45:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=406391569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_bitstuff_err.406391569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_clear.2273907874 |
| Short name | T1445 |
| Test name | |
| Test status | |
| Simulation time | 464750915 ps |
| CPU time | 2.67 seconds |
| Started | Aug 27 07:45:41 AM UTC 24 |
| Finished | Aug 27 07:45:45 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2273907874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 19.usbdev_data_toggle_clear.2273907874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_data_toggle_restore.2390067042 |
| Short name | T1443 |
| Test name | |
| Test status | |
| Simulation time | 342311502 ps |
| CPU time | 2.03 seconds |
| Started | Aug 27 07:45:41 AM UTC 24 |
| Finished | Aug 27 07:45:44 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2390067042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_data_toggle_restore.2390067042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_device_address.174069166 |
| Short name | T427 |
| Test name | |
| Test status | |
| Simulation time | 48613254018 ps |
| CPU time | 87.81 seconds |
| Started | Aug 27 07:45:41 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=174069166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_device_address.174069166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_device_timeout.2909714300 |
| Short name | T1540 |
| Test name | |
| Test status | |
| Simulation time | 1566837533 ps |
| CPU time | 36.22 seconds |
| Started | Aug 27 07:45:41 AM UTC 24 |
| Finished | Aug 27 07:46:19 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2909714300 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_device_timeout.2909714300 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_disable_endpoint.1420157378 |
| Short name | T1460 |
| Test name | |
| Test status | |
| Simulation time | 1150934384 ps |
| CPU time | 5.02 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:50 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1420157378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_disable_endpoint.1420157378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_disconnected.2402009451 |
| Short name | T1448 |
| Test name | |
| Test status | |
| Simulation time | 193377397 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402009451 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_disconnected.2402009451 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_enable.3961108461 |
| Short name | T1447 |
| Test name | |
| Test status | |
| Simulation time | 37254528 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961108461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 19.usbdev_enable.3961108461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_access.2250081760 |
| Short name | T1455 |
| Test name | |
| Test status | |
| Simulation time | 910350263 ps |
| CPU time | 3.14 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:49 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2250081760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_access.2250081760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_endpoint_types.667161273 |
| Short name | T428 |
| Test name | |
| Test status | |
| Simulation time | 241610320 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=667161273 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_endpoint_types.667161273 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_fifo_rst.1486085666 |
| Short name | T1453 |
| Test name | |
| Test status | |
| Simulation time | 203782914 ps |
| CPU time | 2.04 seconds |
| Started | Aug 27 07:45:44 AM UTC 24 |
| Finished | Aug 27 07:45:48 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1486085666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_fifo_rst.1486085666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_in_iso.1132138811 |
| Short name | T1450 |
| Test name | |
| Test status | |
| Simulation time | 218297831 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132138811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 19.usbdev_in_iso.1132138811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_in_stall.280260951 |
| Short name | T1449 |
| Test name | |
| Test status | |
| Simulation time | 167129742 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=280260951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_in_stall.280260951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_in_trans.1620095259 |
| Short name | T1452 |
| Test name | |
| Test status | |
| Simulation time | 219904455 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620095259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_in_trans.1620095259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_invalid_sync.280940792 |
| Short name | T1562 |
| Test name | |
| Test status | |
| Simulation time | 4203544517 ps |
| CPU time | 40.23 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:46:26 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280940792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_invalid_sync.280940792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_iso_retraction.250459659 |
| Short name | T1655 |
| Test name | |
| Test status | |
| Simulation time | 6472641280 ps |
| CPU time | 69.39 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:46:56 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=250459659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 19.usbdev_iso_retraction.250459659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_link_in_err.744031998 |
| Short name | T1451 |
| Test name | |
| Test status | |
| Simulation time | 222210696 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:45:47 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=744031998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_link_in_err.744031998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_link_resume.4289916150 |
| Short name | T1573 |
| Test name | |
| Test status | |
| Simulation time | 23453438476 ps |
| CPU time | 42.71 seconds |
| Started | Aug 27 07:45:45 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 218168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289916150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_link_resume.4289916150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_link_suspend.1605420564 |
| Short name | T1474 |
| Test name | |
| Test status | |
| Simulation time | 3511717076 ps |
| CPU time | 5.9 seconds |
| Started | Aug 27 07:45:47 AM UTC 24 |
| Finished | Aug 27 07:45:54 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1605420564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_link_suspend.1605420564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_low_speed_traffic.1589679345 |
| Short name | T1773 |
| Test name | |
| Test status | |
| Simulation time | 4310930931 ps |
| CPU time | 111.94 seconds |
| Started | Aug 27 07:45:47 AM UTC 24 |
| Finished | Aug 27 07:47:41 AM UTC 24 |
| Peak memory | 235240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589679345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_low_speed_traffic.1589679345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_max_inter_pkt_delay.589316443 |
| Short name | T1507 |
| Test name | |
| Test status | |
| Simulation time | 2827538854 ps |
| CPU time | 19.99 seconds |
| Started | Aug 27 07:45:47 AM UTC 24 |
| Finished | Aug 27 07:46:08 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=589316443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_inter_pkt_delay.589316443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_in_transaction.1701535788 |
| Short name | T1456 |
| Test name | |
| Test status | |
| Simulation time | 239634049 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:45:47 AM UTC 24 |
| Finished | Aug 27 07:45:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1701535788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_max_length_in_transaction.1701535788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_max_length_out_transaction.286625643 |
| Short name | T1457 |
| Test name | |
| Test status | |
| Simulation time | 223913254 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:45:47 AM UTC 24 |
| Finished | Aug 27 07:45:49 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286625643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 19.usbdev_max_length_out_transaction.286625643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_max_non_iso_usb_traffic.1601613382 |
| Short name | T1518 |
| Test name | |
| Test status | |
| Simulation time | 2483720927 ps |
| CPU time | 21.41 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1601613382 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_max_non_iso_usb_traffic.1601613382 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_min_inter_pkt_delay.2277077560 |
| Short name | T1809 |
| Test name | |
| Test status | |
| Simulation time | 4195583733 ps |
| CPU time | 120.81 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:47:52 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277077560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_min_inter_pkt_delay.2277077560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_in_transaction.3576453903 |
| Short name | T1465 |
| Test name | |
| Test status | |
| Simulation time | 251814580 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3576453903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_in_transaction.3576453903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_min_length_out_transaction.3114521334 |
| Short name | T1462 |
| Test name | |
| Test status | |
| Simulation time | 140949435 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114521334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_min_length_out_transaction.3114521334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_out_iso.1783546811 |
| Short name | T1463 |
| Test name | |
| Test status | |
| Simulation time | 166521591 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:51 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1783546811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_out_iso.1783546811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_out_stall.1811555616 |
| Short name | T1467 |
| Test name | |
| Test status | |
| Simulation time | 147007962 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:52 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811555616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_out_stall.1811555616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_out_trans_nak.1615521797 |
| Short name | T1468 |
| Test name | |
| Test status | |
| Simulation time | 217712301 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:45:49 AM UTC 24 |
| Finished | Aug 27 07:45:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1615521797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_out_trans_nak.1615521797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_pending_in_trans.3701381662 |
| Short name | T1472 |
| Test name | |
| Test status | |
| Simulation time | 154721550 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:45:51 AM UTC 24 |
| Finished | Aug 27 07:45:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701381662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 19.usbdev_pending_in_trans.3701381662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_pinflip.1780584827 |
| Short name | T1473 |
| Test name | |
| Test status | |
| Simulation time | 262139201 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:45:51 AM UTC 24 |
| Finished | Aug 27 07:45:53 AM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1780584827 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_pinflip.1780584827 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_phy_config_usb_ref_disable.2350223645 |
| Short name | T1471 |
| Test name | |
| Test status | |
| Simulation time | 136745460 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:45:51 AM UTC 24 |
| Finished | Aug 27 07:45:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2350223645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 19.usbdev_phy_config_usb_ref_disable.2350223645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_phy_pins_sense.1281535290 |
| Short name | T1470 |
| Test name | |
| Test status | |
| Simulation time | 44917039 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:45:51 AM UTC 24 |
| Finished | Aug 27 07:45:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281535290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_phy_pins_sense.1281535290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_buffer.2003621465 |
| Short name | T1595 |
| Test name | |
| Test status | |
| Simulation time | 14282333312 ps |
| CPU time | 40.1 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:46:36 AM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2003621465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_pkt_buffer.2003621465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_received.1881368324 |
| Short name | T1478 |
| Test name | |
| Test status | |
| Simulation time | 239975590 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:45:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881368324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 19.usbdev_pkt_received.1881368324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_pkt_sent.2413390103 |
| Short name | T1479 |
| Test name | |
| Test status | |
| Simulation time | 173659472 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2413390103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 19.usbdev_pkt_sent.2413390103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_in_transaction.3493353299 |
| Short name | T1481 |
| Test name | |
| Test status | |
| Simulation time | 189031256 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493353299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 19.usbdev_random_length_in_transaction.3493353299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_random_length_out_transaction.3454682001 |
| Short name | T1483 |
| Test name | |
| Test status | |
| Simulation time | 184226653 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3454682001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 19.usbdev_random_length_out_transaction.3454682001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_resume_link_active.3588165872 |
| Short name | T1565 |
| Test name | |
| Test status | |
| Simulation time | 20171550239 ps |
| CPU time | 32.86 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3588165872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 19.usbdev_resume_link_active.3588165872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_rx_crc_err.2266910243 |
| Short name | T1486 |
| Test name | |
| Test status | |
| Simulation time | 184515505 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:45:54 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266910243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_rx_crc_err.2266910243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_rx_full.2355758252 |
| Short name | T1488 |
| Test name | |
| Test status | |
| Simulation time | 252198664 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355758252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 19.usbdev_rx_full.2355758252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_setup_stage.328207681 |
| Short name | T1484 |
| Test name | |
| Test status | |
| Simulation time | 175269468 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=328207681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 19.usbdev_setup_stage.328207681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_setup_trans_ignored.3300697841 |
| Short name | T1485 |
| Test name | |
| Test status | |
| Simulation time | 153182447 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 215980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3300697841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 19.usbdev_setup_trans_ignored.3300697841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_smoke.4138156196 |
| Short name | T1487 |
| Test name | |
| Test status | |
| Simulation time | 184053752 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4138156196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_smoke.4138156196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_stall_priority_over_nak.87488412 |
| Short name | T1489 |
| Test name | |
| Test status | |
| Simulation time | 247192942 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=87488412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 19.usbdev_stall_priority_over_nak.87488412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_stall_trans.3464224346 |
| Short name | T1482 |
| Test name | |
| Test status | |
| Simulation time | 175859613 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:57 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464224346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 19.usbdev_stall_trans.3464224346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_stream_len_max.4049678479 |
| Short name | T1491 |
| Test name | |
| Test status | |
| Simulation time | 603238732 ps |
| CPU time | 2.45 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:45:58 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049678479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_stream_len_max.4049678479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_streaming_out.2163453093 |
| Short name | T1619 |
| Test name | |
| Test status | |
| Simulation time | 2030425267 ps |
| CPU time | 48.39 seconds |
| Started | Aug 27 07:45:55 AM UTC 24 |
| Finished | Aug 27 07:46:45 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163453093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 19.usbdev_streaming_out.2163453093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/19.usbdev_timeout_missing_host_handshake.462792168 |
| Short name | T1469 |
| Test name | |
| Test status | |
| Simulation time | 1046719176 ps |
| CPU time | 9.94 seconds |
| Started | Aug 27 07:45:41 AM UTC 24 |
| Finished | Aug 27 07:45:52 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=462792168 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 19.usbdev_timeout_missing_host_handshake.462792168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/19.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/190.usbdev_endpoint_types.230608567 |
| Short name | T3293 |
| Test name | |
| Test status | |
| Simulation time | 598683006 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=230608567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 190.usbdev_endpoint_types.230608567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/190.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/190.usbdev_tx_rx_disruption.747892027 |
| Short name | T3292 |
| Test name | |
| Test status | |
| Simulation time | 570382516 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=747892027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 190.usbdev_t x_rx_disruption.747892027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/190.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/191.usbdev_tx_rx_disruption.4237247491 |
| Short name | T3296 |
| Test name | |
| Test status | |
| Simulation time | 522080978 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:02 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4237247491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 191.usbdev_ tx_rx_disruption.4237247491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/191.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/192.usbdev_endpoint_types.2101009677 |
| Short name | T3184 |
| Test name | |
| Test status | |
| Simulation time | 361896040 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2101009677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_endpoint_types.2101009677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/192.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/192.usbdev_tx_rx_disruption.2926696231 |
| Short name | T3297 |
| Test name | |
| Test status | |
| Simulation time | 653910330 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:02 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2926696231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 192.usbdev_ tx_rx_disruption.2926696231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/192.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/193.usbdev_endpoint_types.2810699590 |
| Short name | T3214 |
| Test name | |
| Test status | |
| Simulation time | 232093512 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:01 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2810699590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_endpoint_types.2810699590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/193.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/193.usbdev_tx_rx_disruption.2498697279 |
| Short name | T3295 |
| Test name | |
| Test status | |
| Simulation time | 494247302 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:02 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2498697279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 193.usbdev_ tx_rx_disruption.2498697279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/193.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/194.usbdev_endpoint_types.471457559 |
| Short name | T3340 |
| Test name | |
| Test status | |
| Simulation time | 336934073 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471457559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 194.usbdev_endpoint_types.471457559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/194.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/194.usbdev_tx_rx_disruption.608898264 |
| Short name | T3317 |
| Test name | |
| Test status | |
| Simulation time | 595109011 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:12 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=608898264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 194.usbdev_t x_rx_disruption.608898264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/194.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/195.usbdev_endpoint_types.2068236881 |
| Short name | T493 |
| Test name | |
| Test status | |
| Simulation time | 195970197 ps |
| CPU time | 0.83 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068236881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_endpoint_types.2068236881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/195.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/195.usbdev_tx_rx_disruption.4148539309 |
| Short name | T3351 |
| Test name | |
| Test status | |
| Simulation time | 533194473 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4148539309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 195.usbdev_ tx_rx_disruption.4148539309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/195.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/196.usbdev_endpoint_types.656221275 |
| Short name | T368 |
| Test name | |
| Test status | |
| Simulation time | 720732885 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=656221275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 196.usbdev_endpoint_types.656221275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/196.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/196.usbdev_tx_rx_disruption.3053755984 |
| Short name | T3352 |
| Test name | |
| Test status | |
| Simulation time | 630515029 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3053755984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 196.usbdev_ tx_rx_disruption.3053755984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/196.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/197.usbdev_endpoint_types.4052988393 |
| Short name | T456 |
| Test name | |
| Test status | |
| Simulation time | 426888927 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4052988393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_endpoint_types.4052988393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/197.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/197.usbdev_tx_rx_disruption.1182534578 |
| Short name | T3345 |
| Test name | |
| Test status | |
| Simulation time | 533807697 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1182534578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 197.usbdev_ tx_rx_disruption.1182534578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/197.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/198.usbdev_endpoint_types.2933207241 |
| Short name | T3346 |
| Test name | |
| Test status | |
| Simulation time | 221545191 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2933207241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_endpoint_types.2933207241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/198.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/198.usbdev_tx_rx_disruption.3450340335 |
| Short name | T3362 |
| Test name | |
| Test status | |
| Simulation time | 514930839 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:54:58 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3450340335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 198.usbdev_ tx_rx_disruption.3450340335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/198.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/199.usbdev_endpoint_types.2341003832 |
| Short name | T3360 |
| Test name | |
| Test status | |
| Simulation time | 665674761 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:55:00 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 215616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2341003832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_endpoint_types.2341003832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/199.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/199.usbdev_tx_rx_disruption.2908480353 |
| Short name | T3337 |
| Test name | |
| Test status | |
| Simulation time | 533009550 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:55:02 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2908480353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 199.usbdev_ tx_rx_disruption.2908480353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/199.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_alert_test.2208337117 |
| Short name | T208 |
| Test name | |
| Test status | |
| Simulation time | 116175967 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:37:37 AM UTC 24 |
| Finished | Aug 27 07:37:39 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208337117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 2.usbdev_alert_test.2208337117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_disconnect.3148459100 |
| Short name | T13 |
| Test name | |
| Test status | |
| Simulation time | 9545713376 ps |
| CPU time | 20.79 seconds |
| Started | Aug 27 07:36:37 AM UTC 24 |
| Finished | Aug 27 07:36:59 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148459100 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_disconnect.3148459100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_aon_wake_resume.2203668324 |
| Short name | T14 |
| Test name | |
| Test status | |
| Simulation time | 25535090068 ps |
| CPU time | 37.79 seconds |
| Started | Aug 27 07:36:39 AM UTC 24 |
| Finished | Aug 27 07:37:18 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203668324 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_aon_wake_resume.2203668324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_buffer.4268959684 |
| Short name | T540 |
| Test name | |
| Test status | |
| Simulation time | 225254760 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:36:39 AM UTC 24 |
| Finished | Aug 27 07:36:41 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4268959684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_av_buffer.4268959684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_empty.3265253602 |
| Short name | T62 |
| Test name | |
| Test status | |
| Simulation time | 152851217 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:36:41 AM UTC 24 |
| Finished | Aug 27 07:36:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3265253602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_av_empty.3265253602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_av_overflow.3398686443 |
| Short name | T67 |
| Test name | |
| Test status | |
| Simulation time | 147882514 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:36:41 AM UTC 24 |
| Finished | Aug 27 07:36:44 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3398686443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_av_overflow.3398686443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_bitstuff_err.1456643620 |
| Short name | T86 |
| Test name | |
| Test status | |
| Simulation time | 148098481 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:36:41 AM UTC 24 |
| Finished | Aug 27 07:36:44 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1456643620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_bitstuff_err.1456643620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_clear.1340271449 |
| Short name | T541 |
| Test name | |
| Test status | |
| Simulation time | 385938644 ps |
| CPU time | 2.2 seconds |
| Started | Aug 27 07:36:41 AM UTC 24 |
| Finished | Aug 27 07:36:44 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1340271449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 2.usbdev_data_toggle_clear.1340271449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_data_toggle_restore.3057191751 |
| Short name | T120 |
| Test name | |
| Test status | |
| Simulation time | 523167012 ps |
| CPU time | 2.35 seconds |
| Started | Aug 27 07:36:41 AM UTC 24 |
| Finished | Aug 27 07:36:45 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057191751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_data_toggle_restore.3057191751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_device_address.3829478223 |
| Short name | T124 |
| Test name | |
| Test status | |
| Simulation time | 34730043406 ps |
| CPU time | 75.04 seconds |
| Started | Aug 27 07:36:43 AM UTC 24 |
| Finished | Aug 27 07:37:59 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829478223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_address.3829478223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_device_timeout.1123045894 |
| Short name | T553 |
| Test name | |
| Test status | |
| Simulation time | 3425920516 ps |
| CPU time | 30.26 seconds |
| Started | Aug 27 07:36:43 AM UTC 24 |
| Finished | Aug 27 07:37:14 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123045894 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_device_timeout.1123045894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_disable_endpoint.659990183 |
| Short name | T362 |
| Test name | |
| Test status | |
| Simulation time | 687261968 ps |
| CPU time | 2.87 seconds |
| Started | Aug 27 07:36:45 AM UTC 24 |
| Finished | Aug 27 07:36:49 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659990183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_disable_endpoint.659990183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_disconnected.1811622028 |
| Short name | T69 |
| Test name | |
| Test status | |
| Simulation time | 187687363 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:36:45 AM UTC 24 |
| Finished | Aug 27 07:36:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1811622028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_disconnected.1811622028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_enable.226786113 |
| Short name | T542 |
| Test name | |
| Test status | |
| Simulation time | 75773286 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:36:45 AM UTC 24 |
| Finished | Aug 27 07:36:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226786113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_enable.226786113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_access.533499579 |
| Short name | T543 |
| Test name | |
| Test status | |
| Simulation time | 904134426 ps |
| CPU time | 4.52 seconds |
| Started | Aug 27 07:36:45 AM UTC 24 |
| Finished | Aug 27 07:36:51 AM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=533499579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_access.533499579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_endpoint_types.2683549767 |
| Short name | T377 |
| Test name | |
| Test status | |
| Simulation time | 531080071 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:36:46 AM UTC 24 |
| Finished | Aug 27 07:36:50 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2683549767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_endpoint_types.2683549767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_fifo_rst.2213639254 |
| Short name | T205 |
| Test name | |
| Test status | |
| Simulation time | 330762658 ps |
| CPU time | 3.68 seconds |
| Started | Aug 27 07:36:49 AM UTC 24 |
| Finished | Aug 27 07:36:53 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213639254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_fifo_rst.2213639254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk.4153665279 |
| Short name | T699 |
| Test name | |
| Test status | |
| Simulation time | 91219087059 ps |
| CPU time | 183.43 seconds |
| Started | Aug 27 07:36:49 AM UTC 24 |
| Finished | Aug 27 07:39:55 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153665279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_hiclk.4153665279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_freq_hiclk_max.319179334 |
| Short name | T798 |
| Test name | |
| Test status | |
| Simulation time | 114316288033 ps |
| CPU time | 246.74 seconds |
| Started | Aug 27 07:36:50 AM UTC 24 |
| Finished | Aug 27 07:41:00 AM UTC 24 |
| Peak memory | 218256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=319179334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm li ne+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_ name 2.usbdev_freq_hiclk_max.319179334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk.1946213923 |
| Short name | T838 |
| Test name | |
| Test status | |
| Simulation time | 112123265385 ps |
| CPU time | 270.48 seconds |
| Started | Aug 27 07:36:51 AM UTC 24 |
| Finished | Aug 27 07:41:25 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1946213923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_freq_loclk.1946213923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_freq_loclk_max.2949853191 |
| Short name | T687 |
| Test name | |
| Test status | |
| Simulation time | 95244819208 ps |
| CPU time | 173.51 seconds |
| Started | Aug 27 07:36:52 AM UTC 24 |
| Finished | Aug 27 07:39:48 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=2949853191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 2.usbdev_freq_loclk_max.2949853191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_freq_phase.2031085089 |
| Short name | T648 |
| Test name | |
| Test status | |
| Simulation time | 81132274193 ps |
| CPU time | 144.57 seconds |
| Started | Aug 27 07:36:54 AM UTC 24 |
| Finished | Aug 27 07:39:21 AM UTC 24 |
| Peak memory | 218224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2031085089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_freq_phase.2031085089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_iso.3672182666 |
| Short name | T545 |
| Test name | |
| Test status | |
| Simulation time | 306460235 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:36:55 AM UTC 24 |
| Finished | Aug 27 07:36:58 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672182666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_in_iso.3672182666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_stall.3917167099 |
| Short name | T546 |
| Test name | |
| Test status | |
| Simulation time | 140391621 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:36:57 AM UTC 24 |
| Finished | Aug 27 07:36:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3917167099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_stall.3917167099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_in_trans.3633493924 |
| Short name | T259 |
| Test name | |
| Test status | |
| Simulation time | 221129426 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:36:57 AM UTC 24 |
| Finished | Aug 27 07:36:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3633493924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_in_trans.3633493924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_invalid_sync.409540284 |
| Short name | T597 |
| Test name | |
| Test status | |
| Simulation time | 3124260446 ps |
| CPU time | 84.56 seconds |
| Started | Aug 27 07:36:54 AM UTC 24 |
| Finished | Aug 27 07:38:21 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=409540284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_invalid_sync.409540284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_iso_retraction.4066204312 |
| Short name | T585 |
| Test name | |
| Test status | |
| Simulation time | 10101356139 ps |
| CPU time | 64.71 seconds |
| Started | Aug 27 07:36:59 AM UTC 24 |
| Finished | Aug 27 07:38:05 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4066204312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_iso_retraction.4066204312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_in_err.767430838 |
| Short name | T262 |
| Test name | |
| Test status | |
| Simulation time | 207981916 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:37:00 AM UTC 24 |
| Finished | Aug 27 07:37:03 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=767430838 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_link_in_err.767430838 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_resume.2903371022 |
| Short name | T74 |
| Test name | |
| Test status | |
| Simulation time | 29181802289 ps |
| CPU time | 45.5 seconds |
| Started | Aug 27 07:37:00 AM UTC 24 |
| Finished | Aug 27 07:37:47 AM UTC 24 |
| Peak memory | 218392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903371022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_link_resume.2903371022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_link_suspend.2211631075 |
| Short name | T550 |
| Test name | |
| Test status | |
| Simulation time | 3891403992 ps |
| CPU time | 10.99 seconds |
| Started | Aug 27 07:37:01 AM UTC 24 |
| Finished | Aug 27 07:37:13 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211631075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_link_suspend.2211631075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_low_speed_traffic.101725808 |
| Short name | T346 |
| Test name | |
| Test status | |
| Simulation time | 5787187483 ps |
| CPU time | 56.23 seconds |
| Started | Aug 27 07:37:01 AM UTC 24 |
| Finished | Aug 27 07:37:58 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=101725808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_low_speed_traffic.101725808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_inter_pkt_delay.2242708974 |
| Short name | T636 |
| Test name | |
| Test status | |
| Simulation time | 4013533371 ps |
| CPU time | 120.36 seconds |
| Started | Aug 27 07:37:01 AM UTC 24 |
| Finished | Aug 27 07:39:03 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2242708974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_inter_pkt_delay.2242708974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_in_transaction.3379548609 |
| Short name | T263 |
| Test name | |
| Test status | |
| Simulation time | 236349270 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:37:03 AM UTC 24 |
| Finished | Aug 27 07:37:05 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3379548609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_in_transaction.3379548609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_length_out_transaction.1813625041 |
| Short name | T547 |
| Test name | |
| Test status | |
| Simulation time | 194721325 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:37:04 AM UTC 24 |
| Finished | Aug 27 07:37:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1813625041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_max_length_out_transaction.1813625041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_non_iso_usb_traffic.3084027698 |
| Short name | T564 |
| Test name | |
| Test status | |
| Simulation time | 2662117146 ps |
| CPU time | 26.36 seconds |
| Started | Aug 27 07:37:05 AM UTC 24 |
| Finished | Aug 27 07:37:32 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084027698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_non_iso_usb_traffic.3084027698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_max_usb_traffic.2655694346 |
| Short name | T227 |
| Test name | |
| Test status | |
| Simulation time | 3286560097 ps |
| CPU time | 39.6 seconds |
| Started | Aug 27 07:37:06 AM UTC 24 |
| Finished | Aug 27 07:37:47 AM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655694346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_max_usb_traffic.2655694346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_min_inter_pkt_delay.1789164783 |
| Short name | T607 |
| Test name | |
| Test status | |
| Simulation time | 3025580321 ps |
| CPU time | 81.67 seconds |
| Started | Aug 27 07:37:06 AM UTC 24 |
| Finished | Aug 27 07:38:29 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789164783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_min_inter_pkt_delay.1789164783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_in_transaction.1551124298 |
| Short name | T548 |
| Test name | |
| Test status | |
| Simulation time | 207511950 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:37:07 AM UTC 24 |
| Finished | Aug 27 07:37:09 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551124298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_in_transaction.1551124298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_min_length_out_transaction.3283592309 |
| Short name | T549 |
| Test name | |
| Test status | |
| Simulation time | 146907164 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:37:08 AM UTC 24 |
| Finished | Aug 27 07:37:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283592309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_min_length_out_transaction.3283592309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_nak_trans.1101812848 |
| Short name | T147 |
| Test name | |
| Test status | |
| Simulation time | 208226855 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:37:09 AM UTC 24 |
| Finished | Aug 27 07:37:12 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101812848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_nak_trans.1101812848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_iso.2163236680 |
| Short name | T551 |
| Test name | |
| Test status | |
| Simulation time | 161409786 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:37:10 AM UTC 24 |
| Finished | Aug 27 07:37:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163236680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 2.usbdev_out_iso.2163236680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_stall.3959332865 |
| Short name | T552 |
| Test name | |
| Test status | |
| Simulation time | 182733455 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:37:11 AM UTC 24 |
| Finished | Aug 27 07:37:14 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3959332865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_out_stall.3959332865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_out_trans_nak.2811517484 |
| Short name | T497 |
| Test name | |
| Test status | |
| Simulation time | 173326065 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:37:13 AM UTC 24 |
| Finished | Aug 27 07:37:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2811517484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_out_trans_nak.2811517484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pending_in_trans.1013582729 |
| Short name | T179 |
| Test name | |
| Test status | |
| Simulation time | 202284088 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:37:14 AM UTC 24 |
| Finished | Aug 27 07:37:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1013582729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 2.usbdev_pending_in_trans.1013582729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_pinflip.3327939113 |
| Short name | T554 |
| Test name | |
| Test status | |
| Simulation time | 205047721 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:37:14 AM UTC 24 |
| Finished | Aug 27 07:37:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3327939113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_pinflip.3327939113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_rand_bus_type.1209721915 |
| Short name | T555 |
| Test name | |
| Test status | |
| Simulation time | 225702876 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:37:15 AM UTC 24 |
| Finished | Aug 27 07:37:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209721915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 2.usbdev_phy_config_rand_bus_type.1209721915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_config_usb_ref_disable.3428924137 |
| Short name | T210 |
| Test name | |
| Test status | |
| Simulation time | 150369324 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:37:15 AM UTC 24 |
| Finished | Aug 27 07:37:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3428924137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 2.usbdev_phy_config_usb_ref_disable.3428924137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_phy_pins_sense.3708109805 |
| Short name | T26 |
| Test name | |
| Test status | |
| Simulation time | 41047307 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:37:16 AM UTC 24 |
| Finished | Aug 27 07:37:19 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3708109805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_phy_pins_sense.3708109805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_buffer.1137948492 |
| Short name | T292 |
| Test name | |
| Test status | |
| Simulation time | 9841180076 ps |
| CPU time | 37.55 seconds |
| Started | Aug 27 07:37:16 AM UTC 24 |
| Finished | Aug 27 07:37:56 AM UTC 24 |
| Peak memory | 235360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137948492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_pkt_buffer.1137948492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_received.2254575816 |
| Short name | T343 |
| Test name | |
| Test status | |
| Simulation time | 158120639 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:37:16 AM UTC 24 |
| Finished | Aug 27 07:37:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254575816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_pkt_received.2254575816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_pkt_sent.3796358722 |
| Short name | T556 |
| Test name | |
| Test status | |
| Simulation time | 252109760 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:37:18 AM UTC 24 |
| Finished | Aug 27 07:37:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796358722 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 2.usbdev_pkt_sent.3796358722 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_disconnects.350093720 |
| Short name | T203 |
| Test name | |
| Test status | |
| Simulation time | 6192794176 ps |
| CPU time | 72.22 seconds |
| Started | Aug 27 07:37:19 AM UTC 24 |
| Finished | Aug 27 07:38:33 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=350093720 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_disconnects.350093720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rand_bus_resets.4228455704 |
| Short name | T574 |
| Test name | |
| Test status | |
| Simulation time | 6260238076 ps |
| CPU time | 35.5 seconds |
| Started | Aug 27 07:37:19 AM UTC 24 |
| Finished | Aug 27 07:37:56 AM UTC 24 |
| Peak memory | 232580 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4228455704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_bus_resets.4228455704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rand_suspends.4117318484 |
| Short name | T642 |
| Test name | |
| Test status | |
| Simulation time | 7008899221 ps |
| CPU time | 110.41 seconds |
| Started | Aug 27 07:37:20 AM UTC 24 |
| Finished | Aug 27 07:39:13 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4117318484 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_rand_suspends.4117318484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_in_transaction.1705706419 |
| Short name | T557 |
| Test name | |
| Test status | |
| Simulation time | 210599647 ps |
| CPU time | 1.82 seconds |
| Started | Aug 27 07:37:18 AM UTC 24 |
| Finished | Aug 27 07:37:21 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1705706419 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 2.usbdev_random_length_in_transaction.1705706419 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_random_length_out_transaction.2831495845 |
| Short name | T559 |
| Test name | |
| Test status | |
| Simulation time | 161805046 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:37:19 AM UTC 24 |
| Finished | Aug 27 07:37:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831495845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 2.usbdev_random_length_out_transaction.2831495845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_resume_link_active.4119512595 |
| Short name | T100 |
| Test name | |
| Test status | |
| Simulation time | 20158285483 ps |
| CPU time | 45.7 seconds |
| Started | Aug 27 07:37:20 AM UTC 24 |
| Finished | Aug 27 07:38:07 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4119512595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 2.usbdev_resume_link_active.4119512595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_crc_err.2124615966 |
| Short name | T79 |
| Test name | |
| Test status | |
| Simulation time | 164271251 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:37:21 AM UTC 24 |
| Finished | Aug 27 07:37:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2124615966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_crc_err.2124615966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_rx_pid_err.4208583360 |
| Short name | T82 |
| Test name | |
| Test status | |
| Simulation time | 158417386 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:37:21 AM UTC 24 |
| Finished | Aug 27 07:37:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4208583360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_rx_pid_err.4208583360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_sec_cm.2128119253 |
| Short name | T221 |
| Test name | |
| Test status | |
| Simulation time | 322720844 ps |
| CPU time | 1.96 seconds |
| Started | Aug 27 07:37:35 AM UTC 24 |
| Finished | Aug 27 07:37:38 AM UTC 24 |
| Peak memory | 250784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2128119253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 2.usbdev_sec_cm.2128119253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority.2075257018 |
| Short name | T58 |
| Test name | |
| Test status | |
| Simulation time | 492251336 ps |
| CPU time | 2.44 seconds |
| Started | Aug 27 07:37:23 AM UTC 24 |
| Finished | Aug 27 07:37:26 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075257018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority.2075257018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_priority_over_stall_response.4053019261 |
| Short name | T181 |
| Test name | |
| Test status | |
| Simulation time | 199769705 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:37:25 AM UTC 24 |
| Finished | Aug 27 07:37:28 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4053019261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 2.usbdev_setup_priority_over_stall_response.4053019261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_stage.2462714146 |
| Short name | T561 |
| Test name | |
| Test status | |
| Simulation time | 148878238 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:37:25 AM UTC 24 |
| Finished | Aug 27 07:37:27 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2462714146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 2.usbdev_setup_stage.2462714146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_setup_trans_ignored.1558888159 |
| Short name | T310 |
| Test name | |
| Test status | |
| Simulation time | 210082330 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:37:26 AM UTC 24 |
| Finished | Aug 27 07:37:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558888159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 2.usbdev_setup_trans_ignored.1558888159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_smoke.4137921754 |
| Short name | T562 |
| Test name | |
| Test status | |
| Simulation time | 248454550 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:37:27 AM UTC 24 |
| Finished | Aug 27 07:37:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4137921754 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_smoke.4137921754 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_spurious_pids_ignored.512691463 |
| Short name | T581 |
| Test name | |
| Test status | |
| Simulation time | 3330068942 ps |
| CPU time | 32.17 seconds |
| Started | Aug 27 07:37:27 AM UTC 24 |
| Finished | Aug 27 07:38:01 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=512691463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 2.usbdev_spurious_pids_ignored.512691463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stall_priority_over_nak.1337674389 |
| Short name | T501 |
| Test name | |
| Test status | |
| Simulation time | 172174676 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:37:28 AM UTC 24 |
| Finished | Aug 27 07:37:31 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1337674389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stall_priority_over_nak.1337674389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stall_trans.985844377 |
| Short name | T563 |
| Test name | |
| Test status | |
| Simulation time | 223491114 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:37:28 AM UTC 24 |
| Finished | Aug 27 07:37:31 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985844377 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 2.usbdev_stall_trans.985844377 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stream_len_max.46126152 |
| Short name | T565 |
| Test name | |
| Test status | |
| Simulation time | 1357165687 ps |
| CPU time | 6.08 seconds |
| Started | Aug 27 07:37:32 AM UTC 24 |
| Finished | Aug 27 07:37:39 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=46126152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 2.usbdev_stream_len_max.46126152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_streaming_out.1503779310 |
| Short name | T628 |
| Test name | |
| Test status | |
| Simulation time | 2925636112 ps |
| CPU time | 84.65 seconds |
| Started | Aug 27 07:37:29 AM UTC 24 |
| Finished | Aug 27 07:38:57 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503779310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 2.usbdev_streaming_out.1503779310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_stress_usb_traffic.3061244640 |
| Short name | T84 |
| Test name | |
| Test status | |
| Simulation time | 8077805139 ps |
| CPU time | 37.76 seconds |
| Started | Aug 27 07:37:33 AM UTC 24 |
| Finished | Aug 27 07:38:12 AM UTC 24 |
| Peak memory | 232708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3061244640 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_stress_usb_traffic.3061244640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/2.usbdev_timeout_missing_host_handshake.1905065091 |
| Short name | T544 |
| Test name | |
| Test status | |
| Simulation time | 558309586 ps |
| CPU time | 11.02 seconds |
| Started | Aug 27 07:36:44 AM UTC 24 |
| Finished | Aug 27 07:36:56 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1905065091 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 2.usbdev_timeout_missing_host_handshake.1905065091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/2.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_alert_test.142334861 |
| Short name | T1543 |
| Test name | |
| Test status | |
| Simulation time | 67331654 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:21 AM UTC 24 |
| Peak memory | 215696 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=142334861 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_alert_test.142334861 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_disconnect.3559575837 |
| Short name | T1506 |
| Test name | |
| Test status | |
| Simulation time | 6518536808 ps |
| CPU time | 9.92 seconds |
| Started | Aug 27 07:45:56 AM UTC 24 |
| Finished | Aug 27 07:46:07 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559575837 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_disconnect.3559575837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_reset.3921704510 |
| Short name | T1564 |
| Test name | |
| Test status | |
| Simulation time | 20035625114 ps |
| CPU time | 30.86 seconds |
| Started | Aug 27 07:45:57 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921704510 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_reset.3921704510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_aon_wake_resume.3854815680 |
| Short name | T1630 |
| Test name | |
| Test status | |
| Simulation time | 25603910248 ps |
| CPU time | 46.16 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:47 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854815680 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_aon_wake_resume.3854815680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_av_buffer.1121568248 |
| Short name | T1497 |
| Test name | |
| Test status | |
| Simulation time | 218751299 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:03 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1121568248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_av_buffer.1121568248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_bitstuff_err.1273160746 |
| Short name | T1495 |
| Test name | |
| Test status | |
| Simulation time | 165807844 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:02 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1273160746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_bitstuff_err.1273160746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_clear.588477886 |
| Short name | T1499 |
| Test name | |
| Test status | |
| Simulation time | 299821399 ps |
| CPU time | 2.05 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:03 AM UTC 24 |
| Peak memory | 218056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=588477886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_data_toggle_clear.588477886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_data_toggle_restore.1721285015 |
| Short name | T326 |
| Test name | |
| Test status | |
| Simulation time | 327994171 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721285015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_data_toggle_restore.1721285015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_device_address.544789678 |
| Short name | T1727 |
| Test name | |
| Test status | |
| Simulation time | 45717707271 ps |
| CPU time | 82.84 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 218380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544789678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_device_address.544789678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_device_timeout.1846058716 |
| Short name | T1539 |
| Test name | |
| Test status | |
| Simulation time | 1972196532 ps |
| CPU time | 17.31 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:19 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1846058716 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_device_timeout.1846058716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_disable_endpoint.847344895 |
| Short name | T1501 |
| Test name | |
| Test status | |
| Simulation time | 831559418 ps |
| CPU time | 3.58 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:05 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=847344895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_disable_endpoint.847344895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_disconnected.2898806734 |
| Short name | T1496 |
| Test name | |
| Test status | |
| Simulation time | 191223124 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898806734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_disconnected.2898806734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_enable.1209678024 |
| Short name | T1494 |
| Test name | |
| Test status | |
| Simulation time | 38138992 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209678024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 20.usbdev_enable.1209678024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_access.515434440 |
| Short name | T1433 |
| Test name | |
| Test status | |
| Simulation time | 762865691 ps |
| CPU time | 3.05 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:04 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=515434440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_access.515434440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_endpoint_types.2776860042 |
| Short name | T527 |
| Test name | |
| Test status | |
| Simulation time | 191019347 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2776860042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_endpoint_types.2776860042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_fifo_rst.3447395538 |
| Short name | T1431 |
| Test name | |
| Test status | |
| Simulation time | 353060148 ps |
| CPU time | 2.89 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:04 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447395538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_fifo_rst.3447395538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_in_iso.937796393 |
| Short name | T1498 |
| Test name | |
| Test status | |
| Simulation time | 228722419 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:03 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=937796393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_in_iso.937796393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_in_stall.241041553 |
| Short name | T1500 |
| Test name | |
| Test status | |
| Simulation time | 194372904 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:46:02 AM UTC 24 |
| Finished | Aug 27 07:46:04 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=241041553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_in_stall.241041553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_in_trans.2852705100 |
| Short name | T1504 |
| Test name | |
| Test status | |
| Simulation time | 190485733 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2852705100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_in_trans.2852705100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_invalid_sync.2860394342 |
| Short name | T1557 |
| Test name | |
| Test status | |
| Simulation time | 3120391792 ps |
| CPU time | 22.95 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:25 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2860394342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 20.usbdev_invalid_sync.2860394342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_iso_retraction.1464594752 |
| Short name | T1668 |
| Test name | |
| Test status | |
| Simulation time | 8736610326 ps |
| CPU time | 56.4 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:47:02 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464594752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_iso_retraction.1464594752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_link_in_err.3822783537 |
| Short name | T1505 |
| Test name | |
| Test status | |
| Simulation time | 202103876 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822783537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_link_in_err.3822783537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_link_resume.321734118 |
| Short name | T1560 |
| Test name | |
| Test status | |
| Simulation time | 12667297314 ps |
| CPU time | 20.56 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:26 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=321734118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_link_resume.321734118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_link_suspend.1681932461 |
| Short name | T1541 |
| Test name | |
| Test status | |
| Simulation time | 8509432218 ps |
| CPU time | 14.11 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:19 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1681932461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_link_suspend.1681932461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_low_speed_traffic.2815836137 |
| Short name | T1615 |
| Test name | |
| Test status | |
| Simulation time | 4647643104 ps |
| CPU time | 36.46 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:42 AM UTC 24 |
| Peak memory | 232640 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2815836137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_low_speed_traffic.2815836137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_max_inter_pkt_delay.411923047 |
| Short name | T1550 |
| Test name | |
| Test status | |
| Simulation time | 1804667126 ps |
| CPU time | 17.51 seconds |
| Started | Aug 27 07:46:04 AM UTC 24 |
| Finished | Aug 27 07:46:23 AM UTC 24 |
| Peak memory | 235048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=411923047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_max_inter_pkt_delay.411923047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_in_transaction.378935537 |
| Short name | T1508 |
| Test name | |
| Test status | |
| Simulation time | 247270018 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=378935537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_max_length_in_transaction.378935537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_max_length_out_transaction.564456054 |
| Short name | T1510 |
| Test name | |
| Test status | |
| Simulation time | 189901772 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:09 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=564456054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 20.usbdev_max_length_out_transaction.564456054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_max_non_iso_usb_traffic.57624052 |
| Short name | T1583 |
| Test name | |
| Test status | |
| Simulation time | 2441360409 ps |
| CPU time | 25.12 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=57624052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 20.usbdev_max_non_iso_usb_traffic.57624052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_min_inter_pkt_delay.1281412885 |
| Short name | T1563 |
| Test name | |
| Test status | |
| Simulation time | 2853495721 ps |
| CPU time | 20.1 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:28 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1281412885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_min_inter_pkt_delay.1281412885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_in_transaction.1230496239 |
| Short name | T1511 |
| Test name | |
| Test status | |
| Simulation time | 162476424 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230496239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_in_transaction.1230496239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_min_length_out_transaction.4046580280 |
| Short name | T1509 |
| Test name | |
| Test status | |
| Simulation time | 150327681 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:46:06 AM UTC 24 |
| Finished | Aug 27 07:46:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4046580280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_min_length_out_transaction.4046580280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_out_iso.1333561128 |
| Short name | T1513 |
| Test name | |
| Test status | |
| Simulation time | 194653135 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:46:08 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1333561128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_out_iso.1333561128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_out_stall.3002100260 |
| Short name | T1516 |
| Test name | |
| Test status | |
| Simulation time | 274318481 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:46:08 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002100260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 20.usbdev_out_stall.3002100260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_out_trans_nak.3725230028 |
| Short name | T1514 |
| Test name | |
| Test status | |
| Simulation time | 173982075 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:46:08 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3725230028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_out_trans_nak.3725230028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_pending_in_trans.2297410966 |
| Short name | T1515 |
| Test name | |
| Test status | |
| Simulation time | 153254596 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:46:08 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2297410966 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 20.usbdev_pending_in_trans.2297410966 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_pinflip.1061781833 |
| Short name | T1517 |
| Test name | |
| Test status | |
| Simulation time | 199461630 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:46:09 AM UTC 24 |
| Finished | Aug 27 07:46:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1061781833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_pinflip.1061781833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_phy_config_usb_ref_disable.2212594231 |
| Short name | T1522 |
| Test name | |
| Test status | |
| Simulation time | 182682648 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:46:10 AM UTC 24 |
| Finished | Aug 27 07:46:13 AM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212594231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 20.usbdev_phy_config_usb_ref_disable.2212594231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_phy_pins_sense.669180080 |
| Short name | T1520 |
| Test name | |
| Test status | |
| Simulation time | 32378402 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:46:11 AM UTC 24 |
| Finished | Aug 27 07:46:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=669180080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_phy_pins_sense.669180080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_buffer.1810307108 |
| Short name | T1653 |
| Test name | |
| Test status | |
| Simulation time | 16688406381 ps |
| CPU time | 43.36 seconds |
| Started | Aug 27 07:46:11 AM UTC 24 |
| Finished | Aug 27 07:46:55 AM UTC 24 |
| Peak memory | 228224 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1810307108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_pkt_buffer.1810307108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_received.3895886497 |
| Short name | T1521 |
| Test name | |
| Test status | |
| Simulation time | 176390608 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:46:11 AM UTC 24 |
| Finished | Aug 27 07:46:13 AM UTC 24 |
| Peak memory | 215848 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3895886497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 20.usbdev_pkt_received.3895886497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_pkt_sent.2049726721 |
| Short name | T1523 |
| Test name | |
| Test status | |
| Simulation time | 233403075 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:46:11 AM UTC 24 |
| Finished | Aug 27 07:46:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049726721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_pkt_sent.2049726721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_in_transaction.1583661702 |
| Short name | T1524 |
| Test name | |
| Test status | |
| Simulation time | 212452202 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:46:11 AM UTC 24 |
| Finished | Aug 27 07:46:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1583661702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 20.usbdev_random_length_in_transaction.1583661702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_random_length_out_transaction.285436933 |
| Short name | T1531 |
| Test name | |
| Test status | |
| Simulation time | 258569152 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285436933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 20.usbdev_random_length_out_transaction.285436933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_rx_crc_err.2961716386 |
| Short name | T1527 |
| Test name | |
| Test status | |
| Simulation time | 139314138 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:15 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961716386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 20.usbdev_rx_crc_err.2961716386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_rx_full.3481780245 |
| Short name | T1533 |
| Test name | |
| Test status | |
| Simulation time | 373684974 ps |
| CPU time | 2.25 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:16 AM UTC 24 |
| Peak memory | 217988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481780245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 20.usbdev_rx_full.3481780245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_setup_stage.2634483363 |
| Short name | T1529 |
| Test name | |
| Test status | |
| Simulation time | 176020157 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634483363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_setup_stage.2634483363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_setup_trans_ignored.2982800515 |
| Short name | T1528 |
| Test name | |
| Test status | |
| Simulation time | 155416724 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:15 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2982800515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 20.usbdev_setup_trans_ignored.2982800515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_smoke.1391981876 |
| Short name | T1530 |
| Test name | |
| Test status | |
| Simulation time | 220943636 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1391981876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_smoke.1391981876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_spurious_pids_ignored.3672790452 |
| Short name | T1611 |
| Test name | |
| Test status | |
| Simulation time | 2822887477 ps |
| CPU time | 26.92 seconds |
| Started | Aug 27 07:46:13 AM UTC 24 |
| Finished | Aug 27 07:46:41 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3672790452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 20.usbdev_spurious_pids_ignored.3672790452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_stall_priority_over_nak.2223097094 |
| Short name | T1536 |
| Test name | |
| Test status | |
| Simulation time | 152720498 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:46:15 AM UTC 24 |
| Finished | Aug 27 07:46:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223097094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stall_priority_over_nak.2223097094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_stall_trans.4243700403 |
| Short name | T1537 |
| Test name | |
| Test status | |
| Simulation time | 170092833 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:46:16 AM UTC 24 |
| Finished | Aug 27 07:46:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4243700403 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 20.usbdev_stall_trans.4243700403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_stream_len_max.2789197225 |
| Short name | T1542 |
| Test name | |
| Test status | |
| Simulation time | 1339533399 ps |
| CPU time | 3.74 seconds |
| Started | Aug 27 07:46:16 AM UTC 24 |
| Finished | Aug 27 07:46:20 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789197225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_stream_len_max.2789197225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_streaming_out.817582591 |
| Short name | T1732 |
| Test name | |
| Test status | |
| Simulation time | 2616412936 ps |
| CPU time | 68.98 seconds |
| Started | Aug 27 07:46:16 AM UTC 24 |
| Finished | Aug 27 07:47:26 AM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=817582591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 20.usbdev_streaming_out.817582591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_timeout_missing_host_handshake.4022211945 |
| Short name | T1574 |
| Test name | |
| Test status | |
| Simulation time | 4360527044 ps |
| CPU time | 28.67 seconds |
| Started | Aug 27 07:46:00 AM UTC 24 |
| Finished | Aug 27 07:46:30 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4022211945 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_timeout_missing_host_handshake.4022211945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/20.usbdev_tx_rx_disruption.409011659 |
| Short name | T1538 |
| Test name | |
| Test status | |
| Simulation time | 535228025 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:46:16 AM UTC 24 |
| Finished | Aug 27 07:46:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=409011659 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 20.usbdev_tx _rx_disruption.409011659 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/20.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/200.usbdev_tx_rx_disruption.74410490 |
| Short name | T3335 |
| Test name | |
| Test status | |
| Simulation time | 431142917 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:55:02 AM UTC 24 |
| Finished | Aug 27 07:55:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=74410490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 200.usbdev_tx _rx_disruption.74410490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/200.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/201.usbdev_tx_rx_disruption.652815122 |
| Short name | T3325 |
| Test name | |
| Test status | |
| Simulation time | 546232579 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=652815122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 201.usbdev_t x_rx_disruption.652815122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/201.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/202.usbdev_tx_rx_disruption.3774773780 |
| Short name | T3333 |
| Test name | |
| Test status | |
| Simulation time | 666709755 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3774773780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 202.usbdev_ tx_rx_disruption.3774773780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/202.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/203.usbdev_tx_rx_disruption.1349490437 |
| Short name | T3331 |
| Test name | |
| Test status | |
| Simulation time | 540520016 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1349490437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 203.usbdev_ tx_rx_disruption.1349490437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/203.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/204.usbdev_tx_rx_disruption.1333232138 |
| Short name | T3327 |
| Test name | |
| Test status | |
| Simulation time | 428680153 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1333232138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 204.usbdev_ tx_rx_disruption.1333232138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/204.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/205.usbdev_tx_rx_disruption.4115836093 |
| Short name | T3329 |
| Test name | |
| Test status | |
| Simulation time | 558117214 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4115836093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 205.usbdev_ tx_rx_disruption.4115836093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/205.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/206.usbdev_tx_rx_disruption.3070492547 |
| Short name | T3301 |
| Test name | |
| Test status | |
| Simulation time | 510278593 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3070492547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 206.usbdev_ tx_rx_disruption.3070492547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/206.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/207.usbdev_tx_rx_disruption.456317173 |
| Short name | T3303 |
| Test name | |
| Test status | |
| Simulation time | 505805857 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:55:04 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=456317173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 207.usbdev_t x_rx_disruption.456317173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/207.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/208.usbdev_tx_rx_disruption.1185692368 |
| Short name | T3339 |
| Test name | |
| Test status | |
| Simulation time | 509894833 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1185692368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 208.usbdev_ tx_rx_disruption.1185692368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/208.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/209.usbdev_tx_rx_disruption.2941674139 |
| Short name | T3336 |
| Test name | |
| Test status | |
| Simulation time | 486474479 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 215980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2941674139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 209.usbdev_ tx_rx_disruption.2941674139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/209.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_alert_test.1660798341 |
| Short name | T1596 |
| Test name | |
| Test status | |
| Simulation time | 115761922 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:46:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660798341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 21.usbdev_alert_test.1660798341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_disconnect.3363720922 |
| Short name | T1601 |
| Test name | |
| Test status | |
| Simulation time | 11941214094 ps |
| CPU time | 17.46 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:38 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3363720922 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_disconnect.3363720922 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_reset.1539458033 |
| Short name | T1607 |
| Test name | |
| Test status | |
| Simulation time | 13605519810 ps |
| CPU time | 19.27 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539458033 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_reset.1539458033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_aon_wake_resume.2017295106 |
| Short name | T1674 |
| Test name | |
| Test status | |
| Simulation time | 30952056054 ps |
| CPU time | 43.5 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017295106 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_aon_wake_resume.2017295106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_av_buffer.243563936 |
| Short name | T1544 |
| Test name | |
| Test status | |
| Simulation time | 174897385 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=243563936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_av_buffer.243563936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_bitstuff_err.1021793441 |
| Short name | T1546 |
| Test name | |
| Test status | |
| Simulation time | 139047731 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1021793441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_bitstuff_err.1021793441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_clear.2931924374 |
| Short name | T1548 |
| Test name | |
| Test status | |
| Simulation time | 476174881 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2931924374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 21.usbdev_data_toggle_clear.2931924374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_data_toggle_restore.2568566545 |
| Short name | T1551 |
| Test name | |
| Test status | |
| Simulation time | 583584802 ps |
| CPU time | 2.6 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:23 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2568566545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_data_toggle_restore.2568566545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_device_address.3583303254 |
| Short name | T1836 |
| Test name | |
| Test status | |
| Simulation time | 50681414493 ps |
| CPU time | 98.2 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:48:00 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3583303254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_address.3583303254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_device_timeout.1429828449 |
| Short name | T1592 |
| Test name | |
| Test status | |
| Simulation time | 1965300812 ps |
| CPU time | 13.66 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:34 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1429828449 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_device_timeout.1429828449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_disable_endpoint.4143928448 |
| Short name | T1553 |
| Test name | |
| Test status | |
| Simulation time | 652043185 ps |
| CPU time | 3.06 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:24 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4143928448 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_disable_endpoint.4143928448 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_disconnected.1907138718 |
| Short name | T1545 |
| Test name | |
| Test status | |
| Simulation time | 139963591 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907138718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_disconnected.1907138718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_enable.1974301309 |
| Short name | T1547 |
| Test name | |
| Test status | |
| Simulation time | 44428677 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1974301309 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 21.usbdev_enable.1974301309 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_endpoint_access.1449804256 |
| Short name | T1552 |
| Test name | |
| Test status | |
| Simulation time | 711545431 ps |
| CPU time | 2.76 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:23 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449804256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_endpoint_access.1449804256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_fifo_rst.523840904 |
| Short name | T1561 |
| Test name | |
| Test status | |
| Simulation time | 357020439 ps |
| CPU time | 3.5 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:46:26 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523840904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_fifo_rst.523840904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_in_iso.2943451041 |
| Short name | T1556 |
| Test name | |
| Test status | |
| Simulation time | 244450506 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:46:24 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2943451041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_in_iso.2943451041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_in_stall.478447452 |
| Short name | T1554 |
| Test name | |
| Test status | |
| Simulation time | 173529758 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:46:24 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=478447452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_in_stall.478447452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_in_trans.2149981932 |
| Short name | T1555 |
| Test name | |
| Test status | |
| Simulation time | 182044182 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:46:24 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2149981932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 21.usbdev_in_trans.2149981932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_invalid_sync.3069920396 |
| Short name | T1850 |
| Test name | |
| Test status | |
| Simulation time | 3685764551 ps |
| CPU time | 100.85 seconds |
| Started | Aug 27 07:46:21 AM UTC 24 |
| Finished | Aug 27 07:48:04 AM UTC 24 |
| Peak memory | 235080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3069920396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 21.usbdev_invalid_sync.3069920396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_iso_retraction.1158153167 |
| Short name | T1645 |
| Test name | |
| Test status | |
| Simulation time | 4547543292 ps |
| CPU time | 27.26 seconds |
| Started | Aug 27 07:46:23 AM UTC 24 |
| Finished | Aug 27 07:46:52 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158153167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_iso_retraction.1158153167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_link_in_err.4153622787 |
| Short name | T1559 |
| Test name | |
| Test status | |
| Simulation time | 207691862 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:46:23 AM UTC 24 |
| Finished | Aug 27 07:46:26 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4153622787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_in_err.4153622787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_link_resume.4057922804 |
| Short name | T1687 |
| Test name | |
| Test status | |
| Simulation time | 27482888022 ps |
| CPU time | 44.22 seconds |
| Started | Aug 27 07:46:23 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057922804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_resume.4057922804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_link_suspend.854825297 |
| Short name | T1593 |
| Test name | |
| Test status | |
| Simulation time | 5963830467 ps |
| CPU time | 10.42 seconds |
| Started | Aug 27 07:46:23 AM UTC 24 |
| Finished | Aug 27 07:46:35 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=854825297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_link_suspend.854825297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_low_speed_traffic.1721254085 |
| Short name | T1801 |
| Test name | |
| Test status | |
| Simulation time | 3216704507 ps |
| CPU time | 85.49 seconds |
| Started | Aug 27 07:46:23 AM UTC 24 |
| Finished | Aug 27 07:47:51 AM UTC 24 |
| Peak memory | 235136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1721254085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_low_speed_traffic.1721254085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_max_inter_pkt_delay.389149466 |
| Short name | T1827 |
| Test name | |
| Test status | |
| Simulation time | 3558863416 ps |
| CPU time | 89.74 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:47:58 AM UTC 24 |
| Peak memory | 227496 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=389149466 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_inter_pkt_delay.389149466 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_in_transaction.3060545344 |
| Short name | T1567 |
| Test name | |
| Test status | |
| Simulation time | 254632509 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 215112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3060545344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_in_transaction.3060545344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_max_length_out_transaction.2237837764 |
| Short name | T1568 |
| Test name | |
| Test status | |
| Simulation time | 226867700 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2237837764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_max_length_out_transaction.2237837764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_max_non_iso_usb_traffic.1746347977 |
| Short name | T1633 |
| Test name | |
| Test status | |
| Simulation time | 2776021128 ps |
| CPU time | 20.67 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:48 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1746347977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_max_non_iso_usb_traffic.1746347977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_min_inter_pkt_delay.788680084 |
| Short name | T1646 |
| Test name | |
| Test status | |
| Simulation time | 2535570375 ps |
| CPU time | 24.28 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:52 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=788680084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_min_inter_pkt_delay.788680084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_in_transaction.2515194988 |
| Short name | T1569 |
| Test name | |
| Test status | |
| Simulation time | 174905020 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515194988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_min_length_in_transaction.2515194988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_min_length_out_transaction.934423153 |
| Short name | T1566 |
| Test name | |
| Test status | |
| Simulation time | 138192296 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=934423153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 21.usbdev_min_length_out_transaction.934423153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_nak_trans.2281995478 |
| Short name | T139 |
| Test name | |
| Test status | |
| Simulation time | 228315797 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2281995478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_nak_trans.2281995478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_out_iso.2797502338 |
| Short name | T1570 |
| Test name | |
| Test status | |
| Simulation time | 177581667 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2797502338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_out_iso.2797502338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_out_stall.2123128592 |
| Short name | T1571 |
| Test name | |
| Test status | |
| Simulation time | 169911025 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123128592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_out_stall.2123128592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_out_trans_nak.901265986 |
| Short name | T1572 |
| Test name | |
| Test status | |
| Simulation time | 202885217 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:46:26 AM UTC 24 |
| Finished | Aug 27 07:46:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=901265986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_out_trans_nak.901265986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_pending_in_trans.3358040301 |
| Short name | T1580 |
| Test name | |
| Test status | |
| Simulation time | 155409521 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:46:28 AM UTC 24 |
| Finished | Aug 27 07:46:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3358040301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 21.usbdev_pending_in_trans.3358040301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_pinflip.553808082 |
| Short name | T1581 |
| Test name | |
| Test status | |
| Simulation time | 205451993 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:46:28 AM UTC 24 |
| Finished | Aug 27 07:46:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=553808082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_pinflip.553808082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_phy_config_usb_ref_disable.2654164237 |
| Short name | T1578 |
| Test name | |
| Test status | |
| Simulation time | 141384872 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:46:28 AM UTC 24 |
| Finished | Aug 27 07:46:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654164237 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 21.usbdev_phy_config_usb_ref_disable.2654164237 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_phy_pins_sense.3462868764 |
| Short name | T1576 |
| Test name | |
| Test status | |
| Simulation time | 64821744 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:46:28 AM UTC 24 |
| Finished | Aug 27 07:46:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462868764 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_phy_pins_sense.3462868764 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_buffer.4018774641 |
| Short name | T1644 |
| Test name | |
| Test status | |
| Simulation time | 6231829337 ps |
| CPU time | 19.03 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:51 AM UTC 24 |
| Peak memory | 235292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4018774641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_pkt_buffer.4018774641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_received.648939618 |
| Short name | T1584 |
| Test name | |
| Test status | |
| Simulation time | 150183624 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=648939618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 21.usbdev_pkt_received.648939618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_pkt_sent.693582876 |
| Short name | T1588 |
| Test name | |
| Test status | |
| Simulation time | 192024979 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 215936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693582876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_pkt_sent.693582876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_in_transaction.791240791 |
| Short name | T1589 |
| Test name | |
| Test status | |
| Simulation time | 215262568 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791240791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 21.usbdev_random_length_in_transaction.791240791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_random_length_out_transaction.3365986242 |
| Short name | T1585 |
| Test name | |
| Test status | |
| Simulation time | 188396652 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365986242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 21.usbdev_random_length_out_transaction.3365986242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_rx_crc_err.4159154132 |
| Short name | T1587 |
| Test name | |
| Test status | |
| Simulation time | 179983264 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159154132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_rx_crc_err.4159154132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_rx_full.4272892540 |
| Short name | T308 |
| Test name | |
| Test status | |
| Simulation time | 408945973 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4272892540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 21.usbdev_rx_full.4272892540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_setup_stage.693037107 |
| Short name | T1586 |
| Test name | |
| Test status | |
| Simulation time | 156433355 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693037107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_setup_stage.693037107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_setup_trans_ignored.3148428461 |
| Short name | T1590 |
| Test name | |
| Test status | |
| Simulation time | 154187140 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:34 AM UTC 24 |
| Peak memory | 216252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3148428461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 21.usbdev_setup_trans_ignored.3148428461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_smoke.2253593832 |
| Short name | T1591 |
| Test name | |
| Test status | |
| Simulation time | 241777167 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:34 AM UTC 24 |
| Peak memory | 215748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2253593832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_smoke.2253593832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_spurious_pids_ignored.4102468569 |
| Short name | T1632 |
| Test name | |
| Test status | |
| Simulation time | 2370901601 ps |
| CPU time | 15.88 seconds |
| Started | Aug 27 07:46:31 AM UTC 24 |
| Finished | Aug 27 07:46:48 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102468569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 21.usbdev_spurious_pids_ignored.4102468569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_stall_priority_over_nak.2055889316 |
| Short name | T1597 |
| Test name | |
| Test status | |
| Simulation time | 165573088 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:46:33 AM UTC 24 |
| Finished | Aug 27 07:46:36 AM UTC 24 |
| Peak memory | 215760 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2055889316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stall_priority_over_nak.2055889316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_stall_trans.100283565 |
| Short name | T1594 |
| Test name | |
| Test status | |
| Simulation time | 170524676 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:46:33 AM UTC 24 |
| Finished | Aug 27 07:46:36 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=100283565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 21.usbdev_stall_trans.100283565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_stream_len_max.3234270734 |
| Short name | T1600 |
| Test name | |
| Test status | |
| Simulation time | 726489575 ps |
| CPU time | 2.5 seconds |
| Started | Aug 27 07:46:33 AM UTC 24 |
| Finished | Aug 27 07:46:37 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234270734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_stream_len_max.3234270734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_streaming_out.3940775971 |
| Short name | T1707 |
| Test name | |
| Test status | |
| Simulation time | 4342472265 ps |
| CPU time | 40.42 seconds |
| Started | Aug 27 07:46:33 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940775971 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 21.usbdev_streaming_out.3940775971 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_timeout_missing_host_handshake.4254994751 |
| Short name | T1650 |
| Test name | |
| Test status | |
| Simulation time | 3945163617 ps |
| CPU time | 33.74 seconds |
| Started | Aug 27 07:46:19 AM UTC 24 |
| Finished | Aug 27 07:46:54 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254994751 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_timeout_missing_host_handshake.4254994751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/21.usbdev_tx_rx_disruption.498373609 |
| Short name | T1599 |
| Test name | |
| Test status | |
| Simulation time | 601516490 ps |
| CPU time | 1.89 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:46:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=498373609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 21.usbdev_tx _rx_disruption.498373609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/21.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/210.usbdev_tx_rx_disruption.2113025975 |
| Short name | T3338 |
| Test name | |
| Test status | |
| Simulation time | 621770194 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2113025975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 210.usbdev_ tx_rx_disruption.2113025975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/210.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/211.usbdev_tx_rx_disruption.4235892667 |
| Short name | T3344 |
| Test name | |
| Test status | |
| Simulation time | 616215882 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4235892667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 211.usbdev_ tx_rx_disruption.4235892667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/211.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/212.usbdev_tx_rx_disruption.3703032050 |
| Short name | T3341 |
| Test name | |
| Test status | |
| Simulation time | 457597940 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3703032050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 212.usbdev_ tx_rx_disruption.3703032050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/212.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/213.usbdev_tx_rx_disruption.2768861206 |
| Short name | T3348 |
| Test name | |
| Test status | |
| Simulation time | 531183425 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2768861206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 213.usbdev_ tx_rx_disruption.2768861206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/213.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/214.usbdev_tx_rx_disruption.666117391 |
| Short name | T3342 |
| Test name | |
| Test status | |
| Simulation time | 502936723 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=666117391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 214.usbdev_t x_rx_disruption.666117391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/214.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/215.usbdev_tx_rx_disruption.1946284384 |
| Short name | T3343 |
| Test name | |
| Test status | |
| Simulation time | 425625219 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1946284384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 215.usbdev_ tx_rx_disruption.1946284384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/215.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/216.usbdev_tx_rx_disruption.2600335825 |
| Short name | T3347 |
| Test name | |
| Test status | |
| Simulation time | 453890579 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2600335825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 216.usbdev_ tx_rx_disruption.2600335825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/216.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/217.usbdev_tx_rx_disruption.278989325 |
| Short name | T3354 |
| Test name | |
| Test status | |
| Simulation time | 662028231 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=278989325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 217.usbdev_t x_rx_disruption.278989325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/217.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/218.usbdev_tx_rx_disruption.2278476644 |
| Short name | T3349 |
| Test name | |
| Test status | |
| Simulation time | 569147795 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2278476644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 218.usbdev_ tx_rx_disruption.2278476644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/218.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/219.usbdev_tx_rx_disruption.4144475110 |
| Short name | T3355 |
| Test name | |
| Test status | |
| Simulation time | 449543205 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4144475110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 219.usbdev_ tx_rx_disruption.4144475110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/219.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_alert_test.1143868480 |
| Short name | T1535 |
| Test name | |
| Test status | |
| Simulation time | 33306340 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:46:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1143868480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 22.usbdev_alert_test.1143868480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_disconnect.489684570 |
| Short name | T1639 |
| Test name | |
| Test status | |
| Simulation time | 9419468557 ps |
| CPU time | 15.07 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=489684570 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_disconnect.489684570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_reset.1164263704 |
| Short name | T1657 |
| Test name | |
| Test status | |
| Simulation time | 15385461353 ps |
| CPU time | 21.67 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:46:57 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164263704 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_reset.1164263704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_aon_wake_resume.3760600484 |
| Short name | T1708 |
| Test name | |
| Test status | |
| Simulation time | 24562729398 ps |
| CPU time | 40.61 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:47:16 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3760600484 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_aon_wake_resume.3760600484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_av_buffer.2115105284 |
| Short name | T1598 |
| Test name | |
| Test status | |
| Simulation time | 176657984 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:46:34 AM UTC 24 |
| Finished | Aug 27 07:46:36 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2115105284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_av_buffer.2115105284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_bitstuff_err.2867798123 |
| Short name | T1604 |
| Test name | |
| Test status | |
| Simulation time | 136937237 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867798123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_bitstuff_err.2867798123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_clear.1688578894 |
| Short name | T1603 |
| Test name | |
| Test status | |
| Simulation time | 370649409 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1688578894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 22.usbdev_data_toggle_clear.1688578894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_data_toggle_restore.846893010 |
| Short name | T1606 |
| Test name | |
| Test status | |
| Simulation time | 541212700 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=846893010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_data_toggle_restore.846893010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_device_timeout.498441427 |
| Short name | T1685 |
| Test name | |
| Test status | |
| Simulation time | 3928751766 ps |
| CPU time | 31.03 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=498441427 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_device_timeout.498441427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_disable_endpoint.2920574711 |
| Short name | T1608 |
| Test name | |
| Test status | |
| Simulation time | 995056554 ps |
| CPU time | 3.26 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:41 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920574711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 22.usbdev_disable_endpoint.2920574711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_disconnected.1660791585 |
| Short name | T1605 |
| Test name | |
| Test status | |
| Simulation time | 138924199 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1660791585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 22.usbdev_disconnected.1660791585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_enable.4080832088 |
| Short name | T1602 |
| Test name | |
| Test status | |
| Simulation time | 30555341 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:46:39 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080832088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_enable.4080832088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_access.3492947546 |
| Short name | T1609 |
| Test name | |
| Test status | |
| Simulation time | 923553672 ps |
| CPU time | 3.36 seconds |
| Started | Aug 27 07:46:37 AM UTC 24 |
| Finished | Aug 27 07:46:41 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492947546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_access.3492947546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_endpoint_types.127272871 |
| Short name | T417 |
| Test name | |
| Test status | |
| Simulation time | 401108286 ps |
| CPU time | 2.15 seconds |
| Started | Aug 27 07:46:37 AM UTC 24 |
| Finished | Aug 27 07:46:40 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=127272871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_endpoint_types.127272871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_fifo_rst.3090106685 |
| Short name | T1616 |
| Test name | |
| Test status | |
| Simulation time | 162556047 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:46:42 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3090106685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_fifo_rst.3090106685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_in_iso.673798568 |
| Short name | T1614 |
| Test name | |
| Test status | |
| Simulation time | 250504190 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:46:42 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=673798568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_in_iso.673798568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_in_stall.3347084290 |
| Short name | T1610 |
| Test name | |
| Test status | |
| Simulation time | 158892188 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:46:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347084290 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_stall.3347084290 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_in_trans.2164502902 |
| Short name | T1612 |
| Test name | |
| Test status | |
| Simulation time | 198734923 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:46:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2164502902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_in_trans.2164502902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_invalid_sync.349421874 |
| Short name | T1672 |
| Test name | |
| Test status | |
| Simulation time | 4363333750 ps |
| CPU time | 41.16 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:47:21 AM UTC 24 |
| Peak memory | 228584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=349421874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_invalid_sync.349421874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_iso_retraction.883805771 |
| Short name | T1805 |
| Test name | |
| Test status | |
| Simulation time | 6758456182 ps |
| CPU time | 70.78 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:47:52 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=883805771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 22.usbdev_iso_retraction.883805771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_link_in_err.3818898096 |
| Short name | T1613 |
| Test name | |
| Test status | |
| Simulation time | 230311258 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:46:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818898096 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_in_err.3818898096 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_link_resume.2937926381 |
| Short name | T1715 |
| Test name | |
| Test status | |
| Simulation time | 28345958225 ps |
| CPU time | 37.72 seconds |
| Started | Aug 27 07:46:39 AM UTC 24 |
| Finished | Aug 27 07:47:18 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2937926381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_resume.2937926381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_link_suspend.552868776 |
| Short name | T1656 |
| Test name | |
| Test status | |
| Simulation time | 8957881420 ps |
| CPU time | 14.65 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:46:57 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=552868776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_link_suspend.552868776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_low_speed_traffic.1300130014 |
| Short name | T1888 |
| Test name | |
| Test status | |
| Simulation time | 3577401324 ps |
| CPU time | 91.65 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1300130014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_low_speed_traffic.1300130014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_max_inter_pkt_delay.2834649547 |
| Short name | T1757 |
| Test name | |
| Test status | |
| Simulation time | 2002178659 ps |
| CPU time | 50.63 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:47:33 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2834649547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_inter_pkt_delay.2834649547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_in_transaction.249963482 |
| Short name | T1618 |
| Test name | |
| Test status | |
| Simulation time | 242641984 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:46:44 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=249963482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_max_length_in_transaction.249963482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_max_length_out_transaction.251217750 |
| Short name | T1617 |
| Test name | |
| Test status | |
| Simulation time | 211879744 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:46:44 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251217750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_max_length_out_transaction.251217750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_max_non_iso_usb_traffic.3260102079 |
| Short name | T1730 |
| Test name | |
| Test status | |
| Simulation time | 1683980362 ps |
| CPU time | 42.64 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 230400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3260102079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_max_non_iso_usb_traffic.3260102079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_min_inter_pkt_delay.1965515066 |
| Short name | T1689 |
| Test name | |
| Test status | |
| Simulation time | 3589604899 ps |
| CPU time | 26.24 seconds |
| Started | Aug 27 07:46:41 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1965515066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_min_inter_pkt_delay.1965515066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_in_transaction.1651918973 |
| Short name | T1624 |
| Test name | |
| Test status | |
| Simulation time | 216002055 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1651918973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_in_transaction.1651918973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_min_length_out_transaction.1267861282 |
| Short name | T1621 |
| Test name | |
| Test status | |
| Simulation time | 145457922 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1267861282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 22.usbdev_min_length_out_transaction.1267861282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_nak_trans.2423932236 |
| Short name | T1628 |
| Test name | |
| Test status | |
| Simulation time | 284541292 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423932236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 22.usbdev_nak_trans.2423932236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_out_iso.1119146657 |
| Short name | T1623 |
| Test name | |
| Test status | |
| Simulation time | 190201498 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1119146657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_out_iso.1119146657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_out_stall.175932142 |
| Short name | T1620 |
| Test name | |
| Test status | |
| Simulation time | 149397793 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=175932142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_out_stall.175932142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_out_trans_nak.3470364077 |
| Short name | T1622 |
| Test name | |
| Test status | |
| Simulation time | 183612056 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470364077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_out_trans_nak.3470364077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_pending_in_trans.480190129 |
| Short name | T1625 |
| Test name | |
| Test status | |
| Simulation time | 223815622 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:46:43 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=480190129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_pending_in_trans.480190129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_pinflip.3272422264 |
| Short name | T1627 |
| Test name | |
| Test status | |
| Simulation time | 261503821 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:46:44 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3272422264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_config_pinflip.3272422264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_phy_config_usb_ref_disable.561284468 |
| Short name | T1626 |
| Test name | |
| Test status | |
| Simulation time | 194802713 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:46:44 AM UTC 24 |
| Finished | Aug 27 07:46:46 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561284468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 22.usbdev_phy_config_usb_ref_disable.561284468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_phy_pins_sense.1332232592 |
| Short name | T1629 |
| Test name | |
| Test status | |
| Simulation time | 42239561 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:46:45 AM UTC 24 |
| Finished | Aug 27 07:46:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1332232592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_phy_pins_sense.1332232592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_buffer.1294587560 |
| Short name | T1683 |
| Test name | |
| Test status | |
| Simulation time | 7508536714 ps |
| CPU time | 20.44 seconds |
| Started | Aug 27 07:46:45 AM UTC 24 |
| Finished | Aug 27 07:47:07 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1294587560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_pkt_buffer.1294587560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_received.366144103 |
| Short name | T1636 |
| Test name | |
| Test status | |
| Simulation time | 212941083 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=366144103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_pkt_received.366144103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_pkt_sent.62080349 |
| Short name | T1640 |
| Test name | |
| Test status | |
| Simulation time | 222950415 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=62080349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 22.usbdev_pkt_sent.62080349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_in_transaction.2631578525 |
| Short name | T1637 |
| Test name | |
| Test status | |
| Simulation time | 220095657 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2631578525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 22.usbdev_random_length_in_transaction.2631578525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_random_length_out_transaction.3935356958 |
| Short name | T1634 |
| Test name | |
| Test status | |
| Simulation time | 153185724 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935356958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 22.usbdev_random_length_out_transaction.3935356958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_rx_crc_err.1209735643 |
| Short name | T1641 |
| Test name | |
| Test status | |
| Simulation time | 222461354 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1209735643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 22.usbdev_rx_crc_err.1209735643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_rx_full.4159628101 |
| Short name | T1643 |
| Test name | |
| Test status | |
| Simulation time | 306151060 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4159628101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 22.usbdev_rx_full.4159628101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_setup_stage.1030820925 |
| Short name | T1638 |
| Test name | |
| Test status | |
| Simulation time | 152464431 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:46:47 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1030820925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_setup_stage.1030820925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_setup_trans_ignored.2132484729 |
| Short name | T1635 |
| Test name | |
| Test status | |
| Simulation time | 145431569 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:46:48 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2132484729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 22.usbdev_setup_trans_ignored.2132484729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_smoke.294577453 |
| Short name | T1642 |
| Test name | |
| Test status | |
| Simulation time | 192115661 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:46:48 AM UTC 24 |
| Finished | Aug 27 07:46:50 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=294577453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_smoke.294577453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_spurious_pids_ignored.984198500 |
| Short name | T1934 |
| Test name | |
| Test status | |
| Simulation time | 3520281907 ps |
| CPU time | 95.34 seconds |
| Started | Aug 27 07:46:49 AM UTC 24 |
| Finished | Aug 27 07:48:27 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=984198500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 22.usbdev_spurious_pids_ignored.984198500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_stall_priority_over_nak.3554176959 |
| Short name | T1647 |
| Test name | |
| Test status | |
| Simulation time | 138530198 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:46:49 AM UTC 24 |
| Finished | Aug 27 07:46:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3554176959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stall_priority_over_nak.3554176959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_stall_trans.2111740042 |
| Short name | T1648 |
| Test name | |
| Test status | |
| Simulation time | 171237389 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:46:49 AM UTC 24 |
| Finished | Aug 27 07:46:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2111740042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 22.usbdev_stall_trans.2111740042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_stream_len_max.1740935657 |
| Short name | T1582 |
| Test name | |
| Test status | |
| Simulation time | 483481130 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:46:50 AM UTC 24 |
| Finished | Aug 27 07:46:53 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1740935657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_stream_len_max.1740935657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_streaming_out.797672800 |
| Short name | T1735 |
| Test name | |
| Test status | |
| Simulation time | 3780606070 ps |
| CPU time | 35.43 seconds |
| Started | Aug 27 07:46:50 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=797672800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 22.usbdev_streaming_out.797672800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_timeout_missing_host_handshake.3884453317 |
| Short name | T1706 |
| Test name | |
| Test status | |
| Simulation time | 5523831325 ps |
| CPU time | 37.61 seconds |
| Started | Aug 27 07:46:36 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884453317 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_timeout_missing_host_handshake.3884453317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/22.usbdev_tx_rx_disruption.3945830867 |
| Short name | T1649 |
| Test name | |
| Test status | |
| Simulation time | 613219544 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:46:50 AM UTC 24 |
| Finished | Aug 27 07:46:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3945830867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 22.usbdev_t x_rx_disruption.3945830867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/22.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/220.usbdev_tx_rx_disruption.4127790120 |
| Short name | T3357 |
| Test name | |
| Test status | |
| Simulation time | 603989150 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4127790120 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 220.usbdev_ tx_rx_disruption.4127790120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/220.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/221.usbdev_tx_rx_disruption.77353697 |
| Short name | T3350 |
| Test name | |
| Test status | |
| Simulation time | 596216817 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:19 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=77353697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 221.usbdev_tx _rx_disruption.77353697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/221.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/222.usbdev_tx_rx_disruption.669876460 |
| Short name | T3353 |
| Test name | |
| Test status | |
| Simulation time | 458813531 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=669876460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 222.usbdev_t x_rx_disruption.669876460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/222.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/223.usbdev_tx_rx_disruption.635401564 |
| Short name | T3359 |
| Test name | |
| Test status | |
| Simulation time | 539944785 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=635401564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 223.usbdev_t x_rx_disruption.635401564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/223.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/224.usbdev_tx_rx_disruption.1435065141 |
| Short name | T3361 |
| Test name | |
| Test status | |
| Simulation time | 548759171 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 215408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1435065141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 224.usbdev_ tx_rx_disruption.1435065141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/224.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/225.usbdev_tx_rx_disruption.2587972751 |
| Short name | T3363 |
| Test name | |
| Test status | |
| Simulation time | 647446485 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2587972751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 225.usbdev_ tx_rx_disruption.2587972751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/225.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/226.usbdev_tx_rx_disruption.3476831832 |
| Short name | T3358 |
| Test name | |
| Test status | |
| Simulation time | 482659080 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3476831832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 226.usbdev_ tx_rx_disruption.3476831832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/226.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/227.usbdev_tx_rx_disruption.1868644435 |
| Short name | T3356 |
| Test name | |
| Test status | |
| Simulation time | 550001224 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:55:09 AM UTC 24 |
| Finished | Aug 27 07:55:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1868644435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 227.usbdev_ tx_rx_disruption.1868644435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/227.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/228.usbdev_tx_rx_disruption.3237039545 |
| Short name | T3364 |
| Test name | |
| Test status | |
| Simulation time | 501826808 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:55:11 AM UTC 24 |
| Finished | Aug 27 07:55:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3237039545 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 228.usbdev_ tx_rx_disruption.3237039545 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/228.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/229.usbdev_tx_rx_disruption.1707704702 |
| Short name | T3334 |
| Test name | |
| Test status | |
| Simulation time | 551481261 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:55:12 AM UTC 24 |
| Finished | Aug 27 07:55:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1707704702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 229.usbdev_ tx_rx_disruption.1707704702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/229.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_alert_test.1945269631 |
| Short name | T1701 |
| Test name | |
| Test status | |
| Simulation time | 51157047 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1945269631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 23.usbdev_alert_test.1945269631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_disconnect.594676687 |
| Short name | T1703 |
| Test name | |
| Test status | |
| Simulation time | 12331156699 ps |
| CPU time | 20.8 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=594676687 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_disconnect.594676687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_reset.1025217174 |
| Short name | T1704 |
| Test name | |
| Test status | |
| Simulation time | 16087218886 ps |
| CPU time | 20.8 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025217174 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_reset.1025217174 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_aon_wake_resume.3711257520 |
| Short name | T1782 |
| Test name | |
| Test status | |
| Simulation time | 29718424412 ps |
| CPU time | 52.38 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:47:46 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711257520 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_aon_wake_resume.3711257520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_av_buffer.1639241804 |
| Short name | T1651 |
| Test name | |
| Test status | |
| Simulation time | 166931148 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:46:55 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1639241804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_av_buffer.1639241804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_bitstuff_err.1307697535 |
| Short name | T1652 |
| Test name | |
| Test status | |
| Simulation time | 145153282 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:46:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1307697535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_bitstuff_err.1307697535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_data_toggle_clear.337300535 |
| Short name | T1654 |
| Test name | |
| Test status | |
| Simulation time | 227028664 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:46:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=337300535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_data_toggle_clear.337300535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_device_address.4101742064 |
| Short name | T1731 |
| Test name | |
| Test status | |
| Simulation time | 16838708726 ps |
| CPU time | 31.94 seconds |
| Started | Aug 27 07:46:52 AM UTC 24 |
| Finished | Aug 27 07:47:26 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101742064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_address.4101742064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_device_timeout.4269317308 |
| Short name | T1673 |
| Test name | |
| Test status | |
| Simulation time | 924062189 ps |
| CPU time | 7.68 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4269317308 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_device_timeout.4269317308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_disable_endpoint.210650397 |
| Short name | T1660 |
| Test name | |
| Test status | |
| Simulation time | 659042250 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:46:58 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=210650397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_disable_endpoint.210650397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_disconnected.3234069516 |
| Short name | T1659 |
| Test name | |
| Test status | |
| Simulation time | 178935283 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:46:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234069516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_disconnected.3234069516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_enable.3373594746 |
| Short name | T1658 |
| Test name | |
| Test status | |
| Simulation time | 70644207 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:46:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373594746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 23.usbdev_enable.3373594746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_access.3561572367 |
| Short name | T1662 |
| Test name | |
| Test status | |
| Simulation time | 880548250 ps |
| CPU time | 2.84 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:46:59 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561572367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_access.3561572367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_endpoint_types.2056954346 |
| Short name | T366 |
| Test name | |
| Test status | |
| Simulation time | 542755117 ps |
| CPU time | 2.18 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:46:58 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2056954346 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_endpoint_types.2056954346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_fifo_rst.1910550318 |
| Short name | T1667 |
| Test name | |
| Test status | |
| Simulation time | 185542144 ps |
| CPU time | 3 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:01 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1910550318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_fifo_rst.1910550318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_in_iso.2540826610 |
| Short name | T1666 |
| Test name | |
| Test status | |
| Simulation time | 245662944 ps |
| CPU time | 2.15 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:00 AM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2540826610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_in_iso.2540826610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_in_stall.476303137 |
| Short name | T1663 |
| Test name | |
| Test status | |
| Simulation time | 140389369 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:00 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476303137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_stall.476303137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_in_trans.936012183 |
| Short name | T1664 |
| Test name | |
| Test status | |
| Simulation time | 197665798 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:00 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936012183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_in_trans.936012183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_invalid_sync.2104475257 |
| Short name | T1797 |
| Test name | |
| Test status | |
| Simulation time | 4923727093 ps |
| CPU time | 51.12 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:50 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104475257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 23.usbdev_invalid_sync.2104475257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_iso_retraction.2125604337 |
| Short name | T1944 |
| Test name | |
| Test status | |
| Simulation time | 12185277349 ps |
| CPU time | 90.59 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2125604337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_iso_retraction.2125604337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_link_in_err.2967407437 |
| Short name | T1665 |
| Test name | |
| Test status | |
| Simulation time | 228959406 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:46:57 AM UTC 24 |
| Finished | Aug 27 07:47:00 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2967407437 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_in_err.2967407437 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_link_resume.2529162107 |
| Short name | T1800 |
| Test name | |
| Test status | |
| Simulation time | 27790121451 ps |
| CPU time | 48.69 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:50 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2529162107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_link_resume.2529162107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_link_suspend.2406806943 |
| Short name | T1705 |
| Test name | |
| Test status | |
| Simulation time | 9662689022 ps |
| CPU time | 14.11 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2406806943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_link_suspend.2406806943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_low_speed_traffic.4031386256 |
| Short name | T1979 |
| Test name | |
| Test status | |
| Simulation time | 3684526832 ps |
| CPU time | 97.14 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:48:39 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4031386256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_low_speed_traffic.4031386256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_max_inter_pkt_delay.22434270 |
| Short name | T1698 |
| Test name | |
| Test status | |
| Simulation time | 1657650651 ps |
| CPU time | 11.72 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:13 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=22434270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_inter_pkt_delay.22434270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_in_transaction.2262447566 |
| Short name | T1671 |
| Test name | |
| Test status | |
| Simulation time | 245302846 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:03 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2262447566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_in_transaction.2262447566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_max_length_out_transaction.1464091488 |
| Short name | T1670 |
| Test name | |
| Test status | |
| Simulation time | 212141077 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464091488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_max_length_out_transaction.1464091488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_max_non_iso_usb_traffic.1097446073 |
| Short name | T1753 |
| Test name | |
| Test status | |
| Simulation time | 3355278146 ps |
| CPU time | 30.55 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:32 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1097446073 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_max_non_iso_usb_traffic.1097446073 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_min_inter_pkt_delay.3032748343 |
| Short name | T1872 |
| Test name | |
| Test status | |
| Simulation time | 2786419556 ps |
| CPU time | 69 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:48:11 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032748343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_min_inter_pkt_delay.3032748343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_in_transaction.1577484230 |
| Short name | T1669 |
| Test name | |
| Test status | |
| Simulation time | 164779232 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:47:00 AM UTC 24 |
| Finished | Aug 27 07:47:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1577484230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_min_length_in_transaction.1577484230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_min_length_out_transaction.430981853 |
| Short name | T1675 |
| Test name | |
| Test status | |
| Simulation time | 144353647 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:47:02 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430981853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 23.usbdev_min_length_out_transaction.430981853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_nak_trans.374434682 |
| Short name | T142 |
| Test name | |
| Test status | |
| Simulation time | 170784659 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:47:02 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=374434682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_nak_trans.374434682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_out_iso.1712983859 |
| Short name | T1677 |
| Test name | |
| Test status | |
| Simulation time | 164032288 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:47:02 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1712983859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_out_iso.1712983859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_out_stall.1709053172 |
| Short name | T1676 |
| Test name | |
| Test status | |
| Simulation time | 182177228 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:47:02 AM UTC 24 |
| Finished | Aug 27 07:47:04 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1709053172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_out_stall.1709053172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_out_trans_nak.2654448876 |
| Short name | T1679 |
| Test name | |
| Test status | |
| Simulation time | 150152546 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:47:04 AM UTC 24 |
| Finished | Aug 27 07:47:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654448876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_out_trans_nak.2654448876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_pending_in_trans.1365669277 |
| Short name | T1680 |
| Test name | |
| Test status | |
| Simulation time | 158210688 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:47:04 AM UTC 24 |
| Finished | Aug 27 07:47:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1365669277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 23.usbdev_pending_in_trans.1365669277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_pinflip.2097724796 |
| Short name | T1682 |
| Test name | |
| Test status | |
| Simulation time | 215256310 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:47:04 AM UTC 24 |
| Finished | Aug 27 07:47:07 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2097724796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_pinflip.2097724796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_phy_config_usb_ref_disable.1298081739 |
| Short name | T1681 |
| Test name | |
| Test status | |
| Simulation time | 175105243 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:47:04 AM UTC 24 |
| Finished | Aug 27 07:47:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1298081739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 23.usbdev_phy_config_usb_ref_disable.1298081739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_phy_pins_sense.4065662766 |
| Short name | T1678 |
| Test name | |
| Test status | |
| Simulation time | 47747046 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:47:04 AM UTC 24 |
| Finished | Aug 27 07:47:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065662766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_phy_pins_sense.4065662766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_buffer.2013691430 |
| Short name | T1741 |
| Test name | |
| Test status | |
| Simulation time | 7785967765 ps |
| CPU time | 22.39 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:30 AM UTC 24 |
| Peak memory | 228312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2013691430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_pkt_buffer.2013691430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_received.3596544976 |
| Short name | T1686 |
| Test name | |
| Test status | |
| Simulation time | 185088831 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3596544976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 23.usbdev_pkt_received.3596544976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_pkt_sent.1474683652 |
| Short name | T1690 |
| Test name | |
| Test status | |
| Simulation time | 211402921 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474683652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 23.usbdev_pkt_sent.1474683652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_in_transaction.1308008274 |
| Short name | T1688 |
| Test name | |
| Test status | |
| Simulation time | 246017473 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308008274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 23.usbdev_random_length_in_transaction.1308008274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_random_length_out_transaction.3434982242 |
| Short name | T1691 |
| Test name | |
| Test status | |
| Simulation time | 165214503 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3434982242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 23.usbdev_random_length_out_transaction.3434982242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_rx_crc_err.1498233543 |
| Short name | T1692 |
| Test name | |
| Test status | |
| Simulation time | 179095557 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:47:06 AM UTC 24 |
| Finished | Aug 27 07:47:09 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1498233543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_rx_crc_err.1498233543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_rx_full.1325336774 |
| Short name | T1697 |
| Test name | |
| Test status | |
| Simulation time | 276115566 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:47:08 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1325336774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 23.usbdev_rx_full.1325336774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_setup_stage.500469440 |
| Short name | T1694 |
| Test name | |
| Test status | |
| Simulation time | 149683098 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:47:08 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 216012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500469440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 23.usbdev_setup_stage.500469440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_setup_trans_ignored.92813504 |
| Short name | T1693 |
| Test name | |
| Test status | |
| Simulation time | 151729380 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:47:08 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92813504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 23.usbdev_setup_trans_ignored.92813504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_smoke.4072688332 |
| Short name | T1695 |
| Test name | |
| Test status | |
| Simulation time | 199301796 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:47:08 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072688332 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_smoke.4072688332 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_spurious_pids_ignored.3251864283 |
| Short name | T1774 |
| Test name | |
| Test status | |
| Simulation time | 3268168706 ps |
| CPU time | 31.29 seconds |
| Started | Aug 27 07:47:09 AM UTC 24 |
| Finished | Aug 27 07:47:41 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3251864283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 23.usbdev_spurious_pids_ignored.3251864283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_stall_priority_over_nak.2767255058 |
| Short name | T1696 |
| Test name | |
| Test status | |
| Simulation time | 176624793 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:47:09 AM UTC 24 |
| Finished | Aug 27 07:47:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767255058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stall_priority_over_nak.2767255058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_stall_trans.4048232759 |
| Short name | T1702 |
| Test name | |
| Test status | |
| Simulation time | 196313533 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048232759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 23.usbdev_stall_trans.4048232759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_stream_len_max.2563287821 |
| Short name | T1709 |
| Test name | |
| Test status | |
| Simulation time | 833953550 ps |
| CPU time | 4.01 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:16 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2563287821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_stream_len_max.2563287821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_streaming_out.2000335652 |
| Short name | T1755 |
| Test name | |
| Test status | |
| Simulation time | 2454851639 ps |
| CPU time | 20.67 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:33 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2000335652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 23.usbdev_streaming_out.2000335652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_timeout_missing_host_handshake.1761128576 |
| Short name | T1684 |
| Test name | |
| Test status | |
| Simulation time | 538566270 ps |
| CPU time | 12.03 seconds |
| Started | Aug 27 07:46:55 AM UTC 24 |
| Finished | Aug 27 07:47:08 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1761128576 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_timeout_missing_host_handshake.1761128576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/23.usbdev_tx_rx_disruption.2073033321 |
| Short name | T239 |
| Test name | |
| Test status | |
| Simulation time | 593821323 ps |
| CPU time | 2.79 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:15 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2073033321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 23.usbdev_t x_rx_disruption.2073033321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/23.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/230.usbdev_tx_rx_disruption.2274774301 |
| Short name | T3319 |
| Test name | |
| Test status | |
| Simulation time | 588607569 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:13 AM UTC 24 |
| Finished | Aug 27 07:55:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2274774301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 230.usbdev_ tx_rx_disruption.2274774301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/230.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/231.usbdev_tx_rx_disruption.2908619047 |
| Short name | T3365 |
| Test name | |
| Test status | |
| Simulation time | 511937531 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2908619047 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 231.usbdev_ tx_rx_disruption.2908619047 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/231.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/232.usbdev_tx_rx_disruption.934173421 |
| Short name | T3367 |
| Test name | |
| Test status | |
| Simulation time | 624918781 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=934173421 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 232.usbdev_t x_rx_disruption.934173421 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/232.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/233.usbdev_tx_rx_disruption.2823442146 |
| Short name | T3369 |
| Test name | |
| Test status | |
| Simulation time | 617217172 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2823442146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 233.usbdev_ tx_rx_disruption.2823442146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/233.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/234.usbdev_tx_rx_disruption.997691792 |
| Short name | T3370 |
| Test name | |
| Test status | |
| Simulation time | 576783288 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=997691792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 234.usbdev_t x_rx_disruption.997691792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/234.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/235.usbdev_tx_rx_disruption.3496713241 |
| Short name | T3366 |
| Test name | |
| Test status | |
| Simulation time | 441206261 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3496713241 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 235.usbdev_ tx_rx_disruption.3496713241 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/235.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/236.usbdev_tx_rx_disruption.4064591167 |
| Short name | T3376 |
| Test name | |
| Test status | |
| Simulation time | 593875318 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4064591167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 236.usbdev_ tx_rx_disruption.4064591167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/236.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/237.usbdev_tx_rx_disruption.2718196999 |
| Short name | T3380 |
| Test name | |
| Test status | |
| Simulation time | 666937855 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2718196999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 237.usbdev_ tx_rx_disruption.2718196999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/237.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/238.usbdev_tx_rx_disruption.948739025 |
| Short name | T3372 |
| Test name | |
| Test status | |
| Simulation time | 541058886 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=948739025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 238.usbdev_t x_rx_disruption.948739025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/238.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/239.usbdev_tx_rx_disruption.2345547063 |
| Short name | T3373 |
| Test name | |
| Test status | |
| Simulation time | 535131077 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2345547063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 239.usbdev_ tx_rx_disruption.2345547063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/239.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_alert_test.3056956896 |
| Short name | T1754 |
| Test name | |
| Test status | |
| Simulation time | 71869441 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:47:30 AM UTC 24 |
| Finished | Aug 27 07:47:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3056956896 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 24.usbdev_alert_test.3056956896 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_disconnect.1710170712 |
| Short name | T1740 |
| Test name | |
| Test status | |
| Simulation time | 10796034115 ps |
| CPU time | 16.53 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:29 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1710170712 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_disconnect.1710170712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_reset.1364251117 |
| Short name | T1769 |
| Test name | |
| Test status | |
| Simulation time | 19806596497 ps |
| CPU time | 25.69 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:47:39 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1364251117 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_reset.1364251117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_aon_wake_resume.966047079 |
| Short name | T1846 |
| Test name | |
| Test status | |
| Simulation time | 31218814425 ps |
| CPU time | 48.74 seconds |
| Started | Aug 27 07:47:11 AM UTC 24 |
| Finished | Aug 27 07:48:02 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=966047079 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_aon_wake_resume.966047079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_av_buffer.902046709 |
| Short name | T1710 |
| Test name | |
| Test status | |
| Simulation time | 178310973 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:47:14 AM UTC 24 |
| Finished | Aug 27 07:47:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902046709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_av_buffer.902046709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_bitstuff_err.992865463 |
| Short name | T1711 |
| Test name | |
| Test status | |
| Simulation time | 189986860 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:47:14 AM UTC 24 |
| Finished | Aug 27 07:47:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992865463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_bitstuff_err.992865463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_clear.1572349997 |
| Short name | T1713 |
| Test name | |
| Test status | |
| Simulation time | 513109742 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:47:14 AM UTC 24 |
| Finished | Aug 27 07:47:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572349997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 24.usbdev_data_toggle_clear.1572349997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_data_toggle_restore.2536024164 |
| Short name | T1714 |
| Test name | |
| Test status | |
| Simulation time | 528167188 ps |
| CPU time | 2.48 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:47:18 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2536024164 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_data_toggle_restore.2536024164 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_device_address.1229644957 |
| Short name | T1938 |
| Test name | |
| Test status | |
| Simulation time | 40968984904 ps |
| CPU time | 71.68 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1229644957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_address.1229644957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_device_timeout.1939011198 |
| Short name | T1848 |
| Test name | |
| Test status | |
| Simulation time | 7730816341 ps |
| CPU time | 46.07 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:48:02 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1939011198 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_device_timeout.1939011198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_disable_endpoint.3456040445 |
| Short name | T1716 |
| Test name | |
| Test status | |
| Simulation time | 748590868 ps |
| CPU time | 2.78 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:47:19 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3456040445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_disable_endpoint.3456040445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_disconnected.2893812668 |
| Short name | T1712 |
| Test name | |
| Test status | |
| Simulation time | 150768711 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:47:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2893812668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 24.usbdev_disconnected.2893812668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_enable.1075125836 |
| Short name | T1717 |
| Test name | |
| Test status | |
| Simulation time | 49202251 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:47:17 AM UTC 24 |
| Finished | Aug 27 07:47:19 AM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1075125836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_enable.1075125836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_access.3016980629 |
| Short name | T1661 |
| Test name | |
| Test status | |
| Simulation time | 947571337 ps |
| CPU time | 3.37 seconds |
| Started | Aug 27 07:47:17 AM UTC 24 |
| Finished | Aug 27 07:47:22 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3016980629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_access.3016980629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_endpoint_types.1869136703 |
| Short name | T432 |
| Test name | |
| Test status | |
| Simulation time | 427941479 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:47:17 AM UTC 24 |
| Finished | Aug 27 07:47:20 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1869136703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_endpoint_types.1869136703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_fifo_rst.1125099343 |
| Short name | T1721 |
| Test name | |
| Test status | |
| Simulation time | 304032869 ps |
| CPU time | 2.57 seconds |
| Started | Aug 27 07:47:17 AM UTC 24 |
| Finished | Aug 27 07:47:21 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1125099343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_fifo_rst.1125099343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_in_iso.1046563619 |
| Short name | T1720 |
| Test name | |
| Test status | |
| Simulation time | 175040146 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:47:20 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046563619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_in_iso.1046563619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_in_stall.86958736 |
| Short name | T1718 |
| Test name | |
| Test status | |
| Simulation time | 139575682 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:47:20 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=86958736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_in_stall.86958736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_in_trans.278345566 |
| Short name | T1699 |
| Test name | |
| Test status | |
| Simulation time | 242492578 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:47:20 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=278345566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_in_trans.278345566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_invalid_sync.811406890 |
| Short name | T1838 |
| Test name | |
| Test status | |
| Simulation time | 4486920038 ps |
| CPU time | 41.46 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:48:00 AM UTC 24 |
| Peak memory | 235252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=811406890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_invalid_sync.811406890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_iso_retraction.2191739135 |
| Short name | T1992 |
| Test name | |
| Test status | |
| Simulation time | 12635998061 ps |
| CPU time | 83.34 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191739135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_iso_retraction.2191739135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_link_in_err.2180291163 |
| Short name | T1719 |
| Test name | |
| Test status | |
| Simulation time | 240393540 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:47:18 AM UTC 24 |
| Finished | Aug 27 07:47:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2180291163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_in_err.2180291163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_link_resume.3144248362 |
| Short name | T1816 |
| Test name | |
| Test status | |
| Simulation time | 24214084192 ps |
| CPU time | 33.69 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:55 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3144248362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_resume.3144248362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_link_suspend.711554729 |
| Short name | T1739 |
| Test name | |
| Test status | |
| Simulation time | 3946728889 ps |
| CPU time | 6.44 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:28 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=711554729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_link_suspend.711554729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_low_speed_traffic.3250377220 |
| Short name | T1815 |
| Test name | |
| Test status | |
| Simulation time | 3644363427 ps |
| CPU time | 33.5 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:55 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250377220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_low_speed_traffic.3250377220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_max_inter_pkt_delay.4275185516 |
| Short name | T1791 |
| Test name | |
| Test status | |
| Simulation time | 2944779382 ps |
| CPU time | 25.97 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:48 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275185516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_inter_pkt_delay.4275185516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_in_transaction.1048153220 |
| Short name | T1723 |
| Test name | |
| Test status | |
| Simulation time | 235601801 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:23 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1048153220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_in_transaction.1048153220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_max_length_out_transaction.2354739757 |
| Short name | T1722 |
| Test name | |
| Test status | |
| Simulation time | 190662774 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:47:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2354739757 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_max_length_out_transaction.2354739757 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_max_non_iso_usb_traffic.1907370792 |
| Short name | T1974 |
| Test name | |
| Test status | |
| Simulation time | 2910813644 ps |
| CPU time | 75.68 seconds |
| Started | Aug 27 07:47:20 AM UTC 24 |
| Finished | Aug 27 07:48:38 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1907370792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_max_non_iso_usb_traffic.1907370792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_min_inter_pkt_delay.1922198823 |
| Short name | T1819 |
| Test name | |
| Test status | |
| Simulation time | 1305458563 ps |
| CPU time | 32.54 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:56 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922198823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_min_inter_pkt_delay.1922198823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_in_transaction.4244762526 |
| Short name | T1725 |
| Test name | |
| Test status | |
| Simulation time | 154887795 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:24 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4244762526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_in_transaction.4244762526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_min_length_out_transaction.3269970083 |
| Short name | T1726 |
| Test name | |
| Test status | |
| Simulation time | 153178473 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3269970083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_min_length_out_transaction.3269970083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_nak_trans.1172933613 |
| Short name | T140 |
| Test name | |
| Test status | |
| Simulation time | 171300109 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1172933613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_nak_trans.1172933613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_out_iso.1158826307 |
| Short name | T1729 |
| Test name | |
| Test status | |
| Simulation time | 251413494 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158826307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 24.usbdev_out_iso.1158826307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_out_stall.1301223644 |
| Short name | T1728 |
| Test name | |
| Test status | |
| Simulation time | 192218051 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:47:22 AM UTC 24 |
| Finished | Aug 27 07:47:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1301223644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_out_stall.1301223644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_out_trans_nak.1508965697 |
| Short name | T1736 |
| Test name | |
| Test status | |
| Simulation time | 143577875 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:47:24 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1508965697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_out_trans_nak.1508965697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_pending_in_trans.2504377932 |
| Short name | T1733 |
| Test name | |
| Test status | |
| Simulation time | 174340502 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:47:24 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504377932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 24.usbdev_pending_in_trans.2504377932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_pinflip.375921186 |
| Short name | T1738 |
| Test name | |
| Test status | |
| Simulation time | 286278364 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:47:24 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=375921186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_pinflip.375921186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_phy_config_usb_ref_disable.2499878899 |
| Short name | T1737 |
| Test name | |
| Test status | |
| Simulation time | 240295033 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:47:24 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499878899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 24.usbdev_phy_config_usb_ref_disable.2499878899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_phy_pins_sense.3057160929 |
| Short name | T1734 |
| Test name | |
| Test status | |
| Simulation time | 62480672 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:47:25 AM UTC 24 |
| Finished | Aug 27 07:47:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3057160929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_phy_pins_sense.3057160929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_buffer.2676174357 |
| Short name | T1818 |
| Test name | |
| Test status | |
| Simulation time | 10090465614 ps |
| CPU time | 26.07 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:55 AM UTC 24 |
| Peak memory | 235340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676174357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_pkt_buffer.2676174357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_received.829363138 |
| Short name | T1745 |
| Test name | |
| Test status | |
| Simulation time | 187395791 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=829363138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_pkt_received.829363138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_pkt_sent.1003263905 |
| Short name | T1744 |
| Test name | |
| Test status | |
| Simulation time | 249380458 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1003263905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 24.usbdev_pkt_sent.1003263905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_in_transaction.1668702137 |
| Short name | T1749 |
| Test name | |
| Test status | |
| Simulation time | 176456434 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668702137 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_random_length_in_transaction.1668702137 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_random_length_out_transaction.1137337028 |
| Short name | T1742 |
| Test name | |
| Test status | |
| Simulation time | 169145133 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1137337028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 24.usbdev_random_length_out_transaction.1137337028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_rx_crc_err.1700506710 |
| Short name | T1743 |
| Test name | |
| Test status | |
| Simulation time | 163290980 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1700506710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 24.usbdev_rx_crc_err.1700506710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_rx_full.866116061 |
| Short name | T1752 |
| Test name | |
| Test status | |
| Simulation time | 378098775 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866116061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 24.usbdev_rx_full.866116061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_setup_stage.2075978046 |
| Short name | T1746 |
| Test name | |
| Test status | |
| Simulation time | 165259529 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075978046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_setup_stage.2075978046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_setup_trans_ignored.1227440493 |
| Short name | T1751 |
| Test name | |
| Test status | |
| Simulation time | 162420143 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227440493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 24.usbdev_setup_trans_ignored.1227440493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_smoke.3871737136 |
| Short name | T1748 |
| Test name | |
| Test status | |
| Simulation time | 208697621 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871737136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_smoke.3871737136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_spurious_pids_ignored.1629398641 |
| Short name | T1799 |
| Test name | |
| Test status | |
| Simulation time | 2246107728 ps |
| CPU time | 20.27 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:50 AM UTC 24 |
| Peak memory | 235188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1629398641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 24.usbdev_spurious_pids_ignored.1629398641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_stall_priority_over_nak.3480690725 |
| Short name | T1750 |
| Test name | |
| Test status | |
| Simulation time | 204209335 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480690725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_stall_priority_over_nak.3480690725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_stall_trans.2729718564 |
| Short name | T1747 |
| Test name | |
| Test status | |
| Simulation time | 195153727 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:47:28 AM UTC 24 |
| Finished | Aug 27 07:47:31 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2729718564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 24.usbdev_stall_trans.2729718564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_stream_len_max.641672302 |
| Short name | T1756 |
| Test name | |
| Test status | |
| Simulation time | 524780545 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:47:30 AM UTC 24 |
| Finished | Aug 27 07:47:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=641672302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 24.usbdev_stream_len_max.641672302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_streaming_out.3325911489 |
| Short name | T1808 |
| Test name | |
| Test status | |
| Simulation time | 2581797830 ps |
| CPU time | 22.16 seconds |
| Started | Aug 27 07:47:29 AM UTC 24 |
| Finished | Aug 27 07:47:52 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325911489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 24.usbdev_streaming_out.3325911489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_timeout_missing_host_handshake.1297767045 |
| Short name | T1828 |
| Test name | |
| Test status | |
| Simulation time | 5260725593 ps |
| CPU time | 41.71 seconds |
| Started | Aug 27 07:47:15 AM UTC 24 |
| Finished | Aug 27 07:47:58 AM UTC 24 |
| Peak memory | 218364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1297767045 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_timeout_missing_host_handshake.1297767045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/24.usbdev_tx_rx_disruption.1044723349 |
| Short name | T197 |
| Test name | |
| Test status | |
| Simulation time | 465836013 ps |
| CPU time | 1.81 seconds |
| Started | Aug 27 07:47:30 AM UTC 24 |
| Finished | Aug 27 07:47:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1044723349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 24.usbdev_t x_rx_disruption.1044723349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/24.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/240.usbdev_tx_rx_disruption.3973422404 |
| Short name | T3377 |
| Test name | |
| Test status | |
| Simulation time | 560772799 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3973422404 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 240.usbdev_ tx_rx_disruption.3973422404 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/240.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/241.usbdev_tx_rx_disruption.3406419572 |
| Short name | T3381 |
| Test name | |
| Test status | |
| Simulation time | 529110032 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3406419572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 241.usbdev_ tx_rx_disruption.3406419572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/241.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/242.usbdev_tx_rx_disruption.1345985669 |
| Short name | T3375 |
| Test name | |
| Test status | |
| Simulation time | 492955406 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1345985669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 242.usbdev_ tx_rx_disruption.1345985669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/242.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/243.usbdev_tx_rx_disruption.958266308 |
| Short name | T3368 |
| Test name | |
| Test status | |
| Simulation time | 501522417 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=958266308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 243.usbdev_t x_rx_disruption.958266308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/243.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/244.usbdev_tx_rx_disruption.4047879329 |
| Short name | T3378 |
| Test name | |
| Test status | |
| Simulation time | 583351240 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4047879329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 244.usbdev_ tx_rx_disruption.4047879329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/244.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/245.usbdev_tx_rx_disruption.1724651371 |
| Short name | T3383 |
| Test name | |
| Test status | |
| Simulation time | 631444394 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1724651371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 245.usbdev_ tx_rx_disruption.1724651371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/245.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/246.usbdev_tx_rx_disruption.2882483098 |
| Short name | T3385 |
| Test name | |
| Test status | |
| Simulation time | 554230675 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:55:19 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 216380 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2882483098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 246.usbdev_ tx_rx_disruption.2882483098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/246.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/247.usbdev_tx_rx_disruption.3639359024 |
| Short name | T3382 |
| Test name | |
| Test status | |
| Simulation time | 546286903 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:55:20 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 217044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3639359024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 247.usbdev_ tx_rx_disruption.3639359024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/247.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/248.usbdev_tx_rx_disruption.1953048589 |
| Short name | T3371 |
| Test name | |
| Test status | |
| Simulation time | 462579045 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:55:20 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1953048589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 248.usbdev_ tx_rx_disruption.1953048589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/248.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/249.usbdev_tx_rx_disruption.1178353943 |
| Short name | T3374 |
| Test name | |
| Test status | |
| Simulation time | 544429374 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:55:20 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1178353943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 249.usbdev_ tx_rx_disruption.1178353943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/249.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_alert_test.3730322791 |
| Short name | T1802 |
| Test name | |
| Test status | |
| Simulation time | 41105917 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730322791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 25.usbdev_alert_test.3730322791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_disconnect.838232352 |
| Short name | T1798 |
| Test name | |
| Test status | |
| Simulation time | 9882574319 ps |
| CPU time | 15.92 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:50 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=838232352 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_disconnect.838232352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_reset.2208532530 |
| Short name | T1812 |
| Test name | |
| Test status | |
| Simulation time | 13988399461 ps |
| CPU time | 19.42 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:54 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2208532530 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_reset.2208532530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_aon_wake_resume.2924191379 |
| Short name | T1884 |
| Test name | |
| Test status | |
| Simulation time | 30714397098 ps |
| CPU time | 39.71 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924191379 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_aon_wake_resume.2924191379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_av_buffer.1581454298 |
| Short name | T1761 |
| Test name | |
| Test status | |
| Simulation time | 207909478 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:36 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581454298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_av_buffer.1581454298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_bitstuff_err.419991923 |
| Short name | T1759 |
| Test name | |
| Test status | |
| Simulation time | 147584825 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:35 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419991923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_bitstuff_err.419991923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_clear.4206543826 |
| Short name | T1765 |
| Test name | |
| Test status | |
| Simulation time | 638304381 ps |
| CPU time | 3.24 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4206543826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 25.usbdev_data_toggle_clear.4206543826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_data_toggle_restore.689586945 |
| Short name | T1763 |
| Test name | |
| Test status | |
| Simulation time | 498601298 ps |
| CPU time | 2.75 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:37 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=689586945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_data_toggle_restore.689586945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_device_address.199043009 |
| Short name | T2023 |
| Test name | |
| Test status | |
| Simulation time | 42216332073 ps |
| CPU time | 76.41 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:48:51 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=199043009 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_device_address.199043009 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_device_timeout.1790354748 |
| Short name | T1851 |
| Test name | |
| Test status | |
| Simulation time | 4356795622 ps |
| CPU time | 30.46 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:48:05 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1790354748 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_device_timeout.1790354748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_disable_endpoint.1249320604 |
| Short name | T1762 |
| Test name | |
| Test status | |
| Simulation time | 648278897 ps |
| CPU time | 2.03 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:36 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1249320604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_disable_endpoint.1249320604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_disconnected.565637817 |
| Short name | T1760 |
| Test name | |
| Test status | |
| Simulation time | 155889875 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565637817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_disconnected.565637817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_enable.2663876621 |
| Short name | T1758 |
| Test name | |
| Test status | |
| Simulation time | 36647378 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2663876621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_enable.2663876621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_access.4085020251 |
| Short name | T1764 |
| Test name | |
| Test status | |
| Simulation time | 731731127 ps |
| CPU time | 2.83 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:37 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4085020251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_access.4085020251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_endpoint_types.3502825012 |
| Short name | T505 |
| Test name | |
| Test status | |
| Simulation time | 314105546 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:47:35 AM UTC 24 |
| Finished | Aug 27 07:47:38 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3502825012 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_endpoint_types.3502825012 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_fifo_rst.48067214 |
| Short name | T1768 |
| Test name | |
| Test status | |
| Simulation time | 165914668 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:47:35 AM UTC 24 |
| Finished | Aug 27 07:47:38 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48067214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 25.usbdev_fifo_rst.48067214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_in_iso.1993564559 |
| Short name | T1766 |
| Test name | |
| Test status | |
| Simulation time | 203791010 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:47:35 AM UTC 24 |
| Finished | Aug 27 07:47:37 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993564559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 25.usbdev_in_iso.1993564559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_in_stall.4289784603 |
| Short name | T1767 |
| Test name | |
| Test status | |
| Simulation time | 153554481 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:47:35 AM UTC 24 |
| Finished | Aug 27 07:47:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289784603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_in_stall.4289784603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_in_trans.705406994 |
| Short name | T1770 |
| Test name | |
| Test status | |
| Simulation time | 197840381 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:47:37 AM UTC 24 |
| Finished | Aug 27 07:47:39 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=705406994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_in_trans.705406994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_invalid_sync.1224608660 |
| Short name | T1903 |
| Test name | |
| Test status | |
| Simulation time | 4734912769 ps |
| CPU time | 43.26 seconds |
| Started | Aug 27 07:47:35 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1224608660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 25.usbdev_invalid_sync.1224608660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_iso_retraction.2452262762 |
| Short name | T1970 |
| Test name | |
| Test status | |
| Simulation time | 8633672909 ps |
| CPU time | 58.48 seconds |
| Started | Aug 27 07:47:37 AM UTC 24 |
| Finished | Aug 27 07:48:37 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452262762 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_iso_retraction.2452262762 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_link_in_err.919071774 |
| Short name | T1771 |
| Test name | |
| Test status | |
| Simulation time | 178648409 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:47:37 AM UTC 24 |
| Finished | Aug 27 07:47:39 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=919071774 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_link_in_err.919071774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_link_resume.3716362918 |
| Short name | T1911 |
| Test name | |
| Test status | |
| Simulation time | 22805776036 ps |
| CPU time | 43.03 seconds |
| Started | Aug 27 07:47:37 AM UTC 24 |
| Finished | Aug 27 07:48:21 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3716362918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_link_resume.3716362918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_link_suspend.1603888401 |
| Short name | T1821 |
| Test name | |
| Test status | |
| Simulation time | 9892768619 ps |
| CPU time | 15.81 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:56 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1603888401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_link_suspend.1603888401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_low_speed_traffic.1370942916 |
| Short name | T1897 |
| Test name | |
| Test status | |
| Simulation time | 3835043694 ps |
| CPU time | 37.09 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:48:18 AM UTC 24 |
| Peak memory | 230576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370942916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_low_speed_traffic.1370942916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_max_inter_pkt_delay.3794148277 |
| Short name | T1823 |
| Test name | |
| Test status | |
| Simulation time | 1840607523 ps |
| CPU time | 16.2 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:57 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3794148277 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_max_inter_pkt_delay.3794148277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_in_transaction.204193268 |
| Short name | T1778 |
| Test name | |
| Test status | |
| Simulation time | 255942226 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=204193268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_in_transaction.204193268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_max_length_out_transaction.2140471548 |
| Short name | T1775 |
| Test name | |
| Test status | |
| Simulation time | 191574876 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2140471548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_max_length_out_transaction.2140471548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_min_inter_pkt_delay.3143161426 |
| Short name | T1941 |
| Test name | |
| Test status | |
| Simulation time | 1971172452 ps |
| CPU time | 48.46 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:48:29 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143161426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_min_inter_pkt_delay.3143161426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_in_transaction.3239567554 |
| Short name | T1776 |
| Test name | |
| Test status | |
| Simulation time | 170376899 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:42 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239567554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_in_transaction.3239567554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_min_length_out_transaction.1674735506 |
| Short name | T1777 |
| Test name | |
| Test status | |
| Simulation time | 231273429 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:47:39 AM UTC 24 |
| Finished | Aug 27 07:47:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674735506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_min_length_out_transaction.1674735506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_nak_trans.4096203565 |
| Short name | T159 |
| Test name | |
| Test status | |
| Simulation time | 199577540 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:47:41 AM UTC 24 |
| Finished | Aug 27 07:47:43 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4096203565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_nak_trans.4096203565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_out_iso.2326782538 |
| Short name | T1780 |
| Test name | |
| Test status | |
| Simulation time | 224654357 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:47:41 AM UTC 24 |
| Finished | Aug 27 07:47:44 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2326782538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_out_iso.2326782538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_out_stall.2222382583 |
| Short name | T1779 |
| Test name | |
| Test status | |
| Simulation time | 180629454 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:47:41 AM UTC 24 |
| Finished | Aug 27 07:47:43 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2222382583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_out_stall.2222382583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_out_trans_nak.2305695209 |
| Short name | T1781 |
| Test name | |
| Test status | |
| Simulation time | 161939082 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:47:41 AM UTC 24 |
| Finished | Aug 27 07:47:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2305695209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_out_trans_nak.2305695209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_pending_in_trans.2277572508 |
| Short name | T1784 |
| Test name | |
| Test status | |
| Simulation time | 158074090 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:47:44 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2277572508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 25.usbdev_pending_in_trans.2277572508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_pinflip.2185461397 |
| Short name | T1786 |
| Test name | |
| Test status | |
| Simulation time | 230628526 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:47:44 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185461397 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_pinflip.2185461397 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_phy_config_usb_ref_disable.3907547912 |
| Short name | T1785 |
| Test name | |
| Test status | |
| Simulation time | 151451327 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:47:44 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3907547912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 25.usbdev_phy_config_usb_ref_disable.3907547912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_phy_pins_sense.2639683610 |
| Short name | T1783 |
| Test name | |
| Test status | |
| Simulation time | 40615862 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:47:44 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2639683610 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_phy_pins_sense.2639683610 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_buffer.123341731 |
| Short name | T1982 |
| Test name | |
| Test status | |
| Simulation time | 18360105613 ps |
| CPU time | 54.16 seconds |
| Started | Aug 27 07:47:44 AM UTC 24 |
| Finished | Aug 27 07:48:40 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=123341731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 25.usbdev_pkt_buffer.123341731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_received.3048300837 |
| Short name | T1788 |
| Test name | |
| Test status | |
| Simulation time | 193416856 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3048300837 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 25.usbdev_pkt_received.3048300837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_pkt_sent.2485101453 |
| Short name | T1787 |
| Test name | |
| Test status | |
| Simulation time | 229787782 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2485101453 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_pkt_sent.2485101453 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_in_transaction.3134750055 |
| Short name | T1789 |
| Test name | |
| Test status | |
| Simulation time | 245028821 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134750055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 25.usbdev_random_length_in_transaction.3134750055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_random_length_out_transaction.3875586305 |
| Short name | T1790 |
| Test name | |
| Test status | |
| Simulation time | 217018275 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3875586305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 25.usbdev_random_length_out_transaction.3875586305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_rx_crc_err.1026777222 |
| Short name | T1792 |
| Test name | |
| Test status | |
| Simulation time | 200680116 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:48 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1026777222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_rx_crc_err.1026777222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_rx_full.3694081714 |
| Short name | T1793 |
| Test name | |
| Test status | |
| Simulation time | 403439470 ps |
| CPU time | 2.37 seconds |
| Started | Aug 27 07:47:45 AM UTC 24 |
| Finished | Aug 27 07:47:48 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3694081714 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 25.usbdev_rx_full.3694081714 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_setup_stage.403319833 |
| Short name | T1795 |
| Test name | |
| Test status | |
| Simulation time | 204119575 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:47:47 AM UTC 24 |
| Finished | Aug 27 07:47:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=403319833 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 25.usbdev_setup_stage.403319833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_setup_trans_ignored.2820480696 |
| Short name | T1796 |
| Test name | |
| Test status | |
| Simulation time | 143421122 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:47:47 AM UTC 24 |
| Finished | Aug 27 07:47:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2820480696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 25.usbdev_setup_trans_ignored.2820480696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_smoke.766883100 |
| Short name | T1807 |
| Test name | |
| Test status | |
| Simulation time | 218663495 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:52 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=766883100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_smoke.766883100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_spurious_pids_ignored.419393513 |
| Short name | T1882 |
| Test name | |
| Test status | |
| Simulation time | 2605908870 ps |
| CPU time | 23.48 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 230320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=419393513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 25.usbdev_spurious_pids_ignored.419393513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_stall_priority_over_nak.2614579091 |
| Short name | T1803 |
| Test name | |
| Test status | |
| Simulation time | 185388795 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2614579091 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stall_priority_over_nak.2614579091 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_stall_trans.1386890320 |
| Short name | T1806 |
| Test name | |
| Test status | |
| Simulation time | 186618458 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386890320 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 25.usbdev_stall_trans.1386890320 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_stream_len_max.2595269465 |
| Short name | T1810 |
| Test name | |
| Test status | |
| Simulation time | 403442796 ps |
| CPU time | 2.29 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:53 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595269465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_stream_len_max.2595269465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_streaming_out.226259322 |
| Short name | T2144 |
| Test name | |
| Test status | |
| Simulation time | 3797256772 ps |
| CPU time | 97.41 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:49:29 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226259322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 25.usbdev_streaming_out.226259322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_timeout_missing_host_handshake.2034570317 |
| Short name | T1794 |
| Test name | |
| Test status | |
| Simulation time | 1543076907 ps |
| CPU time | 14.63 seconds |
| Started | Aug 27 07:47:33 AM UTC 24 |
| Finished | Aug 27 07:47:49 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2034570317 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_timeout_missing_host_handshake.2034570317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/25.usbdev_tx_rx_disruption.3160756396 |
| Short name | T1811 |
| Test name | |
| Test status | |
| Simulation time | 501948539 ps |
| CPU time | 2.86 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:53 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3160756396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 25.usbdev_t x_rx_disruption.3160756396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/25.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/250.usbdev_tx_rx_disruption.1958051631 |
| Short name | T3379 |
| Test name | |
| Test status | |
| Simulation time | 541267708 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:20 AM UTC 24 |
| Finished | Aug 27 07:55:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1958051631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 250.usbdev_ tx_rx_disruption.1958051631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/250.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/251.usbdev_tx_rx_disruption.4167683157 |
| Short name | T3384 |
| Test name | |
| Test status | |
| Simulation time | 612391686 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:55:20 AM UTC 24 |
| Finished | Aug 27 07:55:23 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4167683157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 251.usbdev_ tx_rx_disruption.4167683157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/251.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/252.usbdev_tx_rx_disruption.1359967671 |
| Short name | T3387 |
| Test name | |
| Test status | |
| Simulation time | 480359114 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:29 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1359967671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 252.usbdev_ tx_rx_disruption.1359967671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/252.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/253.usbdev_tx_rx_disruption.21879840 |
| Short name | T3388 |
| Test name | |
| Test status | |
| Simulation time | 540228340 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:30 AM UTC 24 |
| Peak memory | 216952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=21879840 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 253.usbdev_tx _rx_disruption.21879840 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/253.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/254.usbdev_tx_rx_disruption.2998662128 |
| Short name | T3386 |
| Test name | |
| Test status | |
| Simulation time | 462846449 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:29 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2998662128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 254.usbdev_ tx_rx_disruption.2998662128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/254.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/255.usbdev_tx_rx_disruption.3102804921 |
| Short name | T3389 |
| Test name | |
| Test status | |
| Simulation time | 485963174 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:30 AM UTC 24 |
| Peak memory | 215816 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3102804921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 255.usbdev_ tx_rx_disruption.3102804921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/255.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/256.usbdev_tx_rx_disruption.3196657180 |
| Short name | T3390 |
| Test name | |
| Test status | |
| Simulation time | 570388930 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:30 AM UTC 24 |
| Peak memory | 215364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3196657180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 256.usbdev_ tx_rx_disruption.3196657180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/256.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/257.usbdev_tx_rx_disruption.82093846 |
| Short name | T3408 |
| Test name | |
| Test status | |
| Simulation time | 580311572 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=82093846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 257.usbdev_tx _rx_disruption.82093846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/257.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/258.usbdev_tx_rx_disruption.747115821 |
| Short name | T3409 |
| Test name | |
| Test status | |
| Simulation time | 571663572 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=747115821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 258.usbdev_t x_rx_disruption.747115821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/258.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/259.usbdev_tx_rx_disruption.3271328100 |
| Short name | T3395 |
| Test name | |
| Test status | |
| Simulation time | 625596777 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3271328100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 259.usbdev_ tx_rx_disruption.3271328100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/259.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_alert_test.477554119 |
| Short name | T1868 |
| Test name | |
| Test status | |
| Simulation time | 40607296 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=477554119 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_alert_test.477554119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_disconnect.3446184718 |
| Short name | T1834 |
| Test name | |
| Test status | |
| Simulation time | 5370142832 ps |
| CPU time | 8.34 seconds |
| Started | Aug 27 07:47:49 AM UTC 24 |
| Finished | Aug 27 07:47:59 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3446184718 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_disconnect.3446184718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_reset.1985654423 |
| Short name | T1895 |
| Test name | |
| Test status | |
| Simulation time | 19949836384 ps |
| CPU time | 23.91 seconds |
| Started | Aug 27 07:47:51 AM UTC 24 |
| Finished | Aug 27 07:48:17 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985654423 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_reset.1985654423 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_aon_wake_resume.852421440 |
| Short name | T1917 |
| Test name | |
| Test status | |
| Simulation time | 24242630411 ps |
| CPU time | 29.97 seconds |
| Started | Aug 27 07:47:51 AM UTC 24 |
| Finished | Aug 27 07:48:23 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=852421440 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_aon_wake_resume.852421440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_av_buffer.3392091490 |
| Short name | T1813 |
| Test name | |
| Test status | |
| Simulation time | 165550544 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:47:51 AM UTC 24 |
| Finished | Aug 27 07:47:54 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3392091490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_av_buffer.3392091490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_bitstuff_err.1682071272 |
| Short name | T1814 |
| Test name | |
| Test status | |
| Simulation time | 169003459 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:47:51 AM UTC 24 |
| Finished | Aug 27 07:47:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1682071272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_bitstuff_err.1682071272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_clear.3615304324 |
| Short name | T1817 |
| Test name | |
| Test status | |
| Simulation time | 393972104 ps |
| CPU time | 2.56 seconds |
| Started | Aug 27 07:47:52 AM UTC 24 |
| Finished | Aug 27 07:47:55 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3615304324 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 26.usbdev_data_toggle_clear.3615304324 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_data_toggle_restore.3920069560 |
| Short name | T1820 |
| Test name | |
| Test status | |
| Simulation time | 1056782743 ps |
| CPU time | 3.47 seconds |
| Started | Aug 27 07:47:52 AM UTC 24 |
| Finished | Aug 27 07:47:56 AM UTC 24 |
| Peak memory | 218152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920069560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_data_toggle_restore.3920069560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_device_address.2770098899 |
| Short name | T1932 |
| Test name | |
| Test status | |
| Simulation time | 18521832990 ps |
| CPU time | 33.56 seconds |
| Started | Aug 27 07:47:52 AM UTC 24 |
| Finished | Aug 27 07:48:27 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2770098899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_address.2770098899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_device_timeout.1371634743 |
| Short name | T1924 |
| Test name | |
| Test status | |
| Simulation time | 1511432237 ps |
| CPU time | 29.12 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:48:25 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371634743 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_device_timeout.1371634743 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_disable_endpoint.3686983857 |
| Short name | T1831 |
| Test name | |
| Test status | |
| Simulation time | 663771755 ps |
| CPU time | 3.02 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:58 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3686983857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 26.usbdev_disable_endpoint.3686983857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_disconnected.666417568 |
| Short name | T1824 |
| Test name | |
| Test status | |
| Simulation time | 191602227 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=666417568 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_disconnected.666417568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_enable.3739649141 |
| Short name | T1822 |
| Test name | |
| Test status | |
| Simulation time | 34347382 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739649141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 26.usbdev_enable.3739649141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_endpoint_access.1638613475 |
| Short name | T1829 |
| Test name | |
| Test status | |
| Simulation time | 794485151 ps |
| CPU time | 2.58 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:58 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1638613475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_endpoint_access.1638613475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_fifo_rst.3637009313 |
| Short name | T1830 |
| Test name | |
| Test status | |
| Simulation time | 199481911 ps |
| CPU time | 2.77 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:47:58 AM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3637009313 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_fifo_rst.3637009313 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_in_iso.1192976156 |
| Short name | T1826 |
| Test name | |
| Test status | |
| Simulation time | 251347648 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:47:55 AM UTC 24 |
| Finished | Aug 27 07:47:57 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192976156 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 26.usbdev_in_iso.1192976156 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_in_stall.3082701138 |
| Short name | T1825 |
| Test name | |
| Test status | |
| Simulation time | 158037801 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:47:55 AM UTC 24 |
| Finished | Aug 27 07:47:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3082701138 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_stall.3082701138 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_in_trans.2347546787 |
| Short name | T1833 |
| Test name | |
| Test status | |
| Simulation time | 202572893 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:47:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347546787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_in_trans.2347546787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_invalid_sync.3619113204 |
| Short name | T1920 |
| Test name | |
| Test status | |
| Simulation time | 3554082759 ps |
| CPU time | 33.6 seconds |
| Started | Aug 27 07:47:55 AM UTC 24 |
| Finished | Aug 27 07:48:29 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619113204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 26.usbdev_invalid_sync.3619113204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_iso_retraction.1220473921 |
| Short name | T2100 |
| Test name | |
| Test status | |
| Simulation time | 11507568662 ps |
| CPU time | 77.86 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:49:16 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1220473921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_iso_retraction.1220473921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_link_in_err.2956286308 |
| Short name | T1832 |
| Test name | |
| Test status | |
| Simulation time | 207758826 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:47:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2956286308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_link_in_err.2956286308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_link_resume.911129772 |
| Short name | T1866 |
| Test name | |
| Test status | |
| Simulation time | 6196753295 ps |
| CPU time | 9.03 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:48:07 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=911129772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_link_resume.911129772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_link_suspend.2856420883 |
| Short name | T1849 |
| Test name | |
| Test status | |
| Simulation time | 4879838451 ps |
| CPU time | 6.27 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:48:04 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856420883 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_link_suspend.2856420883 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_low_speed_traffic.2545411088 |
| Short name | T1921 |
| Test name | |
| Test status | |
| Simulation time | 3530196593 ps |
| CPU time | 31.53 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 235140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545411088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_low_speed_traffic.2545411088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_max_inter_pkt_delay.2274582935 |
| Short name | T1891 |
| Test name | |
| Test status | |
| Simulation time | 2658588013 ps |
| CPU time | 18.14 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 235112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2274582935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_max_inter_pkt_delay.2274582935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_in_transaction.2555507523 |
| Short name | T1835 |
| Test name | |
| Test status | |
| Simulation time | 260136794 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:47:57 AM UTC 24 |
| Finished | Aug 27 07:47:59 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2555507523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_max_length_in_transaction.2555507523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_max_length_out_transaction.992878056 |
| Short name | T1841 |
| Test name | |
| Test status | |
| Simulation time | 228977017 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=992878056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 26.usbdev_max_length_out_transaction.992878056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_min_inter_pkt_delay.3155684447 |
| Short name | T2179 |
| Test name | |
| Test status | |
| Simulation time | 3988592342 ps |
| CPU time | 97.58 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:49:39 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3155684447 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_min_inter_pkt_delay.3155684447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_in_transaction.3911938987 |
| Short name | T1840 |
| Test name | |
| Test status | |
| Simulation time | 183520656 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3911938987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_in_transaction.3911938987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_min_length_out_transaction.2605639492 |
| Short name | T1839 |
| Test name | |
| Test status | |
| Simulation time | 147271339 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605639492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_min_length_out_transaction.2605639492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_nak_trans.1463900082 |
| Short name | T135 |
| Test name | |
| Test status | |
| Simulation time | 174543026 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1463900082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_nak_trans.1463900082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_out_iso.2016635649 |
| Short name | T1842 |
| Test name | |
| Test status | |
| Simulation time | 169392374 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016635649 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_out_iso.2016635649 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_out_stall.534010788 |
| Short name | T1844 |
| Test name | |
| Test status | |
| Simulation time | 166151642 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=534010788 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 26.usbdev_out_stall.534010788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_out_trans_nak.909611311 |
| Short name | T1843 |
| Test name | |
| Test status | |
| Simulation time | 157603017 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909611311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_out_trans_nak.909611311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_pending_in_trans.766008340 |
| Short name | T1845 |
| Test name | |
| Test status | |
| Simulation time | 156196593 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=766008340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_pending_in_trans.766008340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_pinflip.1903725892 |
| Short name | T1847 |
| Test name | |
| Test status | |
| Simulation time | 293402263 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:47:59 AM UTC 24 |
| Finished | Aug 27 07:48:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1903725892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_pinflip.1903725892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_phy_config_usb_ref_disable.1471983173 |
| Short name | T1853 |
| Test name | |
| Test status | |
| Simulation time | 137867406 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1471983173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 26.usbdev_phy_config_usb_ref_disable.1471983173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_phy_pins_sense.1500852261 |
| Short name | T1852 |
| Test name | |
| Test status | |
| Simulation time | 37646006 ps |
| CPU time | 0.71 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1500852261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_phy_pins_sense.1500852261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_buffer.1803200107 |
| Short name | T2072 |
| Test name | |
| Test status | |
| Simulation time | 22445544501 ps |
| CPU time | 58.93 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:49:04 AM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1803200107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_pkt_buffer.1803200107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_received.1059079507 |
| Short name | T1860 |
| Test name | |
| Test status | |
| Simulation time | 180797653 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1059079507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 26.usbdev_pkt_received.1059079507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_pkt_sent.936863557 |
| Short name | T1855 |
| Test name | |
| Test status | |
| Simulation time | 245121467 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=936863557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 26.usbdev_pkt_sent.936863557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_in_transaction.3476792969 |
| Short name | T1863 |
| Test name | |
| Test status | |
| Simulation time | 306515294 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476792969 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_random_length_in_transaction.3476792969 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_random_length_out_transaction.237715664 |
| Short name | T1857 |
| Test name | |
| Test status | |
| Simulation time | 149824978 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237715664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 26.usbdev_random_length_out_transaction.237715664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_rx_crc_err.3015505498 |
| Short name | T1864 |
| Test name | |
| Test status | |
| Simulation time | 169949863 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:48:03 AM UTC 24 |
| Finished | Aug 27 07:48:07 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015505498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 26.usbdev_rx_crc_err.3015505498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_setup_stage.4074257702 |
| Short name | T1854 |
| Test name | |
| Test status | |
| Simulation time | 217388576 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074257702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_setup_stage.4074257702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_setup_trans_ignored.3961734887 |
| Short name | T1858 |
| Test name | |
| Test status | |
| Simulation time | 159254642 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 215944 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3961734887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 26.usbdev_setup_trans_ignored.3961734887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_smoke.3094397863 |
| Short name | T1859 |
| Test name | |
| Test status | |
| Simulation time | 238727188 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3094397863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_smoke.3094397863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_stall_priority_over_nak.2801037798 |
| Short name | T1861 |
| Test name | |
| Test status | |
| Simulation time | 185589595 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801037798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_stall_priority_over_nak.2801037798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_stall_trans.3802475798 |
| Short name | T1862 |
| Test name | |
| Test status | |
| Simulation time | 161996904 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:06 AM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3802475798 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 26.usbdev_stall_trans.3802475798 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_stream_len_max.349791760 |
| Short name | T1865 |
| Test name | |
| Test status | |
| Simulation time | 610889486 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=349791760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 26.usbdev_stream_len_max.349791760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_streaming_out.1114009169 |
| Short name | T1948 |
| Test name | |
| Test status | |
| Simulation time | 2718985192 ps |
| CPU time | 25.37 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1114009169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 26.usbdev_streaming_out.1114009169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_timeout_missing_host_handshake.2212510491 |
| Short name | T1837 |
| Test name | |
| Test status | |
| Simulation time | 677122911 ps |
| CPU time | 4.82 seconds |
| Started | Aug 27 07:47:54 AM UTC 24 |
| Finished | Aug 27 07:48:00 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2212510491 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_timeout_missing_host_handshake.2212510491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/26.usbdev_tx_rx_disruption.2433097292 |
| Short name | T1867 |
| Test name | |
| Test status | |
| Simulation time | 598173312 ps |
| CPU time | 2.08 seconds |
| Started | Aug 27 07:48:04 AM UTC 24 |
| Finished | Aug 27 07:48:07 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2433097292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 26.usbdev_t x_rx_disruption.2433097292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/26.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/260.usbdev_tx_rx_disruption.3835110600 |
| Short name | T3391 |
| Test name | |
| Test status | |
| Simulation time | 634830485 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:30 AM UTC 24 |
| Peak memory | 215468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3835110600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 260.usbdev_ tx_rx_disruption.3835110600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/260.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/261.usbdev_tx_rx_disruption.2601447895 |
| Short name | T3406 |
| Test name | |
| Test status | |
| Simulation time | 554458201 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2601447895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 261.usbdev_ tx_rx_disruption.2601447895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/261.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/262.usbdev_tx_rx_disruption.1437413964 |
| Short name | T3393 |
| Test name | |
| Test status | |
| Simulation time | 495363184 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1437413964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 262.usbdev_ tx_rx_disruption.1437413964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/262.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/263.usbdev_tx_rx_disruption.4145104328 |
| Short name | T3398 |
| Test name | |
| Test status | |
| Simulation time | 620822532 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4145104328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 263.usbdev_ tx_rx_disruption.4145104328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/263.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/264.usbdev_tx_rx_disruption.1650781801 |
| Short name | T3400 |
| Test name | |
| Test status | |
| Simulation time | 601945577 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1650781801 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 264.usbdev_ tx_rx_disruption.1650781801 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/264.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/265.usbdev_tx_rx_disruption.2427094427 |
| Short name | T3394 |
| Test name | |
| Test status | |
| Simulation time | 538652578 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2427094427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 265.usbdev_ tx_rx_disruption.2427094427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/265.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/266.usbdev_tx_rx_disruption.91620318 |
| Short name | T3401 |
| Test name | |
| Test status | |
| Simulation time | 619276470 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=91620318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 266.usbdev_tx _rx_disruption.91620318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/266.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/267.usbdev_tx_rx_disruption.2089942353 |
| Short name | T3396 |
| Test name | |
| Test status | |
| Simulation time | 472279330 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2089942353 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 267.usbdev_ tx_rx_disruption.2089942353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/267.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/268.usbdev_tx_rx_disruption.2176075575 |
| Short name | T3397 |
| Test name | |
| Test status | |
| Simulation time | 502462676 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2176075575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 268.usbdev_ tx_rx_disruption.2176075575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/268.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/269.usbdev_tx_rx_disruption.1303153298 |
| Short name | T3392 |
| Test name | |
| Test status | |
| Simulation time | 589719892 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:30 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1303153298 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 269.usbdev_ tx_rx_disruption.1303153298 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/269.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_alert_test.2014860379 |
| Short name | T1922 |
| Test name | |
| Test status | |
| Simulation time | 32630124 ps |
| CPU time | 0.81 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014860379 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 27.usbdev_alert_test.2014860379 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_disconnect.3487366568 |
| Short name | T1889 |
| Test name | |
| Test status | |
| Simulation time | 4825511665 ps |
| CPU time | 8.32 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:15 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3487366568 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_disconnect.3487366568 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_reset.3807803398 |
| Short name | T1926 |
| Test name | |
| Test status | |
| Simulation time | 13797993993 ps |
| CPU time | 17.9 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:25 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3807803398 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_reset.3807803398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_aon_wake_resume.3351982639 |
| Short name | T1981 |
| Test name | |
| Test status | |
| Simulation time | 25270654093 ps |
| CPU time | 33.19 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:40 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351982639 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_aon_wake_resume.3351982639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_av_buffer.2051565288 |
| Short name | T1869 |
| Test name | |
| Test status | |
| Simulation time | 216746931 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:08 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2051565288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_av_buffer.2051565288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_bitstuff_err.3517667678 |
| Short name | T1870 |
| Test name | |
| Test status | |
| Simulation time | 148283231 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517667678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_bitstuff_err.3517667678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_data_toggle_clear.4152823246 |
| Short name | T1871 |
| Test name | |
| Test status | |
| Simulation time | 460813833 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:48:06 AM UTC 24 |
| Finished | Aug 27 07:48:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4152823246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 27.usbdev_data_toggle_clear.4152823246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_device_address.993927973 |
| Short name | T2034 |
| Test name | |
| Test status | |
| Simulation time | 25896890110 ps |
| CPU time | 42.1 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:53 AM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=993927973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 27.usbdev_device_address.993927973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_device_timeout.3152952661 |
| Short name | T1916 |
| Test name | |
| Test status | |
| Simulation time | 601625445 ps |
| CPU time | 11.57 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:22 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3152952661 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_device_timeout.3152952661 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_disable_endpoint.1799852934 |
| Short name | T1881 |
| Test name | |
| Test status | |
| Simulation time | 585741587 ps |
| CPU time | 2.74 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:13 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799852934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_disable_endpoint.1799852934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_disconnected.2109342444 |
| Short name | T1875 |
| Test name | |
| Test status | |
| Simulation time | 183397371 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2109342444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_disconnected.2109342444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_enable.1012856105 |
| Short name | T1874 |
| Test name | |
| Test status | |
| Simulation time | 30468895 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1012856105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_enable.1012856105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_access.2726104680 |
| Short name | T1883 |
| Test name | |
| Test status | |
| Simulation time | 875609209 ps |
| CPU time | 3.53 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726104680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_access.2726104680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_endpoint_types.3547901463 |
| Short name | T1877 |
| Test name | |
| Test status | |
| Simulation time | 268950173 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547901463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_endpoint_types.3547901463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_fifo_rst.3108114288 |
| Short name | T1885 |
| Test name | |
| Test status | |
| Simulation time | 372693086 ps |
| CPU time | 3.58 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108114288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_fifo_rst.3108114288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_in_iso.3746834357 |
| Short name | T1876 |
| Test name | |
| Test status | |
| Simulation time | 174324416 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 226356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746834357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_in_iso.3746834357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_in_stall.4223958996 |
| Short name | T1878 |
| Test name | |
| Test status | |
| Simulation time | 143465551 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4223958996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_stall.4223958996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_in_trans.3735111756 |
| Short name | T1880 |
| Test name | |
| Test status | |
| Simulation time | 293044927 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3735111756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 27.usbdev_in_trans.3735111756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_invalid_sync.1933957507 |
| Short name | T1972 |
| Test name | |
| Test status | |
| Simulation time | 2989322755 ps |
| CPU time | 26.23 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:37 AM UTC 24 |
| Peak memory | 230508 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1933957507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 27.usbdev_invalid_sync.1933957507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_iso_retraction.1386217267 |
| Short name | T2022 |
| Test name | |
| Test status | |
| Simulation time | 3741823206 ps |
| CPU time | 38.26 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386217267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_iso_retraction.1386217267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_link_in_err.2231302449 |
| Short name | T1879 |
| Test name | |
| Test status | |
| Simulation time | 224860405 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2231302449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_in_err.2231302449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_link_resume.3817839690 |
| Short name | T2095 |
| Test name | |
| Test status | |
| Simulation time | 28630476907 ps |
| CPU time | 63.01 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:49:14 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3817839690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_link_resume.3817839690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_link_suspend.1433919874 |
| Short name | T1919 |
| Test name | |
| Test status | |
| Simulation time | 10534963387 ps |
| CPU time | 12.61 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:24 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1433919874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_link_suspend.1433919874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_low_speed_traffic.2223236682 |
| Short name | T2014 |
| Test name | |
| Test status | |
| Simulation time | 4600190799 ps |
| CPU time | 34.48 seconds |
| Started | Aug 27 07:48:11 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2223236682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_low_speed_traffic.2223236682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_max_inter_pkt_delay.517118271 |
| Short name | T1968 |
| Test name | |
| Test status | |
| Simulation time | 2502043647 ps |
| CPU time | 23.95 seconds |
| Started | Aug 27 07:48:11 AM UTC 24 |
| Finished | Aug 27 07:48:37 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=517118271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_max_inter_pkt_delay.517118271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_in_transaction.735950191 |
| Short name | T1886 |
| Test name | |
| Test status | |
| Simulation time | 248235719 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:48:12 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=735950191 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_in_transaction.735950191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_max_length_out_transaction.2899881286 |
| Short name | T1894 |
| Test name | |
| Test status | |
| Simulation time | 194228148 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899881286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_max_length_out_transaction.2899881286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_min_inter_pkt_delay.2458872115 |
| Short name | T1980 |
| Test name | |
| Test status | |
| Simulation time | 3506704610 ps |
| CPU time | 24.35 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:40 AM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2458872115 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_min_inter_pkt_delay.2458872115 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_in_transaction.2650371565 |
| Short name | T1892 |
| Test name | |
| Test status | |
| Simulation time | 155414590 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650371565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_in_transaction.2650371565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_min_length_out_transaction.3318459247 |
| Short name | T1890 |
| Test name | |
| Test status | |
| Simulation time | 146502951 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3318459247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_min_length_out_transaction.3318459247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_nak_trans.1262790678 |
| Short name | T143 |
| Test name | |
| Test status | |
| Simulation time | 192681010 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262790678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_nak_trans.1262790678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_out_iso.459291645 |
| Short name | T1893 |
| Test name | |
| Test status | |
| Simulation time | 196643493 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=459291645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 27.usbdev_out_iso.459291645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_out_stall.1343251839 |
| Short name | T1896 |
| Test name | |
| Test status | |
| Simulation time | 178954359 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:48:14 AM UTC 24 |
| Finished | Aug 27 07:48:17 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1343251839 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_out_stall.1343251839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_out_trans_nak.351781876 |
| Short name | T1898 |
| Test name | |
| Test status | |
| Simulation time | 154993261 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=351781876 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_out_trans_nak.351781876 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_pending_in_trans.4242830384 |
| Short name | T1899 |
| Test name | |
| Test status | |
| Simulation time | 154406304 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242830384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 27.usbdev_pending_in_trans.4242830384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_pinflip.3871697392 |
| Short name | T1906 |
| Test name | |
| Test status | |
| Simulation time | 231123302 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3871697392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_pinflip.3871697392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_phy_config_usb_ref_disable.2848331825 |
| Short name | T1904 |
| Test name | |
| Test status | |
| Simulation time | 146127987 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848331825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 27.usbdev_phy_config_usb_ref_disable.2848331825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_phy_pins_sense.4212597194 |
| Short name | T1900 |
| Test name | |
| Test status | |
| Simulation time | 37734662 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4212597194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_phy_pins_sense.4212597194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_buffer.1675939173 |
| Short name | T1967 |
| Test name | |
| Test status | |
| Simulation time | 6269594804 ps |
| CPU time | 17.62 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1675939173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_pkt_buffer.1675939173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_received.2970798572 |
| Short name | T1907 |
| Test name | |
| Test status | |
| Simulation time | 164456876 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2970798572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_pkt_received.2970798572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_pkt_sent.779528500 |
| Short name | T1908 |
| Test name | |
| Test status | |
| Simulation time | 235732350 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=779528500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_pkt_sent.779528500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_in_transaction.805429703 |
| Short name | T1905 |
| Test name | |
| Test status | |
| Simulation time | 201089178 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=805429703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 27.usbdev_random_length_in_transaction.805429703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_random_length_out_transaction.4102459345 |
| Short name | T1902 |
| Test name | |
| Test status | |
| Simulation time | 150361446 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4102459345 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 27.usbdev_random_length_out_transaction.4102459345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_rx_crc_err.2049862076 |
| Short name | T1901 |
| Test name | |
| Test status | |
| Simulation time | 186178395 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2049862076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 27.usbdev_rx_crc_err.2049862076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_rx_full.3140010956 |
| Short name | T1909 |
| Test name | |
| Test status | |
| Simulation time | 355157864 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:48:17 AM UTC 24 |
| Finished | Aug 27 07:48:20 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3140010956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 27.usbdev_rx_full.3140010956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_setup_stage.3377605100 |
| Short name | T1914 |
| Test name | |
| Test status | |
| Simulation time | 169687698 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377605100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_setup_stage.3377605100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_setup_trans_ignored.3209333064 |
| Short name | T1910 |
| Test name | |
| Test status | |
| Simulation time | 149439878 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:21 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3209333064 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 27.usbdev_setup_trans_ignored.3209333064 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_smoke.605382811 |
| Short name | T1912 |
| Test name | |
| Test status | |
| Simulation time | 234080304 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:21 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605382811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_smoke.605382811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_spurious_pids_ignored.1514493374 |
| Short name | T2015 |
| Test name | |
| Test status | |
| Simulation time | 3021264569 ps |
| CPU time | 27.49 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:48 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1514493374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 27.usbdev_spurious_pids_ignored.1514493374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_stall_priority_over_nak.2541566307 |
| Short name | T1915 |
| Test name | |
| Test status | |
| Simulation time | 175467747 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541566307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stall_priority_over_nak.2541566307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_stall_trans.3394917384 |
| Short name | T1913 |
| Test name | |
| Test status | |
| Simulation time | 192170218 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394917384 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 27.usbdev_stall_trans.3394917384 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_stream_len_max.2135354378 |
| Short name | T1918 |
| Test name | |
| Test status | |
| Simulation time | 799947649 ps |
| CPU time | 2.93 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:24 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2135354378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_stream_len_max.2135354378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_streaming_out.3365099425 |
| Short name | T1969 |
| Test name | |
| Test status | |
| Simulation time | 2372089273 ps |
| CPU time | 16.23 seconds |
| Started | Aug 27 07:48:19 AM UTC 24 |
| Finished | Aug 27 07:48:37 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365099425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 27.usbdev_streaming_out.3365099425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_timeout_missing_host_handshake.2063273996 |
| Short name | T1887 |
| Test name | |
| Test status | |
| Simulation time | 362197133 ps |
| CPU time | 4.2 seconds |
| Started | Aug 27 07:48:09 AM UTC 24 |
| Finished | Aug 27 07:48:14 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063273996 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_timeout_missing_host_handshake.2063273996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/27.usbdev_tx_rx_disruption.3223356669 |
| Short name | T1927 |
| Test name | |
| Test status | |
| Simulation time | 454414969 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3223356669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 27.usbdev_t x_rx_disruption.3223356669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/27.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/270.usbdev_tx_rx_disruption.415033787 |
| Short name | T3399 |
| Test name | |
| Test status | |
| Simulation time | 448122336 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=415033787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 270.usbdev_t x_rx_disruption.415033787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/270.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/271.usbdev_tx_rx_disruption.3317582219 |
| Short name | T3403 |
| Test name | |
| Test status | |
| Simulation time | 491150309 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3317582219 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 271.usbdev_ tx_rx_disruption.3317582219 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/271.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/272.usbdev_tx_rx_disruption.2133647592 |
| Short name | T3414 |
| Test name | |
| Test status | |
| Simulation time | 545740409 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2133647592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 272.usbdev_ tx_rx_disruption.2133647592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/272.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/273.usbdev_tx_rx_disruption.2356128394 |
| Short name | T3416 |
| Test name | |
| Test status | |
| Simulation time | 630743661 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2356128394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 273.usbdev_ tx_rx_disruption.2356128394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/273.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/274.usbdev_tx_rx_disruption.546163814 |
| Short name | T3426 |
| Test name | |
| Test status | |
| Simulation time | 560718844 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=546163814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 274.usbdev_t x_rx_disruption.546163814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/274.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/275.usbdev_tx_rx_disruption.2995364045 |
| Short name | T3402 |
| Test name | |
| Test status | |
| Simulation time | 491920125 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:31 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2995364045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 275.usbdev_ tx_rx_disruption.2995364045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/275.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/276.usbdev_tx_rx_disruption.2858694536 |
| Short name | T3423 |
| Test name | |
| Test status | |
| Simulation time | 567925698 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2858694536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 276.usbdev_ tx_rx_disruption.2858694536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/276.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/277.usbdev_tx_rx_disruption.3637775233 |
| Short name | T3421 |
| Test name | |
| Test status | |
| Simulation time | 569581615 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3637775233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 277.usbdev_ tx_rx_disruption.3637775233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/277.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/278.usbdev_tx_rx_disruption.1563146306 |
| Short name | T3422 |
| Test name | |
| Test status | |
| Simulation time | 418416575 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1563146306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 278.usbdev_ tx_rx_disruption.1563146306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/278.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/279.usbdev_tx_rx_disruption.3334228967 |
| Short name | T3424 |
| Test name | |
| Test status | |
| Simulation time | 563185506 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3334228967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 279.usbdev_ tx_rx_disruption.3334228967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/279.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_alert_test.440657671 |
| Short name | T1973 |
| Test name | |
| Test status | |
| Simulation time | 43132645 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:48:35 AM UTC 24 |
| Finished | Aug 27 07:48:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=440657671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_alert_test.440657671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_disconnect.1462510152 |
| Short name | T1976 |
| Test name | |
| Test status | |
| Simulation time | 11291594592 ps |
| CPU time | 14.95 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:38 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462510152 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_disconnect.1462510152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_reset.2005166554 |
| Short name | T2001 |
| Test name | |
| Test status | |
| Simulation time | 19093479566 ps |
| CPU time | 22.76 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:46 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2005166554 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_reset.2005166554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_aon_wake_resume.2833884206 |
| Short name | T2061 |
| Test name | |
| Test status | |
| Simulation time | 30175280048 ps |
| CPU time | 36.76 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:49:01 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833884206 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_aon_wake_resume.2833884206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_av_buffer.2790882855 |
| Short name | T1925 |
| Test name | |
| Test status | |
| Simulation time | 146234595 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2790882855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_av_buffer.2790882855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_bitstuff_err.4254414444 |
| Short name | T1923 |
| Test name | |
| Test status | |
| Simulation time | 153110083 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4254414444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_bitstuff_err.4254414444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_clear.3559500716 |
| Short name | T1930 |
| Test name | |
| Test status | |
| Simulation time | 556414601 ps |
| CPU time | 2.19 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:26 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3559500716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 28.usbdev_data_toggle_clear.3559500716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_data_toggle_restore.1723238020 |
| Short name | T1931 |
| Test name | |
| Test status | |
| Simulation time | 864428189 ps |
| CPU time | 2.41 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:48:26 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1723238020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_data_toggle_restore.1723238020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_device_address.4158629036 |
| Short name | T2134 |
| Test name | |
| Test status | |
| Simulation time | 32398266755 ps |
| CPU time | 60.88 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:49:25 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158629036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_address.4158629036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_device_timeout.3239706196 |
| Short name | T2085 |
| Test name | |
| Test status | |
| Simulation time | 5687354459 ps |
| CPU time | 44.7 seconds |
| Started | Aug 27 07:48:22 AM UTC 24 |
| Finished | Aug 27 07:49:09 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3239706196 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_device_timeout.3239706196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_disable_endpoint.232990517 |
| Short name | T1929 |
| Test name | |
| Test status | |
| Simulation time | 870832594 ps |
| CPU time | 2 seconds |
| Started | Aug 27 07:48:23 AM UTC 24 |
| Finished | Aug 27 07:48:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=232990517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_disable_endpoint.232990517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_disconnected.1557125709 |
| Short name | T1928 |
| Test name | |
| Test status | |
| Simulation time | 140630330 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:48:23 AM UTC 24 |
| Finished | Aug 27 07:48:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1557125709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_disconnected.1557125709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_enable.1772098988 |
| Short name | T1933 |
| Test name | |
| Test status | |
| Simulation time | 47500583 ps |
| CPU time | 0.85 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772098988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 28.usbdev_enable.1772098988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_access.4176397832 |
| Short name | T1942 |
| Test name | |
| Test status | |
| Simulation time | 797348049 ps |
| CPU time | 3.56 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4176397832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_access.4176397832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_endpoint_types.3926786483 |
| Short name | T353 |
| Test name | |
| Test status | |
| Simulation time | 743609200 ps |
| CPU time | 2.21 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926786483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_endpoint_types.3926786483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_fifo_rst.1826569493 |
| Short name | T1940 |
| Test name | |
| Test status | |
| Simulation time | 265263629 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1826569493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_fifo_rst.1826569493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_in_iso.1652006996 |
| Short name | T1937 |
| Test name | |
| Test status | |
| Simulation time | 189117777 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1652006996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 28.usbdev_in_iso.1652006996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_in_stall.2254568406 |
| Short name | T1935 |
| Test name | |
| Test status | |
| Simulation time | 145209217 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254568406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_stall.2254568406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_in_trans.1205444042 |
| Short name | T1936 |
| Test name | |
| Test status | |
| Simulation time | 219436409 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1205444042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 28.usbdev_in_trans.1205444042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_invalid_sync.2912663491 |
| Short name | T2284 |
| Test name | |
| Test status | |
| Simulation time | 4262568077 ps |
| CPU time | 104.08 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:50:11 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2912663491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 28.usbdev_invalid_sync.2912663491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_iso_retraction.1852364280 |
| Short name | T2282 |
| Test name | |
| Test status | |
| Simulation time | 9708552906 ps |
| CPU time | 103.3 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:50:11 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852364280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_iso_retraction.1852364280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_link_in_err.2604117913 |
| Short name | T1939 |
| Test name | |
| Test status | |
| Simulation time | 257419046 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:48:25 AM UTC 24 |
| Finished | Aug 27 07:48:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2604117913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_in_err.2604117913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_link_resume.1485946907 |
| Short name | T1977 |
| Test name | |
| Test status | |
| Simulation time | 6187021836 ps |
| CPU time | 10.14 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:48:39 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1485946907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_link_resume.1485946907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_link_suspend.4238279018 |
| Short name | T1988 |
| Test name | |
| Test status | |
| Simulation time | 9266897742 ps |
| CPU time | 12.2 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:48:41 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238279018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_link_suspend.4238279018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_low_speed_traffic.3909213344 |
| Short name | T2088 |
| Test name | |
| Test status | |
| Simulation time | 4046460632 ps |
| CPU time | 41.23 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:49:10 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3909213344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_low_speed_traffic.3909213344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_max_inter_pkt_delay.1195748892 |
| Short name | T2046 |
| Test name | |
| Test status | |
| Simulation time | 3011861766 ps |
| CPU time | 28.03 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:48:57 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195748892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_max_inter_pkt_delay.1195748892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_in_transaction.3132921368 |
| Short name | T1945 |
| Test name | |
| Test status | |
| Simulation time | 238495803 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3132921368 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_in_transaction.3132921368 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_max_length_out_transaction.1515439132 |
| Short name | T1943 |
| Test name | |
| Test status | |
| Simulation time | 228734479 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515439132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_max_length_out_transaction.1515439132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_min_inter_pkt_delay.3600905623 |
| Short name | T2142 |
| Test name | |
| Test status | |
| Simulation time | 2301874730 ps |
| CPU time | 58.98 seconds |
| Started | Aug 27 07:48:27 AM UTC 24 |
| Finished | Aug 27 07:49:28 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3600905623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_min_inter_pkt_delay.3600905623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_in_transaction.3264785792 |
| Short name | T1947 |
| Test name | |
| Test status | |
| Simulation time | 197057620 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:48:28 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264785792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_in_transaction.3264785792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_min_length_out_transaction.1767918596 |
| Short name | T1946 |
| Test name | |
| Test status | |
| Simulation time | 178039695 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:48:28 AM UTC 24 |
| Finished | Aug 27 07:48:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767918596 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_min_length_out_transaction.1767918596 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_nak_trans.1696411288 |
| Short name | T153 |
| Test name | |
| Test status | |
| Simulation time | 222978077 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1696411288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_nak_trans.1696411288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_out_iso.1517203806 |
| Short name | T1953 |
| Test name | |
| Test status | |
| Simulation time | 216984245 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517203806 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_out_iso.1517203806 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_out_stall.1942944016 |
| Short name | T1951 |
| Test name | |
| Test status | |
| Simulation time | 186164204 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942944016 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_out_stall.1942944016 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_out_trans_nak.4150856395 |
| Short name | T1954 |
| Test name | |
| Test status | |
| Simulation time | 187668560 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150856395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_out_trans_nak.4150856395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_pending_in_trans.1819170931 |
| Short name | T1950 |
| Test name | |
| Test status | |
| Simulation time | 164147271 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1819170931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 28.usbdev_pending_in_trans.1819170931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_pinflip.606450334 |
| Short name | T1955 |
| Test name | |
| Test status | |
| Simulation time | 247219935 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=606450334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_pinflip.606450334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_phy_config_usb_ref_disable.2467268166 |
| Short name | T1952 |
| Test name | |
| Test status | |
| Simulation time | 149377793 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:33 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2467268166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 28.usbdev_phy_config_usb_ref_disable.2467268166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_phy_pins_sense.653791987 |
| Short name | T1949 |
| Test name | |
| Test status | |
| Simulation time | 32121920 ps |
| CPU time | 0.77 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:48:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=653791987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_phy_pins_sense.653791987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_buffer.359115037 |
| Short name | T2104 |
| Test name | |
| Test status | |
| Simulation time | 17213467861 ps |
| CPU time | 45.37 seconds |
| Started | Aug 27 07:48:30 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 235164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=359115037 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_pkt_buffer.359115037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_received.3610697869 |
| Short name | T1958 |
| Test name | |
| Test status | |
| Simulation time | 228753747 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3610697869 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 28.usbdev_pkt_received.3610697869 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_pkt_sent.276003015 |
| Short name | T1966 |
| Test name | |
| Test status | |
| Simulation time | 256946857 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=276003015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 28.usbdev_pkt_sent.276003015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_in_transaction.2058285643 |
| Short name | T1960 |
| Test name | |
| Test status | |
| Simulation time | 232441312 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2058285643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 28.usbdev_random_length_in_transaction.2058285643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_random_length_out_transaction.1626058626 |
| Short name | T1959 |
| Test name | |
| Test status | |
| Simulation time | 190574750 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626058626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 28.usbdev_random_length_out_transaction.1626058626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_rx_crc_err.1303873287 |
| Short name | T1961 |
| Test name | |
| Test status | |
| Simulation time | 175368357 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303873287 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 28.usbdev_rx_crc_err.1303873287 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_rx_full.40309400 |
| Short name | T1963 |
| Test name | |
| Test status | |
| Simulation time | 256379915 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40309400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_rx_full.40309400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_setup_stage.2524779479 |
| Short name | T1962 |
| Test name | |
| Test status | |
| Simulation time | 149946372 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2524779479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_setup_stage.2524779479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_setup_trans_ignored.4111070862 |
| Short name | T1956 |
| Test name | |
| Test status | |
| Simulation time | 147032946 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:35 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4111070862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 28.usbdev_setup_trans_ignored.4111070862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_smoke.3447908977 |
| Short name | T1965 |
| Test name | |
| Test status | |
| Simulation time | 229632121 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3447908977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_smoke.3447908977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_spurious_pids_ignored.607222967 |
| Short name | T2208 |
| Test name | |
| Test status | |
| Simulation time | 2774564961 ps |
| CPU time | 72.29 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:49:48 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607222967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 28.usbdev_spurious_pids_ignored.607222967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_stall_priority_over_nak.14634598 |
| Short name | T1964 |
| Test name | |
| Test status | |
| Simulation time | 176217535 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=14634598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 28.usbdev_stall_priority_over_nak.14634598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_stall_trans.2634052885 |
| Short name | T1957 |
| Test name | |
| Test status | |
| Simulation time | 162918317 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:48:33 AM UTC 24 |
| Finished | Aug 27 07:48:36 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2634052885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 28.usbdev_stall_trans.2634052885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_stream_len_max.3618730271 |
| Short name | T1978 |
| Test name | |
| Test status | |
| Simulation time | 700217002 ps |
| CPU time | 2.49 seconds |
| Started | Aug 27 07:48:35 AM UTC 24 |
| Finished | Aug 27 07:48:39 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3618730271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_stream_len_max.3618730271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_streaming_out.1303774220 |
| Short name | T2029 |
| Test name | |
| Test status | |
| Simulation time | 3805295299 ps |
| CPU time | 35.07 seconds |
| Started | Aug 27 07:48:35 AM UTC 24 |
| Finished | Aug 27 07:49:12 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1303774220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 28.usbdev_streaming_out.1303774220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_timeout_missing_host_handshake.1851427605 |
| Short name | T1999 |
| Test name | |
| Test status | |
| Simulation time | 1037978125 ps |
| CPU time | 20.28 seconds |
| Started | Aug 27 07:48:23 AM UTC 24 |
| Finished | Aug 27 07:48:44 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851427605 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_timeout_missing_host_handshake.1851427605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/28.usbdev_tx_rx_disruption.2577661036 |
| Short name | T1975 |
| Test name | |
| Test status | |
| Simulation time | 494980227 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:48:35 AM UTC 24 |
| Finished | Aug 27 07:48:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2577661036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 28.usbdev_t x_rx_disruption.2577661036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/28.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/280.usbdev_tx_rx_disruption.3822982866 |
| Short name | T3433 |
| Test name | |
| Test status | |
| Simulation time | 492432029 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3822982866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 280.usbdev_ tx_rx_disruption.3822982866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/280.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/281.usbdev_tx_rx_disruption.2155035673 |
| Short name | T3444 |
| Test name | |
| Test status | |
| Simulation time | 642095103 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2155035673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 281.usbdev_ tx_rx_disruption.2155035673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/281.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/282.usbdev_tx_rx_disruption.3000732964 |
| Short name | T3449 |
| Test name | |
| Test status | |
| Simulation time | 600906641 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3000732964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 282.usbdev_ tx_rx_disruption.3000732964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/282.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/283.usbdev_tx_rx_disruption.1503239685 |
| Short name | T3425 |
| Test name | |
| Test status | |
| Simulation time | 497147378 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1503239685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 283.usbdev_ tx_rx_disruption.1503239685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/283.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/284.usbdev_tx_rx_disruption.3264789670 |
| Short name | T3431 |
| Test name | |
| Test status | |
| Simulation time | 529703027 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:55:27 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3264789670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 284.usbdev_ tx_rx_disruption.3264789670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/284.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/285.usbdev_tx_rx_disruption.976846940 |
| Short name | T3432 |
| Test name | |
| Test status | |
| Simulation time | 450210218 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=976846940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 285.usbdev_t x_rx_disruption.976846940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/285.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/286.usbdev_tx_rx_disruption.2331495697 |
| Short name | T3435 |
| Test name | |
| Test status | |
| Simulation time | 454584359 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2331495697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 286.usbdev_ tx_rx_disruption.2331495697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/286.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/287.usbdev_tx_rx_disruption.876218260 |
| Short name | T3443 |
| Test name | |
| Test status | |
| Simulation time | 432654715 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=876218260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 287.usbdev_t x_rx_disruption.876218260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/287.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/288.usbdev_tx_rx_disruption.2127308001 |
| Short name | T3453 |
| Test name | |
| Test status | |
| Simulation time | 495293067 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2127308001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 288.usbdev_ tx_rx_disruption.2127308001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/288.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/289.usbdev_tx_rx_disruption.3414715656 |
| Short name | T3457 |
| Test name | |
| Test status | |
| Simulation time | 549554624 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3414715656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 289.usbdev_ tx_rx_disruption.3414715656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/289.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_alert_test.3347806232 |
| Short name | T2031 |
| Test name | |
| Test status | |
| Simulation time | 65339663 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3347806232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 29.usbdev_alert_test.3347806232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_disconnect.771866634 |
| Short name | T1996 |
| Test name | |
| Test status | |
| Simulation time | 4025555039 ps |
| CPU time | 6.4 seconds |
| Started | Aug 27 07:48:35 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=771866634 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_disconnect.771866634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_reset.1282216802 |
| Short name | T2047 |
| Test name | |
| Test status | |
| Simulation time | 15051117252 ps |
| CPU time | 18 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:57 AM UTC 24 |
| Peak memory | 227896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282216802 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_reset.1282216802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_aon_wake_resume.3414811727 |
| Short name | T2101 |
| Test name | |
| Test status | |
| Simulation time | 24464938646 ps |
| CPU time | 37.51 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:49:17 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3414811727 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_aon_wake_resume.3414811727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_av_buffer.1102700307 |
| Short name | T1984 |
| Test name | |
| Test status | |
| Simulation time | 181214258 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:40 AM UTC 24 |
| Peak memory | 215472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102700307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_av_buffer.1102700307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_bitstuff_err.3816225528 |
| Short name | T1985 |
| Test name | |
| Test status | |
| Simulation time | 150387775 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3816225528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_bitstuff_err.3816225528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_clear.3919162430 |
| Short name | T1987 |
| Test name | |
| Test status | |
| Simulation time | 175495015 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3919162430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 29.usbdev_data_toggle_clear.3919162430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_data_toggle_restore.2245087914 |
| Short name | T1990 |
| Test name | |
| Test status | |
| Simulation time | 1109440383 ps |
| CPU time | 3.07 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 218148 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2245087914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_data_toggle_restore.2245087914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_device_address.4230142494 |
| Short name | T2193 |
| Test name | |
| Test status | |
| Simulation time | 33605326909 ps |
| CPU time | 64.28 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:49:44 AM UTC 24 |
| Peak memory | 218436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4230142494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_address.4230142494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_device_timeout.1828882261 |
| Short name | T1998 |
| Test name | |
| Test status | |
| Simulation time | 331666151 ps |
| CPU time | 4.72 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:44 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1828882261 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_device_timeout.1828882261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_disable_endpoint.1214860491 |
| Short name | T1989 |
| Test name | |
| Test status | |
| Simulation time | 839215517 ps |
| CPU time | 2.2 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:42 AM UTC 24 |
| Peak memory | 218088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1214860491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_disable_endpoint.1214860491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_disconnected.2038290622 |
| Short name | T1986 |
| Test name | |
| Test status | |
| Simulation time | 171411378 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:41 AM UTC 24 |
| Peak memory | 216060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2038290622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_disconnected.2038290622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_enable.2296844274 |
| Short name | T1983 |
| Test name | |
| Test status | |
| Simulation time | 36667872 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:48:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2296844274 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 29.usbdev_enable.2296844274 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_access.3411534954 |
| Short name | T2000 |
| Test name | |
| Test status | |
| Simulation time | 805973034 ps |
| CPU time | 2.85 seconds |
| Started | Aug 27 07:48:40 AM UTC 24 |
| Finished | Aug 27 07:48:44 AM UTC 24 |
| Peak memory | 218252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3411534954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_access.3411534954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_endpoint_types.313601789 |
| Short name | T450 |
| Test name | |
| Test status | |
| Simulation time | 464653424 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=313601789 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 29.usbdev_endpoint_types.313601789 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_fifo_rst.2064846136 |
| Short name | T1997 |
| Test name | |
| Test status | |
| Simulation time | 255830205 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:44 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2064846136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_fifo_rst.2064846136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_in_iso.1257035682 |
| Short name | T1995 |
| Test name | |
| Test status | |
| Simulation time | 210287094 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 226172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257035682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 29.usbdev_in_iso.1257035682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_in_stall.3937587260 |
| Short name | T1991 |
| Test name | |
| Test status | |
| Simulation time | 190583107 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3937587260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_stall.3937587260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_in_trans.3388953160 |
| Short name | T1994 |
| Test name | |
| Test status | |
| Simulation time | 227171437 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3388953160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_in_trans.3388953160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_invalid_sync.2813224721 |
| Short name | T2405 |
| Test name | |
| Test status | |
| Simulation time | 4932181227 ps |
| CPU time | 124.11 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:50:47 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813224721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 29.usbdev_invalid_sync.2813224721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_iso_retraction.1856704974 |
| Short name | T2266 |
| Test name | |
| Test status | |
| Simulation time | 7668471041 ps |
| CPU time | 84.6 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:50:07 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1856704974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_iso_retraction.1856704974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_link_in_err.3329924426 |
| Short name | T1993 |
| Test name | |
| Test status | |
| Simulation time | 219908196 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3329924426 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_in_err.3329924426 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_link_resume.1802164392 |
| Short name | T2178 |
| Test name | |
| Test status | |
| Simulation time | 31646785671 ps |
| CPU time | 55.91 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1802164392 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_link_resume.1802164392 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_link_suspend.4048184507 |
| Short name | T2039 |
| Test name | |
| Test status | |
| Simulation time | 8864235059 ps |
| CPU time | 13.15 seconds |
| Started | Aug 27 07:48:41 AM UTC 24 |
| Finished | Aug 27 07:48:55 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4048184507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_link_suspend.4048184507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_low_speed_traffic.3052550386 |
| Short name | T2409 |
| Test name | |
| Test status | |
| Simulation time | 4709746415 ps |
| CPU time | 121.32 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3052550386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_low_speed_traffic.3052550386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_max_inter_pkt_delay.3963575189 |
| Short name | T2080 |
| Test name | |
| Test status | |
| Simulation time | 2224860679 ps |
| CPU time | 21.39 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:49:07 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3963575189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_max_inter_pkt_delay.3963575189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_in_transaction.3462026114 |
| Short name | T2003 |
| Test name | |
| Test status | |
| Simulation time | 245250772 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 215708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462026114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_in_transaction.3462026114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_max_length_out_transaction.1218442231 |
| Short name | T2004 |
| Test name | |
| Test status | |
| Simulation time | 193777506 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1218442231 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_max_length_out_transaction.1218442231 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_min_inter_pkt_delay.1102996974 |
| Short name | T2083 |
| Test name | |
| Test status | |
| Simulation time | 3400412225 ps |
| CPU time | 22.57 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:49:08 AM UTC 24 |
| Peak memory | 228676 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102996974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_min_inter_pkt_delay.1102996974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_in_transaction.2495183380 |
| Short name | T2008 |
| Test name | |
| Test status | |
| Simulation time | 159001788 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2495183380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_in_transaction.2495183380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_min_length_out_transaction.3662030715 |
| Short name | T2002 |
| Test name | |
| Test status | |
| Simulation time | 141917923 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3662030715 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_min_length_out_transaction.3662030715 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_nak_trans.2025740280 |
| Short name | T133 |
| Test name | |
| Test status | |
| Simulation time | 188545538 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025740280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_nak_trans.2025740280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_out_iso.1265780569 |
| Short name | T2007 |
| Test name | |
| Test status | |
| Simulation time | 151428504 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1265780569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_out_iso.1265780569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_out_stall.2973406255 |
| Short name | T2006 |
| Test name | |
| Test status | |
| Simulation time | 187394428 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973406255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_out_stall.2973406255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_out_trans_nak.2737219590 |
| Short name | T2010 |
| Test name | |
| Test status | |
| Simulation time | 232706229 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2737219590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_out_trans_nak.2737219590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_pending_in_trans.1805113588 |
| Short name | T2005 |
| Test name | |
| Test status | |
| Simulation time | 157521970 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 215968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805113588 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 29.usbdev_pending_in_trans.1805113588 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_pinflip.1390551125 |
| Short name | T2013 |
| Test name | |
| Test status | |
| Simulation time | 240285576 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1390551125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_pinflip.1390551125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_phy_config_usb_ref_disable.1240098180 |
| Short name | T2011 |
| Test name | |
| Test status | |
| Simulation time | 150985764 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1240098180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 29.usbdev_phy_config_usb_ref_disable.1240098180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_phy_pins_sense.1650971181 |
| Short name | T2009 |
| Test name | |
| Test status | |
| Simulation time | 102453326 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:48:44 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650971181 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_phy_pins_sense.1650971181 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_buffer.2648961315 |
| Short name | T2211 |
| Test name | |
| Test status | |
| Simulation time | 21860428174 ps |
| CPU time | 61.98 seconds |
| Started | Aug 27 07:48:45 AM UTC 24 |
| Finished | Aug 27 07:49:48 AM UTC 24 |
| Peak memory | 228324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2648961315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_pkt_buffer.2648961315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_received.3567310572 |
| Short name | T2012 |
| Test name | |
| Test status | |
| Simulation time | 179216197 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:48:45 AM UTC 24 |
| Finished | Aug 27 07:48:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3567310572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_pkt_received.3567310572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_pkt_sent.3864420077 |
| Short name | T2019 |
| Test name | |
| Test status | |
| Simulation time | 216553324 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:48:46 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3864420077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 29.usbdev_pkt_sent.3864420077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_in_transaction.110548326 |
| Short name | T2018 |
| Test name | |
| Test status | |
| Simulation time | 217326059 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:48:47 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=110548326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 29.usbdev_random_length_in_transaction.110548326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_random_length_out_transaction.3822226685 |
| Short name | T2021 |
| Test name | |
| Test status | |
| Simulation time | 203479666 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:48:47 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822226685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 29.usbdev_random_length_out_transaction.3822226685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_rx_crc_err.226270695 |
| Short name | T1971 |
| Test name | |
| Test status | |
| Simulation time | 176612089 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:48:47 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=226270695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_rx_crc_err.226270695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_rx_full.2841936534 |
| Short name | T2020 |
| Test name | |
| Test status | |
| Simulation time | 295834916 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:48:47 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2841936534 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 29.usbdev_rx_full.2841936534 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_setup_stage.3727395519 |
| Short name | T2016 |
| Test name | |
| Test status | |
| Simulation time | 161342375 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:48:47 AM UTC 24 |
| Finished | Aug 27 07:48:49 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727395519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 29.usbdev_setup_stage.3727395519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_setup_trans_ignored.108440122 |
| Short name | T2030 |
| Test name | |
| Test status | |
| Simulation time | 152747287 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=108440122 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 29.usbdev_setup_trans_ignored.108440122 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_smoke.1642566563 |
| Short name | T2024 |
| Test name | |
| Test status | |
| Simulation time | 220920042 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1642566563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_smoke.1642566563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_spurious_pids_ignored.893941675 |
| Short name | T2090 |
| Test name | |
| Test status | |
| Simulation time | 2010663188 ps |
| CPU time | 18.83 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:49:10 AM UTC 24 |
| Peak memory | 230408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=893941675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 29.usbdev_spurious_pids_ignored.893941675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_stall_priority_over_nak.1922380557 |
| Short name | T2028 |
| Test name | |
| Test status | |
| Simulation time | 169504543 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1922380557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_stall_priority_over_nak.1922380557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_stall_trans.871252717 |
| Short name | T2027 |
| Test name | |
| Test status | |
| Simulation time | 185264173 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:52 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=871252717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 29.usbdev_stall_trans.871252717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_stream_len_max.813517388 |
| Short name | T2038 |
| Test name | |
| Test status | |
| Simulation time | 869426915 ps |
| CPU time | 3.26 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:55 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=813517388 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 29.usbdev_stream_len_max.813517388 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_streaming_out.3977102976 |
| Short name | T1873 |
| Test name | |
| Test status | |
| Simulation time | 2197663104 ps |
| CPU time | 20.99 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:49:13 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977102976 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 29.usbdev_streaming_out.3977102976 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_timeout_missing_host_handshake.1360517026 |
| Short name | T2096 |
| Test name | |
| Test status | |
| Simulation time | 1695482359 ps |
| CPU time | 34.81 seconds |
| Started | Aug 27 07:48:38 AM UTC 24 |
| Finished | Aug 27 07:49:15 AM UTC 24 |
| Peak memory | 218120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1360517026 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_timeout_missing_host_handshake.1360517026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/29.usbdev_tx_rx_disruption.2744302800 |
| Short name | T198 |
| Test name | |
| Test status | |
| Simulation time | 541642367 ps |
| CPU time | 2.6 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:54 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2744302800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 29.usbdev_t x_rx_disruption.2744302800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/29.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/290.usbdev_tx_rx_disruption.4193715236 |
| Short name | T3463 |
| Test name | |
| Test status | |
| Simulation time | 576247907 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4193715236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 290.usbdev_ tx_rx_disruption.4193715236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/290.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/291.usbdev_tx_rx_disruption.693360498 |
| Short name | T3455 |
| Test name | |
| Test status | |
| Simulation time | 574031511 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=693360498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 291.usbdev_t x_rx_disruption.693360498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/291.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/292.usbdev_tx_rx_disruption.2450420268 |
| Short name | T3454 |
| Test name | |
| Test status | |
| Simulation time | 422457854 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2450420268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 292.usbdev_ tx_rx_disruption.2450420268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/292.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/293.usbdev_tx_rx_disruption.1605209720 |
| Short name | T3467 |
| Test name | |
| Test status | |
| Simulation time | 538768834 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1605209720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 293.usbdev_ tx_rx_disruption.1605209720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/293.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/294.usbdev_tx_rx_disruption.423733819 |
| Short name | T3459 |
| Test name | |
| Test status | |
| Simulation time | 511695047 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=423733819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 294.usbdev_t x_rx_disruption.423733819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/294.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/295.usbdev_tx_rx_disruption.104858799 |
| Short name | T3456 |
| Test name | |
| Test status | |
| Simulation time | 505889970 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=104858799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 295.usbdev_t x_rx_disruption.104858799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/295.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/296.usbdev_tx_rx_disruption.2414263395 |
| Short name | T3458 |
| Test name | |
| Test status | |
| Simulation time | 579473482 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2414263395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 296.usbdev_ tx_rx_disruption.2414263395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/296.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/297.usbdev_tx_rx_disruption.1492970718 |
| Short name | T3464 |
| Test name | |
| Test status | |
| Simulation time | 519773635 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1492970718 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 297.usbdev_ tx_rx_disruption.1492970718 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/297.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/298.usbdev_tx_rx_disruption.234914539 |
| Short name | T3460 |
| Test name | |
| Test status | |
| Simulation time | 463501391 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=234914539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 298.usbdev_t x_rx_disruption.234914539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/298.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/299.usbdev_tx_rx_disruption.1153290624 |
| Short name | T3419 |
| Test name | |
| Test status | |
| Simulation time | 497758834 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1153290624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 299.usbdev_ tx_rx_disruption.1153290624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/299.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_alert_test.719818784 |
| Short name | T615 |
| Test name | |
| Test status | |
| Simulation time | 47543070 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:38:34 AM UTC 24 |
| Finished | Aug 27 07:38:36 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=719818784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_alert_test.719818784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_disconnect.3535186433 |
| Short name | T16 |
| Test name | |
| Test status | |
| Simulation time | 8956977657 ps |
| CPU time | 11.88 seconds |
| Started | Aug 27 07:37:38 AM UTC 24 |
| Finished | Aug 27 07:37:51 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535186433 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_disconnect.3535186433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_reset.3472053563 |
| Short name | T101 |
| Test name | |
| Test status | |
| Simulation time | 14265248682 ps |
| CPU time | 19.17 seconds |
| Started | Aug 27 07:37:40 AM UTC 24 |
| Finished | Aug 27 07:38:00 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3472053563 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_reset.3472053563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_aon_wake_resume.2027757539 |
| Short name | T102 |
| Test name | |
| Test status | |
| Simulation time | 24949564101 ps |
| CPU time | 44.26 seconds |
| Started | Aug 27 07:37:40 AM UTC 24 |
| Finished | Aug 27 07:38:25 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2027757539 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_aon_wake_resume.2027757539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_buffer.2075910432 |
| Short name | T566 |
| Test name | |
| Test status | |
| Simulation time | 158503921 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:37:41 AM UTC 24 |
| Finished | Aug 27 07:37:43 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2075910432 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_av_buffer.2075910432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_empty.114193078 |
| Short name | T63 |
| Test name | |
| Test status | |
| Simulation time | 169384498 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:37:43 AM UTC 24 |
| Finished | Aug 27 07:37:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=114193078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_av_empty.114193078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_av_overflow.3517720935 |
| Short name | T94 |
| Test name | |
| Test status | |
| Simulation time | 144942932 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:37:43 AM UTC 24 |
| Finished | Aug 27 07:37:45 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517720935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_av_overflow.3517720935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_bitstuff_err.2402714551 |
| Short name | T567 |
| Test name | |
| Test status | |
| Simulation time | 139968970 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:37:44 AM UTC 24 |
| Finished | Aug 27 07:37:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2402714551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_bitstuff_err.2402714551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_clear.20303871 |
| Short name | T569 |
| Test name | |
| Test status | |
| Simulation time | 402633941 ps |
| CPU time | 2.35 seconds |
| Started | Aug 27 07:37:46 AM UTC 24 |
| Finished | Aug 27 07:37:49 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=20303871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_clear.20303871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_data_toggle_restore.24741503 |
| Short name | T568 |
| Test name | |
| Test status | |
| Simulation time | 413640569 ps |
| CPU time | 2.1 seconds |
| Started | Aug 27 07:37:46 AM UTC 24 |
| Finished | Aug 27 07:37:49 AM UTC 24 |
| Peak memory | 218068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24741503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_data_toggle_restore.24741503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_device_address.2840887563 |
| Short name | T363 |
| Test name | |
| Test status | |
| Simulation time | 24931846505 ps |
| CPU time | 54.71 seconds |
| Started | Aug 27 07:37:46 AM UTC 24 |
| Finished | Aug 27 07:38:42 AM UTC 24 |
| Peak memory | 218296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2840887563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_address.2840887563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_device_timeout.3136928897 |
| Short name | T558 |
| Test name | |
| Test status | |
| Simulation time | 1147222493 ps |
| CPU time | 22.76 seconds |
| Started | Aug 27 07:37:47 AM UTC 24 |
| Finished | Aug 27 07:38:11 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3136928897 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_device_timeout.3136928897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_disable_endpoint.2311483967 |
| Short name | T345 |
| Test name | |
| Test status | |
| Simulation time | 678038968 ps |
| CPU time | 2.56 seconds |
| Started | Aug 27 07:37:49 AM UTC 24 |
| Finished | Aug 27 07:37:52 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2311483967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_disable_endpoint.2311483967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_disconnected.43169079 |
| Short name | T570 |
| Test name | |
| Test status | |
| Simulation time | 142134605 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:37:49 AM UTC 24 |
| Finished | Aug 27 07:37:51 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=43169079 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_disconnected.43169079 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_enable.512741374 |
| Short name | T572 |
| Test name | |
| Test status | |
| Simulation time | 33614849 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:37:50 AM UTC 24 |
| Finished | Aug 27 07:37:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=512741374 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_enable.512741374 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_access.1164514886 |
| Short name | T521 |
| Test name | |
| Test status | |
| Simulation time | 821575117 ps |
| CPU time | 3.44 seconds |
| Started | Aug 27 07:37:51 AM UTC 24 |
| Finished | Aug 27 07:37:55 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1164514886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_access.1164514886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_endpoint_types.2400300496 |
| Short name | T492 |
| Test name | |
| Test status | |
| Simulation time | 331041543 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:37:53 AM UTC 24 |
| Finished | Aug 27 07:37:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2400300496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_endpoint_types.2400300496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_fifo_rst.231257045 |
| Short name | T575 |
| Test name | |
| Test status | |
| Simulation time | 291117476 ps |
| CPU time | 2.65 seconds |
| Started | Aug 27 07:37:53 AM UTC 24 |
| Finished | Aug 27 07:37:56 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=231257045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_fifo_rst.231257045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk.3503270168 |
| Short name | T810 |
| Test name | |
| Test status | |
| Simulation time | 96244065000 ps |
| CPU time | 191.97 seconds |
| Started | Aug 27 07:37:53 AM UTC 24 |
| Finished | Aug 27 07:41:08 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3503270168 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_hiclk.3503270168 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_hiclk_max.4019148733 |
| Short name | T796 |
| Test name | |
| Test status | |
| Simulation time | 88300926741 ps |
| CPU time | 182.23 seconds |
| Started | Aug 27 07:37:53 AM UTC 24 |
| Finished | Aug 27 07:40:58 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=4019148733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 3.usbdev_freq_hiclk_max.4019148733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_loclk.1584426617 |
| Short name | T737 |
| Test name | |
| Test status | |
| Simulation time | 90103437655 ps |
| CPU time | 144.54 seconds |
| Started | Aug 27 07:37:53 AM UTC 24 |
| Finished | Aug 27 07:40:20 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1584426617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_freq_loclk.1584426617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_freq_phase.4037048866 |
| Short name | T749 |
| Test name | |
| Test status | |
| Simulation time | 84146984643 ps |
| CPU time | 147 seconds |
| Started | Aug 27 07:37:56 AM UTC 24 |
| Finished | Aug 27 07:40:25 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4037048866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 3.usbdev_freq_phase.4037048866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_iso.1113572318 |
| Short name | T580 |
| Test name | |
| Test status | |
| Simulation time | 212109263 ps |
| CPU time | 2.06 seconds |
| Started | Aug 27 07:37:58 AM UTC 24 |
| Finished | Aug 27 07:38:01 AM UTC 24 |
| Peak memory | 228444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1113572318 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_in_iso.1113572318 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_stall.1564810882 |
| Short name | T578 |
| Test name | |
| Test status | |
| Simulation time | 203107825 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:37:58 AM UTC 24 |
| Finished | Aug 27 07:38:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1564810882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_stall.1564810882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_in_trans.1078023171 |
| Short name | T579 |
| Test name | |
| Test status | |
| Simulation time | 251599950 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:37:58 AM UTC 24 |
| Finished | Aug 27 07:38:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078023171 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_in_trans.1078023171 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_invalid_sync.4160413334 |
| Short name | T613 |
| Test name | |
| Test status | |
| Simulation time | 5056561809 ps |
| CPU time | 36.45 seconds |
| Started | Aug 27 07:37:58 AM UTC 24 |
| Finished | Aug 27 07:38:36 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4160413334 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 3.usbdev_invalid_sync.4160413334 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_iso_retraction.1655461527 |
| Short name | T695 |
| Test name | |
| Test status | |
| Simulation time | 8098473917 ps |
| CPU time | 113.1 seconds |
| Started | Aug 27 07:37:59 AM UTC 24 |
| Finished | Aug 27 07:39:54 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1655461527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_iso_retraction.1655461527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_link_in_err.1648518805 |
| Short name | T582 |
| Test name | |
| Test status | |
| Simulation time | 212771661 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:37:59 AM UTC 24 |
| Finished | Aug 27 07:38:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1648518805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_link_in_err.1648518805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_link_suspend.2185418407 |
| Short name | T601 |
| Test name | |
| Test status | |
| Simulation time | 9069715081 ps |
| CPU time | 24.13 seconds |
| Started | Aug 27 07:38:01 AM UTC 24 |
| Finished | Aug 27 07:38:26 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2185418407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_link_suspend.2185418407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_low_speed_traffic.1132275154 |
| Short name | T416 |
| Test name | |
| Test status | |
| Simulation time | 4462835578 ps |
| CPU time | 127.13 seconds |
| Started | Aug 27 07:38:01 AM UTC 24 |
| Finished | Aug 27 07:40:10 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1132275154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_low_speed_traffic.1132275154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_inter_pkt_delay.2408498401 |
| Short name | T619 |
| Test name | |
| Test status | |
| Simulation time | 3259750178 ps |
| CPU time | 39.86 seconds |
| Started | Aug 27 07:38:01 AM UTC 24 |
| Finished | Aug 27 07:38:42 AM UTC 24 |
| Peak memory | 228556 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408498401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_inter_pkt_delay.2408498401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_in_transaction.1870360130 |
| Short name | T584 |
| Test name | |
| Test status | |
| Simulation time | 245726927 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:38:02 AM UTC 24 |
| Finished | Aug 27 07:38:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870360130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_in_transaction.1870360130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_length_out_transaction.1870529304 |
| Short name | T583 |
| Test name | |
| Test status | |
| Simulation time | 184153378 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:38:02 AM UTC 24 |
| Finished | Aug 27 07:38:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1870529304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_max_length_out_transaction.1870529304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_non_iso_usb_traffic.3824721336 |
| Short name | T596 |
| Test name | |
| Test status | |
| Simulation time | 2238788683 ps |
| CPU time | 16.99 seconds |
| Started | Aug 27 07:38:02 AM UTC 24 |
| Finished | Aug 27 07:38:20 AM UTC 24 |
| Peak memory | 235332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824721336 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_non_iso_usb_traffic.3824721336 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_max_usb_traffic.471205600 |
| Short name | T658 |
| Test name | |
| Test status | |
| Simulation time | 2625407955 ps |
| CPU time | 79.16 seconds |
| Started | Aug 27 07:38:05 AM UTC 24 |
| Finished | Aug 27 07:39:26 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=471205600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_max_usb_traffic.471205600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_min_inter_pkt_delay.1551758952 |
| Short name | T630 |
| Test name | |
| Test status | |
| Simulation time | 1788860202 ps |
| CPU time | 52.63 seconds |
| Started | Aug 27 07:38:05 AM UTC 24 |
| Finished | Aug 27 07:39:00 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551758952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_min_inter_pkt_delay.1551758952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_in_transaction.1845661760 |
| Short name | T586 |
| Test name | |
| Test status | |
| Simulation time | 155258090 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:38:07 AM UTC 24 |
| Finished | Aug 27 07:38:09 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1845661760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_in_transaction.1845661760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_min_length_out_transaction.3690469163 |
| Short name | T587 |
| Test name | |
| Test status | |
| Simulation time | 199745359 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:38:08 AM UTC 24 |
| Finished | Aug 27 07:38:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690469163 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_min_length_out_transaction.3690469163 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_nak_trans.1988406550 |
| Short name | T157 |
| Test name | |
| Test status | |
| Simulation time | 206687271 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:38:10 AM UTC 24 |
| Finished | Aug 27 07:38:12 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988406550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_nak_trans.1988406550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_out_iso.3268149335 |
| Short name | T577 |
| Test name | |
| Test status | |
| Simulation time | 171156726 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:38:10 AM UTC 24 |
| Finished | Aug 27 07:38:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3268149335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_out_iso.3268149335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_out_stall.2805531974 |
| Short name | T588 |
| Test name | |
| Test status | |
| Simulation time | 163285337 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:38:12 AM UTC 24 |
| Finished | Aug 27 07:38:14 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805531974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_out_stall.2805531974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_out_trans_nak.991493826 |
| Short name | T589 |
| Test name | |
| Test status | |
| Simulation time | 178419805 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:38:12 AM UTC 24 |
| Finished | Aug 27 07:38:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=991493826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 3.usbdev_out_trans_nak.991493826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_pending_in_trans.749028582 |
| Short name | T590 |
| Test name | |
| Test status | |
| Simulation time | 190911465 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:38:13 AM UTC 24 |
| Finished | Aug 27 07:38:16 AM UTC 24 |
| Peak memory | 216020 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=749028582 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_pending_in_trans.749028582 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_pinflip.2491114741 |
| Short name | T592 |
| Test name | |
| Test status | |
| Simulation time | 261386301 ps |
| CPU time | 1.88 seconds |
| Started | Aug 27 07:38:13 AM UTC 24 |
| Finished | Aug 27 07:38:16 AM UTC 24 |
| Peak memory | 216028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2491114741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_pinflip.2491114741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_rand_bus_type.1156853059 |
| Short name | T591 |
| Test name | |
| Test status | |
| Simulation time | 230429169 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:38:13 AM UTC 24 |
| Finished | Aug 27 07:38:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156853059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_ty pe_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 3.usbdev_phy_config_rand_bus_type.1156853059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_phy_config_usb_ref_disable.3843071194 |
| Short name | T593 |
| Test name | |
| Test status | |
| Simulation time | 210002605 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:38:15 AM UTC 24 |
| Finished | Aug 27 07:38:18 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3843071194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 3.usbdev_phy_config_usb_ref_disable.3843071194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_phy_pins_sense.3796977276 |
| Short name | T46 |
| Test name | |
| Test status | |
| Simulation time | 35684887 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:38:15 AM UTC 24 |
| Finished | Aug 27 07:38:17 AM UTC 24 |
| Peak memory | 216160 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796977276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_phy_pins_sense.3796977276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_buffer.1927965532 |
| Short name | T264 |
| Test name | |
| Test status | |
| Simulation time | 17826587137 ps |
| CPU time | 57.33 seconds |
| Started | Aug 27 07:38:17 AM UTC 24 |
| Finished | Aug 27 07:39:15 AM UTC 24 |
| Peak memory | 235356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1927965532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_pkt_buffer.1927965532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_received.956105275 |
| Short name | T595 |
| Test name | |
| Test status | |
| Simulation time | 233798509 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:38:17 AM UTC 24 |
| Finished | Aug 27 07:38:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=956105275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_pkt_received.956105275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_pkt_sent.1080441653 |
| Short name | T594 |
| Test name | |
| Test status | |
| Simulation time | 233037947 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:38:17 AM UTC 24 |
| Finished | Aug 27 07:38:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080441653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 3.usbdev_pkt_sent.1080441653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_disconnects.1227927134 |
| Short name | T668 |
| Test name | |
| Test status | |
| Simulation time | 9491658244 ps |
| CPU time | 72.33 seconds |
| Started | Aug 27 07:38:20 AM UTC 24 |
| Finished | Aug 27 07:39:34 AM UTC 24 |
| Peak memory | 235256 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1227927134 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_disconnects.1227927134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rand_bus_resets.380534209 |
| Short name | T622 |
| Test name | |
| Test status | |
| Simulation time | 3361516094 ps |
| CPU time | 23.24 seconds |
| Started | Aug 27 07:38:20 AM UTC 24 |
| Finished | Aug 27 07:38:44 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=380534209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_b us_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_bus_resets.380534209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rand_suspends.3755137322 |
| Short name | T643 |
| Test name | |
| Test status | |
| Simulation time | 9088680872 ps |
| CPU time | 51.41 seconds |
| Started | Aug 27 07:38:21 AM UTC 24 |
| Finished | Aug 27 07:39:14 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755137322 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_rand_suspends.3755137322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_in_transaction.2966730855 |
| Short name | T599 |
| Test name | |
| Test status | |
| Simulation time | 171183546 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:38:19 AM UTC 24 |
| Finished | Aug 27 07:38:21 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2966730855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 3.usbdev_random_length_in_transaction.2966730855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_random_length_out_transaction.3386192490 |
| Short name | T598 |
| Test name | |
| Test status | |
| Simulation time | 147154538 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:38:19 AM UTC 24 |
| Finished | Aug 27 07:38:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3386192490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 3.usbdev_random_length_out_transaction.3386192490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_resume_link_active.3955201708 |
| Short name | T635 |
| Test name | |
| Test status | |
| Simulation time | 20184695812 ps |
| CPU time | 38.89 seconds |
| Started | Aug 27 07:38:21 AM UTC 24 |
| Finished | Aug 27 07:39:02 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3955201708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 3.usbdev_resume_link_active.3955201708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rx_crc_err.251794284 |
| Short name | T600 |
| Test name | |
| Test status | |
| Simulation time | 150467903 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:38:23 AM UTC 24 |
| Finished | Aug 27 07:38:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=251794284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_rx_crc_err.251794284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rx_full.3113947835 |
| Short name | T59 |
| Test name | |
| Test status | |
| Simulation time | 247590181 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:38:23 AM UTC 24 |
| Finished | Aug 27 07:38:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3113947835 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 3.usbdev_rx_full.3113947835 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_rx_pid_err.3015234992 |
| Short name | T604 |
| Test name | |
| Test status | |
| Simulation time | 172313812 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:38:26 AM UTC 24 |
| Finished | Aug 27 07:38:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3015234992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_rx_pid_err.3015234992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_sec_cm.1016034898 |
| Short name | T222 |
| Test name | |
| Test status | |
| Simulation time | 403202443 ps |
| CPU time | 2.17 seconds |
| Started | Aug 27 07:38:34 AM UTC 24 |
| Finished | Aug 27 07:38:37 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016034898 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_sec_cm.1016034898 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority.1898709686 |
| Short name | T606 |
| Test name | |
| Test status | |
| Simulation time | 394310991 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:38:26 AM UTC 24 |
| Finished | Aug 27 07:38:29 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1898709686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority.1898709686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_setup_priority_over_stall_response.2477347487 |
| Short name | T605 |
| Test name | |
| Test status | |
| Simulation time | 185056080 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:38:27 AM UTC 24 |
| Finished | Aug 27 07:38:29 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477347487 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 3.usbdev_setup_priority_over_stall_response.2477347487 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_setup_stage.129848200 |
| Short name | T603 |
| Test name | |
| Test status | |
| Simulation time | 152974519 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:38:27 AM UTC 24 |
| Finished | Aug 27 07:38:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=129848200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 3.usbdev_setup_stage.129848200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_setup_trans_ignored.2590724498 |
| Short name | T608 |
| Test name | |
| Test status | |
| Simulation time | 185514746 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:38:28 AM UTC 24 |
| Finished | Aug 27 07:38:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2590724498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 3.usbdev_setup_trans_ignored.2590724498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_smoke.102697330 |
| Short name | T609 |
| Test name | |
| Test status | |
| Simulation time | 247065464 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:38:29 AM UTC 24 |
| Finished | Aug 27 07:38:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=102697330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_smoke.102697330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_spurious_pids_ignored.3373318078 |
| Short name | T631 |
| Test name | |
| Test status | |
| Simulation time | 3193101704 ps |
| CPU time | 28.41 seconds |
| Started | Aug 27 07:38:30 AM UTC 24 |
| Finished | Aug 27 07:39:00 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3373318078 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 3.usbdev_spurious_pids_ignored.3373318078 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_stall_priority_over_nak.1551620242 |
| Short name | T610 |
| Test name | |
| Test status | |
| Simulation time | 178806289 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:38:30 AM UTC 24 |
| Finished | Aug 27 07:38:32 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1551620242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stall_priority_over_nak.1551620242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_stall_trans.2861831476 |
| Short name | T611 |
| Test name | |
| Test status | |
| Simulation time | 142574413 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:38:30 AM UTC 24 |
| Finished | Aug 27 07:38:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2861831476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 3.usbdev_stall_trans.2861831476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_stream_len_max.1994660022 |
| Short name | T612 |
| Test name | |
| Test status | |
| Simulation time | 331841391 ps |
| CPU time | 2.08 seconds |
| Started | Aug 27 07:38:30 AM UTC 24 |
| Finished | Aug 27 07:38:33 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1994660022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stream_len_max.1994660022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_streaming_out.3306049750 |
| Short name | T673 |
| Test name | |
| Test status | |
| Simulation time | 2529666841 ps |
| CPU time | 64.76 seconds |
| Started | Aug 27 07:38:30 AM UTC 24 |
| Finished | Aug 27 07:39:37 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306049750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 3.usbdev_streaming_out.3306049750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_stress_usb_traffic.3738449535 |
| Short name | T119 |
| Test name | |
| Test status | |
| Simulation time | 6288288925 ps |
| CPU time | 81.93 seconds |
| Started | Aug 27 07:38:33 AM UTC 24 |
| Finished | Aug 27 07:39:56 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3738449535 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_stress_usb_traffic.3738449535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_timeout_missing_host_handshake.2920168060 |
| Short name | T602 |
| Test name | |
| Test status | |
| Simulation time | 3430886966 ps |
| CPU time | 39.59 seconds |
| Started | Aug 27 07:37:47 AM UTC 24 |
| Finished | Aug 27 07:38:28 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2920168060 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_timeout_missing_host_handshake.2920168060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/3.usbdev_tx_rx_disruption.495438504 |
| Short name | T616 |
| Test name | |
| Test status | |
| Simulation time | 496921397 ps |
| CPU time | 2.6 seconds |
| Started | Aug 27 07:38:34 AM UTC 24 |
| Finished | Aug 27 07:38:38 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=495438504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 3.usbdev_tx_ rx_disruption.495438504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/3.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_alert_test.2258561006 |
| Short name | T2081 |
| Test name | |
| Test status | |
| Simulation time | 54078331 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:49:06 AM UTC 24 |
| Finished | Aug 27 07:49:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2258561006 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 30.usbdev_alert_test.2258561006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_disconnect.283361809 |
| Short name | T2049 |
| Test name | |
| Test status | |
| Simulation time | 4041539653 ps |
| CPU time | 6.06 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:58 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=283361809 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_disconnect.283361809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_reset.3022722972 |
| Short name | T2082 |
| Test name | |
| Test status | |
| Simulation time | 14076818526 ps |
| CPU time | 16.15 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:49:08 AM UTC 24 |
| Peak memory | 228464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022722972 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_reset.3022722972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_aon_wake_resume.2599357504 |
| Short name | T2154 |
| Test name | |
| Test status | |
| Simulation time | 29104812839 ps |
| CPU time | 40.53 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:49:32 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599357504 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_aon_wake_resume.2599357504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_av_buffer.2355065709 |
| Short name | T2033 |
| Test name | |
| Test status | |
| Simulation time | 155924046 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:53 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2355065709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_av_buffer.2355065709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_bitstuff_err.559978271 |
| Short name | T2032 |
| Test name | |
| Test status | |
| Simulation time | 159504633 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:48:50 AM UTC 24 |
| Finished | Aug 27 07:48:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=559978271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_bitstuff_err.559978271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_clear.1457051642 |
| Short name | T2036 |
| Test name | |
| Test status | |
| Simulation time | 448392828 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:48:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457051642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 30.usbdev_data_toggle_clear.1457051642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_data_toggle_restore.3284484575 |
| Short name | T2035 |
| Test name | |
| Test status | |
| Simulation time | 438409492 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:48:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3284484575 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_data_toggle_restore.3284484575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_device_address.3108323369 |
| Short name | T2209 |
| Test name | |
| Test status | |
| Simulation time | 29515869218 ps |
| CPU time | 55.75 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:49:48 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3108323369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_address.3108323369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_device_timeout.651942528 |
| Short name | T2120 |
| Test name | |
| Test status | |
| Simulation time | 1414352690 ps |
| CPU time | 29.35 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:49:22 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=651942528 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_device_timeout.651942528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_disable_endpoint.754717638 |
| Short name | T2037 |
| Test name | |
| Test status | |
| Simulation time | 380949666 ps |
| CPU time | 2.01 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:48:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=754717638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_disable_endpoint.754717638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_disconnected.3183136787 |
| Short name | T2042 |
| Test name | |
| Test status | |
| Simulation time | 145349760 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3183136787 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_disconnected.3183136787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_enable.2292490957 |
| Short name | T2040 |
| Test name | |
| Test status | |
| Simulation time | 62282570 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292490957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 30.usbdev_enable.2292490957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_endpoint_access.2783805062 |
| Short name | T2050 |
| Test name | |
| Test status | |
| Simulation time | 1023703299 ps |
| CPU time | 3.7 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:58 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2783805062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_endpoint_access.2783805062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_fifo_rst.2591247576 |
| Short name | T2045 |
| Test name | |
| Test status | |
| Simulation time | 315327469 ps |
| CPU time | 2.32 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:57 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591247576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_fifo_rst.2591247576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_in_iso.2518963735 |
| Short name | T2043 |
| Test name | |
| Test status | |
| Simulation time | 212400591 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:56 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518963735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 30.usbdev_in_iso.2518963735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_in_stall.3980389629 |
| Short name | T2041 |
| Test name | |
| Test status | |
| Simulation time | 140922835 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980389629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_stall.3980389629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_in_trans.2635899727 |
| Short name | T2044 |
| Test name | |
| Test status | |
| Simulation time | 281902541 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:48:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2635899727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_in_trans.2635899727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_invalid_sync.2977021211 |
| Short name | T2267 |
| Test name | |
| Test status | |
| Simulation time | 2851525507 ps |
| CPU time | 72.24 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:50:07 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2977021211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 30.usbdev_invalid_sync.2977021211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_iso_retraction.1771342431 |
| Short name | T2327 |
| Test name | |
| Test status | |
| Simulation time | 13636038697 ps |
| CPU time | 87.67 seconds |
| Started | Aug 27 07:48:53 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1771342431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_iso_retraction.1771342431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_link_in_err.2246022443 |
| Short name | T2051 |
| Test name | |
| Test status | |
| Simulation time | 180006491 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:48:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2246022443 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_in_err.2246022443 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_link_resume.1025775297 |
| Short name | T2189 |
| Test name | |
| Test status | |
| Simulation time | 27582087599 ps |
| CPU time | 44.79 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:49:42 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025775297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_link_resume.1025775297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_link_suspend.3405342444 |
| Short name | T2062 |
| Test name | |
| Test status | |
| Simulation time | 3362355207 ps |
| CPU time | 5 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:49:02 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3405342444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_link_suspend.3405342444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_low_speed_traffic.935215249 |
| Short name | T2187 |
| Test name | |
| Test status | |
| Simulation time | 5655966962 ps |
| CPU time | 44.4 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:49:42 AM UTC 24 |
| Peak memory | 235196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=935215249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_low_speed_traffic.935215249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_max_inter_pkt_delay.24558537 |
| Short name | T2103 |
| Test name | |
| Test status | |
| Simulation time | 2769276785 ps |
| CPU time | 20.26 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=24558537 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_max_inter_pkt_delay.24558537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_in_transaction.219262093 |
| Short name | T2054 |
| Test name | |
| Test status | |
| Simulation time | 245493165 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:48:59 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=219262093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_max_length_in_transaction.219262093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_max_length_out_transaction.273276271 |
| Short name | T2052 |
| Test name | |
| Test status | |
| Simulation time | 215047420 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:48:59 AM UTC 24 |
| Peak memory | 216168 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=273276271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 30.usbdev_max_length_out_transaction.273276271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_min_inter_pkt_delay.1027425631 |
| Short name | T2119 |
| Test name | |
| Test status | |
| Simulation time | 2561566954 ps |
| CPU time | 24.08 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:49:21 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1027425631 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_min_inter_pkt_delay.1027425631 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_in_transaction.3542186920 |
| Short name | T2053 |
| Test name | |
| Test status | |
| Simulation time | 162167870 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:48:56 AM UTC 24 |
| Finished | Aug 27 07:48:59 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3542186920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_in_transaction.3542186920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_min_length_out_transaction.2522657125 |
| Short name | T2056 |
| Test name | |
| Test status | |
| Simulation time | 143919036 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2522657125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_min_length_out_transaction.2522657125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_nak_trans.3830664632 |
| Short name | T2059 |
| Test name | |
| Test status | |
| Simulation time | 188460820 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3830664632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_nak_trans.3830664632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_out_iso.3490315954 |
| Short name | T2055 |
| Test name | |
| Test status | |
| Simulation time | 168116159 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3490315954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_out_iso.3490315954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_out_stall.3200700044 |
| Short name | T2057 |
| Test name | |
| Test status | |
| Simulation time | 153447820 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3200700044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_out_stall.3200700044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_out_trans_nak.1263340997 |
| Short name | T2058 |
| Test name | |
| Test status | |
| Simulation time | 171436564 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263340997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_out_trans_nak.1263340997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_pending_in_trans.3962501977 |
| Short name | T2060 |
| Test name | |
| Test status | |
| Simulation time | 168588161 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:48:58 AM UTC 24 |
| Finished | Aug 27 07:49:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3962501977 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 30.usbdev_pending_in_trans.3962501977 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_pinflip.4040111644 |
| Short name | T2069 |
| Test name | |
| Test status | |
| Simulation time | 196583344 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:49:00 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4040111644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_pinflip.4040111644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_phy_config_usb_ref_disable.3480253072 |
| Short name | T2066 |
| Test name | |
| Test status | |
| Simulation time | 146922295 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:49:00 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480253072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 30.usbdev_phy_config_usb_ref_disable.3480253072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_phy_pins_sense.1479206292 |
| Short name | T2065 |
| Test name | |
| Test status | |
| Simulation time | 35347966 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:49:00 AM UTC 24 |
| Finished | Aug 27 07:49:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479206292 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_phy_pins_sense.1479206292 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_buffer.3889249021 |
| Short name | T2148 |
| Test name | |
| Test status | |
| Simulation time | 10413879981 ps |
| CPU time | 28.06 seconds |
| Started | Aug 27 07:49:00 AM UTC 24 |
| Finished | Aug 27 07:49:30 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3889249021 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 30.usbdev_pkt_buffer.3889249021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_received.3707320387 |
| Short name | T2070 |
| Test name | |
| Test status | |
| Simulation time | 174700682 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:49:00 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707320387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_pkt_received.3707320387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_pkt_sent.1951642203 |
| Short name | T2067 |
| Test name | |
| Test status | |
| Simulation time | 211774732 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:49:01 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951642203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 30.usbdev_pkt_sent.1951642203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_in_transaction.626537229 |
| Short name | T2071 |
| Test name | |
| Test status | |
| Simulation time | 219008838 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:49:01 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=626537229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 30.usbdev_random_length_in_transaction.626537229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_random_length_out_transaction.3230522335 |
| Short name | T2068 |
| Test name | |
| Test status | |
| Simulation time | 162902365 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:49:01 AM UTC 24 |
| Finished | Aug 27 07:49:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3230522335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 30.usbdev_random_length_out_transaction.3230522335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_rx_crc_err.364358527 |
| Short name | T2074 |
| Test name | |
| Test status | |
| Simulation time | 206505430 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:05 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=364358527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_rx_crc_err.364358527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_rx_full.2951818118 |
| Short name | T2079 |
| Test name | |
| Test status | |
| Simulation time | 369850227 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:06 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2951818118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 30.usbdev_rx_full.2951818118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_setup_stage.1171061956 |
| Short name | T2076 |
| Test name | |
| Test status | |
| Simulation time | 148917447 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171061956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_setup_stage.1171061956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_setup_trans_ignored.2502691278 |
| Short name | T2077 |
| Test name | |
| Test status | |
| Simulation time | 151121655 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:05 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2502691278 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 30.usbdev_setup_trans_ignored.2502691278 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_smoke.2331038310 |
| Short name | T2075 |
| Test name | |
| Test status | |
| Simulation time | 235693307 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2331038310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_smoke.2331038310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_spurious_pids_ignored.796675261 |
| Short name | T2132 |
| Test name | |
| Test status | |
| Simulation time | 2743970733 ps |
| CPU time | 19.72 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=796675261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 30.usbdev_spurious_pids_ignored.796675261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_stall_priority_over_nak.3202887401 |
| Short name | T2078 |
| Test name | |
| Test status | |
| Simulation time | 178333633 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3202887401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_stall_priority_over_nak.3202887401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_stall_trans.2767326945 |
| Short name | T2073 |
| Test name | |
| Test status | |
| Simulation time | 172609671 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:49:03 AM UTC 24 |
| Finished | Aug 27 07:49:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767326945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 30.usbdev_stall_trans.2767326945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_stream_len_max.563935373 |
| Short name | T2087 |
| Test name | |
| Test status | |
| Simulation time | 1203258448 ps |
| CPU time | 3.29 seconds |
| Started | Aug 27 07:49:05 AM UTC 24 |
| Finished | Aug 27 07:49:10 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563935373 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 30.usbdev_stream_len_max.563935373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_streaming_out.2321186145 |
| Short name | T2162 |
| Test name | |
| Test status | |
| Simulation time | 3003814179 ps |
| CPU time | 27.26 seconds |
| Started | Aug 27 07:49:05 AM UTC 24 |
| Finished | Aug 27 07:49:34 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2321186145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 30.usbdev_streaming_out.2321186145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_timeout_missing_host_handshake.3737440276 |
| Short name | T2064 |
| Test name | |
| Test status | |
| Simulation time | 1140698222 ps |
| CPU time | 10.17 seconds |
| Started | Aug 27 07:48:51 AM UTC 24 |
| Finished | Aug 27 07:49:02 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3737440276 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_timeout_missing_host_handshake.3737440276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/30.usbdev_tx_rx_disruption.2486834303 |
| Short name | T2086 |
| Test name | |
| Test status | |
| Simulation time | 464878916 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:49:05 AM UTC 24 |
| Finished | Aug 27 07:49:09 AM UTC 24 |
| Peak memory | 217992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2486834303 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 30.usbdev_t x_rx_disruption.2486834303 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/30.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/300.usbdev_tx_rx_disruption.2874855249 |
| Short name | T3420 |
| Test name | |
| Test status | |
| Simulation time | 586290555 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:41 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2874855249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 300.usbdev_ tx_rx_disruption.2874855249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/300.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/301.usbdev_tx_rx_disruption.3649682197 |
| Short name | T3462 |
| Test name | |
| Test status | |
| Simulation time | 489479998 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3649682197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 301.usbdev_ tx_rx_disruption.3649682197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/301.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/302.usbdev_tx_rx_disruption.1079306912 |
| Short name | T3441 |
| Test name | |
| Test status | |
| Simulation time | 563233567 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1079306912 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 302.usbdev_ tx_rx_disruption.1079306912 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/302.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/303.usbdev_tx_rx_disruption.2450797422 |
| Short name | T3436 |
| Test name | |
| Test status | |
| Simulation time | 476049513 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2450797422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 303.usbdev_ tx_rx_disruption.2450797422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/303.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/304.usbdev_tx_rx_disruption.29524087 |
| Short name | T3439 |
| Test name | |
| Test status | |
| Simulation time | 497899207 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=29524087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 304.usbdev_tx _rx_disruption.29524087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/304.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/305.usbdev_tx_rx_disruption.2838929360 |
| Short name | T3451 |
| Test name | |
| Test status | |
| Simulation time | 559518196 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2838929360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 305.usbdev_ tx_rx_disruption.2838929360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/305.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/306.usbdev_tx_rx_disruption.2547344114 |
| Short name | T3447 |
| Test name | |
| Test status | |
| Simulation time | 463350901 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2547344114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 306.usbdev_ tx_rx_disruption.2547344114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/306.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/307.usbdev_tx_rx_disruption.2158462919 |
| Short name | T3452 |
| Test name | |
| Test status | |
| Simulation time | 472152320 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:55:28 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2158462919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 307.usbdev_ tx_rx_disruption.2158462919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/307.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/308.usbdev_tx_rx_disruption.63746505 |
| Short name | T3412 |
| Test name | |
| Test status | |
| Simulation time | 527489983 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216748 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=63746505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 308.usbdev_tx _rx_disruption.63746505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/308.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/309.usbdev_tx_rx_disruption.3650966951 |
| Short name | T3413 |
| Test name | |
| Test status | |
| Simulation time | 547363379 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3650966951 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 309.usbdev_ tx_rx_disruption.3650966951 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/309.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_alert_test.2851499792 |
| Short name | T2125 |
| Test name | |
| Test status | |
| Simulation time | 42473483 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 215448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851499792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 31.usbdev_alert_test.2851499792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_disconnect.1750335995 |
| Short name | T2093 |
| Test name | |
| Test status | |
| Simulation time | 4544841303 ps |
| CPU time | 7.32 seconds |
| Started | Aug 27 07:49:06 AM UTC 24 |
| Finished | Aug 27 07:49:14 AM UTC 24 |
| Peak memory | 228292 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750335995 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_disconnect.1750335995 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_reset.3977514503 |
| Short name | T2180 |
| Test name | |
| Test status | |
| Simulation time | 21297204934 ps |
| CPU time | 32.39 seconds |
| Started | Aug 27 07:49:06 AM UTC 24 |
| Finished | Aug 27 07:49:39 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977514503 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_reset.3977514503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_aon_wake_resume.2603837573 |
| Short name | T2202 |
| Test name | |
| Test status | |
| Simulation time | 30476780236 ps |
| CPU time | 39.2 seconds |
| Started | Aug 27 07:49:06 AM UTC 24 |
| Finished | Aug 27 07:49:46 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2603837573 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_aon_wake_resume.2603837573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_av_buffer.1906684909 |
| Short name | T2084 |
| Test name | |
| Test status | |
| Simulation time | 209702490 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:49:06 AM UTC 24 |
| Finished | Aug 27 07:49:08 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906684909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_av_buffer.1906684909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_bitstuff_err.2387010023 |
| Short name | T2089 |
| Test name | |
| Test status | |
| Simulation time | 216763004 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387010023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_bitstuff_err.2387010023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_clear.3717908920 |
| Short name | T2025 |
| Test name | |
| Test status | |
| Simulation time | 332509338 ps |
| CPU time | 2.27 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:11 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3717908920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 31.usbdev_data_toggle_clear.3717908920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_data_toggle_restore.186259098 |
| Short name | T2063 |
| Test name | |
| Test status | |
| Simulation time | 1071449317 ps |
| CPU time | 3.54 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:12 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=186259098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_data_toggle_restore.186259098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_device_address.675669176 |
| Short name | T2122 |
| Test name | |
| Test status | |
| Simulation time | 16072387427 ps |
| CPU time | 27.65 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:37 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=675669176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_device_address.675669176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_device_timeout.2378685945 |
| Short name | T2113 |
| Test name | |
| Test status | |
| Simulation time | 1044990697 ps |
| CPU time | 9.73 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:19 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2378685945 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_device_timeout.2378685945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_disable_endpoint.3259245020 |
| Short name | T2092 |
| Test name | |
| Test status | |
| Simulation time | 732441503 ps |
| CPU time | 2.58 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:12 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3259245020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_disable_endpoint.3259245020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_disconnected.605950572 |
| Short name | T2091 |
| Test name | |
| Test status | |
| Simulation time | 141998205 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=605950572 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_disconnected.605950572 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_enable.2275259557 |
| Short name | T2048 |
| Test name | |
| Test status | |
| Simulation time | 63432658 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:12 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2275259557 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 31.usbdev_enable.2275259557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_endpoint_access.2629687461 |
| Short name | T2098 |
| Test name | |
| Test status | |
| Simulation time | 732205804 ps |
| CPU time | 3.71 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:15 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629687461 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_endpoint_access.2629687461 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_fifo_rst.2651599482 |
| Short name | T2094 |
| Test name | |
| Test status | |
| Simulation time | 228804413 ps |
| CPU time | 2.69 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:14 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2651599482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_fifo_rst.2651599482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_in_iso.4252225601 |
| Short name | T2026 |
| Test name | |
| Test status | |
| Simulation time | 175444862 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4252225601 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_in_iso.4252225601 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_in_stall.3475352002 |
| Short name | T1804 |
| Test name | |
| Test status | |
| Simulation time | 172848757 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3475352002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_in_stall.3475352002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_in_trans.173828243 |
| Short name | T2017 |
| Test name | |
| Test status | |
| Simulation time | 251238165 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:13 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=173828243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_in_trans.173828243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_invalid_sync.3893595111 |
| Short name | T2151 |
| Test name | |
| Test status | |
| Simulation time | 2451612832 ps |
| CPU time | 18.56 seconds |
| Started | Aug 27 07:49:10 AM UTC 24 |
| Finished | Aug 27 07:49:30 AM UTC 24 |
| Peak memory | 228520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893595111 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 31.usbdev_invalid_sync.3893595111 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_iso_retraction.3622021660 |
| Short name | T2300 |
| Test name | |
| Test status | |
| Simulation time | 8647534400 ps |
| CPU time | 62.06 seconds |
| Started | Aug 27 07:49:12 AM UTC 24 |
| Finished | Aug 27 07:50:16 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3622021660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_iso_retraction.3622021660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_link_in_err.1763620566 |
| Short name | T2097 |
| Test name | |
| Test status | |
| Simulation time | 169430888 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:49:12 AM UTC 24 |
| Finished | Aug 27 07:49:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1763620566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_in_err.1763620566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_link_resume.4177994717 |
| Short name | T2237 |
| Test name | |
| Test status | |
| Simulation time | 28505331091 ps |
| CPU time | 41.54 seconds |
| Started | Aug 27 07:49:13 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177994717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_resume.4177994717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_link_suspend.274503587 |
| Short name | T2149 |
| Test name | |
| Test status | |
| Simulation time | 10899313553 ps |
| CPU time | 16.32 seconds |
| Started | Aug 27 07:49:13 AM UTC 24 |
| Finished | Aug 27 07:49:30 AM UTC 24 |
| Peak memory | 218396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=274503587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_link_suspend.274503587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_low_speed_traffic.2607802745 |
| Short name | T2518 |
| Test name | |
| Test status | |
| Simulation time | 4673665289 ps |
| CPU time | 127.34 seconds |
| Started | Aug 27 07:49:13 AM UTC 24 |
| Finished | Aug 27 07:51:22 AM UTC 24 |
| Peak memory | 230444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2607802745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_low_speed_traffic.2607802745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_max_inter_pkt_delay.1906520222 |
| Short name | T2296 |
| Test name | |
| Test status | |
| Simulation time | 2492906675 ps |
| CPU time | 60.45 seconds |
| Started | Aug 27 07:49:13 AM UTC 24 |
| Finished | Aug 27 07:50:15 AM UTC 24 |
| Peak memory | 228672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906520222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_max_inter_pkt_delay.1906520222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_in_transaction.729515815 |
| Short name | T2099 |
| Test name | |
| Test status | |
| Simulation time | 266963321 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:49:13 AM UTC 24 |
| Finished | Aug 27 07:49:16 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=729515815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_in_transaction.729515815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_max_length_out_transaction.2448523680 |
| Short name | T2106 |
| Test name | |
| Test status | |
| Simulation time | 200072093 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:49:15 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448523680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_max_length_out_transaction.2448523680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_min_inter_pkt_delay.3598739548 |
| Short name | T2383 |
| Test name | |
| Test status | |
| Simulation time | 3278768744 ps |
| CPU time | 83.35 seconds |
| Started | Aug 27 07:49:15 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3598739548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_min_inter_pkt_delay.3598739548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_in_transaction.369359705 |
| Short name | T2105 |
| Test name | |
| Test status | |
| Simulation time | 167247472 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:49:15 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=369359705 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_min_length_in_transaction.369359705 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_min_length_out_transaction.485244281 |
| Short name | T2102 |
| Test name | |
| Test status | |
| Simulation time | 156742686 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:49:15 AM UTC 24 |
| Finished | Aug 27 07:49:17 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=485244281 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 31.usbdev_min_length_out_transaction.485244281 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_nak_trans.1792414296 |
| Short name | T2111 |
| Test name | |
| Test status | |
| Simulation time | 277211957 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:49:15 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1792414296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_nak_trans.1792414296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_out_iso.3571338367 |
| Short name | T2110 |
| Test name | |
| Test status | |
| Simulation time | 196933945 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:49:16 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3571338367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_out_iso.3571338367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_out_stall.1292572235 |
| Short name | T2108 |
| Test name | |
| Test status | |
| Simulation time | 192511973 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:49:16 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1292572235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_out_stall.1292572235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_out_trans_nak.1928743494 |
| Short name | T2109 |
| Test name | |
| Test status | |
| Simulation time | 151951565 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:49:16 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1928743494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_out_trans_nak.1928743494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_pending_in_trans.1988349233 |
| Short name | T2107 |
| Test name | |
| Test status | |
| Simulation time | 149133160 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:49:16 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988349233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 31.usbdev_pending_in_trans.1988349233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_pinflip.3366759828 |
| Short name | T2112 |
| Test name | |
| Test status | |
| Simulation time | 255230956 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:49:16 AM UTC 24 |
| Finished | Aug 27 07:49:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3366759828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_pinflip.3366759828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_phy_config_usb_ref_disable.3660842254 |
| Short name | T2116 |
| Test name | |
| Test status | |
| Simulation time | 138060699 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:49:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660842254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 31.usbdev_phy_config_usb_ref_disable.3660842254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_phy_pins_sense.2520790372 |
| Short name | T2114 |
| Test name | |
| Test status | |
| Simulation time | 33969342 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:49:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2520790372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_phy_pins_sense.2520790372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_buffer.2645160752 |
| Short name | T2283 |
| Test name | |
| Test status | |
| Simulation time | 20813025167 ps |
| CPU time | 51.82 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:50:11 AM UTC 24 |
| Peak memory | 228576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2645160752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_pkt_buffer.2645160752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_received.1671440696 |
| Short name | T2117 |
| Test name | |
| Test status | |
| Simulation time | 175302665 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:49:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1671440696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 31.usbdev_pkt_received.1671440696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_pkt_sent.3117558646 |
| Short name | T2115 |
| Test name | |
| Test status | |
| Simulation time | 223945108 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:49:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117558646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 31.usbdev_pkt_sent.3117558646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_in_transaction.2442151967 |
| Short name | T2118 |
| Test name | |
| Test status | |
| Simulation time | 240175222 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:49:18 AM UTC 24 |
| Finished | Aug 27 07:49:20 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2442151967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_random_length_in_transaction.2442151967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_random_length_out_transaction.543867911 |
| Short name | T2121 |
| Test name | |
| Test status | |
| Simulation time | 222818454 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543867911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 31.usbdev_random_length_out_transaction.543867911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_rx_crc_err.2599849408 |
| Short name | T2124 |
| Test name | |
| Test status | |
| Simulation time | 187520556 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599849408 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 31.usbdev_rx_crc_err.2599849408 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_rx_full.1095608198 |
| Short name | T2129 |
| Test name | |
| Test status | |
| Simulation time | 291536889 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1095608198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 31.usbdev_rx_full.1095608198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_setup_stage.2106429967 |
| Short name | T2123 |
| Test name | |
| Test status | |
| Simulation time | 161650366 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106429967 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_setup_stage.2106429967 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_setup_trans_ignored.2962270214 |
| Short name | T2128 |
| Test name | |
| Test status | |
| Simulation time | 181106178 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2962270214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 31.usbdev_setup_trans_ignored.2962270214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_smoke.2329537011 |
| Short name | T2131 |
| Test name | |
| Test status | |
| Simulation time | 242942762 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329537011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_smoke.2329537011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_spurious_pids_ignored.3233615062 |
| Short name | T2298 |
| Test name | |
| Test status | |
| Simulation time | 2076677587 ps |
| CPU time | 52.2 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:50:15 AM UTC 24 |
| Peak memory | 234964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3233615062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 31.usbdev_spurious_pids_ignored.3233615062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_stall_priority_over_nak.1924082849 |
| Short name | T2130 |
| Test name | |
| Test status | |
| Simulation time | 181293025 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1924082849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_stall_priority_over_nak.1924082849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_stall_trans.2141544022 |
| Short name | T2126 |
| Test name | |
| Test status | |
| Simulation time | 176435944 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:49:21 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2141544022 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 31.usbdev_stall_trans.2141544022 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_stream_len_max.285363204 |
| Short name | T2136 |
| Test name | |
| Test status | |
| Simulation time | 946600723 ps |
| CPU time | 2.97 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:26 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=285363204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 31.usbdev_stream_len_max.285363204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_streaming_out.1777967056 |
| Short name | T2210 |
| Test name | |
| Test status | |
| Simulation time | 2758061018 ps |
| CPU time | 25.36 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:48 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777967056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 31.usbdev_streaming_out.1777967056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_timeout_missing_host_handshake.3394230925 |
| Short name | T2168 |
| Test name | |
| Test status | |
| Simulation time | 3379674112 ps |
| CPU time | 26.26 seconds |
| Started | Aug 27 07:49:08 AM UTC 24 |
| Finished | Aug 27 07:49:36 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3394230925 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_timeout_missing_host_handshake.3394230925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/31.usbdev_tx_rx_disruption.2952861284 |
| Short name | T2135 |
| Test name | |
| Test status | |
| Simulation time | 662698502 ps |
| CPU time | 2.82 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:25 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2952861284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 31.usbdev_t x_rx_disruption.2952861284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/31.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/310.usbdev_tx_rx_disruption.507126441 |
| Short name | T3415 |
| Test name | |
| Test status | |
| Simulation time | 572153314 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=507126441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 310.usbdev_t x_rx_disruption.507126441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/310.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/311.usbdev_tx_rx_disruption.4154876963 |
| Short name | T3407 |
| Test name | |
| Test status | |
| Simulation time | 552396523 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4154876963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 311.usbdev_ tx_rx_disruption.4154876963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/311.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/312.usbdev_tx_rx_disruption.1527334805 |
| Short name | T3405 |
| Test name | |
| Test status | |
| Simulation time | 521874484 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1527334805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 312.usbdev_ tx_rx_disruption.1527334805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/312.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/313.usbdev_tx_rx_disruption.810960632 |
| Short name | T3418 |
| Test name | |
| Test status | |
| Simulation time | 740824904 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=810960632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 313.usbdev_t x_rx_disruption.810960632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/313.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/314.usbdev_tx_rx_disruption.4004579010 |
| Short name | T3411 |
| Test name | |
| Test status | |
| Simulation time | 542031369 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:55:31 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4004579010 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 314.usbdev_ tx_rx_disruption.4004579010 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/314.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/315.usbdev_tx_rx_disruption.1827607784 |
| Short name | T3417 |
| Test name | |
| Test status | |
| Simulation time | 543647218 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:38 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1827607784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 315.usbdev_ tx_rx_disruption.1827607784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/315.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/316.usbdev_tx_rx_disruption.3176722629 |
| Short name | T3410 |
| Test name | |
| Test status | |
| Simulation time | 608927663 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3176722629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 316.usbdev_ tx_rx_disruption.3176722629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/316.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/317.usbdev_tx_rx_disruption.126593994 |
| Short name | T3427 |
| Test name | |
| Test status | |
| Simulation time | 632694434 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=126593994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 317.usbdev_t x_rx_disruption.126593994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/317.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/318.usbdev_tx_rx_disruption.1457343780 |
| Short name | T3428 |
| Test name | |
| Test status | |
| Simulation time | 523159136 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1457343780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 318.usbdev_ tx_rx_disruption.1457343780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/318.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/319.usbdev_tx_rx_disruption.282206948 |
| Short name | T3440 |
| Test name | |
| Test status | |
| Simulation time | 623423152 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=282206948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 319.usbdev_t x_rx_disruption.282206948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/319.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_alert_test.4238573128 |
| Short name | T2188 |
| Test name | |
| Test status | |
| Simulation time | 71749884 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4238573128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 32.usbdev_alert_test.4238573128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_disconnect.2407231872 |
| Short name | T2169 |
| Test name | |
| Test status | |
| Simulation time | 9157087026 ps |
| CPU time | 14.25 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:37 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407231872 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_disconnect.2407231872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_reset.336769537 |
| Short name | T2217 |
| Test name | |
| Test status | |
| Simulation time | 20676639517 ps |
| CPU time | 27.94 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=336769537 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_reset.336769537 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_aon_wake_resume.4154262353 |
| Short name | T2264 |
| Test name | |
| Test status | |
| Simulation time | 30088405857 ps |
| CPU time | 43.74 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:50:07 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4154262353 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_aon_wake_resume.4154262353 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_av_buffer.3457664933 |
| Short name | T2133 |
| Test name | |
| Test status | |
| Simulation time | 179417179 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3457664933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_av_buffer.3457664933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_bitstuff_err.22261025 |
| Short name | T2127 |
| Test name | |
| Test status | |
| Simulation time | 164189660 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:49:22 AM UTC 24 |
| Finished | Aug 27 07:49:24 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=22261025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_bitstuff_err.22261025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_clear.3494033691 |
| Short name | T2137 |
| Test name | |
| Test status | |
| Simulation time | 440786545 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:49:23 AM UTC 24 |
| Finished | Aug 27 07:49:26 AM UTC 24 |
| Peak memory | 216000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494033691 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 32.usbdev_data_toggle_clear.3494033691 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_data_toggle_restore.3030817696 |
| Short name | T2138 |
| Test name | |
| Test status | |
| Simulation time | 523070223 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:49:23 AM UTC 24 |
| Finished | Aug 27 07:49:26 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3030817696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_data_toggle_restore.3030817696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_device_address.563573302 |
| Short name | T2392 |
| Test name | |
| Test status | |
| Simulation time | 45521611925 ps |
| CPU time | 74.76 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:50:42 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563573302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_device_address.563573302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_device_timeout.4214084263 |
| Short name | T2216 |
| Test name | |
| Test status | |
| Simulation time | 3824603457 ps |
| CPU time | 24.18 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4214084263 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_device_timeout.4214084263 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_disable_endpoint.2091070999 |
| Short name | T2146 |
| Test name | |
| Test status | |
| Simulation time | 856885020 ps |
| CPU time | 2.35 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:29 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2091070999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_disable_endpoint.2091070999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_disconnected.3139480267 |
| Short name | T2140 |
| Test name | |
| Test status | |
| Simulation time | 166960157 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3139480267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_disconnected.3139480267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_enable.3539222849 |
| Short name | T2139 |
| Test name | |
| Test status | |
| Simulation time | 48729057 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3539222849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_enable.3539222849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_access.1066615980 |
| Short name | T2147 |
| Test name | |
| Test status | |
| Simulation time | 751370309 ps |
| CPU time | 2.83 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:30 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1066615980 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_access.1066615980 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_endpoint_types.3981168807 |
| Short name | T451 |
| Test name | |
| Test status | |
| Simulation time | 446728796 ps |
| CPU time | 2.47 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:29 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3981168807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_endpoint_types.3981168807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_fifo_rst.3620589931 |
| Short name | T2145 |
| Test name | |
| Test status | |
| Simulation time | 160689368 ps |
| CPU time | 2.08 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:29 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3620589931 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_fifo_rst.3620589931 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_in_iso.2060818166 |
| Short name | T2141 |
| Test name | |
| Test status | |
| Simulation time | 178327335 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:28 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060818166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_in_iso.2060818166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_in_stall.3713454655 |
| Short name | T2143 |
| Test name | |
| Test status | |
| Simulation time | 137168032 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3713454655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_stall.3713454655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_in_trans.2924213112 |
| Short name | T2152 |
| Test name | |
| Test status | |
| Simulation time | 232154714 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:49:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2924213112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_in_trans.2924213112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_invalid_sync.3702459129 |
| Short name | T2212 |
| Test name | |
| Test status | |
| Simulation time | 3001459779 ps |
| CPU time | 21.43 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:49 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3702459129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 32.usbdev_invalid_sync.3702459129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_iso_retraction.3883610343 |
| Short name | T2321 |
| Test name | |
| Test status | |
| Simulation time | 8682996435 ps |
| CPU time | 51.69 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:50:22 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883610343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_iso_retraction.3883610343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_link_in_err.932859621 |
| Short name | T2153 |
| Test name | |
| Test status | |
| Simulation time | 243082753 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:49:31 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=932859621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_link_in_err.932859621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_link_resume.2595235159 |
| Short name | T2274 |
| Test name | |
| Test status | |
| Simulation time | 27100162604 ps |
| CPU time | 38.56 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2595235159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_resume.2595235159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_link_suspend.889514262 |
| Short name | T2199 |
| Test name | |
| Test status | |
| Simulation time | 10461427470 ps |
| CPU time | 16.06 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:49:46 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=889514262 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_link_suspend.889514262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_low_speed_traffic.4074854459 |
| Short name | T2258 |
| Test name | |
| Test status | |
| Simulation time | 3737849206 ps |
| CPU time | 35.24 seconds |
| Started | Aug 27 07:49:28 AM UTC 24 |
| Finished | Aug 27 07:50:05 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4074854459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_low_speed_traffic.4074854459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_max_inter_pkt_delay.3168742339 |
| Short name | T2213 |
| Test name | |
| Test status | |
| Simulation time | 2631616578 ps |
| CPU time | 18.95 seconds |
| Started | Aug 27 07:49:30 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 230568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3168742339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_max_inter_pkt_delay.3168742339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_in_transaction.366151746 |
| Short name | T2159 |
| Test name | |
| Test status | |
| Simulation time | 293586664 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:49:30 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=366151746 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_max_length_in_transaction.366151746 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_max_length_out_transaction.569988370 |
| Short name | T2156 |
| Test name | |
| Test status | |
| Simulation time | 195883352 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:49:30 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=569988370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 32.usbdev_max_length_out_transaction.569988370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_min_inter_pkt_delay.393880963 |
| Short name | T2307 |
| Test name | |
| Test status | |
| Simulation time | 1876953626 ps |
| CPU time | 46.91 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:50:19 AM UTC 24 |
| Peak memory | 235104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=393880963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_min_inter_pkt_delay.393880963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_in_transaction.1467438599 |
| Short name | T2158 |
| Test name | |
| Test status | |
| Simulation time | 181525465 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1467438599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_in_transaction.1467438599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_min_length_out_transaction.3129231871 |
| Short name | T2155 |
| Test name | |
| Test status | |
| Simulation time | 144610673 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3129231871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_min_length_out_transaction.3129231871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_nak_trans.2660123077 |
| Short name | T2157 |
| Test name | |
| Test status | |
| Simulation time | 207700364 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2660123077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_nak_trans.2660123077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_out_iso.536583060 |
| Short name | T2160 |
| Test name | |
| Test status | |
| Simulation time | 167675207 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 215976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=536583060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 32.usbdev_out_iso.536583060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_out_stall.4080003269 |
| Short name | T2161 |
| Test name | |
| Test status | |
| Simulation time | 180526729 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:49:31 AM UTC 24 |
| Finished | Aug 27 07:49:33 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4080003269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_out_stall.4080003269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_out_trans_nak.2461966555 |
| Short name | T2164 |
| Test name | |
| Test status | |
| Simulation time | 159313348 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:49:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461966555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 32.usbdev_out_trans_nak.2461966555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_pending_in_trans.1851264804 |
| Short name | T2167 |
| Test name | |
| Test status | |
| Simulation time | 182747946 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:49:35 AM UTC 24 |
| Peak memory | 215296 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851264804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 32.usbdev_pending_in_trans.1851264804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_pinflip.4020927124 |
| Short name | T2165 |
| Test name | |
| Test status | |
| Simulation time | 208008639 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:49:35 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020927124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_pinflip.4020927124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_phy_config_usb_ref_disable.1891720283 |
| Short name | T2166 |
| Test name | |
| Test status | |
| Simulation time | 145308664 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:49:35 AM UTC 24 |
| Peak memory | 215252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1891720283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 32.usbdev_phy_config_usb_ref_disable.1891720283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_phy_pins_sense.1407645196 |
| Short name | T2163 |
| Test name | |
| Test status | |
| Simulation time | 53106226 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:49:35 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1407645196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_phy_pins_sense.1407645196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_buffer.2950815943 |
| Short name | T2277 |
| Test name | |
| Test status | |
| Simulation time | 12633356720 ps |
| CPU time | 35.63 seconds |
| Started | Aug 27 07:49:33 AM UTC 24 |
| Finished | Aug 27 07:50:10 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2950815943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 32.usbdev_pkt_buffer.2950815943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_received.2672863644 |
| Short name | T2172 |
| Test name | |
| Test status | |
| Simulation time | 176192241 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2672863644 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_pkt_received.2672863644 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_pkt_sent.3873725200 |
| Short name | T2175 |
| Test name | |
| Test status | |
| Simulation time | 174315603 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873725200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 32.usbdev_pkt_sent.3873725200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_in_transaction.791781678 |
| Short name | T2176 |
| Test name | |
| Test status | |
| Simulation time | 245177978 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=791781678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 32.usbdev_random_length_in_transaction.791781678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_random_length_out_transaction.2427668176 |
| Short name | T2173 |
| Test name | |
| Test status | |
| Simulation time | 163041852 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2427668176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 32.usbdev_random_length_out_transaction.2427668176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_rx_crc_err.512306717 |
| Short name | T2174 |
| Test name | |
| Test status | |
| Simulation time | 159340160 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=512306717 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_rx_crc_err.512306717 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_rx_full.3177443330 |
| Short name | T2177 |
| Test name | |
| Test status | |
| Simulation time | 268293372 ps |
| CPU time | 1.88 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177443330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 32.usbdev_rx_full.3177443330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_setup_stage.1192408129 |
| Short name | T2170 |
| Test name | |
| Test status | |
| Simulation time | 167179885 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1192408129 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_setup_stage.1192408129 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_setup_trans_ignored.3123668987 |
| Short name | T2171 |
| Test name | |
| Test status | |
| Simulation time | 205369301 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:49:35 AM UTC 24 |
| Finished | Aug 27 07:49:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3123668987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 32.usbdev_setup_trans_ignored.3123668987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_smoke.4158866937 |
| Short name | T2183 |
| Test name | |
| Test status | |
| Simulation time | 236132361 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:49:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158866937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_smoke.4158866937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_spurious_pids_ignored.3299233167 |
| Short name | T2251 |
| Test name | |
| Test status | |
| Simulation time | 2989779246 ps |
| CPU time | 23.22 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3299233167 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 32.usbdev_spurious_pids_ignored.3299233167 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_stall_priority_over_nak.4738881 |
| Short name | T2182 |
| Test name | |
| Test status | |
| Simulation time | 178698055 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:49:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4738881 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak_v seq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -c m_log /dev/null -cm_name 32.usbdev_stall_priority_over_nak.4738881 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_stall_trans.3541873011 |
| Short name | T2181 |
| Test name | |
| Test status | |
| Simulation time | 155932894 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:49:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3541873011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 32.usbdev_stall_trans.3541873011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_stream_len_max.1611959522 |
| Short name | T2184 |
| Test name | |
| Test status | |
| Simulation time | 727887468 ps |
| CPU time | 2.44 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:49:41 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1611959522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_stream_len_max.1611959522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_streaming_out.2991349683 |
| Short name | T2265 |
| Test name | |
| Test status | |
| Simulation time | 3856062367 ps |
| CPU time | 28.19 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:50:07 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2991349683 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 32.usbdev_streaming_out.2991349683 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_timeout_missing_host_handshake.2584753871 |
| Short name | T2226 |
| Test name | |
| Test status | |
| Simulation time | 1288099048 ps |
| CPU time | 26.15 seconds |
| Started | Aug 27 07:49:26 AM UTC 24 |
| Finished | Aug 27 07:49:53 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2584753871 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_timeout_missing_host_handshake.2584753871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/32.usbdev_tx_rx_disruption.4227084276 |
| Short name | T2185 |
| Test name | |
| Test status | |
| Simulation time | 680310181 ps |
| CPU time | 2.28 seconds |
| Started | Aug 27 07:49:37 AM UTC 24 |
| Finished | Aug 27 07:49:41 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4227084276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 32.usbdev_t x_rx_disruption.4227084276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/32.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/320.usbdev_tx_rx_disruption.1997693853 |
| Short name | T3448 |
| Test name | |
| Test status | |
| Simulation time | 535127285 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 218192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1997693853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 320.usbdev_ tx_rx_disruption.1997693853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/320.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/321.usbdev_tx_rx_disruption.1071002036 |
| Short name | T3430 |
| Test name | |
| Test status | |
| Simulation time | 513219344 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:33 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1071002036 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 321.usbdev_ tx_rx_disruption.1071002036 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/321.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/322.usbdev_tx_rx_disruption.3827566035 |
| Short name | T3446 |
| Test name | |
| Test status | |
| Simulation time | 693141477 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:55:34 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3827566035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 322.usbdev_ tx_rx_disruption.3827566035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/322.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/323.usbdev_tx_rx_disruption.3407223576 |
| Short name | T3434 |
| Test name | |
| Test status | |
| Simulation time | 555916441 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:34 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3407223576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 323.usbdev_ tx_rx_disruption.3407223576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/323.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/324.usbdev_tx_rx_disruption.402157493 |
| Short name | T3445 |
| Test name | |
| Test status | |
| Simulation time | 565514404 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:55:34 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 215680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=402157493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 324.usbdev_t x_rx_disruption.402157493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/324.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/325.usbdev_tx_rx_disruption.4263990913 |
| Short name | T3438 |
| Test name | |
| Test status | |
| Simulation time | 602148194 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:34 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4263990913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 325.usbdev_ tx_rx_disruption.4263990913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/325.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/326.usbdev_tx_rx_disruption.3755277655 |
| Short name | T3461 |
| Test name | |
| Test status | |
| Simulation time | 582363290 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:55:36 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3755277655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 326.usbdev_ tx_rx_disruption.3755277655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/326.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/327.usbdev_tx_rx_disruption.2255980702 |
| Short name | T3466 |
| Test name | |
| Test status | |
| Simulation time | 495349937 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2255980702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 327.usbdev_ tx_rx_disruption.2255980702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/327.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/328.usbdev_tx_rx_disruption.806580454 |
| Short name | T3470 |
| Test name | |
| Test status | |
| Simulation time | 689988674 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 215744 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=806580454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 328.usbdev_t x_rx_disruption.806580454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/328.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/329.usbdev_tx_rx_disruption.3228963195 |
| Short name | T3468 |
| Test name | |
| Test status | |
| Simulation time | 466084617 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 215732 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3228963195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 329.usbdev_ tx_rx_disruption.3228963195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/329.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_alert_test.2308755907 |
| Short name | T2186 |
| Test name | |
| Test status | |
| Simulation time | 37115439 ps |
| CPU time | 0.76 seconds |
| Started | Aug 27 07:49:55 AM UTC 24 |
| Finished | Aug 27 07:49:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2308755907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 33.usbdev_alert_test.2308755907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_disconnect.3850197749 |
| Short name | T2203 |
| Test name | |
| Test status | |
| Simulation time | 4084444859 ps |
| CPU time | 5.82 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:47 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3850197749 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_disconnect.3850197749 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_reset.1777314515 |
| Short name | T2268 |
| Test name | |
| Test status | |
| Simulation time | 20195195481 ps |
| CPU time | 26.24 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1777314515 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_reset.1777314515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_aon_wake_resume.1189451260 |
| Short name | T2308 |
| Test name | |
| Test status | |
| Simulation time | 30496485883 ps |
| CPU time | 37.71 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:50:19 AM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1189451260 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_aon_wake_resume.1189451260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_av_buffer.2887919654 |
| Short name | T2190 |
| Test name | |
| Test status | |
| Simulation time | 148312168 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:43 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2887919654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_av_buffer.2887919654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_bitstuff_err.4174083123 |
| Short name | T2191 |
| Test name | |
| Test status | |
| Simulation time | 161658940 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174083123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_bitstuff_err.4174083123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_clear.1239118986 |
| Short name | T2192 |
| Test name | |
| Test status | |
| Simulation time | 511839426 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239118986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 33.usbdev_data_toggle_clear.1239118986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_data_toggle_restore.708363901 |
| Short name | T2194 |
| Test name | |
| Test status | |
| Simulation time | 929628226 ps |
| CPU time | 3.49 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:49:45 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=708363901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_data_toggle_restore.708363901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_device_address.1268061671 |
| Short name | T2433 |
| Test name | |
| Test status | |
| Simulation time | 42549341978 ps |
| CPU time | 73.44 seconds |
| Started | Aug 27 07:49:40 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268061671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_address.1268061671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_device_timeout.1416010888 |
| Short name | T2196 |
| Test name | |
| Test status | |
| Simulation time | 207377493 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:49:42 AM UTC 24 |
| Finished | Aug 27 07:49:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1416010888 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_device_timeout.1416010888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_disable_endpoint.2620834846 |
| Short name | T2201 |
| Test name | |
| Test status | |
| Simulation time | 733505108 ps |
| CPU time | 2.62 seconds |
| Started | Aug 27 07:49:42 AM UTC 24 |
| Finished | Aug 27 07:49:46 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2620834846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_disable_endpoint.2620834846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_disconnected.115250084 |
| Short name | T2198 |
| Test name | |
| Test status | |
| Simulation time | 161888651 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:49:42 AM UTC 24 |
| Finished | Aug 27 07:49:45 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=115250084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_disconnected.115250084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_enable.1735374059 |
| Short name | T2195 |
| Test name | |
| Test status | |
| Simulation time | 40911920 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:49:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1735374059 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 33.usbdev_enable.1735374059 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_access.3337352629 |
| Short name | T2204 |
| Test name | |
| Test status | |
| Simulation time | 912130250 ps |
| CPU time | 3.25 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:49:47 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3337352629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_access.3337352629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_endpoint_types.1044481255 |
| Short name | T477 |
| Test name | |
| Test status | |
| Simulation time | 376970520 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:49:46 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1044481255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_endpoint_types.1044481255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_fifo_rst.3772633086 |
| Short name | T2200 |
| Test name | |
| Test status | |
| Simulation time | 158336348 ps |
| CPU time | 2.26 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:49:46 AM UTC 24 |
| Peak memory | 217940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772633086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_fifo_rst.3772633086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_in_iso.3687206813 |
| Short name | T2197 |
| Test name | |
| Test status | |
| Simulation time | 215390488 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:49:45 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3687206813 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_in_iso.3687206813 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_in_stall.1697164209 |
| Short name | T2205 |
| Test name | |
| Test status | |
| Simulation time | 135502810 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:49:45 AM UTC 24 |
| Finished | Aug 27 07:49:47 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1697164209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_stall.1697164209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_in_trans.1494304134 |
| Short name | T2207 |
| Test name | |
| Test status | |
| Simulation time | 235556028 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:49:45 AM UTC 24 |
| Finished | Aug 27 07:49:47 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494304134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_in_trans.1494304134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_invalid_sync.3199653108 |
| Short name | T2481 |
| Test name | |
| Test status | |
| Simulation time | 3524251461 ps |
| CPU time | 87.25 seconds |
| Started | Aug 27 07:49:43 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 235268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3199653108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 33.usbdev_invalid_sync.3199653108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_iso_retraction.2419161514 |
| Short name | T2568 |
| Test name | |
| Test status | |
| Simulation time | 8973346872 ps |
| CPU time | 107.56 seconds |
| Started | Aug 27 07:49:45 AM UTC 24 |
| Finished | Aug 27 07:51:35 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419161514 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_iso_retraction.2419161514 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_link_in_err.2138562653 |
| Short name | T2206 |
| Test name | |
| Test status | |
| Simulation time | 222070255 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:49:45 AM UTC 24 |
| Finished | Aug 27 07:49:47 AM UTC 24 |
| Peak memory | 215560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2138562653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_link_in_err.2138562653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_link_resume.37425001 |
| Short name | T2387 |
| Test name | |
| Test status | |
| Simulation time | 33861119101 ps |
| CPU time | 54.63 seconds |
| Started | Aug 27 07:49:45 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 218196 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=37425001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_link_resume.37425001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_link_suspend.1546822491 |
| Short name | T2248 |
| Test name | |
| Test status | |
| Simulation time | 8898859585 ps |
| CPU time | 11.84 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1546822491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 33.usbdev_link_suspend.1546822491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_low_speed_traffic.3077601702 |
| Short name | T2630 |
| Test name | |
| Test status | |
| Simulation time | 4442703453 ps |
| CPU time | 120.33 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:51:51 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3077601702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_low_speed_traffic.3077601702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_max_inter_pkt_delay.2487175628 |
| Short name | T2493 |
| Test name | |
| Test status | |
| Simulation time | 3278573681 ps |
| CPU time | 84.68 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:51:15 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2487175628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_max_inter_pkt_delay.2487175628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_in_transaction.214547160 |
| Short name | T2220 |
| Test name | |
| Test status | |
| Simulation time | 252956012 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=214547160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_in_transaction.214547160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_max_length_out_transaction.1539523254 |
| Short name | T2214 |
| Test name | |
| Test status | |
| Simulation time | 195594173 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1539523254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_max_length_out_transaction.1539523254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_min_inter_pkt_delay.3362830654 |
| Short name | T2256 |
| Test name | |
| Test status | |
| Simulation time | 1925832947 ps |
| CPU time | 13.33 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:50:03 AM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3362830654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_min_inter_pkt_delay.3362830654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_in_transaction.3121365217 |
| Short name | T2221 |
| Test name | |
| Test status | |
| Simulation time | 191302900 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3121365217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_in_transaction.3121365217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_min_length_out_transaction.4203973044 |
| Short name | T2219 |
| Test name | |
| Test status | |
| Simulation time | 162679855 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203973044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_min_length_out_transaction.4203973044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_nak_trans.2876888917 |
| Short name | T2224 |
| Test name | |
| Test status | |
| Simulation time | 196274011 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876888917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_nak_trans.2876888917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_out_iso.1136121269 |
| Short name | T2225 |
| Test name | |
| Test status | |
| Simulation time | 161748795 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136121269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_out_iso.1136121269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_out_stall.394376892 |
| Short name | T2218 |
| Test name | |
| Test status | |
| Simulation time | 190409392 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=394376892 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_out_stall.394376892 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_out_trans_nak.1620093194 |
| Short name | T2223 |
| Test name | |
| Test status | |
| Simulation time | 161777357 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1620093194 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_out_trans_nak.1620093194 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_pending_in_trans.3585094710 |
| Short name | T2215 |
| Test name | |
| Test status | |
| Simulation time | 156141114 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3585094710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 33.usbdev_pending_in_trans.3585094710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_pinflip.1968452214 |
| Short name | T2222 |
| Test name | |
| Test status | |
| Simulation time | 207140736 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:49:49 AM UTC 24 |
| Finished | Aug 27 07:49:51 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968452214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_pinflip.1968452214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_phy_config_usb_ref_disable.3730409001 |
| Short name | T2228 |
| Test name | |
| Test status | |
| Simulation time | 210720068 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3730409001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 33.usbdev_phy_config_usb_ref_disable.3730409001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_phy_pins_sense.3808026999 |
| Short name | T2227 |
| Test name | |
| Test status | |
| Simulation time | 41165616 ps |
| CPU time | 0.72 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3808026999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_phy_pins_sense.3808026999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_buffer.2934915381 |
| Short name | T2285 |
| Test name | |
| Test status | |
| Simulation time | 6806261694 ps |
| CPU time | 18.84 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:50:13 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2934915381 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 33.usbdev_pkt_buffer.2934915381 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_received.599256267 |
| Short name | T2234 |
| Test name | |
| Test status | |
| Simulation time | 153523460 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=599256267 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_pkt_received.599256267 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_pkt_sent.2694631689 |
| Short name | T2238 |
| Test name | |
| Test status | |
| Simulation time | 180703381 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2694631689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 33.usbdev_pkt_sent.2694631689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_in_transaction.3690113435 |
| Short name | T2230 |
| Test name | |
| Test status | |
| Simulation time | 158892567 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690113435 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 33.usbdev_random_length_in_transaction.3690113435 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_random_length_out_transaction.1128603693 |
| Short name | T2232 |
| Test name | |
| Test status | |
| Simulation time | 169134676 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 215832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128603693 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 33.usbdev_random_length_out_transaction.1128603693 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_rx_crc_err.890865365 |
| Short name | T2235 |
| Test name | |
| Test status | |
| Simulation time | 175388586 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=890865365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_rx_crc_err.890865365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_rx_full.4233352511 |
| Short name | T2242 |
| Test name | |
| Test status | |
| Simulation time | 262340217 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4233352511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 33.usbdev_rx_full.4233352511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_setup_stage.2328910871 |
| Short name | T2236 |
| Test name | |
| Test status | |
| Simulation time | 158994884 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 215868 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2328910871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_setup_stage.2328910871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_setup_trans_ignored.2777068018 |
| Short name | T2233 |
| Test name | |
| Test status | |
| Simulation time | 151829952 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:55 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777068018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 33.usbdev_setup_trans_ignored.2777068018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_smoke.78124850 |
| Short name | T2240 |
| Test name | |
| Test status | |
| Simulation time | 208791317 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=78124850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 33.usbdev_smoke.78124850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_spurious_pids_ignored.2521474973 |
| Short name | T2472 |
| Test name | |
| Test status | |
| Simulation time | 2846706768 ps |
| CPU time | 72.54 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:51:08 AM UTC 24 |
| Peak memory | 228560 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2521474973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 33.usbdev_spurious_pids_ignored.2521474973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_stall_priority_over_nak.3844101106 |
| Short name | T2239 |
| Test name | |
| Test status | |
| Simulation time | 182795856 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844101106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stall_priority_over_nak.3844101106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_stall_trans.3741668513 |
| Short name | T2241 |
| Test name | |
| Test status | |
| Simulation time | 246260907 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741668513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 33.usbdev_stall_trans.3741668513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_stream_len_max.3999887954 |
| Short name | T2244 |
| Test name | |
| Test status | |
| Simulation time | 730222258 ps |
| CPU time | 1.98 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3999887954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_stream_len_max.3999887954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_streaming_out.2318354564 |
| Short name | T2456 |
| Test name | |
| Test status | |
| Simulation time | 2792836954 ps |
| CPU time | 67.76 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:51:03 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2318354564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 33.usbdev_streaming_out.2318354564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_timeout_missing_host_handshake.4049338 |
| Short name | T2243 |
| Test name | |
| Test status | |
| Simulation time | 1577114190 ps |
| CPU time | 12.29 seconds |
| Started | Aug 27 07:49:42 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4049338 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_ 08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_timeout_missing_host_handshake.4049338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/33.usbdev_tx_rx_disruption.779046242 |
| Short name | T199 |
| Test name | |
| Test status | |
| Simulation time | 515143184 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:49:53 AM UTC 24 |
| Finished | Aug 27 07:49:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=779046242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 33.usbdev_tx _rx_disruption.779046242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/33.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/330.usbdev_tx_rx_disruption.2330564243 |
| Short name | T3465 |
| Test name | |
| Test status | |
| Simulation time | 570373018 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2330564243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 330.usbdev_ tx_rx_disruption.2330564243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/330.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/331.usbdev_tx_rx_disruption.1804657804 |
| Short name | T3471 |
| Test name | |
| Test status | |
| Simulation time | 572453822 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1804657804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 331.usbdev_ tx_rx_disruption.1804657804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/331.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/332.usbdev_tx_rx_disruption.1985351429 |
| Short name | T3469 |
| Test name | |
| Test status | |
| Simulation time | 548620336 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1985351429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 332.usbdev_ tx_rx_disruption.1985351429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/332.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/333.usbdev_tx_rx_disruption.3893964018 |
| Short name | T3477 |
| Test name | |
| Test status | |
| Simulation time | 692840164 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3893964018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 333.usbdev_ tx_rx_disruption.3893964018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/333.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/334.usbdev_tx_rx_disruption.3671229782 |
| Short name | T3472 |
| Test name | |
| Test status | |
| Simulation time | 633040721 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3671229782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 334.usbdev_ tx_rx_disruption.3671229782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/334.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/335.usbdev_tx_rx_disruption.302788208 |
| Short name | T3478 |
| Test name | |
| Test status | |
| Simulation time | 598080814 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=302788208 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 335.usbdev_t x_rx_disruption.302788208 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/335.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/336.usbdev_tx_rx_disruption.97012673 |
| Short name | T3479 |
| Test name | |
| Test status | |
| Simulation time | 558126945 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:55:39 AM UTC 24 |
| Finished | Aug 27 07:55:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=97012673 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 336.usbdev_tx _rx_disruption.97012673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/336.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/337.usbdev_tx_rx_disruption.1802615704 |
| Short name | T3473 |
| Test name | |
| Test status | |
| Simulation time | 643107786 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:40 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1802615704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 337.usbdev_ tx_rx_disruption.1802615704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/337.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/338.usbdev_tx_rx_disruption.780491975 |
| Short name | T3476 |
| Test name | |
| Test status | |
| Simulation time | 617521968 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:55:40 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=780491975 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 338.usbdev_t x_rx_disruption.780491975 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/338.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/339.usbdev_tx_rx_disruption.926715875 |
| Short name | T3475 |
| Test name | |
| Test status | |
| Simulation time | 538025208 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:55:40 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=926715875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 339.usbdev_t x_rx_disruption.926715875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/339.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_alert_test.3492612821 |
| Short name | T2293 |
| Test name | |
| Test status | |
| Simulation time | 58336555 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3492612821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 34.usbdev_alert_test.3492612821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_disconnect.2846644589 |
| Short name | T2257 |
| Test name | |
| Test status | |
| Simulation time | 4953582802 ps |
| CPU time | 8.69 seconds |
| Started | Aug 27 07:49:55 AM UTC 24 |
| Finished | Aug 27 07:50:05 AM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2846644589 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_disconnect.2846644589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_reset.279544634 |
| Short name | T2310 |
| Test name | |
| Test status | |
| Simulation time | 15998344488 ps |
| CPU time | 20.22 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:20 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=279544634 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_reset.279544634 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_aon_wake_resume.4036102788 |
| Short name | T2374 |
| Test name | |
| Test status | |
| Simulation time | 24892197158 ps |
| CPU time | 37.62 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4036102788 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_aon_wake_resume.4036102788 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_av_buffer.1171529424 |
| Short name | T2150 |
| Test name | |
| Test status | |
| Simulation time | 170675450 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171529424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_av_buffer.1171529424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_bitstuff_err.346081013 |
| Short name | T1856 |
| Test name | |
| Test status | |
| Simulation time | 156270261 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=346081013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_bitstuff_err.346081013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_clear.2973631333 |
| Short name | T2246 |
| Test name | |
| Test status | |
| Simulation time | 500537243 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2973631333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 34.usbdev_data_toggle_clear.2973631333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_data_toggle_restore.1558218440 |
| Short name | T2254 |
| Test name | |
| Test status | |
| Simulation time | 890840398 ps |
| CPU time | 3.43 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:03 AM UTC 24 |
| Peak memory | 218080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1558218440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_data_toggle_restore.1558218440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_device_address.4059607362 |
| Short name | T2453 |
| Test name | |
| Test status | |
| Simulation time | 33347647986 ps |
| CPU time | 60.82 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4059607362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_address.4059607362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_device_timeout.2527405330 |
| Short name | T2419 |
| Test name | |
| Test status | |
| Simulation time | 8374922892 ps |
| CPU time | 49.93 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:50 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2527405330 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_device_timeout.2527405330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_disable_endpoint.2096230003 |
| Short name | T2255 |
| Test name | |
| Test status | |
| Simulation time | 970756799 ps |
| CPU time | 3.5 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:03 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2096230003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_disable_endpoint.2096230003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_disconnected.308313821 |
| Short name | T2231 |
| Test name | |
| Test status | |
| Simulation time | 156859990 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=308313821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_disconnected.308313821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_enable.3906957642 |
| Short name | T2229 |
| Test name | |
| Test status | |
| Simulation time | 32822852 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3906957642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 34.usbdev_enable.3906957642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_access.92721450 |
| Short name | T2253 |
| Test name | |
| Test status | |
| Simulation time | 879461654 ps |
| CPU time | 2.59 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 218076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=92721450 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_endpoint_access.92721450 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_endpoint_types.3482623184 |
| Short name | T393 |
| Test name | |
| Test status | |
| Simulation time | 463350628 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3482623184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_endpoint_types.3482623184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_fifo_rst.1451025054 |
| Short name | T2250 |
| Test name | |
| Test status | |
| Simulation time | 160831672 ps |
| CPU time | 1.9 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1451025054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_fifo_rst.1451025054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_in_iso.2992584247 |
| Short name | T2249 |
| Test name | |
| Test status | |
| Simulation time | 221221782 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2992584247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 34.usbdev_in_iso.2992584247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_in_stall.2628831288 |
| Short name | T2247 |
| Test name | |
| Test status | |
| Simulation time | 137646775 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:50:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2628831288 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_stall.2628831288 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_in_trans.4262524445 |
| Short name | T2252 |
| Test name | |
| Test status | |
| Simulation time | 211944137 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:50:00 AM UTC 24 |
| Finished | Aug 27 07:50:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4262524445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_in_trans.4262524445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_invalid_sync.2936987736 |
| Short name | T2524 |
| Test name | |
| Test status | |
| Simulation time | 3186885587 ps |
| CPU time | 82.99 seconds |
| Started | Aug 27 07:49:59 AM UTC 24 |
| Finished | Aug 27 07:51:24 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936987736 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 34.usbdev_invalid_sync.2936987736 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_iso_retraction.4112306984 |
| Short name | T2527 |
| Test name | |
| Test status | |
| Simulation time | 12709557365 ps |
| CPU time | 79.38 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112306984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_iso_retraction.4112306984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_link_in_err.3248191695 |
| Short name | T2260 |
| Test name | |
| Test status | |
| Simulation time | 182019320 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:50:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3248191695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_in_err.3248191695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_link_resume.3902391360 |
| Short name | T2369 |
| Test name | |
| Test status | |
| Simulation time | 25024727846 ps |
| CPU time | 31.78 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902391360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_link_resume.3902391360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_link_suspend.3667048465 |
| Short name | T2319 |
| Test name | |
| Test status | |
| Simulation time | 9505412701 ps |
| CPU time | 16.28 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:50:21 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3667048465 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_link_suspend.3667048465 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_low_speed_traffic.2155747296 |
| Short name | T2330 |
| Test name | |
| Test status | |
| Simulation time | 3062714705 ps |
| CPU time | 19.74 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2155747296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_low_speed_traffic.2155747296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_max_inter_pkt_delay.1442391508 |
| Short name | T2601 |
| Test name | |
| Test status | |
| Simulation time | 3671056621 ps |
| CPU time | 96.46 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1442391508 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_max_inter_pkt_delay.1442391508 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_in_transaction.1193445213 |
| Short name | T2259 |
| Test name | |
| Test status | |
| Simulation time | 245313839 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:50:03 AM UTC 24 |
| Finished | Aug 27 07:50:06 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1193445213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_in_transaction.1193445213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_max_length_out_transaction.2874933256 |
| Short name | T2263 |
| Test name | |
| Test status | |
| Simulation time | 195213761 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:50:04 AM UTC 24 |
| Finished | Aug 27 07:50:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2874933256 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_max_length_out_transaction.2874933256 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_min_inter_pkt_delay.691693485 |
| Short name | T2337 |
| Test name | |
| Test status | |
| Simulation time | 2946437231 ps |
| CPU time | 20.57 seconds |
| Started | Aug 27 07:50:04 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 228456 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=691693485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_min_inter_pkt_delay.691693485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_in_transaction.794520364 |
| Short name | T2262 |
| Test name | |
| Test status | |
| Simulation time | 165174171 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:50:04 AM UTC 24 |
| Finished | Aug 27 07:50:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=794520364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_in_transaction.794520364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_min_length_out_transaction.3605019067 |
| Short name | T2261 |
| Test name | |
| Test status | |
| Simulation time | 140737658 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:50:04 AM UTC 24 |
| Finished | Aug 27 07:50:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3605019067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_min_length_out_transaction.3605019067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_nak_trans.286866410 |
| Short name | T2271 |
| Test name | |
| Test status | |
| Simulation time | 180235918 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:50:06 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=286866410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_nak_trans.286866410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_out_iso.4166376689 |
| Short name | T2269 |
| Test name | |
| Test status | |
| Simulation time | 249039155 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:50:06 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4166376689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_out_iso.4166376689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_out_stall.808225130 |
| Short name | T2272 |
| Test name | |
| Test status | |
| Simulation time | 184787999 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:50:06 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=808225130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_out_stall.808225130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_out_trans_nak.3545801947 |
| Short name | T2273 |
| Test name | |
| Test status | |
| Simulation time | 193344981 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:50:06 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545801947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_out_trans_nak.3545801947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_pending_in_trans.3661159748 |
| Short name | T2270 |
| Test name | |
| Test status | |
| Simulation time | 157266248 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:50:06 AM UTC 24 |
| Finished | Aug 27 07:50:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3661159748 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 34.usbdev_pending_in_trans.3661159748 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_pinflip.3022562424 |
| Short name | T2279 |
| Test name | |
| Test status | |
| Simulation time | 236816233 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:10 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3022562424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_pinflip.3022562424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_phy_config_usb_ref_disable.2972582243 |
| Short name | T2276 |
| Test name | |
| Test status | |
| Simulation time | 190774441 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2972582243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 34.usbdev_phy_config_usb_ref_disable.2972582243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_phy_pins_sense.1841537847 |
| Short name | T2275 |
| Test name | |
| Test status | |
| Simulation time | 64656354 ps |
| CPU time | 0.67 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:09 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841537847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_phy_pins_sense.1841537847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_buffer.3608204050 |
| Short name | T2460 |
| Test name | |
| Test status | |
| Simulation time | 20078657387 ps |
| CPU time | 54.22 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:51:04 AM UTC 24 |
| Peak memory | 232648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3608204050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_pkt_buffer.3608204050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_received.1175585819 |
| Short name | T2280 |
| Test name | |
| Test status | |
| Simulation time | 189126969 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1175585819 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 34.usbdev_pkt_received.1175585819 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_pkt_sent.1814297333 |
| Short name | T2281 |
| Test name | |
| Test status | |
| Simulation time | 224268193 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814297333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_pkt_sent.1814297333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_in_transaction.4188447385 |
| Short name | T2278 |
| Test name | |
| Test status | |
| Simulation time | 212645917 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:50:08 AM UTC 24 |
| Finished | Aug 27 07:50:10 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188447385 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 34.usbdev_random_length_in_transaction.4188447385 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_random_length_out_transaction.491799937 |
| Short name | T2290 |
| Test name | |
| Test status | |
| Simulation time | 172509186 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=491799937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 34.usbdev_random_length_out_transaction.491799937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_rx_crc_err.1889893643 |
| Short name | T2286 |
| Test name | |
| Test status | |
| Simulation time | 242403050 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1889893643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 34.usbdev_rx_crc_err.1889893643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_rx_full.3464871808 |
| Short name | T2288 |
| Test name | |
| Test status | |
| Simulation time | 282242390 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464871808 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 34.usbdev_rx_full.3464871808 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_setup_stage.54574136 |
| Short name | T2289 |
| Test name | |
| Test status | |
| Simulation time | 159990689 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=54574136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 34.usbdev_setup_stage.54574136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_setup_trans_ignored.861751675 |
| Short name | T2291 |
| Test name | |
| Test status | |
| Simulation time | 190966102 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=861751675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 34.usbdev_setup_trans_ignored.861751675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_smoke.2760042142 |
| Short name | T2294 |
| Test name | |
| Test status | |
| Simulation time | 252901757 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2760042142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_smoke.2760042142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_spurious_pids_ignored.241437866 |
| Short name | T2569 |
| Test name | |
| Test status | |
| Simulation time | 3238600990 ps |
| CPU time | 81.46 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:51:35 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=241437866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 34.usbdev_spurious_pids_ignored.241437866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_stall_priority_over_nak.2915154238 |
| Short name | T2295 |
| Test name | |
| Test status | |
| Simulation time | 192832191 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2915154238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stall_priority_over_nak.2915154238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_stall_trans.3854504175 |
| Short name | T2292 |
| Test name | |
| Test status | |
| Simulation time | 172325321 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:14 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3854504175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 34.usbdev_stall_trans.3854504175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_stream_len_max.1858738527 |
| Short name | T2299 |
| Test name | |
| Test status | |
| Simulation time | 1038255663 ps |
| CPU time | 2.87 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:16 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1858738527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_stream_len_max.1858738527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_streaming_out.902529948 |
| Short name | T2359 |
| Test name | |
| Test status | |
| Simulation time | 2578999802 ps |
| CPU time | 18.22 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 230624 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=902529948 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 34.usbdev_streaming_out.902529948 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_timeout_missing_host_handshake.3111726854 |
| Short name | T2347 |
| Test name | |
| Test status | |
| Simulation time | 4308428327 ps |
| CPU time | 28.38 seconds |
| Started | Aug 27 07:49:58 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111726854 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_timeout_missing_host_handshake.3111726854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/34.usbdev_tx_rx_disruption.735137943 |
| Short name | T2297 |
| Test name | |
| Test status | |
| Simulation time | 455363999 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=735137943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 34.usbdev_tx _rx_disruption.735137943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/34.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/340.usbdev_tx_rx_disruption.1077806271 |
| Short name | T3474 |
| Test name | |
| Test status | |
| Simulation time | 488759706 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:40 AM UTC 24 |
| Finished | Aug 27 07:55:49 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1077806271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 340.usbdev_ tx_rx_disruption.1077806271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/340.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/341.usbdev_tx_rx_disruption.1555359387 |
| Short name | T3437 |
| Test name | |
| Test status | |
| Simulation time | 502595115 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:55:42 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1555359387 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 341.usbdev_ tx_rx_disruption.1555359387 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/341.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/342.usbdev_tx_rx_disruption.1138041653 |
| Short name | T3442 |
| Test name | |
| Test status | |
| Simulation time | 602817704 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:55:42 AM UTC 24 |
| Finished | Aug 27 07:55:48 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1138041653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 342.usbdev_ tx_rx_disruption.1138041653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/342.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/343.usbdev_tx_rx_disruption.2348148184 |
| Short name | T3429 |
| Test name | |
| Test status | |
| Simulation time | 477508588 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:55:42 AM UTC 24 |
| Finished | Aug 27 07:55:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2348148184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 343.usbdev_ tx_rx_disruption.2348148184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/343.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/344.usbdev_tx_rx_disruption.704391255 |
| Short name | T3480 |
| Test name | |
| Test status | |
| Simulation time | 557882338 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:56 AM UTC 24 |
| Peak memory | 215784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=704391255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 344.usbdev_t x_rx_disruption.704391255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/344.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/345.usbdev_tx_rx_disruption.3753735056 |
| Short name | T3493 |
| Test name | |
| Test status | |
| Simulation time | 567990216 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3753735056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 345.usbdev_ tx_rx_disruption.3753735056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/345.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/346.usbdev_tx_rx_disruption.2293447845 |
| Short name | T3484 |
| Test name | |
| Test status | |
| Simulation time | 595856162 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2293447845 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 346.usbdev_ tx_rx_disruption.2293447845 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/346.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/347.usbdev_tx_rx_disruption.1523644865 |
| Short name | T3482 |
| Test name | |
| Test status | |
| Simulation time | 508617089 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1523644865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 347.usbdev_ tx_rx_disruption.1523644865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/347.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/348.usbdev_tx_rx_disruption.1566212769 |
| Short name | T3481 |
| Test name | |
| Test status | |
| Simulation time | 501501065 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1566212769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 348.usbdev_ tx_rx_disruption.1566212769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/348.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/349.usbdev_tx_rx_disruption.208009836 |
| Short name | T3483 |
| Test name | |
| Test status | |
| Simulation time | 505459426 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=208009836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 349.usbdev_t x_rx_disruption.208009836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/349.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_alert_test.1830832565 |
| Short name | T2353 |
| Test name | |
| Test status | |
| Simulation time | 39123862 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1830832565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 35.usbdev_alert_test.1830832565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_disconnect.3675655478 |
| Short name | T2312 |
| Test name | |
| Test status | |
| Simulation time | 4744529853 ps |
| CPU time | 6.73 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:20 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3675655478 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_disconnect.3675655478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_reset.4109969246 |
| Short name | T2380 |
| Test name | |
| Test status | |
| Simulation time | 18721612674 ps |
| CPU time | 25.56 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4109969246 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_reset.4109969246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_aon_wake_resume.1520899990 |
| Short name | T2412 |
| Test name | |
| Test status | |
| Simulation time | 25816483163 ps |
| CPU time | 34.27 seconds |
| Started | Aug 27 07:50:12 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1520899990 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_aon_wake_resume.1520899990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_av_buffer.782452157 |
| Short name | T2301 |
| Test name | |
| Test status | |
| Simulation time | 174613563 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=782452157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_av_buffer.782452157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_bitstuff_err.973234230 |
| Short name | T2302 |
| Test name | |
| Test status | |
| Simulation time | 154904299 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=973234230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_bitstuff_err.973234230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_clear.67069960 |
| Short name | T2306 |
| Test name | |
| Test status | |
| Simulation time | 407225719 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:19 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=67069960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_clear.67069960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_data_toggle_restore.113342822 |
| Short name | T2315 |
| Test name | |
| Test status | |
| Simulation time | 1255602094 ps |
| CPU time | 3.29 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:20 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=113342822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_data_toggle_restore.113342822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_device_address.1617139735 |
| Short name | T2541 |
| Test name | |
| Test status | |
| Simulation time | 36224967160 ps |
| CPU time | 69.52 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1617139735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_address.1617139735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_device_timeout.1156071346 |
| Short name | T2320 |
| Test name | |
| Test status | |
| Simulation time | 289673562 ps |
| CPU time | 4.27 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:21 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156071346 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_device_timeout.1156071346 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_disable_endpoint.3901469856 |
| Short name | T2313 |
| Test name | |
| Test status | |
| Simulation time | 797315347 ps |
| CPU time | 3.14 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:20 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901469856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 35.usbdev_disable_endpoint.3901469856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_disconnected.2829321416 |
| Short name | T2303 |
| Test name | |
| Test status | |
| Simulation time | 136977945 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2829321416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_disconnected.2829321416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_enable.268854638 |
| Short name | T2304 |
| Test name | |
| Test status | |
| Simulation time | 79620045 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=268854638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_enable.268854638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_access.2349770917 |
| Short name | T2314 |
| Test name | |
| Test status | |
| Simulation time | 877833784 ps |
| CPU time | 2.95 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:20 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2349770917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_access.2349770917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_endpoint_types.3720497246 |
| Short name | T397 |
| Test name | |
| Test status | |
| Simulation time | 336947391 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:19 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3720497246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_endpoint_types.3720497246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_fifo_rst.3711873817 |
| Short name | T2316 |
| Test name | |
| Test status | |
| Simulation time | 379294055 ps |
| CPU time | 3.19 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:21 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3711873817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_fifo_rst.3711873817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_in_iso.3762207709 |
| Short name | T2309 |
| Test name | |
| Test status | |
| Simulation time | 245982411 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:19 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3762207709 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_in_iso.3762207709 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_in_stall.72437519 |
| Short name | T2305 |
| Test name | |
| Test status | |
| Simulation time | 149380342 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:18 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=72437519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 35.usbdev_in_stall.72437519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_in_trans.1296223268 |
| Short name | T2318 |
| Test name | |
| Test status | |
| Simulation time | 208384682 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:50:18 AM UTC 24 |
| Finished | Aug 27 07:50:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296223268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_in_trans.1296223268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_invalid_sync.237629013 |
| Short name | T2381 |
| Test name | |
| Test status | |
| Simulation time | 3124806320 ps |
| CPU time | 21.45 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 230668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=237629013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_invalid_sync.237629013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_iso_retraction.976345342 |
| Short name | T2537 |
| Test name | |
| Test status | |
| Simulation time | 5759650760 ps |
| CPU time | 66.61 seconds |
| Started | Aug 27 07:50:18 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=976345342 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 35.usbdev_iso_retraction.976345342 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_link_in_err.3013230817 |
| Short name | T2317 |
| Test name | |
| Test status | |
| Simulation time | 226584122 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:50:18 AM UTC 24 |
| Finished | Aug 27 07:50:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3013230817 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_in_err.3013230817 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_link_resume.924683899 |
| Short name | T2461 |
| Test name | |
| Test status | |
| Simulation time | 26149103749 ps |
| CPU time | 44.46 seconds |
| Started | Aug 27 07:50:18 AM UTC 24 |
| Finished | Aug 27 07:51:04 AM UTC 24 |
| Peak memory | 218360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924683899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_link_resume.924683899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_link_suspend.348540008 |
| Short name | T2357 |
| Test name | |
| Test status | |
| Simulation time | 8514792222 ps |
| CPU time | 11.5 seconds |
| Started | Aug 27 07:50:18 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=348540008 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_link_suspend.348540008 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_low_speed_traffic.3881493066 |
| Short name | T2635 |
| Test name | |
| Test status | |
| Simulation time | 3486943410 ps |
| CPU time | 89.68 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3881493066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_low_speed_traffic.3881493066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_max_inter_pkt_delay.2259968916 |
| Short name | T2382 |
| Test name | |
| Test status | |
| Simulation time | 1878249924 ps |
| CPU time | 18.43 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:40 AM UTC 24 |
| Peak memory | 229876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2259968916 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_max_inter_pkt_delay.2259968916 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_in_transaction.1674836279 |
| Short name | T2329 |
| Test name | |
| Test status | |
| Simulation time | 243351726 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 215324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1674836279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_max_length_in_transaction.1674836279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_max_length_out_transaction.172580486 |
| Short name | T2325 |
| Test name | |
| Test status | |
| Simulation time | 197430755 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=172580486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 35.usbdev_max_length_out_transaction.172580486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_min_inter_pkt_delay.2831841996 |
| Short name | T2468 |
| Test name | |
| Test status | |
| Simulation time | 1760110896 ps |
| CPU time | 44.35 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:51:07 AM UTC 24 |
| Peak memory | 228348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2831841996 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_min_inter_pkt_delay.2831841996 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_in_transaction.2751337692 |
| Short name | T2328 |
| Test name | |
| Test status | |
| Simulation time | 160227229 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2751337692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_in_transaction.2751337692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_min_length_out_transaction.1678565660 |
| Short name | T2324 |
| Test name | |
| Test status | |
| Simulation time | 163174403 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1678565660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_min_length_out_transaction.1678565660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_nak_trans.1493841386 |
| Short name | T2322 |
| Test name | |
| Test status | |
| Simulation time | 203364380 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1493841386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_nak_trans.1493841386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_out_iso.4263860994 |
| Short name | T2326 |
| Test name | |
| Test status | |
| Simulation time | 227526615 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:50:21 AM UTC 24 |
| Finished | Aug 27 07:50:23 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4263860994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_out_iso.4263860994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_out_stall.2673826038 |
| Short name | T2335 |
| Test name | |
| Test status | |
| Simulation time | 193145495 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2673826038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_out_stall.2673826038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_out_trans_nak.1371104409 |
| Short name | T2332 |
| Test name | |
| Test status | |
| Simulation time | 148260848 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1371104409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_out_trans_nak.1371104409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_pending_in_trans.583373134 |
| Short name | T2331 |
| Test name | |
| Test status | |
| Simulation time | 146283866 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 215404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=583373134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_pending_in_trans.583373134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_pinflip.1800976727 |
| Short name | T2338 |
| Test name | |
| Test status | |
| Simulation time | 220741711 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 216024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800976727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_pinflip.1800976727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_phy_config_usb_ref_disable.3494156386 |
| Short name | T2336 |
| Test name | |
| Test status | |
| Simulation time | 166832551 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3494156386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 35.usbdev_phy_config_usb_ref_disable.3494156386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_phy_pins_sense.376176543 |
| Short name | T2333 |
| Test name | |
| Test status | |
| Simulation time | 56591486 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=376176543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_phy_pins_sense.376176543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_buffer.1526234492 |
| Short name | T2511 |
| Test name | |
| Test status | |
| Simulation time | 19773885975 ps |
| CPU time | 55.5 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:51:20 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1526234492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_pkt_buffer.1526234492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_received.1896829257 |
| Short name | T2334 |
| Test name | |
| Test status | |
| Simulation time | 164858102 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1896829257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 35.usbdev_pkt_received.1896829257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_pkt_sent.2771605792 |
| Short name | T2339 |
| Test name | |
| Test status | |
| Simulation time | 178831400 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:26 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2771605792 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 35.usbdev_pkt_sent.2771605792 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_in_transaction.3250837979 |
| Short name | T2340 |
| Test name | |
| Test status | |
| Simulation time | 210595266 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:50:23 AM UTC 24 |
| Finished | Aug 27 07:50:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3250837979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 35.usbdev_random_length_in_transaction.3250837979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_random_length_out_transaction.3884913433 |
| Short name | T2343 |
| Test name | |
| Test status | |
| Simulation time | 174507808 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3884913433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 35.usbdev_random_length_out_transaction.3884913433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_rx_crc_err.2395931112 |
| Short name | T2344 |
| Test name | |
| Test status | |
| Simulation time | 151659860 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2395931112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 35.usbdev_rx_crc_err.2395931112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_rx_full.4285986433 |
| Short name | T2345 |
| Test name | |
| Test status | |
| Simulation time | 272385929 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4285986433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 35.usbdev_rx_full.4285986433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_setup_stage.1170753032 |
| Short name | T2342 |
| Test name | |
| Test status | |
| Simulation time | 155134128 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1170753032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_setup_stage.1170753032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_setup_trans_ignored.757089867 |
| Short name | T2349 |
| Test name | |
| Test status | |
| Simulation time | 148039088 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=757089867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 35.usbdev_setup_trans_ignored.757089867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_smoke.1129759032 |
| Short name | T2350 |
| Test name | |
| Test status | |
| Simulation time | 210640803 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1129759032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_smoke.1129759032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_spurious_pids_ignored.3980814890 |
| Short name | T2531 |
| Test name | |
| Test status | |
| Simulation time | 2418000652 ps |
| CPU time | 57.25 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3980814890 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 35.usbdev_spurious_pids_ignored.3980814890 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_stall_priority_over_nak.4292101331 |
| Short name | T2348 |
| Test name | |
| Test status | |
| Simulation time | 172557271 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4292101331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stall_priority_over_nak.4292101331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_stall_trans.3988834694 |
| Short name | T2346 |
| Test name | |
| Test status | |
| Simulation time | 185344208 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:28 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3988834694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 35.usbdev_stall_trans.3988834694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_stream_len_max.4245216127 |
| Short name | T2356 |
| Test name | |
| Test status | |
| Simulation time | 1233339877 ps |
| CPU time | 3.55 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4245216127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_stream_len_max.4245216127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_streaming_out.1411360781 |
| Short name | T2593 |
| Test name | |
| Test status | |
| Simulation time | 2807459532 ps |
| CPU time | 73.03 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:51:41 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411360781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 35.usbdev_streaming_out.1411360781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_timeout_missing_host_handshake.3186982655 |
| Short name | T2352 |
| Test name | |
| Test status | |
| Simulation time | 1941610349 ps |
| CPU time | 12.63 seconds |
| Started | Aug 27 07:50:16 AM UTC 24 |
| Finished | Aug 27 07:50:30 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186982655 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_timeout_missing_host_handshake.3186982655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/35.usbdev_tx_rx_disruption.1146210061 |
| Short name | T2351 |
| Test name | |
| Test status | |
| Simulation time | 546247897 ps |
| CPU time | 2.17 seconds |
| Started | Aug 27 07:50:26 AM UTC 24 |
| Finished | Aug 27 07:50:30 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1146210061 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 35.usbdev_t x_rx_disruption.1146210061 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/35.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/350.usbdev_tx_rx_disruption.2454206123 |
| Short name | T3487 |
| Test name | |
| Test status | |
| Simulation time | 596749519 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2454206123 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 350.usbdev_ tx_rx_disruption.2454206123 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/350.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/351.usbdev_tx_rx_disruption.620068114 |
| Short name | T3492 |
| Test name | |
| Test status | |
| Simulation time | 632771004 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 215936 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=620068114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 351.usbdev_t x_rx_disruption.620068114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/351.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/352.usbdev_tx_rx_disruption.1499308963 |
| Short name | T3485 |
| Test name | |
| Test status | |
| Simulation time | 534748677 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1499308963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 352.usbdev_ tx_rx_disruption.1499308963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/352.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/353.usbdev_tx_rx_disruption.2286774310 |
| Short name | T3490 |
| Test name | |
| Test status | |
| Simulation time | 463203531 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2286774310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 353.usbdev_ tx_rx_disruption.2286774310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/353.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/354.usbdev_tx_rx_disruption.4219594682 |
| Short name | T3486 |
| Test name | |
| Test status | |
| Simulation time | 429930221 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4219594682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 354.usbdev_ tx_rx_disruption.4219594682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/354.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/355.usbdev_tx_rx_disruption.810159533 |
| Short name | T3494 |
| Test name | |
| Test status | |
| Simulation time | 508658616 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=810159533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 355.usbdev_t x_rx_disruption.810159533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/355.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/356.usbdev_tx_rx_disruption.2061171142 |
| Short name | T3496 |
| Test name | |
| Test status | |
| Simulation time | 486368416 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2061171142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 356.usbdev_ tx_rx_disruption.2061171142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/356.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/357.usbdev_tx_rx_disruption.2837101732 |
| Short name | T3488 |
| Test name | |
| Test status | |
| Simulation time | 536977395 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2837101732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 357.usbdev_ tx_rx_disruption.2837101732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/357.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/358.usbdev_tx_rx_disruption.445669062 |
| Short name | T3489 |
| Test name | |
| Test status | |
| Simulation time | 430883464 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=445669062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 358.usbdev_t x_rx_disruption.445669062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/358.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/359.usbdev_tx_rx_disruption.2652038505 |
| Short name | T3495 |
| Test name | |
| Test status | |
| Simulation time | 518545556 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2652038505 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 359.usbdev_ tx_rx_disruption.2652038505 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/359.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_alert_test.2787954854 |
| Short name | T2407 |
| Test name | |
| Test status | |
| Simulation time | 32595727 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:50:45 AM UTC 24 |
| Finished | Aug 27 07:50:47 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2787954854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 36.usbdev_alert_test.2787954854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_disconnect.1532961930 |
| Short name | T2373 |
| Test name | |
| Test status | |
| Simulation time | 4991294795 ps |
| CPU time | 7.65 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1532961930 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_disconnect.1532961930 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_reset.1808356054 |
| Short name | T2406 |
| Test name | |
| Test status | |
| Simulation time | 13730146458 ps |
| CPU time | 17.45 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:47 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1808356054 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_reset.1808356054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_aon_wake_resume.747878454 |
| Short name | T2484 |
| Test name | |
| Test status | |
| Simulation time | 29469512739 ps |
| CPU time | 43.24 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:51:13 AM UTC 24 |
| Peak memory | 217800 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=747878454 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_aon_wake_resume.747878454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_av_buffer.803367299 |
| Short name | T2354 |
| Test name | |
| Test status | |
| Simulation time | 166013516 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=803367299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_av_buffer.803367299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_bitstuff_err.1505907172 |
| Short name | T2355 |
| Test name | |
| Test status | |
| Simulation time | 145004177 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1505907172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_bitstuff_err.1505907172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_clear.71803868 |
| Short name | T2358 |
| Test name | |
| Test status | |
| Simulation time | 309926668 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:31 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=71803868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_clear.71803868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_data_toggle_restore.752243793 |
| Short name | T2360 |
| Test name | |
| Test status | |
| Simulation time | 355202052 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:50:29 AM UTC 24 |
| Finished | Aug 27 07:50:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=752243793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_data_toggle_restore.752243793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_device_address.1006479781 |
| Short name | T2447 |
| Test name | |
| Test status | |
| Simulation time | 14046441699 ps |
| CPU time | 26.78 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:51:00 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1006479781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_address.1006479781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_device_timeout.2100745863 |
| Short name | T2415 |
| Test name | |
| Test status | |
| Simulation time | 795764381 ps |
| CPU time | 15.5 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:49 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2100745863 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_device_timeout.2100745863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_disable_endpoint.1434547616 |
| Short name | T2368 |
| Test name | |
| Test status | |
| Simulation time | 739674356 ps |
| CPU time | 3.51 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434547616 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_disable_endpoint.1434547616 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_disconnected.918959364 |
| Short name | T2362 |
| Test name | |
| Test status | |
| Simulation time | 175631596 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=918959364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_disconnected.918959364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_enable.4002774882 |
| Short name | T2361 |
| Test name | |
| Test status | |
| Simulation time | 39909455 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4002774882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 36.usbdev_enable.4002774882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_endpoint_access.2407328339 |
| Short name | T2367 |
| Test name | |
| Test status | |
| Simulation time | 930266972 ps |
| CPU time | 3.21 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:36 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2407328339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_endpoint_access.2407328339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_fifo_rst.2875266936 |
| Short name | T2366 |
| Test name | |
| Test status | |
| Simulation time | 225585663 ps |
| CPU time | 2.82 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:36 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2875266936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_fifo_rst.2875266936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_in_iso.3628994257 |
| Short name | T2364 |
| Test name | |
| Test status | |
| Simulation time | 157738134 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:35 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3628994257 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_in_iso.3628994257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_in_stall.1509335139 |
| Short name | T2365 |
| Test name | |
| Test status | |
| Simulation time | 156394222 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:35 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1509335139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_stall.1509335139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_in_trans.3408790246 |
| Short name | T2363 |
| Test name | |
| Test status | |
| Simulation time | 189856569 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:35 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3408790246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_in_trans.3408790246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_invalid_sync.3186930124 |
| Short name | T2440 |
| Test name | |
| Test status | |
| Simulation time | 3346963349 ps |
| CPU time | 24.16 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:58 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3186930124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 36.usbdev_invalid_sync.3186930124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_iso_retraction.1396742202 |
| Short name | T2652 |
| Test name | |
| Test status | |
| Simulation time | 13943822083 ps |
| CPU time | 82.9 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:51:57 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1396742202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_iso_retraction.1396742202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_link_in_err.1372624666 |
| Short name | T2370 |
| Test name | |
| Test status | |
| Simulation time | 233722308 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 215988 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1372624666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_in_err.1372624666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_link_resume.3151195247 |
| Short name | T2510 |
| Test name | |
| Test status | |
| Simulation time | 28717048610 ps |
| CPU time | 44.13 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:51:20 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3151195247 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_link_resume.3151195247 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_link_suspend.1814344731 |
| Short name | T2393 |
| Test name | |
| Test status | |
| Simulation time | 4732229744 ps |
| CPU time | 7.99 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:50:43 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814344731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_link_suspend.1814344731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_low_speed_traffic.557846990 |
| Short name | T2834 |
| Test name | |
| Test status | |
| Simulation time | 4834580972 ps |
| CPU time | 124.75 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 230524 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=557846990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_low_speed_traffic.557846990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_max_inter_pkt_delay.4265481856 |
| Short name | T2616 |
| Test name | |
| Test status | |
| Simulation time | 2702624698 ps |
| CPU time | 70.71 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4265481856 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_max_inter_pkt_delay.4265481856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_in_transaction.613886606 |
| Short name | T2372 |
| Test name | |
| Test status | |
| Simulation time | 248247138 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:50:34 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=613886606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_in_transaction.613886606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_max_length_out_transaction.3642523942 |
| Short name | T2378 |
| Test name | |
| Test status | |
| Simulation time | 201606923 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:50:36 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 216012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642523942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_max_length_out_transaction.3642523942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_min_inter_pkt_delay.2073766906 |
| Short name | T2446 |
| Test name | |
| Test status | |
| Simulation time | 2211709640 ps |
| CPU time | 21.29 seconds |
| Started | Aug 27 07:50:36 AM UTC 24 |
| Finished | Aug 27 07:50:59 AM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2073766906 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_min_inter_pkt_delay.2073766906 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_in_transaction.1722564781 |
| Short name | T2377 |
| Test name | |
| Test status | |
| Simulation time | 155333985 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:50:36 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1722564781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_in_transaction.1722564781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_min_length_out_transaction.3520684615 |
| Short name | T2376 |
| Test name | |
| Test status | |
| Simulation time | 138470687 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:50:37 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3520684615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_min_length_out_transaction.3520684615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_nak_trans.3131482525 |
| Short name | T2375 |
| Test name | |
| Test status | |
| Simulation time | 235954504 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:50:37 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131482525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_nak_trans.3131482525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_out_iso.3746049770 |
| Short name | T2379 |
| Test name | |
| Test status | |
| Simulation time | 204098403 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:50:37 AM UTC 24 |
| Finished | Aug 27 07:50:39 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3746049770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_out_iso.3746049770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_out_stall.2996157832 |
| Short name | T2389 |
| Test name | |
| Test status | |
| Simulation time | 155046590 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2996157832 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_out_stall.2996157832 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_out_trans_nak.1985063160 |
| Short name | T2388 |
| Test name | |
| Test status | |
| Simulation time | 163302753 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1985063160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_out_trans_nak.1985063160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_pending_in_trans.2014237035 |
| Short name | T2384 |
| Test name | |
| Test status | |
| Simulation time | 155845460 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2014237035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 36.usbdev_pending_in_trans.2014237035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_pinflip.499407783 |
| Short name | T2391 |
| Test name | |
| Test status | |
| Simulation time | 189642249 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=499407783 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_pinflip.499407783 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_phy_config_usb_ref_disable.1296788779 |
| Short name | T2385 |
| Test name | |
| Test status | |
| Simulation time | 141939605 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1296788779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 36.usbdev_phy_config_usb_ref_disable.1296788779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_phy_pins_sense.2925439327 |
| Short name | T2386 |
| Test name | |
| Test status | |
| Simulation time | 70656506 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2925439327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_phy_pins_sense.2925439327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_buffer.1757642982 |
| Short name | T2482 |
| Test name | |
| Test status | |
| Simulation time | 12928903464 ps |
| CPU time | 31.82 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 228636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757642982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_pkt_buffer.1757642982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_received.1363258340 |
| Short name | T2390 |
| Test name | |
| Test status | |
| Simulation time | 192613885 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:50:39 AM UTC 24 |
| Finished | Aug 27 07:50:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1363258340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 36.usbdev_pkt_received.1363258340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_pkt_sent.1789496050 |
| Short name | T2399 |
| Test name | |
| Test status | |
| Simulation time | 180455987 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1789496050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 36.usbdev_pkt_sent.1789496050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_in_transaction.3547693637 |
| Short name | T2394 |
| Test name | |
| Test status | |
| Simulation time | 224951518 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3547693637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 36.usbdev_random_length_in_transaction.3547693637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_random_length_out_transaction.2626006571 |
| Short name | T2395 |
| Test name | |
| Test status | |
| Simulation time | 204540750 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2626006571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 36.usbdev_random_length_out_transaction.2626006571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_rx_crc_err.2676766210 |
| Short name | T2396 |
| Test name | |
| Test status | |
| Simulation time | 149791308 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2676766210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_rx_crc_err.2676766210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_rx_full.3619140958 |
| Short name | T2401 |
| Test name | |
| Test status | |
| Simulation time | 252328198 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619140958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 36.usbdev_rx_full.3619140958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_setup_stage.814662371 |
| Short name | T2398 |
| Test name | |
| Test status | |
| Simulation time | 144256387 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=814662371 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 36.usbdev_setup_stage.814662371 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_setup_trans_ignored.1243514438 |
| Short name | T2400 |
| Test name | |
| Test status | |
| Simulation time | 204934155 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243514438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 36.usbdev_setup_trans_ignored.1243514438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_smoke.2063137737 |
| Short name | T2403 |
| Test name | |
| Test status | |
| Simulation time | 222542093 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2063137737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_smoke.2063137737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_spurious_pids_ignored.3499135860 |
| Short name | T2466 |
| Test name | |
| Test status | |
| Simulation time | 2517477603 ps |
| CPU time | 23.3 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:51:06 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3499135860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 36.usbdev_spurious_pids_ignored.3499135860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_stall_priority_over_nak.3106806311 |
| Short name | T2402 |
| Test name | |
| Test status | |
| Simulation time | 211429673 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106806311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stall_priority_over_nak.3106806311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_stall_trans.1074541632 |
| Short name | T2397 |
| Test name | |
| Test status | |
| Simulation time | 182009467 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:44 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1074541632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 36.usbdev_stall_trans.1074541632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_stream_len_max.3665856565 |
| Short name | T2404 |
| Test name | |
| Test status | |
| Simulation time | 1175111266 ps |
| CPU time | 3.23 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:50:46 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3665856565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_stream_len_max.3665856565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_streaming_out.3468990993 |
| Short name | T2457 |
| Test name | |
| Test status | |
| Simulation time | 2321901481 ps |
| CPU time | 19.73 seconds |
| Started | Aug 27 07:50:42 AM UTC 24 |
| Finished | Aug 27 07:51:03 AM UTC 24 |
| Peak memory | 230448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468990993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 36.usbdev_streaming_out.3468990993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_timeout_missing_host_handshake.1207832312 |
| Short name | T2371 |
| Test name | |
| Test status | |
| Simulation time | 288485578 ps |
| CPU time | 4.2 seconds |
| Started | Aug 27 07:50:32 AM UTC 24 |
| Finished | Aug 27 07:50:37 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1207832312 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_timeout_missing_host_handshake.1207832312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/36.usbdev_tx_rx_disruption.1867091701 |
| Short name | T2416 |
| Test name | |
| Test status | |
| Simulation time | 516929089 ps |
| CPU time | 2.3 seconds |
| Started | Aug 27 07:50:45 AM UTC 24 |
| Finished | Aug 27 07:50:49 AM UTC 24 |
| Peak memory | 217980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1867091701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 36.usbdev_t x_rx_disruption.1867091701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/36.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/360.usbdev_tx_rx_disruption.2535173463 |
| Short name | T3491 |
| Test name | |
| Test status | |
| Simulation time | 475146309 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2535173463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 360.usbdev_ tx_rx_disruption.2535173463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/360.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/361.usbdev_tx_rx_disruption.3254332758 |
| Short name | T3500 |
| Test name | |
| Test status | |
| Simulation time | 666234000 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3254332758 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 361.usbdev_ tx_rx_disruption.3254332758 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/361.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/362.usbdev_tx_rx_disruption.2630384742 |
| Short name | T3498 |
| Test name | |
| Test status | |
| Simulation time | 637974635 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2630384742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 362.usbdev_ tx_rx_disruption.2630384742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/362.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/363.usbdev_tx_rx_disruption.3024109098 |
| Short name | T3499 |
| Test name | |
| Test status | |
| Simulation time | 526674932 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3024109098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 363.usbdev_ tx_rx_disruption.3024109098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/363.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/364.usbdev_tx_rx_disruption.2705747180 |
| Short name | T3501 |
| Test name | |
| Test status | |
| Simulation time | 546723416 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2705747180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 364.usbdev_ tx_rx_disruption.2705747180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/364.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/365.usbdev_tx_rx_disruption.43005268 |
| Short name | T3450 |
| Test name | |
| Test status | |
| Simulation time | 488239103 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=43005268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 365.usbdev_tx _rx_disruption.43005268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/365.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/366.usbdev_tx_rx_disruption.855513786 |
| Short name | T3497 |
| Test name | |
| Test status | |
| Simulation time | 536911028 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:55:54 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=855513786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 366.usbdev_t x_rx_disruption.855513786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/366.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/367.usbdev_tx_rx_disruption.3146431830 |
| Short name | T3503 |
| Test name | |
| Test status | |
| Simulation time | 564645518 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:55:58 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3146431830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 367.usbdev_ tx_rx_disruption.3146431830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/367.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/368.usbdev_tx_rx_disruption.158484270 |
| Short name | T3504 |
| Test name | |
| Test status | |
| Simulation time | 651108563 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:55:58 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=158484270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 368.usbdev_t x_rx_disruption.158484270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/368.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/369.usbdev_tx_rx_disruption.3922439483 |
| Short name | T3502 |
| Test name | |
| Test status | |
| Simulation time | 463497491 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:55:57 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3922439483 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 369.usbdev_ tx_rx_disruption.3922439483 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/369.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_alert_test.860500282 |
| Short name | T2455 |
| Test name | |
| Test status | |
| Simulation time | 36381667 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=860500282 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_alert_test.860500282 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_disconnect.2434903557 |
| Short name | T2458 |
| Test name | |
| Test status | |
| Simulation time | 12001803069 ps |
| CPU time | 16.61 seconds |
| Started | Aug 27 07:50:45 AM UTC 24 |
| Finished | Aug 27 07:51:03 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2434903557 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_disconnect.2434903557 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_reset.3442050871 |
| Short name | T2311 |
| Test name | |
| Test status | |
| Simulation time | 18672989017 ps |
| CPU time | 23.59 seconds |
| Started | Aug 27 07:50:45 AM UTC 24 |
| Finished | Aug 27 07:51:10 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3442050871 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_reset.3442050871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_aon_wake_resume.3893552113 |
| Short name | T2543 |
| Test name | |
| Test status | |
| Simulation time | 30153095415 ps |
| CPU time | 41.16 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:51:28 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3893552113 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_aon_wake_resume.3893552113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_av_buffer.3548148521 |
| Short name | T2411 |
| Test name | |
| Test status | |
| Simulation time | 180396931 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3548148521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_av_buffer.3548148521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_bitstuff_err.3513315182 |
| Short name | T2413 |
| Test name | |
| Test status | |
| Simulation time | 147412827 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3513315182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_bitstuff_err.3513315182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_clear.3131869198 |
| Short name | T2418 |
| Test name | |
| Test status | |
| Simulation time | 438891345 ps |
| CPU time | 2.65 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:49 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131869198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 37.usbdev_data_toggle_clear.3131869198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_data_toggle_restore.3831284407 |
| Short name | T2417 |
| Test name | |
| Test status | |
| Simulation time | 835761791 ps |
| CPU time | 2.45 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:49 AM UTC 24 |
| Peak memory | 218084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3831284407 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_data_toggle_restore.3831284407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_device_address.1166067784 |
| Short name | T2491 |
| Test name | |
| Test status | |
| Simulation time | 14988325158 ps |
| CPU time | 27.25 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1166067784 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_address.1166067784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_device_timeout.4242627098 |
| Short name | T2423 |
| Test name | |
| Test status | |
| Simulation time | 601347321 ps |
| CPU time | 4.81 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:52 AM UTC 24 |
| Peak memory | 218136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4242627098 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_device_timeout.4242627098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_disable_endpoint.2549844296 |
| Short name | T2420 |
| Test name | |
| Test status | |
| Simulation time | 803855160 ps |
| CPU time | 3.21 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:50 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2549844296 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 37.usbdev_disable_endpoint.2549844296 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_disconnected.2286043550 |
| Short name | T2414 |
| Test name | |
| Test status | |
| Simulation time | 153063835 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2286043550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_disconnected.2286043550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_enable.1110277853 |
| Short name | T2410 |
| Test name | |
| Test status | |
| Simulation time | 56403111 ps |
| CPU time | 0.81 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:50:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1110277853 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 37.usbdev_enable.1110277853 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_access.3068312512 |
| Short name | T2421 |
| Test name | |
| Test status | |
| Simulation time | 752220620 ps |
| CPU time | 2.91 seconds |
| Started | Aug 27 07:50:47 AM UTC 24 |
| Finished | Aug 27 07:50:51 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3068312512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_access.3068312512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_endpoint_types.1980366496 |
| Short name | T433 |
| Test name | |
| Test status | |
| Simulation time | 368452583 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:50:47 AM UTC 24 |
| Finished | Aug 27 07:50:50 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1980366496 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_endpoint_types.1980366496 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_fifo_rst.4267318686 |
| Short name | T2427 |
| Test name | |
| Test status | |
| Simulation time | 311034371 ps |
| CPU time | 2.19 seconds |
| Started | Aug 27 07:50:49 AM UTC 24 |
| Finished | Aug 27 07:50:53 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4267318686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_fifo_rst.4267318686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_in_iso.2367122088 |
| Short name | T2424 |
| Test name | |
| Test status | |
| Simulation time | 173985500 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:50:49 AM UTC 24 |
| Finished | Aug 27 07:50:52 AM UTC 24 |
| Peak memory | 216040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2367122088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 37.usbdev_in_iso.2367122088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_in_stall.327522031 |
| Short name | T2422 |
| Test name | |
| Test status | |
| Simulation time | 158386853 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:50:49 AM UTC 24 |
| Finished | Aug 27 07:50:52 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327522031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_in_stall.327522031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_in_trans.3117766184 |
| Short name | T2425 |
| Test name | |
| Test status | |
| Simulation time | 211589506 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:50:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3117766184 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_in_trans.3117766184 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_invalid_sync.1169410529 |
| Short name | T2520 |
| Test name | |
| Test status | |
| Simulation time | 4601129216 ps |
| CPU time | 32.05 seconds |
| Started | Aug 27 07:50:49 AM UTC 24 |
| Finished | Aug 27 07:51:23 AM UTC 24 |
| Peak memory | 235312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1169410529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 37.usbdev_invalid_sync.1169410529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_iso_retraction.2452549755 |
| Short name | T2514 |
| Test name | |
| Test status | |
| Simulation time | 4520610577 ps |
| CPU time | 30.32 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:51:21 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2452549755 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_iso_retraction.2452549755 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_link_in_err.253909815 |
| Short name | T2426 |
| Test name | |
| Test status | |
| Simulation time | 252328519 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:50:52 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=253909815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_link_in_err.253909815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_link_resume.3899328780 |
| Short name | T2467 |
| Test name | |
| Test status | |
| Simulation time | 9441766370 ps |
| CPU time | 15.62 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:51:07 AM UTC 24 |
| Peak memory | 228408 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3899328780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_link_resume.3899328780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_link_suspend.2316817283 |
| Short name | T2470 |
| Test name | |
| Test status | |
| Simulation time | 8508573004 ps |
| CPU time | 15.78 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:51:07 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2316817283 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 37.usbdev_link_suspend.2316817283 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_low_speed_traffic.2732167826 |
| Short name | T2525 |
| Test name | |
| Test status | |
| Simulation time | 4631835855 ps |
| CPU time | 33.08 seconds |
| Started | Aug 27 07:50:50 AM UTC 24 |
| Finished | Aug 27 07:51:24 AM UTC 24 |
| Peak memory | 232584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2732167826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_low_speed_traffic.2732167826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_max_inter_pkt_delay.4234032054 |
| Short name | T2477 |
| Test name | |
| Test status | |
| Simulation time | 1944832407 ps |
| CPU time | 17.55 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:51:11 AM UTC 24 |
| Peak memory | 234984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4234032054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_max_inter_pkt_delay.4234032054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_in_transaction.1602026546 |
| Short name | T2431 |
| Test name | |
| Test status | |
| Simulation time | 239844673 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:55 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602026546 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_max_length_in_transaction.1602026546 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_max_length_out_transaction.434763598 |
| Short name | T2429 |
| Test name | |
| Test status | |
| Simulation time | 204339000 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:54 AM UTC 24 |
| Peak memory | 215876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=434763598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 37.usbdev_max_length_out_transaction.434763598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_min_inter_pkt_delay.3084614013 |
| Short name | T2552 |
| Test name | |
| Test status | |
| Simulation time | 3807795420 ps |
| CPU time | 36.77 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3084614013 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_min_inter_pkt_delay.3084614013 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_in_transaction.3491275187 |
| Short name | T2432 |
| Test name | |
| Test status | |
| Simulation time | 157349940 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3491275187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_in_transaction.3491275187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_min_length_out_transaction.3989454622 |
| Short name | T2428 |
| Test name | |
| Test status | |
| Simulation time | 192524464 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3989454622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_min_length_out_transaction.3989454622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_out_iso.1820729849 |
| Short name | T2430 |
| Test name | |
| Test status | |
| Simulation time | 148086527 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:50:52 AM UTC 24 |
| Finished | Aug 27 07:50:54 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1820729849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_out_iso.1820729849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_out_stall.1257225958 |
| Short name | T2436 |
| Test name | |
| Test status | |
| Simulation time | 175791143 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257225958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_out_stall.1257225958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_out_trans_nak.4020636052 |
| Short name | T2434 |
| Test name | |
| Test status | |
| Simulation time | 164722839 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4020636052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_out_trans_nak.4020636052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_pending_in_trans.727061564 |
| Short name | T2437 |
| Test name | |
| Test status | |
| Simulation time | 164165469 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=727061564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_pending_in_trans.727061564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_pinflip.909717149 |
| Short name | T2439 |
| Test name | |
| Test status | |
| Simulation time | 200586857 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:57 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=909717149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_pinflip.909717149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_phy_config_usb_ref_disable.1005675988 |
| Short name | T2438 |
| Test name | |
| Test status | |
| Simulation time | 146714022 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1005675988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 37.usbdev_phy_config_usb_ref_disable.1005675988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_phy_pins_sense.1344214947 |
| Short name | T2435 |
| Test name | |
| Test status | |
| Simulation time | 40750092 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:50:54 AM UTC 24 |
| Finished | Aug 27 07:50:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1344214947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_phy_pins_sense.1344214947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_buffer.461981069 |
| Short name | T525 |
| Test name | |
| Test status | |
| Simulation time | 20694468727 ps |
| CPU time | 54.29 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 228704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=461981069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 37.usbdev_pkt_buffer.461981069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_received.580426538 |
| Short name | T2441 |
| Test name | |
| Test status | |
| Simulation time | 153794523 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:50:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=580426538 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_pkt_received.580426538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_pkt_sent.3839551161 |
| Short name | T2443 |
| Test name | |
| Test status | |
| Simulation time | 206189366 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:50:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3839551161 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_pkt_sent.3839551161 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_in_transaction.1613638238 |
| Short name | T2445 |
| Test name | |
| Test status | |
| Simulation time | 224410531 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:50:59 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613638238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 37.usbdev_random_length_in_transaction.1613638238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_random_length_out_transaction.4271402578 |
| Short name | T2444 |
| Test name | |
| Test status | |
| Simulation time | 192657444 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:50:59 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4271402578 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 37.usbdev_random_length_out_transaction.4271402578 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_rx_crc_err.1600074724 |
| Short name | T2442 |
| Test name | |
| Test status | |
| Simulation time | 177851727 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:50:56 AM UTC 24 |
| Finished | Aug 27 07:50:59 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600074724 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_rx_crc_err.1600074724 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_rx_full.2053820706 |
| Short name | T2448 |
| Test name | |
| Test status | |
| Simulation time | 268190178 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053820706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 37.usbdev_rx_full.2053820706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_setup_stage.1101025720 |
| Short name | T2451 |
| Test name | |
| Test status | |
| Simulation time | 216684831 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1101025720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 37.usbdev_setup_stage.1101025720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_setup_trans_ignored.701827109 |
| Short name | T2449 |
| Test name | |
| Test status | |
| Simulation time | 164603855 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=701827109 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 37.usbdev_setup_trans_ignored.701827109 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_smoke.1544043702 |
| Short name | T2450 |
| Test name | |
| Test status | |
| Simulation time | 303515444 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544043702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_smoke.1544043702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_spurious_pids_ignored.493517498 |
| Short name | T2772 |
| Test name | |
| Test status | |
| Simulation time | 3266310924 ps |
| CPU time | 84.39 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:52:25 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=493517498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 37.usbdev_spurious_pids_ignored.493517498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_stall_priority_over_nak.750204469 |
| Short name | T2454 |
| Test name | |
| Test status | |
| Simulation time | 200273233 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=750204469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stall_priority_over_nak.750204469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_stall_trans.616971492 |
| Short name | T2452 |
| Test name | |
| Test status | |
| Simulation time | 181694449 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:50:58 AM UTC 24 |
| Finished | Aug 27 07:51:01 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=616971492 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 37.usbdev_stall_trans.616971492 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_stream_len_max.2169599536 |
| Short name | T2462 |
| Test name | |
| Test status | |
| Simulation time | 1313762160 ps |
| CPU time | 4.16 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:06 AM UTC 24 |
| Peak memory | 217832 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2169599536 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_stream_len_max.2169599536 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_streaming_out.159080779 |
| Short name | T2544 |
| Test name | |
| Test status | |
| Simulation time | 3195913864 ps |
| CPU time | 27.55 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:29 AM UTC 24 |
| Peak memory | 228252 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=159080779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 37.usbdev_streaming_out.159080779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_timeout_missing_host_handshake.4015637673 |
| Short name | T2509 |
| Test name | |
| Test status | |
| Simulation time | 4888379536 ps |
| CPU time | 32.3 seconds |
| Started | Aug 27 07:50:46 AM UTC 24 |
| Finished | Aug 27 07:51:19 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4015637673 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_timeout_missing_host_handshake.4015637673 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/37.usbdev_tx_rx_disruption.2049616383 |
| Short name | T2459 |
| Test name | |
| Test status | |
| Simulation time | 513257302 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049616383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 37.usbdev_t x_rx_disruption.2049616383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/37.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/370.usbdev_tx_rx_disruption.2015638826 |
| Short name | T3588 |
| Test name | |
| Test status | |
| Simulation time | 612129169 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2015638826 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 370.usbdev_ tx_rx_disruption.2015638826 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/370.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/371.usbdev_tx_rx_disruption.2260727217 |
| Short name | T3594 |
| Test name | |
| Test status | |
| Simulation time | 677111790 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 215932 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2260727217 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 371.usbdev_ tx_rx_disruption.2260727217 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/371.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/372.usbdev_tx_rx_disruption.2497025315 |
| Short name | T3592 |
| Test name | |
| Test status | |
| Simulation time | 567179895 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2497025315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 372.usbdev_ tx_rx_disruption.2497025315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/372.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/373.usbdev_tx_rx_disruption.3271085972 |
| Short name | T3587 |
| Test name | |
| Test status | |
| Simulation time | 464631210 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 215920 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3271085972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 373.usbdev_ tx_rx_disruption.3271085972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/373.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/374.usbdev_tx_rx_disruption.2223274074 |
| Short name | T3586 |
| Test name | |
| Test status | |
| Simulation time | 433376062 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 215924 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2223274074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 374.usbdev_ tx_rx_disruption.2223274074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/374.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/375.usbdev_tx_rx_disruption.622673589 |
| Short name | T3593 |
| Test name | |
| Test status | |
| Simulation time | 603625501 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 215844 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=622673589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 375.usbdev_t x_rx_disruption.622673589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/375.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/376.usbdev_tx_rx_disruption.3965049895 |
| Short name | T3596 |
| Test name | |
| Test status | |
| Simulation time | 531480809 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3965049895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 376.usbdev_ tx_rx_disruption.3965049895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/376.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/377.usbdev_tx_rx_disruption.6989195 |
| Short name | T3591 |
| Test name | |
| Test status | |
| Simulation time | 461244379 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=6989195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+bra nch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 377.usbdev_tx_ rx_disruption.6989195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/377.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/378.usbdev_tx_rx_disruption.2460823035 |
| Short name | T3590 |
| Test name | |
| Test status | |
| Simulation time | 551927791 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2460823035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 378.usbdev_ tx_rx_disruption.2460823035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/378.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/379.usbdev_tx_rx_disruption.2094175780 |
| Short name | T3544 |
| Test name | |
| Test status | |
| Simulation time | 427216533 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2094175780 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 379.usbdev_ tx_rx_disruption.2094175780 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/379.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_alert_test.2468196591 |
| Short name | T2513 |
| Test name | |
| Test status | |
| Simulation time | 59886593 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:21 AM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468196591 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 38.usbdev_alert_test.2468196591 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_disconnect.2822005206 |
| Short name | T2508 |
| Test name | |
| Test status | |
| Simulation time | 10843466289 ps |
| CPU time | 17.05 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:19 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822005206 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_disconnect.2822005206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_reset.3169529081 |
| Short name | T2560 |
| Test name | |
| Test status | |
| Simulation time | 20200350967 ps |
| CPU time | 29.54 seconds |
| Started | Aug 27 07:51:01 AM UTC 24 |
| Finished | Aug 27 07:51:32 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3169529081 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_reset.3169529081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_aon_wake_resume.1088134204 |
| Short name | T2585 |
| Test name | |
| Test status | |
| Simulation time | 23831737143 ps |
| CPU time | 32.74 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1088134204 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_aon_wake_resume.1088134204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_av_buffer.4124712587 |
| Short name | T2465 |
| Test name | |
| Test status | |
| Simulation time | 174460688 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:06 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124712587 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_av_buffer.4124712587 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_bitstuff_err.1805704319 |
| Short name | T2464 |
| Test name | |
| Test status | |
| Simulation time | 191468019 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805704319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_bitstuff_err.1805704319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_clear.4125036386 |
| Short name | T2463 |
| Test name | |
| Test status | |
| Simulation time | 273051671 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4125036386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 38.usbdev_data_toggle_clear.4125036386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_data_toggle_restore.789034085 |
| Short name | T2474 |
| Test name | |
| Test status | |
| Simulation time | 831701366 ps |
| CPU time | 4.08 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:09 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=789034085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_data_toggle_restore.789034085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_device_address.1155449692 |
| Short name | T2627 |
| Test name | |
| Test status | |
| Simulation time | 25107225317 ps |
| CPU time | 44.14 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:50 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1155449692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_address.1155449692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_device_timeout.607691503 |
| Short name | T2589 |
| Test name | |
| Test status | |
| Simulation time | 4331633570 ps |
| CPU time | 33.49 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:39 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=607691503 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_device_timeout.607691503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_disable_endpoint.1462960484 |
| Short name | T2471 |
| Test name | |
| Test status | |
| Simulation time | 467795723 ps |
| CPU time | 2.25 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:07 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1462960484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_disable_endpoint.1462960484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_disconnected.3372522099 |
| Short name | T2469 |
| Test name | |
| Test status | |
| Simulation time | 162302784 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3372522099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_disconnected.3372522099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_enable.1851981844 |
| Short name | T2473 |
| Test name | |
| Test status | |
| Simulation time | 35042026 ps |
| CPU time | 0.8 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1851981844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 38.usbdev_enable.1851981844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_endpoint_access.1156967180 |
| Short name | T2287 |
| Test name | |
| Test status | |
| Simulation time | 806797180 ps |
| CPU time | 2.62 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:10 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156967180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_endpoint_access.1156967180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_fifo_rst.565112526 |
| Short name | T2341 |
| Test name | |
| Test status | |
| Simulation time | 169168694 ps |
| CPU time | 2.34 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:10 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=565112526 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_fifo_rst.565112526 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_in_iso.4106382413 |
| Short name | T2476 |
| Test name | |
| Test status | |
| Simulation time | 218305931 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:09 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106382413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 38.usbdev_in_iso.4106382413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_in_stall.6001157 |
| Short name | T2475 |
| Test name | |
| Test status | |
| Simulation time | 152375994 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=6001157 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_in_stall.6001157 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_in_trans.3589585779 |
| Short name | T2408 |
| Test name | |
| Test status | |
| Simulation time | 188170306 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589585779 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 38.usbdev_in_trans.3589585779 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_invalid_sync.4225817583 |
| Short name | T2548 |
| Test name | |
| Test status | |
| Simulation time | 3192803008 ps |
| CPU time | 21.76 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4225817583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 38.usbdev_invalid_sync.4225817583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_iso_retraction.1687129354 |
| Short name | T2969 |
| Test name | |
| Test status | |
| Simulation time | 11023400669 ps |
| CPU time | 129.4 seconds |
| Started | Aug 27 07:51:07 AM UTC 24 |
| Finished | Aug 27 07:53:19 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1687129354 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_iso_retraction.1687129354 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_link_in_err.2839775998 |
| Short name | T2479 |
| Test name | |
| Test status | |
| Simulation time | 215537851 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2839775998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_in_err.2839775998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_link_resume.3141244327 |
| Short name | T2685 |
| Test name | |
| Test status | |
| Simulation time | 30555276225 ps |
| CPU time | 53.05 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3141244327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_link_resume.3141244327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_link_suspend.1494983968 |
| Short name | T2501 |
| Test name | |
| Test status | |
| Simulation time | 4308182350 ps |
| CPU time | 6.75 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:17 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1494983968 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_link_suspend.1494983968 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_low_speed_traffic.806113761 |
| Short name | T2651 |
| Test name | |
| Test status | |
| Simulation time | 4741268097 ps |
| CPU time | 46.17 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:57 AM UTC 24 |
| Peak memory | 230616 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=806113761 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_low_speed_traffic.806113761 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_max_inter_pkt_delay.82255772 |
| Short name | T2678 |
| Test name | |
| Test status | |
| Simulation time | 2042072604 ps |
| CPU time | 51.06 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:52:02 AM UTC 24 |
| Peak memory | 230396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82255772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_max_inter_pkt_delay.82255772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_in_transaction.3537877076 |
| Short name | T2483 |
| Test name | |
| Test status | |
| Simulation time | 250213728 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3537877076 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_in_transaction.3537877076 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_max_length_out_transaction.1230497302 |
| Short name | T2478 |
| Test name | |
| Test status | |
| Simulation time | 192430310 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230497302 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_max_length_out_transaction.1230497302 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_min_inter_pkt_delay.3232658664 |
| Short name | T2542 |
| Test name | |
| Test status | |
| Simulation time | 2015653552 ps |
| CPU time | 17.2 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:28 AM UTC 24 |
| Peak memory | 235044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3232658664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_min_inter_pkt_delay.3232658664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_in_transaction.723061155 |
| Short name | T2480 |
| Test name | |
| Test status | |
| Simulation time | 165558344 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:51:09 AM UTC 24 |
| Finished | Aug 27 07:51:12 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=723061155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_in_transaction.723061155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_min_length_out_transaction.1814157261 |
| Short name | T2485 |
| Test name | |
| Test status | |
| Simulation time | 158276172 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1814157261 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_min_length_out_transaction.1814157261 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_nak_trans.1744255308 |
| Short name | T2490 |
| Test name | |
| Test status | |
| Simulation time | 195421859 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1744255308 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_nak_trans.1744255308 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_out_iso.4158675628 |
| Short name | T2487 |
| Test name | |
| Test status | |
| Simulation time | 177318255 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4158675628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_out_iso.4158675628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_out_stall.3987507027 |
| Short name | T2488 |
| Test name | |
| Test status | |
| Simulation time | 171820791 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3987507027 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_out_stall.3987507027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_out_trans_nak.2813943196 |
| Short name | T2489 |
| Test name | |
| Test status | |
| Simulation time | 169102294 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2813943196 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_out_trans_nak.2813943196 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_pending_in_trans.1335086702 |
| Short name | T2486 |
| Test name | |
| Test status | |
| Simulation time | 155652893 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:51:11 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1335086702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 38.usbdev_pending_in_trans.1335086702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_pinflip.2336789185 |
| Short name | T2492 |
| Test name | |
| Test status | |
| Simulation time | 239287408 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:51:12 AM UTC 24 |
| Finished | Aug 27 07:51:14 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2336789185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_pinflip.2336789185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_phy_config_usb_ref_disable.3927713317 |
| Short name | T332 |
| Test name | |
| Test status | |
| Simulation time | 170057507 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3927713317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 38.usbdev_phy_config_usb_ref_disable.3927713317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_phy_pins_sense.1626502936 |
| Short name | T2495 |
| Test name | |
| Test status | |
| Simulation time | 98184181 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1626502936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_phy_pins_sense.1626502936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_buffer.3827299452 |
| Short name | T2650 |
| Test name | |
| Test status | |
| Simulation time | 16035229584 ps |
| CPU time | 40.12 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:56 AM UTC 24 |
| Peak memory | 228504 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827299452 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_pkt_buffer.3827299452 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_received.1852757857 |
| Short name | T2498 |
| Test name | |
| Test status | |
| Simulation time | 197917821 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1852757857 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 38.usbdev_pkt_received.1852757857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_pkt_sent.256581753 |
| Short name | T2497 |
| Test name | |
| Test status | |
| Simulation time | 155793001 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=256581753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_pkt_sent.256581753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_in_transaction.1288469052 |
| Short name | T2494 |
| Test name | |
| Test status | |
| Simulation time | 232240451 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1288469052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_random_length_in_transaction.1288469052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_random_length_out_transaction.2220515848 |
| Short name | T2499 |
| Test name | |
| Test status | |
| Simulation time | 180905514 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2220515848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 38.usbdev_random_length_out_transaction.2220515848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_rx_crc_err.3619405702 |
| Short name | T2500 |
| Test name | |
| Test status | |
| Simulation time | 175389460 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3619405702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 38.usbdev_rx_crc_err.3619405702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_rx_full.2812722359 |
| Short name | T2503 |
| Test name | |
| Test status | |
| Simulation time | 342679977 ps |
| CPU time | 2.16 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:17 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812722359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 38.usbdev_rx_full.2812722359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_setup_stage.1959360279 |
| Short name | T2496 |
| Test name | |
| Test status | |
| Simulation time | 198962034 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:51:14 AM UTC 24 |
| Finished | Aug 27 07:51:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1959360279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_setup_stage.1959360279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_setup_trans_ignored.3572466362 |
| Short name | T2506 |
| Test name | |
| Test status | |
| Simulation time | 157082683 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:19 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572466362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 38.usbdev_setup_trans_ignored.3572466362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_smoke.1968389978 |
| Short name | T2504 |
| Test name | |
| Test status | |
| Simulation time | 221886875 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1968389978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_smoke.1968389978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_spurious_pids_ignored.424482887 |
| Short name | T2587 |
| Test name | |
| Test status | |
| Simulation time | 2430483316 ps |
| CPU time | 20.63 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=424482887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 38.usbdev_spurious_pids_ignored.424482887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_stall_priority_over_nak.884676533 |
| Short name | T2505 |
| Test name | |
| Test status | |
| Simulation time | 207959200 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:19 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=884676533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_stall_priority_over_nak.884676533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_stall_trans.2011557655 |
| Short name | T2507 |
| Test name | |
| Test status | |
| Simulation time | 202785689 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:19 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2011557655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 38.usbdev_stall_trans.2011557655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_stream_len_max.297441066 |
| Short name | T2512 |
| Test name | |
| Test status | |
| Simulation time | 1255914064 ps |
| CPU time | 3.33 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:51:21 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=297441066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 38.usbdev_stream_len_max.297441066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_streaming_out.2964884291 |
| Short name | T2705 |
| Test name | |
| Test status | |
| Simulation time | 2182857490 ps |
| CPU time | 50.89 seconds |
| Started | Aug 27 07:51:16 AM UTC 24 |
| Finished | Aug 27 07:52:09 AM UTC 24 |
| Peak memory | 235096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964884291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 38.usbdev_streaming_out.2964884291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_timeout_missing_host_handshake.3507047774 |
| Short name | T2502 |
| Test name | |
| Test status | |
| Simulation time | 1523235064 ps |
| CPU time | 11.98 seconds |
| Started | Aug 27 07:51:04 AM UTC 24 |
| Finished | Aug 27 07:51:17 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3507047774 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_timeout_missing_host_handshake.3507047774 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/38.usbdev_tx_rx_disruption.1210447699 |
| Short name | T2519 |
| Test name | |
| Test status | |
| Simulation time | 583298109 ps |
| CPU time | 2.73 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:23 AM UTC 24 |
| Peak memory | 217784 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1210447699 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 38.usbdev_t x_rx_disruption.1210447699 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/38.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/380.usbdev_tx_rx_disruption.3351682498 |
| Short name | T3595 |
| Test name | |
| Test status | |
| Simulation time | 505409315 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3351682498 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 380.usbdev_ tx_rx_disruption.3351682498 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/380.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/381.usbdev_tx_rx_disruption.2470534613 |
| Short name | T3597 |
| Test name | |
| Test status | |
| Simulation time | 638991927 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2470534613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 381.usbdev_ tx_rx_disruption.2470534613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/381.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/382.usbdev_tx_rx_disruption.2939340895 |
| Short name | T3546 |
| Test name | |
| Test status | |
| Simulation time | 531100180 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2939340895 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 382.usbdev_ tx_rx_disruption.2939340895 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/382.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/383.usbdev_tx_rx_disruption.3029988066 |
| Short name | T3508 |
| Test name | |
| Test status | |
| Simulation time | 615857922 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 215764 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3029988066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 383.usbdev_ tx_rx_disruption.3029988066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/383.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/385.usbdev_tx_rx_disruption.2151778953 |
| Short name | T3545 |
| Test name | |
| Test status | |
| Simulation time | 452735156 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2151778953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 385.usbdev_ tx_rx_disruption.2151778953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/385.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/386.usbdev_tx_rx_disruption.4271624879 |
| Short name | T3505 |
| Test name | |
| Test status | |
| Simulation time | 473472047 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4271624879 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 386.usbdev_ tx_rx_disruption.4271624879 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/386.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/387.usbdev_tx_rx_disruption.2112008128 |
| Short name | T3506 |
| Test name | |
| Test status | |
| Simulation time | 479598335 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2112008128 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 387.usbdev_ tx_rx_disruption.2112008128 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/387.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/388.usbdev_tx_rx_disruption.2022940608 |
| Short name | T3507 |
| Test name | |
| Test status | |
| Simulation time | 486891316 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2022940608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 388.usbdev_ tx_rx_disruption.2022940608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/388.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/389.usbdev_tx_rx_disruption.2692332802 |
| Short name | T3514 |
| Test name | |
| Test status | |
| Simulation time | 584012355 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2692332802 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 389.usbdev_ tx_rx_disruption.2692332802 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/389.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_alert_test.1795296625 |
| Short name | T2572 |
| Test name | |
| Test status | |
| Simulation time | 90774289 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795296625 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 39.usbdev_alert_test.1795296625 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_disconnect.3436163950 |
| Short name | T2540 |
| Test name | |
| Test status | |
| Simulation time | 4624522037 ps |
| CPU time | 6.97 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3436163950 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_disconnect.3436163950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_reset.4146932345 |
| Short name | T2594 |
| Test name | |
| Test status | |
| Simulation time | 18368313889 ps |
| CPU time | 21.05 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:41 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4146932345 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_reset.4146932345 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_aon_wake_resume.3461403837 |
| Short name | T2653 |
| Test name | |
| Test status | |
| Simulation time | 28370625170 ps |
| CPU time | 36.85 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:57 AM UTC 24 |
| Peak memory | 218400 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461403837 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_aon_wake_resume.3461403837 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_av_buffer.576944301 |
| Short name | T2516 |
| Test name | |
| Test status | |
| Simulation time | 147010378 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=576944301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_av_buffer.576944301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_bitstuff_err.3234265502 |
| Short name | T2515 |
| Test name | |
| Test status | |
| Simulation time | 192491353 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3234265502 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_bitstuff_err.3234265502 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_clear.1625021986 |
| Short name | T2517 |
| Test name | |
| Test status | |
| Simulation time | 398379171 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1625021986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 39.usbdev_data_toggle_clear.1625021986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_data_toggle_restore.785674375 |
| Short name | T2528 |
| Test name | |
| Test status | |
| Simulation time | 1307212454 ps |
| CPU time | 4.41 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=785674375 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_data_toggle_restore.785674375 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_device_address.122649836 |
| Short name | T2758 |
| Test name | |
| Test status | |
| Simulation time | 32220129378 ps |
| CPU time | 61.66 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=122649836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_device_address.122649836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_device_timeout.3351164989 |
| Short name | T2530 |
| Test name | |
| Test status | |
| Simulation time | 291071142 ps |
| CPU time | 4.64 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3351164989 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_device_timeout.3351164989 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_disable_endpoint.442157921 |
| Short name | T2523 |
| Test name | |
| Test status | |
| Simulation time | 424494810 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442157921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_disable_endpoint.442157921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_disconnected.1906100070 |
| Short name | T2522 |
| Test name | |
| Test status | |
| Simulation time | 138717430 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1906100070 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_disconnected.1906100070 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_enable.1776195467 |
| Short name | T2521 |
| Test name | |
| Test status | |
| Simulation time | 31720642 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1776195467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_enable.1776195467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_access.2129084030 |
| Short name | T2529 |
| Test name | |
| Test status | |
| Simulation time | 775472216 ps |
| CPU time | 2.7 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2129084030 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_access.2129084030 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_endpoint_types.986196902 |
| Short name | T448 |
| Test name | |
| Test status | |
| Simulation time | 305836099 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:24 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=986196902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_endpoint_types.986196902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_fifo_rst.2869295963 |
| Short name | T2526 |
| Test name | |
| Test status | |
| Simulation time | 238792846 ps |
| CPU time | 2.27 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2869295963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_fifo_rst.2869295963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_in_iso.884123776 |
| Short name | T2538 |
| Test name | |
| Test status | |
| Simulation time | 208582285 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 226012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=884123776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_in_iso.884123776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_in_stall.4103428200 |
| Short name | T2533 |
| Test name | |
| Test status | |
| Simulation time | 134425855 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:26 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4103428200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_stall.4103428200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_in_trans.3476591858 |
| Short name | T2534 |
| Test name | |
| Test status | |
| Simulation time | 188911750 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:26 AM UTC 24 |
| Peak memory | 215776 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3476591858 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_in_trans.3476591858 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_invalid_sync.754242686 |
| Short name | T2648 |
| Test name | |
| Test status | |
| Simulation time | 4631016340 ps |
| CPU time | 32.5 seconds |
| Started | Aug 27 07:51:21 AM UTC 24 |
| Finished | Aug 27 07:51:55 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=754242686 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_invalid_sync.754242686 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_iso_retraction.936681639 |
| Short name | T2626 |
| Test name | |
| Test status | |
| Simulation time | 4051608888 ps |
| CPU time | 24.01 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:49 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=936681639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 39.usbdev_iso_retraction.936681639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_link_in_err.3182742894 |
| Short name | T2539 |
| Test name | |
| Test status | |
| Simulation time | 234519469 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3182742894 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_link_in_err.3182742894 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_link_resume.645170637 |
| Short name | T2583 |
| Test name | |
| Test status | |
| Simulation time | 7486754592 ps |
| CPU time | 12.11 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=645170637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_link_resume.645170637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_link_suspend.1785698646 |
| Short name | T2567 |
| Test name | |
| Test status | |
| Simulation time | 4729415505 ps |
| CPU time | 7.49 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:33 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1785698646 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_link_suspend.1785698646 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_low_speed_traffic.4078335314 |
| Short name | T2649 |
| Test name | |
| Test status | |
| Simulation time | 4144337982 ps |
| CPU time | 29.83 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:55 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4078335314 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_low_speed_traffic.4078335314 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_max_inter_pkt_delay.1841059444 |
| Short name | T2599 |
| Test name | |
| Test status | |
| Simulation time | 2362275032 ps |
| CPU time | 16.32 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 218444 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841059444 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_max_inter_pkt_delay.1841059444 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_in_transaction.4177103135 |
| Short name | T2535 |
| Test name | |
| Test status | |
| Simulation time | 288127077 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4177103135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_in_transaction.4177103135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_max_length_out_transaction.2538629020 |
| Short name | T2536 |
| Test name | |
| Test status | |
| Simulation time | 196701827 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:51:24 AM UTC 24 |
| Finished | Aug 27 07:51:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2538629020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_max_length_out_transaction.2538629020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_min_inter_pkt_delay.2690624814 |
| Short name | T2614 |
| Test name | |
| Test status | |
| Simulation time | 1873758961 ps |
| CPU time | 16.58 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:45 AM UTC 24 |
| Peak memory | 228376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2690624814 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_min_inter_pkt_delay.2690624814 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_in_transaction.3112261480 |
| Short name | T2547 |
| Test name | |
| Test status | |
| Simulation time | 165131305 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3112261480 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_min_length_in_transaction.3112261480 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_min_length_out_transaction.966942335 |
| Short name | T2545 |
| Test name | |
| Test status | |
| Simulation time | 171349740 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 215812 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966942335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 39.usbdev_min_length_out_transaction.966942335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_nak_trans.1134139321 |
| Short name | T156 |
| Test name | |
| Test status | |
| Simulation time | 190763639 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1134139321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_nak_trans.1134139321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_out_iso.2848555067 |
| Short name | T2245 |
| Test name | |
| Test status | |
| Simulation time | 151237551 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2848555067 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 39.usbdev_out_iso.2848555067 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_out_stall.413013112 |
| Short name | T2323 |
| Test name | |
| Test status | |
| Simulation time | 188022416 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=413013112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_out_stall.413013112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_out_trans_nak.3517072507 |
| Short name | T2549 |
| Test name | |
| Test status | |
| Simulation time | 164230571 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517072507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_out_trans_nak.3517072507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_pending_in_trans.1009420573 |
| Short name | T2551 |
| Test name | |
| Test status | |
| Simulation time | 160869559 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1009420573 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 39.usbdev_pending_in_trans.1009420573 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_pinflip.2370059902 |
| Short name | T2556 |
| Test name | |
| Test status | |
| Simulation time | 225360553 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2370059902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_pinflip.2370059902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_phy_config_usb_ref_disable.3926164143 |
| Short name | T2546 |
| Test name | |
| Test status | |
| Simulation time | 177570102 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3926164143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 39.usbdev_phy_config_usb_ref_disable.3926164143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_phy_pins_sense.2292342737 |
| Short name | T2550 |
| Test name | |
| Test status | |
| Simulation time | 40961795 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292342737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_phy_pins_sense.2292342737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_buffer.2066489671 |
| Short name | T2677 |
| Test name | |
| Test status | |
| Simulation time | 12589876799 ps |
| CPU time | 32.67 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:52:02 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2066489671 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_pkt_buffer.2066489671 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_received.4221775209 |
| Short name | T2553 |
| Test name | |
| Test status | |
| Simulation time | 151209903 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 215952 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4221775209 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 39.usbdev_pkt_received.4221775209 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_pkt_sent.1496890532 |
| Short name | T2555 |
| Test name | |
| Test status | |
| Simulation time | 201935458 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1496890532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 39.usbdev_pkt_sent.1496890532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_in_transaction.1412307140 |
| Short name | T2557 |
| Test name | |
| Test status | |
| Simulation time | 196048124 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1412307140 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_random_length_in_transaction.1412307140 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_random_length_out_transaction.1329817915 |
| Short name | T2558 |
| Test name | |
| Test status | |
| Simulation time | 144079197 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1329817915 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 39.usbdev_random_length_out_transaction.1329817915 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_rx_crc_err.1683045871 |
| Short name | T2554 |
| Test name | |
| Test status | |
| Simulation time | 192446424 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:30 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1683045871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_rx_crc_err.1683045871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_rx_full.295170301 |
| Short name | T2559 |
| Test name | |
| Test status | |
| Simulation time | 372263902 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:51:28 AM UTC 24 |
| Finished | Aug 27 07:51:31 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=295170301 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 39.usbdev_rx_full.295170301 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_setup_stage.281244970 |
| Short name | T2561 |
| Test name | |
| Test status | |
| Simulation time | 141224169 ps |
| CPU time | 0.85 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=281244970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 39.usbdev_setup_stage.281244970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_setup_trans_ignored.2693521797 |
| Short name | T2563 |
| Test name | |
| Test status | |
| Simulation time | 155276483 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2693521797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 39.usbdev_setup_trans_ignored.2693521797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_smoke.2120210338 |
| Short name | T2564 |
| Test name | |
| Test status | |
| Simulation time | 269890813 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2120210338 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_smoke.2120210338 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_spurious_pids_ignored.1370631777 |
| Short name | T2866 |
| Test name | |
| Test status | |
| Simulation time | 3298609139 ps |
| CPU time | 78.94 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:52:51 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1370631777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 39.usbdev_spurious_pids_ignored.1370631777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_stall_priority_over_nak.3007446225 |
| Short name | T2566 |
| Test name | |
| Test status | |
| Simulation time | 159564850 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3007446225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_stall_priority_over_nak.3007446225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_stall_trans.1195857441 |
| Short name | T2565 |
| Test name | |
| Test status | |
| Simulation time | 168395101 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1195857441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 39.usbdev_stall_trans.1195857441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_stream_len_max.381017670 |
| Short name | T2577 |
| Test name | |
| Test status | |
| Simulation time | 549688460 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=381017670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 39.usbdev_stream_len_max.381017670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_streaming_out.3091584771 |
| Short name | T2629 |
| Test name | |
| Test status | |
| Simulation time | 2140943986 ps |
| CPU time | 19.24 seconds |
| Started | Aug 27 07:51:30 AM UTC 24 |
| Finished | Aug 27 07:51:51 AM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3091584771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 39.usbdev_streaming_out.3091584771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_timeout_missing_host_handshake.3283664856 |
| Short name | T2532 |
| Test name | |
| Test status | |
| Simulation time | 640895485 ps |
| CPU time | 4.66 seconds |
| Started | Aug 27 07:51:19 AM UTC 24 |
| Finished | Aug 27 07:51:25 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3283664856 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_timeout_missing_host_handshake.3283664856 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/39.usbdev_tx_rx_disruption.3479292166 |
| Short name | T2579 |
| Test name | |
| Test status | |
| Simulation time | 467970693 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3479292166 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 39.usbdev_t x_rx_disruption.3479292166 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/39.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/390.usbdev_tx_rx_disruption.601376753 |
| Short name | T3513 |
| Test name | |
| Test status | |
| Simulation time | 570479213 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 215960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=601376753 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 390.usbdev_t x_rx_disruption.601376753 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/390.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/391.usbdev_tx_rx_disruption.1571821087 |
| Short name | T3510 |
| Test name | |
| Test status | |
| Simulation time | 492397368 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1571821087 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 391.usbdev_ tx_rx_disruption.1571821087 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/391.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/392.usbdev_tx_rx_disruption.3546592003 |
| Short name | T3509 |
| Test name | |
| Test status | |
| Simulation time | 570807793 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3546592003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 392.usbdev_ tx_rx_disruption.3546592003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/392.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/393.usbdev_tx_rx_disruption.2797825662 |
| Short name | T3515 |
| Test name | |
| Test status | |
| Simulation time | 609063885 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 217080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2797825662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 393.usbdev_ tx_rx_disruption.2797825662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/393.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/394.usbdev_tx_rx_disruption.1954439106 |
| Short name | T3511 |
| Test name | |
| Test status | |
| Simulation time | 516503889 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 217108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1954439106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 394.usbdev_ tx_rx_disruption.1954439106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/394.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/395.usbdev_tx_rx_disruption.2329378018 |
| Short name | T3512 |
| Test name | |
| Test status | |
| Simulation time | 536811570 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2329378018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 395.usbdev_ tx_rx_disruption.2329378018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/395.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/396.usbdev_tx_rx_disruption.1018736286 |
| Short name | T3599 |
| Test name | |
| Test status | |
| Simulation time | 482571447 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1018736286 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 396.usbdev_ tx_rx_disruption.1018736286 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/396.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/397.usbdev_tx_rx_disruption.2587499759 |
| Short name | T3601 |
| Test name | |
| Test status | |
| Simulation time | 506827059 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2587499759 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 397.usbdev_ tx_rx_disruption.2587499759 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/397.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/398.usbdev_tx_rx_disruption.1191252152 |
| Short name | T3598 |
| Test name | |
| Test status | |
| Simulation time | 538172334 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1191252152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 398.usbdev_ tx_rx_disruption.1191252152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/398.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/399.usbdev_tx_rx_disruption.3079131574 |
| Short name | T3600 |
| Test name | |
| Test status | |
| Simulation time | 508277807 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3079131574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 399.usbdev_ tx_rx_disruption.3079131574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/399.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_alert_test.657394428 |
| Short name | T677 |
| Test name | |
| Test status | |
| Simulation time | 56786317 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:39:40 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=657394428 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_alert_test.657394428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_disconnect.3833326341 |
| Short name | T106 |
| Test name | |
| Test status | |
| Simulation time | 8834352397 ps |
| CPU time | 12.41 seconds |
| Started | Aug 27 07:38:34 AM UTC 24 |
| Finished | Aug 27 07:38:48 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3833326341 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_disconnect.3833326341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_reset.3886372594 |
| Short name | T234 |
| Test name | |
| Test status | |
| Simulation time | 21164009257 ps |
| CPU time | 44.85 seconds |
| Started | Aug 27 07:38:37 AM UTC 24 |
| Finished | Aug 27 07:39:23 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3886372594 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_reset.3886372594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_aon_wake_resume.2650937407 |
| Short name | T684 |
| Test name | |
| Test status | |
| Simulation time | 30147450616 ps |
| CPU time | 69.04 seconds |
| Started | Aug 27 07:38:37 AM UTC 24 |
| Finished | Aug 27 07:39:47 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2650937407 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_aon_wake_resume.2650937407 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_av_buffer.3515759084 |
| Short name | T617 |
| Test name | |
| Test status | |
| Simulation time | 177098923 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:38:37 AM UTC 24 |
| Finished | Aug 27 07:38:39 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3515759084 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_av_buffer.3515759084 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_av_empty.368679349 |
| Short name | T54 |
| Test name | |
| Test status | |
| Simulation time | 179678801 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:38:38 AM UTC 24 |
| Finished | Aug 27 07:38:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=368679349 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_empty_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_av_empty.368679349 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_av_empty/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_av_overflow.2372910690 |
| Short name | T93 |
| Test name | |
| Test status | |
| Simulation time | 150603016 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:38:38 AM UTC 24 |
| Finished | Aug 27 07:38:40 AM UTC 24 |
| Peak memory | 216180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2372910690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_overflow_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_av_overflow.2372910690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_av_overflow/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_bitstuff_err.1188193708 |
| Short name | T618 |
| Test name | |
| Test status | |
| Simulation time | 147923115 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:38:39 AM UTC 24 |
| Finished | Aug 27 07:38:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1188193708 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_bitstuff_err.1188193708 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_clear.2851041081 |
| Short name | T620 |
| Test name | |
| Test status | |
| Simulation time | 197879187 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:38:40 AM UTC 24 |
| Finished | Aug 27 07:38:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851041081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_data_toggle_clear.2851041081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_data_toggle_restore.13897711 |
| Short name | T621 |
| Test name | |
| Test status | |
| Simulation time | 328391194 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:38:41 AM UTC 24 |
| Finished | Aug 27 07:38:44 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=13897711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vc s/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_data_toggle_restore.13897711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_device_address.3860357522 |
| Short name | T183 |
| Test name | |
| Test status | |
| Simulation time | 37535252937 ps |
| CPU time | 79.27 seconds |
| Started | Aug 27 07:38:41 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3860357522 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_address.3860357522 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_device_timeout.1528281434 |
| Short name | T634 |
| Test name | |
| Test status | |
| Simulation time | 855471592 ps |
| CPU time | 17.71 seconds |
| Started | Aug 27 07:38:42 AM UTC 24 |
| Finished | Aug 27 07:39:00 AM UTC 24 |
| Peak memory | 218112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528281434 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_device_timeout.1528281434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_disable_endpoint.3642582233 |
| Short name | T390 |
| Test name | |
| Test status | |
| Simulation time | 844713623 ps |
| CPU time | 3.69 seconds |
| Started | Aug 27 07:38:43 AM UTC 24 |
| Finished | Aug 27 07:38:48 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642582233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_disable_endpoint.3642582233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_disconnected.3710537359 |
| Short name | T624 |
| Test name | |
| Test status | |
| Simulation time | 142012307 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:38:44 AM UTC 24 |
| Finished | Aug 27 07:38:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710537359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_disconnected.3710537359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_enable.3390854727 |
| Short name | T623 |
| Test name | |
| Test status | |
| Simulation time | 115820922 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:38:44 AM UTC 24 |
| Finished | Aug 27 07:38:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3390854727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 4.usbdev_enable.3390854727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_access.2211967182 |
| Short name | T625 |
| Test name | |
| Test status | |
| Simulation time | 926188458 ps |
| CPU time | 3.93 seconds |
| Started | Aug 27 07:38:45 AM UTC 24 |
| Finished | Aug 27 07:38:50 AM UTC 24 |
| Peak memory | 218324 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211967182 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_access.2211967182 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_endpoint_types.275532665 |
| Short name | T406 |
| Test name | |
| Test status | |
| Simulation time | 508832178 ps |
| CPU time | 2.68 seconds |
| Started | Aug 27 07:38:46 AM UTC 24 |
| Finished | Aug 27 07:38:50 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=275532665 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_endpoint_types.275532665 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_fifo_rst.2112706710 |
| Short name | T627 |
| Test name | |
| Test status | |
| Simulation time | 233384785 ps |
| CPU time | 2.62 seconds |
| Started | Aug 27 07:38:49 AM UTC 24 |
| Finished | Aug 27 07:38:53 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2112706710 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_fifo_rst.2112706710 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk.1587750136 |
| Short name | T1041 |
| Test name | |
| Test status | |
| Simulation time | 119209106914 ps |
| CPU time | 249.71 seconds |
| Started | Aug 27 07:38:49 AM UTC 24 |
| Finished | Aug 27 07:43:03 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=-18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1587750136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_hiclk.1587750136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_freq_hiclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_freq_hiclk_max.3455241725 |
| Short name | T956 |
| Test name | |
| Test status | |
| Simulation time | 114352620764 ps |
| CPU time | 215.17 seconds |
| Started | Aug 27 07:38:49 AM UTC 24 |
| Finished | Aug 27 07:42:27 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +host_drifting=1 +host_freq_delta=-120000 +osc_tracking=1 +reset_recovery=1 +usb_freq_delta=+120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=3455241725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_hiclk_max.3455241725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_freq_hiclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk.1502462165 |
| Short name | T985 |
| Test name | |
| Test status | |
| Simulation time | 108104078564 ps |
| CPU time | 226.92 seconds |
| Started | Aug 27 07:38:49 AM UTC 24 |
| Finished | Aug 27 07:42:39 AM UTC 24 |
| Peak memory | 218316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +host_freq_delta=+18500 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueu e -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502462165 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_freq_loclk.1502462165 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_freq_loclk/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_freq_loclk_max.1128163306 |
| Short name | T881 |
| Test name | |
| Test status | |
| Simulation time | 97075227091 ps |
| CPU time | 176.75 seconds |
| Started | Aug 27 07:38:52 AM UTC 24 |
| Finished | Aug 27 07:41:51 AM UTC 24 |
| Peak memory | 218288 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +cdc_instrumentation_enabled=0 +osc_tracking=1 +host_drifting=1 +host_fr eq_delta=+120000 +reset_recovery=1 +usb_freq_delta=-120000 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tool s/sim.tcl +ntb_random_seed=1128163306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm l ine+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm _name 4.usbdev_freq_loclk_max.1128163306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_freq_loclk_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_freq_phase.3277986395 |
| Short name | T980 |
| Test name | |
| Test status | |
| Simulation time | 107113725097 ps |
| CPU time | 223.23 seconds |
| Started | Aug 27 07:38:52 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277986395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_freq_phase_delta_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 4.usbdev_freq_phase.3277986395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_freq_phase/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_in_iso.3258606032 |
| Short name | T629 |
| Test name | |
| Test status | |
| Simulation time | 195485221 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:38:54 AM UTC 24 |
| Finished | Aug 27 07:38:57 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3258606032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_in_iso.3258606032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_in_stall.3174312940 |
| Short name | T632 |
| Test name | |
| Test status | |
| Simulation time | 158016904 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:38:57 AM UTC 24 |
| Finished | Aug 27 07:39:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3174312940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_stall.3174312940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_in_trans.4204532701 |
| Short name | T633 |
| Test name | |
| Test status | |
| Simulation time | 241491295 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:38:57 AM UTC 24 |
| Finished | Aug 27 07:39:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204532701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_in_trans.4204532701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_invalid_sync.3111352088 |
| Short name | T665 |
| Test name | |
| Test status | |
| Simulation time | 3808430991 ps |
| CPU time | 39.14 seconds |
| Started | Aug 27 07:38:52 AM UTC 24 |
| Finished | Aug 27 07:39:33 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3111352088 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 4.usbdev_invalid_sync.3111352088 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_iso_retraction.122138333 |
| Short name | T97 |
| Test name | |
| Test status | |
| Simulation time | 6437351916 ps |
| CPU time | 44.65 seconds |
| Started | Aug 27 07:39:01 AM UTC 24 |
| Finished | Aug 27 07:39:47 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=122138333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 4.usbdev_iso_retraction.122138333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_link_in_err.3910793812 |
| Short name | T637 |
| Test name | |
| Test status | |
| Simulation time | 213601387 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:39:01 AM UTC 24 |
| Finished | Aug 27 07:39:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3910793812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_in_err.3910793812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_link_resume.3439473284 |
| Short name | T107 |
| Test name | |
| Test status | |
| Simulation time | 13087099194 ps |
| CPU time | 21.21 seconds |
| Started | Aug 27 07:39:01 AM UTC 24 |
| Finished | Aug 27 07:39:23 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439473284 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_resume.3439473284 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_link_suspend.771991144 |
| Short name | T614 |
| Test name | |
| Test status | |
| Simulation time | 8590125621 ps |
| CPU time | 16.01 seconds |
| Started | Aug 27 07:39:01 AM UTC 24 |
| Finished | Aug 27 07:39:18 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=771991144 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_link_suspend.771991144 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_low_speed_traffic.1040879685 |
| Short name | T378 |
| Test name | |
| Test status | |
| Simulation time | 5068175190 ps |
| CPU time | 46.26 seconds |
| Started | Aug 27 07:39:02 AM UTC 24 |
| Finished | Aug 27 07:39:50 AM UTC 24 |
| Peak memory | 230604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1040879685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_low_speed_traffic.1040879685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_max_inter_pkt_delay.2508260874 |
| Short name | T742 |
| Test name | |
| Test status | |
| Simulation time | 2665690718 ps |
| CPU time | 76.53 seconds |
| Started | Aug 27 07:39:03 AM UTC 24 |
| Finished | Aug 27 07:40:22 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2508260874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_inter_pkt_delay.2508260874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_in_transaction.3892258769 |
| Short name | T638 |
| Test name | |
| Test status | |
| Simulation time | 239692559 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:39:04 AM UTC 24 |
| Finished | Aug 27 07:39:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892258769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_in_transaction.3892258769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_max_length_out_transaction.1559990239 |
| Short name | T639 |
| Test name | |
| Test status | |
| Simulation time | 245115582 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:39:04 AM UTC 24 |
| Finished | Aug 27 07:39:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559990239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_max_length_out_transaction.1559990239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_max_non_iso_usb_traffic.2637724266 |
| Short name | T674 |
| Test name | |
| Test status | |
| Simulation time | 2482086375 ps |
| CPU time | 27.79 seconds |
| Started | Aug 27 07:39:08 AM UTC 24 |
| Finished | Aug 27 07:39:37 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2637724266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_non_iso_usb_traffic.2637724266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_max_usb_traffic.2447835100 |
| Short name | T759 |
| Test name | |
| Test status | |
| Simulation time | 2546734541 ps |
| CPU time | 81.84 seconds |
| Started | Aug 27 07:39:08 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2447835100 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_max_usb_traffic.2447835100 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_min_inter_pkt_delay.780270484 |
| Short name | T664 |
| Test name | |
| Test status | |
| Simulation time | 2419625736 ps |
| CPU time | 18.71 seconds |
| Started | Aug 27 07:39:12 AM UTC 24 |
| Finished | Aug 27 07:39:32 AM UTC 24 |
| Peak memory | 235300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=780270484 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_min_inter_pkt_delay.780270484 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_in_transaction.2655970462 |
| Short name | T645 |
| Test name | |
| Test status | |
| Simulation time | 150028545 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:39:15 AM UTC 24 |
| Finished | Aug 27 07:39:17 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2655970462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_in_transaction.2655970462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_min_length_out_transaction.3439013042 |
| Short name | T646 |
| Test name | |
| Test status | |
| Simulation time | 144246292 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:39:15 AM UTC 24 |
| Finished | Aug 27 07:39:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3439013042 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_min_length_out_transaction.3439013042 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_nak_trans.2320358065 |
| Short name | T144 |
| Test name | |
| Test status | |
| Simulation time | 229380599 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:39:15 AM UTC 24 |
| Finished | Aug 27 07:39:18 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320358065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_nak_trans.2320358065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_out_iso.4190113986 |
| Short name | T647 |
| Test name | |
| Test status | |
| Simulation time | 187418282 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:39:17 AM UTC 24 |
| Finished | Aug 27 07:39:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4190113986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_out_iso.4190113986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_out_stall.411167667 |
| Short name | T651 |
| Test name | |
| Test status | |
| Simulation time | 216067667 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:39:19 AM UTC 24 |
| Finished | Aug 27 07:39:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=411167667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 4.usbdev_out_stall.411167667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_out_trans_nak.1230335153 |
| Short name | T649 |
| Test name | |
| Test status | |
| Simulation time | 185552820 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:39:19 AM UTC 24 |
| Finished | Aug 27 07:39:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1230335153 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 4.usbdev_out_trans_nak.1230335153 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_pending_in_trans.84323998 |
| Short name | T187 |
| Test name | |
| Test status | |
| Simulation time | 150661459 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:39:19 AM UTC 24 |
| Finished | Aug 27 07:39:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=84323998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_pending_in_trans.84323998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_pinflip.2368540940 |
| Short name | T652 |
| Test name | |
| Test status | |
| Simulation time | 206139867 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:39:19 AM UTC 24 |
| Finished | Aug 27 07:39:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2368540940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_pinflip.2368540940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_rand_bus_type.419609682 |
| Short name | T650 |
| Test name | |
| Test status | |
| Simulation time | 206801232 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:39:20 AM UTC 24 |
| Finished | Aug 27 07:39:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=419609682 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_rand_bus_typ e_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_rand_bus_type.419609682 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_phy_config_rand_bus_type/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_phy_config_usb_ref_disable.3205266581 |
| Short name | T653 |
| Test name | |
| Test status | |
| Simulation time | 178956699 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:39:21 AM UTC 24 |
| Finished | Aug 27 07:39:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3205266581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 4.usbdev_phy_config_usb_ref_disable.3205266581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_buffer.3330708902 |
| Short name | T293 |
| Test name | |
| Test status | |
| Simulation time | 15412412560 ps |
| CPU time | 39 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3330708902 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_pkt_buffer.3330708902 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_received.732853035 |
| Short name | T654 |
| Test name | |
| Test status | |
| Simulation time | 151605845 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:39:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=732853035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_pkt_received.732853035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_pkt_sent.430226222 |
| Short name | T657 |
| Test name | |
| Test status | |
| Simulation time | 248669204 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:39:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=430226222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_pkt_sent.430226222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_disconnects.3772603527 |
| Short name | T689 |
| Test name | |
| Test status | |
| Simulation time | 2774771212 ps |
| CPU time | 24.04 seconds |
| Started | Aug 27 07:39:25 AM UTC 24 |
| Finished | Aug 27 07:39:50 AM UTC 24 |
| Peak memory | 235216 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3772603527 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_disconnects.3772603527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rand_bus_resets.2347235252 |
| Short name | T182 |
| Test name | |
| Test status | |
| Simulation time | 3740960554 ps |
| CPU time | 79.18 seconds |
| Started | Aug 27 07:39:25 AM UTC 24 |
| Finished | Aug 27 07:40:46 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2347235252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_bus_resets.2347235252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rand_suspends.2016942027 |
| Short name | T693 |
| Test name | |
| Test status | |
| Simulation time | 6845922930 ps |
| CPU time | 27.89 seconds |
| Started | Aug 27 07:39:25 AM UTC 24 |
| Finished | Aug 27 07:39:54 AM UTC 24 |
| Peak memory | 230716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2016942027 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_rand_suspends.2016942027 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_in_transaction.331021986 |
| Short name | T656 |
| Test name | |
| Test status | |
| Simulation time | 200726624 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:39:26 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=331021986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 4.usbdev_random_length_in_transaction.331021986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_random_length_out_transaction.3427536654 |
| Short name | T655 |
| Test name | |
| Test status | |
| Simulation time | 220413714 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:39:23 AM UTC 24 |
| Finished | Aug 27 07:39:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427536654 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 4.usbdev_random_length_out_transaction.3427536654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_resume_link_active.449117198 |
| Short name | T707 |
| Test name | |
| Test status | |
| Simulation time | 20168077046 ps |
| CPU time | 34.45 seconds |
| Started | Aug 27 07:39:27 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=449117198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 4.usbdev_resume_link_active.449117198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rx_crc_err.3377754002 |
| Short name | T659 |
| Test name | |
| Test status | |
| Simulation time | 144298572 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:39:27 AM UTC 24 |
| Finished | Aug 27 07:39:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3377754002 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_crc_err.3377754002 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rx_full.3645873577 |
| Short name | T307 |
| Test name | |
| Test status | |
| Simulation time | 369834551 ps |
| CPU time | 2.19 seconds |
| Started | Aug 27 07:39:27 AM UTC 24 |
| Finished | Aug 27 07:39:30 AM UTC 24 |
| Peak memory | 217648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3645873577 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 4.usbdev_rx_full.3645873577 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_rx_pid_err.3369597032 |
| Short name | T661 |
| Test name | |
| Test status | |
| Simulation time | 195171143 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:39:27 AM UTC 24 |
| Finished | Aug 27 07:39:29 AM UTC 24 |
| Peak memory | 215940 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3369597032 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_pid_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 4.usbdev_rx_pid_err.3369597032 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_rx_pid_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_sec_cm.4226511959 |
| Short name | T223 |
| Test name | |
| Test status | |
| Simulation time | 960804826 ps |
| CPU time | 3.26 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:39:42 AM UTC 24 |
| Peak memory | 252488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_sec_cm_fi +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4226511959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_sec_cm.4226511959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_sec_cm/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority.1490262414 |
| Short name | T662 |
| Test name | |
| Test status | |
| Simulation time | 452458995 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:39:27 AM UTC 24 |
| Finished | Aug 27 07:39:30 AM UTC 24 |
| Peak memory | 217896 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490262414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority.1490262414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_setup_priority/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_setup_priority_over_stall_response.2806740741 |
| Short name | T663 |
| Test name | |
| Test status | |
| Simulation time | 323655921 ps |
| CPU time | 2.04 seconds |
| Started | Aug 27 07:39:28 AM UTC 24 |
| Finished | Aug 27 07:39:31 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2806740741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_priority_over_st all_response_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/ default.vdb -cm_log /dev/null -cm_name 4.usbdev_setup_priority_over_stall_response.2806740741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_setup_priority_over_stall_response/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_setup_stage.1729227034 |
| Short name | T666 |
| Test name | |
| Test status | |
| Simulation time | 149393960 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:39:31 AM UTC 24 |
| Finished | Aug 27 07:39:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1729227034 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_setup_stage.1729227034 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_setup_trans_ignored.3603890651 |
| Short name | T667 |
| Test name | |
| Test status | |
| Simulation time | 185559813 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:39:32 AM UTC 24 |
| Finished | Aug 27 07:39:34 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3603890651 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 4.usbdev_setup_trans_ignored.3603890651 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_smoke.3572642521 |
| Short name | T670 |
| Test name | |
| Test status | |
| Simulation time | 235210158 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:39:32 AM UTC 24 |
| Finished | Aug 27 07:39:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572642521 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_smoke.3572642521 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_spurious_pids_ignored.2822496035 |
| Short name | T692 |
| Test name | |
| Test status | |
| Simulation time | 2126463719 ps |
| CPU time | 19.2 seconds |
| Started | Aug 27 07:39:32 AM UTC 24 |
| Finished | Aug 27 07:39:52 AM UTC 24 |
| Peak memory | 228552 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822496035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 4.usbdev_spurious_pids_ignored.2822496035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_stall_priority_over_nak.1268056414 |
| Short name | T669 |
| Test name | |
| Test status | |
| Simulation time | 172083214 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:39:32 AM UTC 24 |
| Finished | Aug 27 07:39:34 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1268056414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stall_priority_over_nak.1268056414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_stall_trans.1501523136 |
| Short name | T672 |
| Test name | |
| Test status | |
| Simulation time | 201035495 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:39:33 AM UTC 24 |
| Finished | Aug 27 07:39:36 AM UTC 24 |
| Peak memory | 215828 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501523136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 4.usbdev_stall_trans.1501523136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_stream_len_max.3998118366 |
| Short name | T676 |
| Test name | |
| Test status | |
| Simulation time | 390107551 ps |
| CPU time | 2.28 seconds |
| Started | Aug 27 07:39:35 AM UTC 24 |
| Finished | Aug 27 07:39:38 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3998118366 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stream_len_max.3998118366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_streaming_out.2333303126 |
| Short name | T713 |
| Test name | |
| Test status | |
| Simulation time | 3332701312 ps |
| CPU time | 29.76 seconds |
| Started | Aug 27 07:39:33 AM UTC 24 |
| Finished | Aug 27 07:40:04 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2333303126 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 4.usbdev_streaming_out.2333303126 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_stress_usb_traffic.3143220366 |
| Short name | T118 |
| Test name | |
| Test status | |
| Simulation time | 8855294702 ps |
| CPU time | 220.01 seconds |
| Started | Aug 27 07:39:35 AM UTC 24 |
| Finished | Aug 27 07:43:18 AM UTC 24 |
| Peak memory | 230468 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +do_reset_signaling=1 +do_vbus_disconnects=1 +wt_ bad_syncs=1 +wt_bad_pids=1 +wt_spurious_pids=1 +wt_bad_crc5=1 +wt_bad_crc16=1 +wt_bitstuff_errs=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_ VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3143220366 -assert nopostproc +UVM_TESTNAME=usbdev_bas e_test +UVM_TEST_SEQ=usbdev_bad_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_ 26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_stress_usb_traffic.3143220366 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_stress_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_timeout_missing_host_handshake.3114304360 |
| Short name | T640 |
| Test name | |
| Test status | |
| Simulation time | 3600182345 ps |
| CPU time | 25.61 seconds |
| Started | Aug 27 07:38:43 AM UTC 24 |
| Finished | Aug 27 07:39:10 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3114304360 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_timeout_missing_host_handshake.3114304360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/4.usbdev_tx_rx_disruption.939942053 |
| Short name | T675 |
| Test name | |
| Test status | |
| Simulation time | 484137125 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:39:35 AM UTC 24 |
| Finished | Aug 27 07:39:38 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=939942053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 4.usbdev_tx_ rx_disruption.939942053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/4.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_alert_test.2804407700 |
| Short name | T2570 |
| Test name | |
| Test status | |
| Simulation time | 50524011 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804407700 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 40.usbdev_alert_test.2804407700 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_disconnect.969218257 |
| Short name | T2625 |
| Test name | |
| Test status | |
| Simulation time | 9729321096 ps |
| CPU time | 13.45 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:49 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=969218257 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_disconnect.969218257 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_reset.751624120 |
| Short name | T2644 |
| Test name | |
| Test status | |
| Simulation time | 15158312781 ps |
| CPU time | 18.71 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:54 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=751624120 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_reset.751624120 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_aon_wake_resume.2025981765 |
| Short name | T2719 |
| Test name | |
| Test status | |
| Simulation time | 24190269915 ps |
| CPU time | 35.99 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2025981765 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_aon_wake_resume.2025981765 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_av_buffer.2794268202 |
| Short name | T2580 |
| Test name | |
| Test status | |
| Simulation time | 196438345 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2794268202 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_av_buffer.2794268202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_bitstuff_err.3710710210 |
| Short name | T2575 |
| Test name | |
| Test status | |
| Simulation time | 145473051 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3710710210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_bitstuff_err.3710710210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_clear.1881572932 |
| Short name | T2584 |
| Test name | |
| Test status | |
| Simulation time | 583067795 ps |
| CPU time | 2.5 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1881572932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 40.usbdev_data_toggle_clear.1881572932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_data_toggle_restore.1559437097 |
| Short name | T2576 |
| Test name | |
| Test status | |
| Simulation time | 365917562 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1559437097 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_data_toggle_restore.1559437097 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_device_address.3004759473 |
| Short name | T2895 |
| Test name | |
| Test status | |
| Simulation time | 46482479087 ps |
| CPU time | 84.56 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:53:01 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3004759473 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_address.3004759473 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_device_timeout.157438803 |
| Short name | T2761 |
| Test name | |
| Test status | |
| Simulation time | 7679471463 ps |
| CPU time | 46.86 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157438803 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_device_timeout.157438803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_disable_endpoint.2619134077 |
| Short name | T2586 |
| Test name | |
| Test status | |
| Simulation time | 852598081 ps |
| CPU time | 2.46 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2619134077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_disable_endpoint.2619134077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_disconnected.3934083886 |
| Short name | T2578 |
| Test name | |
| Test status | |
| Simulation time | 161882279 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3934083886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_disconnected.3934083886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_enable.873730468 |
| Short name | T2574 |
| Test name | |
| Test status | |
| Simulation time | 45468523 ps |
| CPU time | 0.67 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=873730468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_enable.873730468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_access.869260234 |
| Short name | T2588 |
| Test name | |
| Test status | |
| Simulation time | 954098853 ps |
| CPU time | 2.52 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=869260234 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_access.869260234 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_endpoint_types.3317805464 |
| Short name | T401 |
| Test name | |
| Test status | |
| Simulation time | 596515856 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:38 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3317805464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_endpoint_types.3317805464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_fifo_rst.2420602809 |
| Short name | T2582 |
| Test name | |
| Test status | |
| Simulation time | 158156745 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2420602809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_fifo_rst.2420602809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_in_iso.1035395844 |
| Short name | T2581 |
| Test name | |
| Test status | |
| Simulation time | 184965577 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:37 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1035395844 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_in_iso.1035395844 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_in_stall.555535493 |
| Short name | T2592 |
| Test name | |
| Test status | |
| Simulation time | 154197724 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:51:39 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=555535493 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_in_stall.555535493 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_in_trans.2559626782 |
| Short name | T2590 |
| Test name | |
| Test status | |
| Simulation time | 201584967 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:51:39 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559626782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_in_trans.2559626782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_invalid_sync.3509703923 |
| Short name | T2679 |
| Test name | |
| Test status | |
| Simulation time | 2913890657 ps |
| CPU time | 26.69 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:52:03 AM UTC 24 |
| Peak memory | 235212 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509703923 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 40.usbdev_invalid_sync.3509703923 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_iso_retraction.1282921623 |
| Short name | T2826 |
| Test name | |
| Test status | |
| Simulation time | 9573749430 ps |
| CPU time | 60.8 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:52:39 AM UTC 24 |
| Peak memory | 218312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1282921623 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_iso_retraction.1282921623 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_link_in_err.30518867 |
| Short name | T2591 |
| Test name | |
| Test status | |
| Simulation time | 202793689 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:51:39 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=30518867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_link_in_err.30518867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_link_resume.369294512 |
| Short name | T2671 |
| Test name | |
| Test status | |
| Simulation time | 14133495593 ps |
| CPU time | 21.31 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:52:00 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=369294512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 40.usbdev_link_resume.369294512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_link_suspend.4188897475 |
| Short name | T2613 |
| Test name | |
| Test status | |
| Simulation time | 4329086147 ps |
| CPU time | 7.12 seconds |
| Started | Aug 27 07:51:36 AM UTC 24 |
| Finished | Aug 27 07:51:45 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4188897475 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_link_suspend.4188897475 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_low_speed_traffic.587274874 |
| Short name | T2911 |
| Test name | |
| Test status | |
| Simulation time | 3418305256 ps |
| CPU time | 84.05 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:53:05 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=587274874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_low_speed_traffic.587274874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_max_inter_pkt_delay.1247616782 |
| Short name | T2670 |
| Test name | |
| Test status | |
| Simulation time | 2537873366 ps |
| CPU time | 18.49 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:59 AM UTC 24 |
| Peak memory | 230464 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247616782 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_max_inter_pkt_delay.1247616782 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_in_transaction.4196670252 |
| Short name | T2603 |
| Test name | |
| Test status | |
| Simulation time | 261634845 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4196670252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_in_transaction.4196670252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_max_length_out_transaction.3066821675 |
| Short name | T2602 |
| Test name | |
| Test status | |
| Simulation time | 256414054 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3066821675 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_max_length_out_transaction.3066821675 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_min_inter_pkt_delay.2493703370 |
| Short name | T2667 |
| Test name | |
| Test status | |
| Simulation time | 2514785380 ps |
| CPU time | 18.03 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:59 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493703370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_min_inter_pkt_delay.2493703370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_in_transaction.3589328279 |
| Short name | T2595 |
| Test name | |
| Test status | |
| Simulation time | 224919935 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3589328279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_in_transaction.3589328279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_min_length_out_transaction.2935575414 |
| Short name | T2596 |
| Test name | |
| Test status | |
| Simulation time | 148905881 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2935575414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 40.usbdev_min_length_out_transaction.2935575414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_out_iso.1245002383 |
| Short name | T2600 |
| Test name | |
| Test status | |
| Simulation time | 165812213 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1245002383 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_out_iso.1245002383 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_out_stall.1247009228 |
| Short name | T2597 |
| Test name | |
| Test status | |
| Simulation time | 183025471 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1247009228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_out_stall.1247009228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_out_trans_nak.866751260 |
| Short name | T2598 |
| Test name | |
| Test status | |
| Simulation time | 216082298 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:51:39 AM UTC 24 |
| Finished | Aug 27 07:51:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866751260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_out_trans_nak.866751260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_pending_in_trans.1286071246 |
| Short name | T2606 |
| Test name | |
| Test status | |
| Simulation time | 192100168 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:51:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1286071246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 40.usbdev_pending_in_trans.1286071246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_pinflip.2451405914 |
| Short name | T2608 |
| Test name | |
| Test status | |
| Simulation time | 223656567 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2451405914 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 40.usbdev_phy_config_pinflip.2451405914 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_phy_config_usb_ref_disable.212264515 |
| Short name | T2604 |
| Test name | |
| Test status | |
| Simulation time | 146189843 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:51:43 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=212264515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 40.usbdev_phy_config_usb_ref_disable.212264515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_phy_pins_sense.823661317 |
| Short name | T2607 |
| Test name | |
| Test status | |
| Simulation time | 62712149 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=823661317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_phy_pins_sense.823661317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_buffer.312860539 |
| Short name | T2846 |
| Test name | |
| Test status | |
| Simulation time | 22835475805 ps |
| CPU time | 59.76 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:52:43 AM UTC 24 |
| Peak memory | 232728 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=312860539 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_buffer.312860539 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_received.4410560 |
| Short name | T2610 |
| Test name | |
| Test status | |
| Simulation time | 169555151 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:51:41 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4410560 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_pkt_received.4410560 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_pkt_sent.3508840142 |
| Short name | T2611 |
| Test name | |
| Test status | |
| Simulation time | 197951083 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:51:42 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3508840142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 40.usbdev_pkt_sent.3508840142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_in_transaction.1291454105 |
| Short name | T2612 |
| Test name | |
| Test status | |
| Simulation time | 200993416 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:51:42 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291454105 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 40.usbdev_random_length_in_transaction.1291454105 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_random_length_out_transaction.4288784917 |
| Short name | T2609 |
| Test name | |
| Test status | |
| Simulation time | 235053122 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:51:42 AM UTC 24 |
| Finished | Aug 27 07:51:44 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288784917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 40.usbdev_random_length_out_transaction.4288784917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_rx_crc_err.804257210 |
| Short name | T2621 |
| Test name | |
| Test status | |
| Simulation time | 145828699 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804257210 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_rx_crc_err.804257210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_rx_full.3768037570 |
| Short name | T2620 |
| Test name | |
| Test status | |
| Simulation time | 254178823 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3768037570 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 40.usbdev_rx_full.3768037570 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_setup_stage.2843735928 |
| Short name | T2618 |
| Test name | |
| Test status | |
| Simulation time | 168757812 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2843735928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_setup_stage.2843735928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_setup_trans_ignored.1386946226 |
| Short name | T2617 |
| Test name | |
| Test status | |
| Simulation time | 192237940 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1386946226 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 40.usbdev_setup_trans_ignored.1386946226 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_smoke.1644608401 |
| Short name | T2615 |
| Test name | |
| Test status | |
| Simulation time | 234411725 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1644608401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_smoke.1644608401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_spurious_pids_ignored.1378797479 |
| Short name | T2724 |
| Test name | |
| Test status | |
| Simulation time | 2890581235 ps |
| CPU time | 25.38 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 230544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1378797479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 40.usbdev_spurious_pids_ignored.1378797479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_stall_priority_over_nak.4124085203 |
| Short name | T2619 |
| Test name | |
| Test status | |
| Simulation time | 142315506 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4124085203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_stall_priority_over_nak.4124085203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_stall_trans.4274854330 |
| Short name | T2622 |
| Test name | |
| Test status | |
| Simulation time | 187543905 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4274854330 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 40.usbdev_stall_trans.4274854330 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_stream_len_max.83164812 |
| Short name | T2573 |
| Test name | |
| Test status | |
| Simulation time | 444559859 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=83164812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 40.usbdev_stream_len_max.83164812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_streaming_out.2923549677 |
| Short name | T2698 |
| Test name | |
| Test status | |
| Simulation time | 2905531373 ps |
| CPU time | 20.34 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 230716 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923549677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 40.usbdev_streaming_out.2923549677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_timeout_missing_host_handshake.3517171997 |
| Short name | T2605 |
| Test name | |
| Test status | |
| Simulation time | 409123998 ps |
| CPU time | 7.78 seconds |
| Started | Aug 27 07:51:34 AM UTC 24 |
| Finished | Aug 27 07:51:43 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3517171997 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_timeout_missing_host_handshake.3517171997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/40.usbdev_tx_rx_disruption.3545649885 |
| Short name | T2624 |
| Test name | |
| Test status | |
| Simulation time | 492514151 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3545649885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 40.usbdev_t x_rx_disruption.3545649885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/40.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/400.usbdev_tx_rx_disruption.1873881585 |
| Short name | T3602 |
| Test name | |
| Test status | |
| Simulation time | 606079647 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:55:55 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1873881585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 400.usbdev_ tx_rx_disruption.1873881585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/400.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/401.usbdev_tx_rx_disruption.1279951668 |
| Short name | T3517 |
| Test name | |
| Test status | |
| Simulation time | 489250696 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1279951668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 401.usbdev_ tx_rx_disruption.1279951668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/401.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/402.usbdev_tx_rx_disruption.2608422415 |
| Short name | T3516 |
| Test name | |
| Test status | |
| Simulation time | 472160041 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:02 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2608422415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 402.usbdev_ tx_rx_disruption.2608422415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/402.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/403.usbdev_tx_rx_disruption.1449678943 |
| Short name | T3519 |
| Test name | |
| Test status | |
| Simulation time | 579604115 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1449678943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 403.usbdev_ tx_rx_disruption.1449678943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/403.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/404.usbdev_tx_rx_disruption.780846723 |
| Short name | T3518 |
| Test name | |
| Test status | |
| Simulation time | 531944646 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=780846723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 404.usbdev_t x_rx_disruption.780846723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/404.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/405.usbdev_tx_rx_disruption.1990685176 |
| Short name | T3522 |
| Test name | |
| Test status | |
| Simulation time | 484247351 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1990685176 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 405.usbdev_ tx_rx_disruption.1990685176 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/405.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/406.usbdev_tx_rx_disruption.1260789252 |
| Short name | T3520 |
| Test name | |
| Test status | |
| Simulation time | 505315971 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1260789252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 406.usbdev_ tx_rx_disruption.1260789252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/406.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/407.usbdev_tx_rx_disruption.2544235020 |
| Short name | T3523 |
| Test name | |
| Test status | |
| Simulation time | 566950691 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2544235020 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 407.usbdev_ tx_rx_disruption.2544235020 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/407.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/408.usbdev_tx_rx_disruption.2476345429 |
| Short name | T3528 |
| Test name | |
| Test status | |
| Simulation time | 519085665 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2476345429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 408.usbdev_ tx_rx_disruption.2476345429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/408.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/409.usbdev_tx_rx_disruption.486047831 |
| Short name | T3532 |
| Test name | |
| Test status | |
| Simulation time | 642874229 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=486047831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 409.usbdev_t x_rx_disruption.486047831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/409.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_alert_test.435093983 |
| Short name | T2682 |
| Test name | |
| Test status | |
| Simulation time | 32521353 ps |
| CPU time | 0.75 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:03 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=435093983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_alert_test.435093983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_disconnect.2605125249 |
| Short name | T2676 |
| Test name | |
| Test status | |
| Simulation time | 9179512545 ps |
| CPU time | 14.4 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:52:01 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2605125249 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_disconnect.2605125249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_reset.627006852 |
| Short name | T2726 |
| Test name | |
| Test status | |
| Simulation time | 20780863527 ps |
| CPU time | 25.6 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=627006852 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_reset.627006852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_aon_wake_resume.1438120254 |
| Short name | T2770 |
| Test name | |
| Test status | |
| Simulation time | 29802518445 ps |
| CPU time | 37.63 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:52:24 AM UTC 24 |
| Peak memory | 218336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1438120254 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_aon_wake_resume.1438120254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_av_buffer.921861479 |
| Short name | T2562 |
| Test name | |
| Test status | |
| Simulation time | 166546141 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921861479 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_av_buffer.921861479 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_bitstuff_err.3240232547 |
| Short name | T2623 |
| Test name | |
| Test status | |
| Simulation time | 170641359 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3240232547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_bitstuff_err.3240232547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_clear.3676807213 |
| Short name | T2571 |
| Test name | |
| Test status | |
| Simulation time | 198923518 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:51:45 AM UTC 24 |
| Finished | Aug 27 07:51:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3676807213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 41.usbdev_data_toggle_clear.3676807213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_data_toggle_restore.4180585672 |
| Short name | T2628 |
| Test name | |
| Test status | |
| Simulation time | 1046325155 ps |
| CPU time | 3.07 seconds |
| Started | Aug 27 07:51:46 AM UTC 24 |
| Finished | Aug 27 07:51:50 AM UTC 24 |
| Peak memory | 218144 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4180585672 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_data_toggle_restore.4180585672 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_device_address.1102241425 |
| Short name | T2803 |
| Test name | |
| Test status | |
| Simulation time | 25969626220 ps |
| CPU time | 45.99 seconds |
| Started | Aug 27 07:51:47 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1102241425 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_address.1102241425 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_device_timeout.2008486202 |
| Short name | T2642 |
| Test name | |
| Test status | |
| Simulation time | 624188505 ps |
| CPU time | 5.45 seconds |
| Started | Aug 27 07:51:47 AM UTC 24 |
| Finished | Aug 27 07:51:54 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2008486202 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_device_timeout.2008486202 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_disable_endpoint.2017121519 |
| Short name | T2640 |
| Test name | |
| Test status | |
| Simulation time | 770745105 ps |
| CPU time | 2.47 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:53 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2017121519 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 41.usbdev_disable_endpoint.2017121519 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_disconnected.1692389321 |
| Short name | T2633 |
| Test name | |
| Test status | |
| Simulation time | 149066795 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1692389321 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_disconnected.1692389321 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_enable.1951601530 |
| Short name | T2634 |
| Test name | |
| Test status | |
| Simulation time | 124538516 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 215072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1951601530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_enable.1951601530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_access.313577934 |
| Short name | T2641 |
| Test name | |
| Test status | |
| Simulation time | 862928480 ps |
| CPU time | 2.42 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:53 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=313577934 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_access.313577934 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_endpoint_types.583498459 |
| Short name | T445 |
| Test name | |
| Test status | |
| Simulation time | 531402750 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=583498459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 41.usbdev_endpoint_types.583498459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_fifo_rst.4082234130 |
| Short name | T2643 |
| Test name | |
| Test status | |
| Simulation time | 248854787 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:54 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4082234130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_fifo_rst.4082234130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_in_iso.3198046550 |
| Short name | T2639 |
| Test name | |
| Test status | |
| Simulation time | 275088580 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:53 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3198046550 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_in_iso.3198046550 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_in_stall.3462096641 |
| Short name | T2637 |
| Test name | |
| Test status | |
| Simulation time | 150177730 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3462096641 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_stall.3462096641 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_in_trans.1942962769 |
| Short name | T2638 |
| Test name | |
| Test status | |
| Simulation time | 238459973 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:53 AM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1942962769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_in_trans.1942962769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_invalid_sync.2146366434 |
| Short name | T2704 |
| Test name | |
| Test status | |
| Simulation time | 2495275700 ps |
| CPU time | 16.71 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:52:08 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2146366434 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 41.usbdev_invalid_sync.2146366434 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_iso_retraction.3348745711 |
| Short name | T2755 |
| Test name | |
| Test status | |
| Simulation time | 4290302149 ps |
| CPU time | 30.91 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:52:22 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3348745711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_iso_retraction.3348745711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_link_in_err.1952667172 |
| Short name | T2636 |
| Test name | |
| Test status | |
| Simulation time | 157155537 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1952667172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_in_err.1952667172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_link_resume.2579531771 |
| Short name | T2697 |
| Test name | |
| Test status | |
| Simulation time | 9196129131 ps |
| CPU time | 14.82 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:52:06 AM UTC 24 |
| Peak memory | 228396 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2579531771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_link_resume.2579531771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_link_suspend.2335424547 |
| Short name | T2664 |
| Test name | |
| Test status | |
| Simulation time | 4510575804 ps |
| CPU time | 6.94 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2335424547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_link_suspend.2335424547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_low_speed_traffic.97543469 |
| Short name | T3078 |
| Test name | |
| Test status | |
| Simulation time | 4343895007 ps |
| CPU time | 116.51 seconds |
| Started | Aug 27 07:51:50 AM UTC 24 |
| Finished | Aug 27 07:53:49 AM UTC 24 |
| Peak memory | 230536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=97543469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_low_speed_traffic.97543469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_max_inter_pkt_delay.1080236767 |
| Short name | T2706 |
| Test name | |
| Test status | |
| Simulation time | 1781489388 ps |
| CPU time | 15.61 seconds |
| Started | Aug 27 07:51:52 AM UTC 24 |
| Finished | Aug 27 07:52:09 AM UTC 24 |
| Peak memory | 230336 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1080236767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_max_inter_pkt_delay.1080236767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_in_transaction.3506700177 |
| Short name | T2646 |
| Test name | |
| Test status | |
| Simulation time | 243008077 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:52 AM UTC 24 |
| Finished | Aug 27 07:51:55 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3506700177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_max_length_in_transaction.3506700177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_max_length_out_transaction.903995692 |
| Short name | T2645 |
| Test name | |
| Test status | |
| Simulation time | 237064631 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:51:52 AM UTC 24 |
| Finished | Aug 27 07:51:54 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=903995692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_max_length_out_transaction.903995692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_min_inter_pkt_delay.2748171978 |
| Short name | T2823 |
| Test name | |
| Test status | |
| Simulation time | 1837814128 ps |
| CPU time | 44.74 seconds |
| Started | Aug 27 07:51:52 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748171978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_min_inter_pkt_delay.2748171978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_in_transaction.2518681527 |
| Short name | T2647 |
| Test name | |
| Test status | |
| Simulation time | 154690168 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:51:52 AM UTC 24 |
| Finished | Aug 27 07:51:55 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518681527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 41.usbdev_min_length_in_transaction.2518681527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_min_length_out_transaction.383892268 |
| Short name | T2655 |
| Test name | |
| Test status | |
| Simulation time | 148883011 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:51:55 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383892268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 41.usbdev_min_length_out_transaction.383892268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_nak_trans.3397259430 |
| Short name | T137 |
| Test name | |
| Test status | |
| Simulation time | 247458922 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:51:55 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397259430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_nak_trans.3397259430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_out_iso.221644905 |
| Short name | T2654 |
| Test name | |
| Test status | |
| Simulation time | 174619328 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:51:55 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=221644905 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 41.usbdev_out_iso.221644905 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_out_stall.3940066920 |
| Short name | T2658 |
| Test name | |
| Test status | |
| Simulation time | 158427046 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:51:55 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3940066920 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_out_stall.3940066920 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_out_trans_nak.2383928033 |
| Short name | T2660 |
| Test name | |
| Test status | |
| Simulation time | 154699392 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:51:55 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2383928033 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_out_trans_nak.2383928033 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_pending_in_trans.383491356 |
| Short name | T2657 |
| Test name | |
| Test status | |
| Simulation time | 161605304 ps |
| CPU time | 1.01 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=383491356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_pending_in_trans.383491356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_pinflip.2086465524 |
| Short name | T2656 |
| Test name | |
| Test status | |
| Simulation time | 206542986 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086465524 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_pinflip.2086465524 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_phy_config_usb_ref_disable.2801181662 |
| Short name | T2663 |
| Test name | |
| Test status | |
| Simulation time | 154908710 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2801181662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 41.usbdev_phy_config_usb_ref_disable.2801181662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_phy_pins_sense.2947818720 |
| Short name | T2659 |
| Test name | |
| Test status | |
| Simulation time | 50991364 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947818720 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_phy_pins_sense.2947818720 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_buffer.3534935193 |
| Short name | T2807 |
| Test name | |
| Test status | |
| Simulation time | 15079259800 ps |
| CPU time | 38.01 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:52:35 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3534935193 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_pkt_buffer.3534935193 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_received.3767028768 |
| Short name | T2662 |
| Test name | |
| Test status | |
| Simulation time | 192964279 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767028768 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 41.usbdev_pkt_received.3767028768 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_pkt_sent.1872436055 |
| Short name | T2661 |
| Test name | |
| Test status | |
| Simulation time | 193347946 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1872436055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 41.usbdev_pkt_sent.1872436055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_in_transaction.1353485569 |
| Short name | T2668 |
| Test name | |
| Test status | |
| Simulation time | 245689357 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1353485569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 41.usbdev_random_length_in_transaction.1353485569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_random_length_out_transaction.804715970 |
| Short name | T2665 |
| Test name | |
| Test status | |
| Simulation time | 189022403 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:58 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=804715970 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 41.usbdev_random_length_out_transaction.804715970 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_rx_crc_err.422635999 |
| Short name | T2666 |
| Test name | |
| Test status | |
| Simulation time | 197998505 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:59 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=422635999 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_rx_crc_err.422635999 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_rx_full.1757172962 |
| Short name | T2669 |
| Test name | |
| Test status | |
| Simulation time | 253759167 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:51:56 AM UTC 24 |
| Finished | Aug 27 07:51:59 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1757172962 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 41.usbdev_rx_full.1757172962 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_setup_stage.994685776 |
| Short name | T2672 |
| Test name | |
| Test status | |
| Simulation time | 154408067 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:51:58 AM UTC 24 |
| Finished | Aug 27 07:52:00 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=994685776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 41.usbdev_setup_stage.994685776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_setup_trans_ignored.3766032253 |
| Short name | T2673 |
| Test name | |
| Test status | |
| Simulation time | 146391801 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:51:58 AM UTC 24 |
| Finished | Aug 27 07:52:00 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3766032253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 41.usbdev_setup_trans_ignored.3766032253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_smoke.2936010733 |
| Short name | T2674 |
| Test name | |
| Test status | |
| Simulation time | 218951359 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:51:58 AM UTC 24 |
| Finished | Aug 27 07:52:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936010733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_smoke.2936010733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_spurious_pids_ignored.3254551667 |
| Short name | T2727 |
| Test name | |
| Test status | |
| Simulation time | 1892486132 ps |
| CPU time | 13.17 seconds |
| Started | Aug 27 07:51:58 AM UTC 24 |
| Finished | Aug 27 07:52:13 AM UTC 24 |
| Peak memory | 230416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3254551667 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 41.usbdev_spurious_pids_ignored.3254551667 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_stall_priority_over_nak.2574142662 |
| Short name | T2675 |
| Test name | |
| Test status | |
| Simulation time | 168220189 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:51:58 AM UTC 24 |
| Finished | Aug 27 07:52:00 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2574142662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stall_priority_over_nak.2574142662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_stall_trans.1176932760 |
| Short name | T2684 |
| Test name | |
| Test status | |
| Simulation time | 230209025 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:52:01 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1176932760 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 41.usbdev_stall_trans.1176932760 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_stream_len_max.1821237650 |
| Short name | T2692 |
| Test name | |
| Test status | |
| Simulation time | 869382286 ps |
| CPU time | 2.18 seconds |
| Started | Aug 27 07:52:01 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1821237650 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_stream_len_max.1821237650 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_streaming_out.2675648555 |
| Short name | T2737 |
| Test name | |
| Test status | |
| Simulation time | 1863679171 ps |
| CPU time | 13.32 seconds |
| Started | Aug 27 07:52:01 AM UTC 24 |
| Finished | Aug 27 07:52:16 AM UTC 24 |
| Peak memory | 235048 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2675648555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 41.usbdev_streaming_out.2675648555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_timeout_missing_host_handshake.82178685 |
| Short name | T2765 |
| Test name | |
| Test status | |
| Simulation time | 4311967659 ps |
| CPU time | 34.73 seconds |
| Started | Aug 27 07:51:47 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 218428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=82178685 -assert nopostproc +UVM_TESTNAME=usbdev_ba se_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024 _08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_timeout_missing_host_handshake.82178685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/41.usbdev_tx_rx_disruption.481412149 |
| Short name | T2690 |
| Test name | |
| Test status | |
| Simulation time | 646160947 ps |
| CPU time | 1.77 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=481412149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 41.usbdev_tx _rx_disruption.481412149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/41.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/410.usbdev_tx_rx_disruption.3717196507 |
| Short name | T3521 |
| Test name | |
| Test status | |
| Simulation time | 398481774 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 215096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3717196507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 410.usbdev_ tx_rx_disruption.3717196507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/410.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/411.usbdev_tx_rx_disruption.341613990 |
| Short name | T3536 |
| Test name | |
| Test status | |
| Simulation time | 648567849 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=341613990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 411.usbdev_t x_rx_disruption.341613990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/411.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/412.usbdev_tx_rx_disruption.502047829 |
| Short name | T3529 |
| Test name | |
| Test status | |
| Simulation time | 559502503 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=502047829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 412.usbdev_t x_rx_disruption.502047829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/412.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/413.usbdev_tx_rx_disruption.3341346684 |
| Short name | T3527 |
| Test name | |
| Test status | |
| Simulation time | 511343155 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 215080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3341346684 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 413.usbdev_ tx_rx_disruption.3341346684 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/413.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/414.usbdev_tx_rx_disruption.2382251113 |
| Short name | T3526 |
| Test name | |
| Test status | |
| Simulation time | 534986381 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2382251113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 414.usbdev_ tx_rx_disruption.2382251113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/414.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/415.usbdev_tx_rx_disruption.127955598 |
| Short name | T3524 |
| Test name | |
| Test status | |
| Simulation time | 459425359 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=127955598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 415.usbdev_t x_rx_disruption.127955598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/415.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/416.usbdev_tx_rx_disruption.2616478028 |
| Short name | T3530 |
| Test name | |
| Test status | |
| Simulation time | 581970379 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:00 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2616478028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 416.usbdev_ tx_rx_disruption.2616478028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/416.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/417.usbdev_tx_rx_disruption.46212872 |
| Short name | T3525 |
| Test name | |
| Test status | |
| Simulation time | 502753418 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=46212872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 417.usbdev_tx _rx_disruption.46212872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/417.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/418.usbdev_tx_rx_disruption.2229687949 |
| Short name | T3534 |
| Test name | |
| Test status | |
| Simulation time | 593456931 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2229687949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 418.usbdev_ tx_rx_disruption.2229687949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/418.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/419.usbdev_tx_rx_disruption.480651436 |
| Short name | T3542 |
| Test name | |
| Test status | |
| Simulation time | 626215656 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=480651436 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 419.usbdev_t x_rx_disruption.480651436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/419.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_alert_test.1468013082 |
| Short name | T2730 |
| Test name | |
| Test status | |
| Simulation time | 35698000 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1468013082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 42.usbdev_alert_test.1468013082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_disconnect.3325754373 |
| Short name | T2743 |
| Test name | |
| Test status | |
| Simulation time | 10852632859 ps |
| CPU time | 15.33 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3325754373 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_disconnect.3325754373 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_reset.1248517719 |
| Short name | T2748 |
| Test name | |
| Test status | |
| Simulation time | 14039197554 ps |
| CPU time | 16.19 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:19 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1248517719 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_reset.1248517719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_aon_wake_resume.2123233544 |
| Short name | T2827 |
| Test name | |
| Test status | |
| Simulation time | 28631425663 ps |
| CPU time | 37 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:40 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2123233544 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_aon_wake_resume.2123233544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_av_buffer.1158838438 |
| Short name | T2688 |
| Test name | |
| Test status | |
| Simulation time | 160598465 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1158838438 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_av_buffer.1158838438 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_bitstuff_err.1515242441 |
| Short name | T2686 |
| Test name | |
| Test status | |
| Simulation time | 168092794 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1515242441 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_bitstuff_err.1515242441 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_clear.1702353151 |
| Short name | T2691 |
| Test name | |
| Test status | |
| Simulation time | 475230478 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1702353151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 42.usbdev_data_toggle_clear.1702353151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_data_toggle_restore.316878183 |
| Short name | T2693 |
| Test name | |
| Test status | |
| Simulation time | 613904839 ps |
| CPU time | 1.82 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=316878183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_data_toggle_restore.316878183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_device_address.652500399 |
| Short name | T2987 |
| Test name | |
| Test status | |
| Simulation time | 49901924486 ps |
| CPU time | 80.57 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:53:24 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=652500399 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_device_address.652500399 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_device_timeout.2012775103 |
| Short name | T2790 |
| Test name | |
| Test status | |
| Simulation time | 3383964727 ps |
| CPU time | 25.99 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2012775103 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_device_timeout.2012775103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_disable_endpoint.985739230 |
| Short name | T2694 |
| Test name | |
| Test status | |
| Simulation time | 624460530 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=985739230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_disable_endpoint.985739230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_disconnected.288926068 |
| Short name | T2687 |
| Test name | |
| Test status | |
| Simulation time | 160133504 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=288926068 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_disconnected.288926068 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_enable.1439666233 |
| Short name | T2689 |
| Test name | |
| Test status | |
| Simulation time | 86028403 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:04 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439666233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 42.usbdev_enable.1439666233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_endpoint_access.3313296361 |
| Short name | T2695 |
| Test name | |
| Test status | |
| Simulation time | 845696880 ps |
| CPU time | 2.24 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:05 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313296361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_endpoint_access.3313296361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_fifo_rst.1308354677 |
| Short name | T2696 |
| Test name | |
| Test status | |
| Simulation time | 305839833 ps |
| CPU time | 2.19 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:06 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308354677 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_fifo_rst.1308354677 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_in_iso.2822656793 |
| Short name | T2680 |
| Test name | |
| Test status | |
| Simulation time | 209653666 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2822656793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 42.usbdev_in_iso.2822656793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_in_stall.2428191569 |
| Short name | T2631 |
| Test name | |
| Test status | |
| Simulation time | 139200379 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2428191569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_stall.2428191569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_in_trans.2284972635 |
| Short name | T2699 |
| Test name | |
| Test status | |
| Simulation time | 171917754 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2284972635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_in_trans.2284972635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_invalid_sync.3106223850 |
| Short name | T2824 |
| Test name | |
| Test status | |
| Simulation time | 5103973009 ps |
| CPU time | 34.75 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3106223850 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 42.usbdev_invalid_sync.3106223850 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_iso_retraction.1568454376 |
| Short name | T2923 |
| Test name | |
| Test status | |
| Simulation time | 6035858132 ps |
| CPU time | 62.38 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:53:09 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1568454376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_iso_retraction.1568454376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_link_in_err.3873900613 |
| Short name | T2681 |
| Test name | |
| Test status | |
| Simulation time | 233180722 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3873900613 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_in_err.3873900613 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_link_resume.2499843656 |
| Short name | T2766 |
| Test name | |
| Test status | |
| Simulation time | 12993969512 ps |
| CPU time | 16.82 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2499843656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_link_resume.2499843656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_link_suspend.2509853944 |
| Short name | T2750 |
| Test name | |
| Test status | |
| Simulation time | 10502716700 ps |
| CPU time | 13.13 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:20 AM UTC 24 |
| Peak memory | 218332 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2509853944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_link_suspend.2509853944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_low_speed_traffic.2868691716 |
| Short name | T2847 |
| Test name | |
| Test status | |
| Simulation time | 5153860550 ps |
| CPU time | 37.44 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:44 AM UTC 24 |
| Peak memory | 230664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868691716 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_low_speed_traffic.2868691716 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_max_inter_pkt_delay.762731513 |
| Short name | T2752 |
| Test name | |
| Test status | |
| Simulation time | 1529872257 ps |
| CPU time | 13.75 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:20 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=762731513 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_max_inter_pkt_delay.762731513 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_in_transaction.2270347723 |
| Short name | T2702 |
| Test name | |
| Test status | |
| Simulation time | 243051709 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:08 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2270347723 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_in_transaction.2270347723 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_max_length_out_transaction.2782830988 |
| Short name | T2701 |
| Test name | |
| Test status | |
| Simulation time | 195523882 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2782830988 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_max_length_out_transaction.2782830988 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_min_inter_pkt_delay.1262374102 |
| Short name | T2922 |
| Test name | |
| Test status | |
| Simulation time | 2550034282 ps |
| CPU time | 60.49 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:53:08 AM UTC 24 |
| Peak memory | 228564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1262374102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_min_inter_pkt_delay.1262374102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_in_transaction.2412205099 |
| Short name | T2700 |
| Test name | |
| Test status | |
| Simulation time | 151358795 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:07 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2412205099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_in_transaction.2412205099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_min_length_out_transaction.1765672603 |
| Short name | T2703 |
| Test name | |
| Test status | |
| Simulation time | 140400914 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:52:05 AM UTC 24 |
| Finished | Aug 27 07:52:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1765672603 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_min_length_out_transaction.1765672603 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_nak_trans.3581037868 |
| Short name | T2707 |
| Test name | |
| Test status | |
| Simulation time | 203308883 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3581037868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_nak_trans.3581037868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_out_iso.2493393734 |
| Short name | T2713 |
| Test name | |
| Test status | |
| Simulation time | 196009618 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2493393734 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_out_iso.2493393734 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_out_stall.620271653 |
| Short name | T2711 |
| Test name | |
| Test status | |
| Simulation time | 202374029 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=620271653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_out_stall.620271653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_out_trans_nak.3535005041 |
| Short name | T2709 |
| Test name | |
| Test status | |
| Simulation time | 177247148 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3535005041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 42.usbdev_out_trans_nak.3535005041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_pending_in_trans.561172187 |
| Short name | T2710 |
| Test name | |
| Test status | |
| Simulation time | 164898611 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=561172187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_pending_in_trans.561172187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_pinflip.200088249 |
| Short name | T2718 |
| Test name | |
| Test status | |
| Simulation time | 225317425 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=200088249 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_pinflip.200088249 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_phy_config_usb_ref_disable.1503841401 |
| Short name | T2712 |
| Test name | |
| Test status | |
| Simulation time | 162498437 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216016 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1503841401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 42.usbdev_phy_config_usb_ref_disable.1503841401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_phy_pins_sense.3125796482 |
| Short name | T2708 |
| Test name | |
| Test status | |
| Simulation time | 33415054 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3125796482 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_phy_pins_sense.3125796482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_buffer.3154965512 |
| Short name | T2855 |
| Test name | |
| Test status | |
| Simulation time | 14709294510 ps |
| CPU time | 37.48 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:48 AM UTC 24 |
| Peak memory | 228632 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3154965512 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_pkt_buffer.3154965512 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_received.4126282376 |
| Short name | T2716 |
| Test name | |
| Test status | |
| Simulation time | 192684777 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126282376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_pkt_received.4126282376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_pkt_sent.1094559529 |
| Short name | T2715 |
| Test name | |
| Test status | |
| Simulation time | 234499129 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094559529 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 42.usbdev_pkt_sent.1094559529 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_in_transaction.943714077 |
| Short name | T2717 |
| Test name | |
| Test status | |
| Simulation time | 239941788 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=943714077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 42.usbdev_random_length_in_transaction.943714077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_random_length_out_transaction.3818088982 |
| Short name | T2714 |
| Test name | |
| Test status | |
| Simulation time | 195127941 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3818088982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 42.usbdev_random_length_out_transaction.3818088982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_rx_crc_err.3701770136 |
| Short name | T2720 |
| Test name | |
| Test status | |
| Simulation time | 153602741 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3701770136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_rx_crc_err.3701770136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_rx_full.2685380645 |
| Short name | T2723 |
| Test name | |
| Test status | |
| Simulation time | 269261337 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2685380645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 42.usbdev_rx_full.2685380645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_setup_stage.1428881220 |
| Short name | T2721 |
| Test name | |
| Test status | |
| Simulation time | 175798793 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1428881220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 42.usbdev_setup_stage.1428881220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_setup_trans_ignored.3793039609 |
| Short name | T2722 |
| Test name | |
| Test status | |
| Simulation time | 218654415 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793039609 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 42.usbdev_setup_trans_ignored.3793039609 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_smoke.2106233899 |
| Short name | T2725 |
| Test name | |
| Test status | |
| Simulation time | 257547683 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:52:09 AM UTC 24 |
| Finished | Aug 27 07:52:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106233899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_smoke.2106233899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_spurious_pids_ignored.628831670 |
| Short name | T3024 |
| Test name | |
| Test status | |
| Simulation time | 3347002133 ps |
| CPU time | 80.74 seconds |
| Started | Aug 27 07:52:12 AM UTC 24 |
| Finished | Aug 27 07:53:35 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=628831670 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 42.usbdev_spurious_pids_ignored.628831670 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_stall_priority_over_nak.2114955509 |
| Short name | T2731 |
| Test name | |
| Test status | |
| Simulation time | 226142259 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:52:12 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114955509 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stall_priority_over_nak.2114955509 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_stall_trans.103851790 |
| Short name | T2728 |
| Test name | |
| Test status | |
| Simulation time | 157525995 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:52:12 AM UTC 24 |
| Finished | Aug 27 07:52:14 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=103851790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 42.usbdev_stall_trans.103851790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_stream_len_max.1841197571 |
| Short name | T2734 |
| Test name | |
| Test status | |
| Simulation time | 500775133 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1841197571 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_stream_len_max.1841197571 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_streaming_out.2357659355 |
| Short name | T2811 |
| Test name | |
| Test status | |
| Simulation time | 3189566019 ps |
| CPU time | 22.84 seconds |
| Started | Aug 27 07:52:12 AM UTC 24 |
| Finished | Aug 27 07:52:37 AM UTC 24 |
| Peak memory | 230588 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357659355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 42.usbdev_streaming_out.2357659355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_timeout_missing_host_handshake.3116579643 |
| Short name | T2769 |
| Test name | |
| Test status | |
| Simulation time | 2459533560 ps |
| CPU time | 21.07 seconds |
| Started | Aug 27 07:52:02 AM UTC 24 |
| Finished | Aug 27 07:52:24 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3116579643 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_timeout_missing_host_handshake.3116579643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/42.usbdev_tx_rx_disruption.2789087769 |
| Short name | T2736 |
| Test name | |
| Test status | |
| Simulation time | 486615766 ps |
| CPU time | 2.24 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:16 AM UTC 24 |
| Peak memory | 218008 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2789087769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 42.usbdev_t x_rx_disruption.2789087769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/42.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/420.usbdev_tx_rx_disruption.3677036647 |
| Short name | T202 |
| Test name | |
| Test status | |
| Simulation time | 597625763 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3677036647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 420.usbdev_ tx_rx_disruption.3677036647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/420.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/421.usbdev_tx_rx_disruption.2684704446 |
| Short name | T3533 |
| Test name | |
| Test status | |
| Simulation time | 408464378 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2684704446 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 421.usbdev_ tx_rx_disruption.2684704446 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/421.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/422.usbdev_tx_rx_disruption.2618872795 |
| Short name | T3540 |
| Test name | |
| Test status | |
| Simulation time | 541829070 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2618872795 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 422.usbdev_ tx_rx_disruption.2618872795 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/422.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/423.usbdev_tx_rx_disruption.3388510888 |
| Short name | T3541 |
| Test name | |
| Test status | |
| Simulation time | 620999392 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3388510888 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 423.usbdev_ tx_rx_disruption.3388510888 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/423.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/424.usbdev_tx_rx_disruption.3364971108 |
| Short name | T3543 |
| Test name | |
| Test status | |
| Simulation time | 681300456 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3364971108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 424.usbdev_ tx_rx_disruption.3364971108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/424.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/425.usbdev_tx_rx_disruption.2193435359 |
| Short name | T3538 |
| Test name | |
| Test status | |
| Simulation time | 500630022 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2193435359 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 425.usbdev_ tx_rx_disruption.2193435359 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/425.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/426.usbdev_tx_rx_disruption.3088434216 |
| Short name | T3537 |
| Test name | |
| Test status | |
| Simulation time | 573945171 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:56:01 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3088434216 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 426.usbdev_ tx_rx_disruption.3088434216 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/426.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/427.usbdev_tx_rx_disruption.3520942944 |
| Short name | T3572 |
| Test name | |
| Test status | |
| Simulation time | 467964013 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:03 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3520942944 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 427.usbdev_ tx_rx_disruption.3520942944 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/427.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/428.usbdev_tx_rx_disruption.275189335 |
| Short name | T3571 |
| Test name | |
| Test status | |
| Simulation time | 528575657 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:56:03 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=275189335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 428.usbdev_t x_rx_disruption.275189335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/428.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/429.usbdev_tx_rx_disruption.3048548238 |
| Short name | T3573 |
| Test name | |
| Test status | |
| Simulation time | 512146718 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:56:03 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3048548238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 429.usbdev_ tx_rx_disruption.3048548238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/429.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_alert_test.3215728849 |
| Short name | T2782 |
| Test name | |
| Test status | |
| Simulation time | 40783550 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:28 AM UTC 24 |
| Peak memory | 215984 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215728849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 43.usbdev_alert_test.3215728849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_disconnect.507976481 |
| Short name | T2776 |
| Test name | |
| Test status | |
| Simulation time | 10685439422 ps |
| CPU time | 13.5 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:27 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507976481 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_disconnect.507976481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_reset.2292610482 |
| Short name | T2810 |
| Test name | |
| Test status | |
| Simulation time | 14722397656 ps |
| CPU time | 22.4 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:37 AM UTC 24 |
| Peak memory | 228436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2292610482 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_reset.2292610482 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_aon_wake_resume.2916306481 |
| Short name | T2856 |
| Test name | |
| Test status | |
| Simulation time | 29374948634 ps |
| CPU time | 34 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:48 AM UTC 24 |
| Peak memory | 218372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2916306481 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_aon_wake_resume.2916306481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_av_buffer.1544963515 |
| Short name | T2733 |
| Test name | |
| Test status | |
| Simulation time | 180270870 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544963515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_av_buffer.1544963515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_bitstuff_err.709230653 |
| Short name | T2732 |
| Test name | |
| Test status | |
| Simulation time | 202609082 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=709230653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_bitstuff_err.709230653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_clear.4116336108 |
| Short name | T2735 |
| Test name | |
| Test status | |
| Simulation time | 245819297 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116336108 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 43.usbdev_data_toggle_clear.4116336108 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_data_toggle_restore.3427684315 |
| Short name | T2744 |
| Test name | |
| Test status | |
| Simulation time | 1405704499 ps |
| CPU time | 4.26 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3427684315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_data_toggle_restore.3427684315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_device_address.972969959 |
| Short name | T2924 |
| Test name | |
| Test status | |
| Simulation time | 32476582894 ps |
| CPU time | 55.44 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:53:10 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=972969959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_device_address.972969959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_device_timeout.346193372 |
| Short name | T2816 |
| Test name | |
| Test status | |
| Simulation time | 1139172256 ps |
| CPU time | 23.21 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 218052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=346193372 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_device_timeout.346193372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_disable_endpoint.1430765043 |
| Short name | T2749 |
| Test name | |
| Test status | |
| Simulation time | 697811133 ps |
| CPU time | 2.84 seconds |
| Started | Aug 27 07:52:15 AM UTC 24 |
| Finished | Aug 27 07:52:19 AM UTC 24 |
| Peak memory | 217964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1430765043 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_disable_endpoint.1430765043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_disconnected.2899688532 |
| Short name | T2741 |
| Test name | |
| Test status | |
| Simulation time | 169709310 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:52:15 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899688532 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_disconnected.2899688532 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_enable.4106130127 |
| Short name | T2739 |
| Test name | |
| Test status | |
| Simulation time | 29716628 ps |
| CPU time | 0.8 seconds |
| Started | Aug 27 07:52:15 AM UTC 24 |
| Finished | Aug 27 07:52:17 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4106130127 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_enable.4106130127 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_access.659484264 |
| Short name | T2746 |
| Test name | |
| Test status | |
| Simulation time | 847500183 ps |
| CPU time | 2.53 seconds |
| Started | Aug 27 07:52:15 AM UTC 24 |
| Finished | Aug 27 07:52:19 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=659484264 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_access.659484264 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_endpoint_types.371919440 |
| Short name | T379 |
| Test name | |
| Test status | |
| Simulation time | 581502909 ps |
| CPU time | 2.07 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:52:19 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=371919440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 43.usbdev_endpoint_types.371919440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_fifo_rst.357296175 |
| Short name | T2747 |
| Test name | |
| Test status | |
| Simulation time | 172300094 ps |
| CPU time | 2.46 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:52:19 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=357296175 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_fifo_rst.357296175 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_in_iso.3344782159 |
| Short name | T2742 |
| Test name | |
| Test status | |
| Simulation time | 201764722 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3344782159 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 43.usbdev_in_iso.3344782159 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_in_stall.2302979395 |
| Short name | T2740 |
| Test name | |
| Test status | |
| Simulation time | 169601596 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2302979395 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_stall.2302979395 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_in_trans.2015063581 |
| Short name | T2745 |
| Test name | |
| Test status | |
| Simulation time | 220706156 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:52:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2015063581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_in_trans.2015063581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_invalid_sync.869197698 |
| Short name | T3026 |
| Test name | |
| Test status | |
| Simulation time | 3241652930 ps |
| CPU time | 78.74 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:53:36 AM UTC 24 |
| Peak memory | 230724 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=869197698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_invalid_sync.869197698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_iso_retraction.2329906063 |
| Short name | T2921 |
| Test name | |
| Test status | |
| Simulation time | 4617223117 ps |
| CPU time | 50.12 seconds |
| Started | Aug 27 07:52:16 AM UTC 24 |
| Finished | Aug 27 07:53:07 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2329906063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_iso_retraction.2329906063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_link_in_err.3464098549 |
| Short name | T2751 |
| Test name | |
| Test status | |
| Simulation time | 177716354 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:20 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3464098549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_in_err.3464098549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_link_resume.2301403254 |
| Short name | T2904 |
| Test name | |
| Test status | |
| Simulation time | 28916244763 ps |
| CPU time | 43.38 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2301403254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 43.usbdev_link_resume.2301403254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_link_suspend.1289610622 |
| Short name | T2808 |
| Test name | |
| Test status | |
| Simulation time | 9665227469 ps |
| CPU time | 16.79 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:36 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289610622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_link_suspend.1289610622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_low_speed_traffic.1988267815 |
| Short name | T2858 |
| Test name | |
| Test status | |
| Simulation time | 4155523170 ps |
| CPU time | 30.06 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:49 AM UTC 24 |
| Peak memory | 232512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1988267815 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_low_speed_traffic.1988267815 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_max_inter_pkt_delay.144787907 |
| Short name | T2795 |
| Test name | |
| Test status | |
| Simulation time | 1554749685 ps |
| CPU time | 14.06 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 228268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=144787907 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM _TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim -vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_max_inter_pkt_delay.144787907 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_in_transaction.1693244504 |
| Short name | T2753 |
| Test name | |
| Test status | |
| Simulation time | 237435733 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:21 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1693244504 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_max_length_in_transaction.1693244504 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_max_length_out_transaction.239535136 |
| Short name | T2754 |
| Test name | |
| Test status | |
| Simulation time | 199254041 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:52:18 AM UTC 24 |
| Finished | Aug 27 07:52:21 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=239535136 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_max_length_out_transaction.239535136 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_min_inter_pkt_delay.2304294200 |
| Short name | T2839 |
| Test name | |
| Test status | |
| Simulation time | 3023962705 ps |
| CPU time | 20.37 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2304294200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_min_inter_pkt_delay.2304294200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_in_transaction.1613494279 |
| Short name | T2759 |
| Test name | |
| Test status | |
| Simulation time | 175478274 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1613494279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_in_transaction.1613494279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_min_length_out_transaction.2903336868 |
| Short name | T2757 |
| Test name | |
| Test status | |
| Simulation time | 155006120 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2903336868 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 43.usbdev_min_length_out_transaction.2903336868 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_nak_trans.3594456093 |
| Short name | T161 |
| Test name | |
| Test status | |
| Simulation time | 201704706 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3594456093 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_nak_trans.3594456093 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_out_iso.3501764187 |
| Short name | T2760 |
| Test name | |
| Test status | |
| Simulation time | 167235252 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3501764187 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 43.usbdev_out_iso.3501764187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_out_stall.1915101413 |
| Short name | T2756 |
| Test name | |
| Test status | |
| Simulation time | 159183185 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:22 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1915101413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_out_stall.1915101413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_out_trans_nak.3350377449 |
| Short name | T2762 |
| Test name | |
| Test status | |
| Simulation time | 219207182 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3350377449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_out_trans_nak.3350377449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_pending_in_trans.2640122871 |
| Short name | T2763 |
| Test name | |
| Test status | |
| Simulation time | 203287357 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:52:20 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2640122871 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 43.usbdev_pending_in_trans.2640122871 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_pinflip.629347704 |
| Short name | T2764 |
| Test name | |
| Test status | |
| Simulation time | 217276382 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:52:21 AM UTC 24 |
| Finished | Aug 27 07:52:23 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=629347704 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_config_pinflip.629347704 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_phy_config_usb_ref_disable.110384322 |
| Short name | T2768 |
| Test name | |
| Test status | |
| Simulation time | 150485408 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:52:22 AM UTC 24 |
| Finished | Aug 27 07:52:24 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=110384322 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 43.usbdev_phy_config_usb_ref_disable.110384322 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_phy_pins_sense.2545439238 |
| Short name | T2767 |
| Test name | |
| Test status | |
| Simulation time | 31721472 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:52:22 AM UTC 24 |
| Finished | Aug 27 07:52:24 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2545439238 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_phy_pins_sense.2545439238 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_buffer.3707780535 |
| Short name | T2914 |
| Test name | |
| Test status | |
| Simulation time | 16862969082 ps |
| CPU time | 42.09 seconds |
| Started | Aug 27 07:52:22 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 228512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3707780535 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_pkt_buffer.3707780535 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_received.2730656604 |
| Short name | T2773 |
| Test name | |
| Test status | |
| Simulation time | 185419373 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:52:23 AM UTC 24 |
| Finished | Aug 27 07:52:25 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2730656604 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 43.usbdev_pkt_received.2730656604 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_pkt_sent.2638446177 |
| Short name | T2771 |
| Test name | |
| Test status | |
| Simulation time | 181760871 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:52:23 AM UTC 24 |
| Finished | Aug 27 07:52:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2638446177 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 43.usbdev_pkt_sent.2638446177 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_in_transaction.2504480103 |
| Short name | T2774 |
| Test name | |
| Test status | |
| Simulation time | 223962865 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:52:23 AM UTC 24 |
| Finished | Aug 27 07:52:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2504480103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 43.usbdev_random_length_in_transaction.2504480103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_random_length_out_transaction.775464620 |
| Short name | T2775 |
| Test name | |
| Test status | |
| Simulation time | 225752173 ps |
| CPU time | 1.28 seconds |
| Started | Aug 27 07:52:23 AM UTC 24 |
| Finished | Aug 27 07:52:25 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=775464620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 43.usbdev_random_length_out_transaction.775464620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_rx_crc_err.2791100222 |
| Short name | T2778 |
| Test name | |
| Test status | |
| Simulation time | 209464572 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:28 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2791100222 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_rx_crc_err.2791100222 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_rx_full.919757080 |
| Short name | T2779 |
| Test name | |
| Test status | |
| Simulation time | 252545732 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:28 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=919757080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 43.usbdev_rx_full.919757080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_setup_stage.846846095 |
| Short name | T2781 |
| Test name | |
| Test status | |
| Simulation time | 151045346 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:28 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=846846095 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_setup_stage.846846095 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_setup_trans_ignored.1171567113 |
| Short name | T2777 |
| Test name | |
| Test status | |
| Simulation time | 157130261 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:28 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171567113 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 43.usbdev_setup_trans_ignored.1171567113 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_smoke.654081118 |
| Short name | T2787 |
| Test name | |
| Test status | |
| Simulation time | 261645714 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=654081118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_smoke.654081118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_spurious_pids_ignored.496216124 |
| Short name | T2853 |
| Test name | |
| Test status | |
| Simulation time | 3029110006 ps |
| CPU time | 20.02 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 230472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=496216124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 43.usbdev_spurious_pids_ignored.496216124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_stall_priority_over_nak.2461926674 |
| Short name | T2783 |
| Test name | |
| Test status | |
| Simulation time | 180204102 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2461926674 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stall_priority_over_nak.2461926674 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_stall_trans.788524316 |
| Short name | T2785 |
| Test name | |
| Test status | |
| Simulation time | 184280081 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=788524316 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 43.usbdev_stall_trans.788524316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_stream_len_max.1122661285 |
| Short name | T2791 |
| Test name | |
| Test status | |
| Simulation time | 462582369 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 215880 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1122661285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_stream_len_max.1122661285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_streaming_out.2404764612 |
| Short name | T2999 |
| Test name | |
| Test status | |
| Simulation time | 2360441094 ps |
| CPU time | 58.21 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2404764612 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 43.usbdev_streaming_out.2404764612 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_timeout_missing_host_handshake.138714187 |
| Short name | T2809 |
| Test name | |
| Test status | |
| Simulation time | 2928094149 ps |
| CPU time | 21.83 seconds |
| Started | Aug 27 07:52:13 AM UTC 24 |
| Finished | Aug 27 07:52:36 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=138714187 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_timeout_missing_host_handshake.138714187 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/43.usbdev_tx_rx_disruption.553008389 |
| Short name | T2789 |
| Test name | |
| Test status | |
| Simulation time | 579026961 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=553008389 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 43.usbdev_tx _rx_disruption.553008389 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/43.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/430.usbdev_tx_rx_disruption.4258654911 |
| Short name | T3575 |
| Test name | |
| Test status | |
| Simulation time | 524438687 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:56:03 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4258654911 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 430.usbdev_ tx_rx_disruption.4258654911 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/430.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/431.usbdev_tx_rx_disruption.649929462 |
| Short name | T3584 |
| Test name | |
| Test status | |
| Simulation time | 508301300 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=649929462 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 431.usbdev_t x_rx_disruption.649929462 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/431.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/432.usbdev_tx_rx_disruption.2711080099 |
| Short name | T3589 |
| Test name | |
| Test status | |
| Simulation time | 629534821 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2711080099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 432.usbdev_ tx_rx_disruption.2711080099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/432.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/433.usbdev_tx_rx_disruption.2033278594 |
| Short name | T3579 |
| Test name | |
| Test status | |
| Simulation time | 628319279 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2033278594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 433.usbdev_ tx_rx_disruption.2033278594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/433.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/434.usbdev_tx_rx_disruption.3783831239 |
| Short name | T3576 |
| Test name | |
| Test status | |
| Simulation time | 510523414 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3783831239 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 434.usbdev_ tx_rx_disruption.3783831239 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/434.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/435.usbdev_tx_rx_disruption.4061677733 |
| Short name | T3574 |
| Test name | |
| Test status | |
| Simulation time | 477238449 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4061677733 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 435.usbdev_ tx_rx_disruption.4061677733 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/435.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/436.usbdev_tx_rx_disruption.529144396 |
| Short name | T3577 |
| Test name | |
| Test status | |
| Simulation time | 504917504 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=529144396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 436.usbdev_t x_rx_disruption.529144396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/436.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/437.usbdev_tx_rx_disruption.1297664697 |
| Short name | T3578 |
| Test name | |
| Test status | |
| Simulation time | 513538719 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1297664697 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 437.usbdev_ tx_rx_disruption.1297664697 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/437.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/438.usbdev_tx_rx_disruption.993800694 |
| Short name | T3569 |
| Test name | |
| Test status | |
| Simulation time | 397962210 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=993800694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 438.usbdev_t x_rx_disruption.993800694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/438.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/439.usbdev_tx_rx_disruption.1143936516 |
| Short name | T3580 |
| Test name | |
| Test status | |
| Simulation time | 584350596 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1143936516 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 439.usbdev_ tx_rx_disruption.1143936516 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/439.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_alert_test.1490471735 |
| Short name | T2848 |
| Test name | |
| Test status | |
| Simulation time | 61461502 ps |
| CPU time | 0.66 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1490471735 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 44.usbdev_alert_test.1490471735 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_disconnect.447563094 |
| Short name | T2801 |
| Test name | |
| Test status | |
| Simulation time | 4685697485 ps |
| CPU time | 6.15 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=447563094 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_disconnect.447563094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_reset.4072921784 |
| Short name | T2849 |
| Test name | |
| Test status | |
| Simulation time | 14910728088 ps |
| CPU time | 19.04 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4072921784 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_reset.4072921784 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_aon_wake_resume.2419190019 |
| Short name | T2927 |
| Test name | |
| Test status | |
| Simulation time | 25763000664 ps |
| CPU time | 42.94 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2419190019 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_aon_wake_resume.2419190019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_av_buffer.2923790253 |
| Short name | T2784 |
| Test name | |
| Test status | |
| Simulation time | 172044026 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2923790253 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_av_buffer.2923790253 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_bitstuff_err.198798530 |
| Short name | T2786 |
| Test name | |
| Test status | |
| Simulation time | 175730961 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=198798530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_bitstuff_err.198798530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_clear.887242866 |
| Short name | T2788 |
| Test name | |
| Test status | |
| Simulation time | 289362460 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:52:26 AM UTC 24 |
| Finished | Aug 27 07:52:29 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=887242866 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_data_toggle_clear.887242866 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_data_toggle_restore.1045414011 |
| Short name | T2793 |
| Test name | |
| Test status | |
| Simulation time | 1013422805 ps |
| CPU time | 3.25 seconds |
| Started | Aug 27 07:52:28 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 218344 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1045414011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_data_toggle_restore.1045414011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_device_address.2385071066 |
| Short name | T2935 |
| Test name | |
| Test status | |
| Simulation time | 26909742419 ps |
| CPU time | 42.15 seconds |
| Started | Aug 27 07:52:28 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 218284 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2385071066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_address.2385071066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_device_timeout.615601415 |
| Short name | T2822 |
| Test name | |
| Test status | |
| Simulation time | 1050366024 ps |
| CPU time | 8.62 seconds |
| Started | Aug 27 07:52:28 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=615601415 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_device_timeout.615601415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_disable_endpoint.2241167617 |
| Short name | T2805 |
| Test name | |
| Test status | |
| Simulation time | 471369369 ps |
| CPU time | 2.52 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:35 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2241167617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_disable_endpoint.2241167617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_disconnected.3632372530 |
| Short name | T2796 |
| Test name | |
| Test status | |
| Simulation time | 138307079 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3632372530 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_disconnected.3632372530 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_enable.832637943 |
| Short name | T2794 |
| Test name | |
| Test status | |
| Simulation time | 34050538 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=832637943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_enable.832637943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_access.1517144725 |
| Short name | T2806 |
| Test name | |
| Test status | |
| Simulation time | 629892233 ps |
| CPU time | 2.48 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:35 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517144725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_access.1517144725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_endpoint_types.2868921361 |
| Short name | T446 |
| Test name | |
| Test status | |
| Simulation time | 279661623 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2868921361 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_endpoint_types.2868921361 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_fifo_rst.3291866567 |
| Short name | T2802 |
| Test name | |
| Test status | |
| Simulation time | 174604048 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3291866567 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_fifo_rst.3291866567 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_in_iso.4286414490 |
| Short name | T2800 |
| Test name | |
| Test status | |
| Simulation time | 228481913 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4286414490 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_in_iso.4286414490 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_in_stall.670266927 |
| Short name | T2797 |
| Test name | |
| Test status | |
| Simulation time | 143169446 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:33 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=670266927 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_stall.670266927 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_in_trans.700036877 |
| Short name | T2799 |
| Test name | |
| Test status | |
| Simulation time | 196992657 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=700036877 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_in_trans.700036877 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_invalid_sync.2842277003 |
| Short name | T2998 |
| Test name | |
| Test status | |
| Simulation time | 3170837921 ps |
| CPU time | 78.93 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2842277003 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 44.usbdev_invalid_sync.2842277003 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_iso_retraction.2726534982 |
| Short name | T3095 |
| Test name | |
| Test status | |
| Simulation time | 7425513051 ps |
| CPU time | 81.09 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2726534982 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_iso_retraction.2726534982 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_link_in_err.1156938629 |
| Short name | T2798 |
| Test name | |
| Test status | |
| Simulation time | 222142674 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156938629 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_in_err.1156938629 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_link_resume.2835809276 |
| Short name | T2986 |
| Test name | |
| Test status | |
| Simulation time | 29297799855 ps |
| CPU time | 50.83 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:53:24 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2835809276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_link_resume.2835809276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_link_suspend.4213992412 |
| Short name | T2825 |
| Test name | |
| Test status | |
| Simulation time | 3324678654 ps |
| CPU time | 6.65 seconds |
| Started | Aug 27 07:52:31 AM UTC 24 |
| Finished | Aug 27 07:52:39 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4213992412 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_link_suspend.4213992412 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_low_speed_traffic.2961714929 |
| Short name | T3114 |
| Test name | |
| Test status | |
| Simulation time | 3314632859 ps |
| CPU time | 83.94 seconds |
| Started | Aug 27 07:52:33 AM UTC 24 |
| Finished | Aug 27 07:53:59 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2961714929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_low_speed_traffic.2961714929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_max_inter_pkt_delay.3423596468 |
| Short name | T3004 |
| Test name | |
| Test status | |
| Simulation time | 2307432346 ps |
| CPU time | 55.47 seconds |
| Started | Aug 27 07:52:33 AM UTC 24 |
| Finished | Aug 27 07:53:30 AM UTC 24 |
| Peak memory | 228680 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3423596468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_max_inter_pkt_delay.3423596468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_in_transaction.851731928 |
| Short name | T2821 |
| Test name | |
| Test status | |
| Simulation time | 241542006 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 217428 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=851731928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_in_transaction.851731928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_max_length_out_transaction.2320378007 |
| Short name | T2815 |
| Test name | |
| Test status | |
| Simulation time | 187284285 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2320378007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_max_length_out_transaction.2320378007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_min_inter_pkt_delay.2515890518 |
| Short name | T2909 |
| Test name | |
| Test status | |
| Simulation time | 3083175639 ps |
| CPU time | 27.37 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:53:04 AM UTC 24 |
| Peak memory | 234384 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2515890518 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_min_inter_pkt_delay.2515890518 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_in_transaction.1424234829 |
| Short name | T2814 |
| Test name | |
| Test status | |
| Simulation time | 156102096 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:37 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1424234829 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_in_transaction.1424234829 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_min_length_out_transaction.3724384101 |
| Short name | T2812 |
| Test name | |
| Test status | |
| Simulation time | 153329515 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:37 AM UTC 24 |
| Peak memory | 215772 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724384101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_min_length_out_transaction.3724384101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_nak_trans.2287900497 |
| Short name | T2820 |
| Test name | |
| Test status | |
| Simulation time | 214547053 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 215712 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2287900497 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_nak_trans.2287900497 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_out_iso.4026873269 |
| Short name | T2813 |
| Test name | |
| Test status | |
| Simulation time | 185809205 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:37 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026873269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_out_iso.4026873269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_out_stall.2878766312 |
| Short name | T2819 |
| Test name | |
| Test status | |
| Simulation time | 174904277 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2878766312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_out_stall.2878766312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_out_trans_nak.2263668416 |
| Short name | T2817 |
| Test name | |
| Test status | |
| Simulation time | 236148382 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2263668416 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_out_trans_nak.2263668416 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_pending_in_trans.2105040081 |
| Short name | T2818 |
| Test name | |
| Test status | |
| Simulation time | 162901686 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:52:35 AM UTC 24 |
| Finished | Aug 27 07:52:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105040081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 44.usbdev_pending_in_trans.2105040081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_pinflip.3424162268 |
| Short name | T2828 |
| Test name | |
| Test status | |
| Simulation time | 243030507 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3424162268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_pinflip.3424162268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_phy_config_usb_ref_disable.1310354347 |
| Short name | T2831 |
| Test name | |
| Test status | |
| Simulation time | 177834298 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:41 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1310354347 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 44.usbdev_phy_config_usb_ref_disable.1310354347 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_phy_pins_sense.2510772875 |
| Short name | T2832 |
| Test name | |
| Test status | |
| Simulation time | 74098316 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2510772875 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_phy_pins_sense.2510772875 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_buffer.2289086581 |
| Short name | T2886 |
| Test name | |
| Test status | |
| Simulation time | 5943849265 ps |
| CPU time | 16.59 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:57 AM UTC 24 |
| Peak memory | 232528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2289086581 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_pkt_buffer.2289086581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_received.3606641139 |
| Short name | T2830 |
| Test name | |
| Test status | |
| Simulation time | 177432226 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3606641139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 44.usbdev_pkt_received.3606641139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_pkt_sent.1475722142 |
| Short name | T2829 |
| Test name | |
| Test status | |
| Simulation time | 251505201 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1475722142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 44.usbdev_pkt_sent.1475722142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_in_transaction.1479614143 |
| Short name | T2835 |
| Test name | |
| Test status | |
| Simulation time | 219403400 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:52:39 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479614143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 44.usbdev_random_length_in_transaction.1479614143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_random_length_out_transaction.1636450862 |
| Short name | T2836 |
| Test name | |
| Test status | |
| Simulation time | 162531492 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1636450862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 44.usbdev_random_length_out_transaction.1636450862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_rx_crc_err.3264653082 |
| Short name | T2837 |
| Test name | |
| Test status | |
| Simulation time | 171038596 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3264653082 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 44.usbdev_rx_crc_err.3264653082 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_rx_full.1669792152 |
| Short name | T2842 |
| Test name | |
| Test status | |
| Simulation time | 250851930 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1669792152 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 44.usbdev_rx_full.1669792152 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_setup_stage.2964293142 |
| Short name | T2838 |
| Test name | |
| Test status | |
| Simulation time | 160665516 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964293142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_setup_stage.2964293142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_setup_trans_ignored.2203203523 |
| Short name | T2840 |
| Test name | |
| Test status | |
| Simulation time | 175487447 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203203523 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 44.usbdev_setup_trans_ignored.2203203523 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_smoke.2566549803 |
| Short name | T2841 |
| Test name | |
| Test status | |
| Simulation time | 199576117 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566549803 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_smoke.2566549803 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_spurious_pids_ignored.1213235531 |
| Short name | T3098 |
| Test name | |
| Test status | |
| Simulation time | 3112168958 ps |
| CPU time | 73.38 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:53:55 AM UTC 24 |
| Peak memory | 235312 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1213235531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 44.usbdev_spurious_pids_ignored.1213235531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_stall_priority_over_nak.2010595707 |
| Short name | T2844 |
| Test name | |
| Test status | |
| Simulation time | 175325636 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2010595707 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stall_priority_over_nak.2010595707 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_stall_trans.2768257038 |
| Short name | T2843 |
| Test name | |
| Test status | |
| Simulation time | 242527235 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:42 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2768257038 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 44.usbdev_stall_trans.2768257038 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_stream_len_max.3483218180 |
| Short name | T2845 |
| Test name | |
| Test status | |
| Simulation time | 399861989 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:52:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3483218180 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_stream_len_max.3483218180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_streaming_out.3137863998 |
| Short name | T3099 |
| Test name | |
| Test status | |
| Simulation time | 3052991495 ps |
| CPU time | 73.82 seconds |
| Started | Aug 27 07:52:40 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137863998 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 44.usbdev_streaming_out.3137863998 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_timeout_missing_host_handshake.4231560622 |
| Short name | T2792 |
| Test name | |
| Test status | |
| Simulation time | 213158808 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:52:28 AM UTC 24 |
| Finished | Aug 27 07:52:31 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231560622 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_timeout_missing_host_handshake.4231560622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/44.usbdev_tx_rx_disruption.1976147304 |
| Short name | T2683 |
| Test name | |
| Test status | |
| Simulation time | 434465653 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1976147304 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 44.usbdev_t x_rx_disruption.1976147304 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/44.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/440.usbdev_tx_rx_disruption.969953335 |
| Short name | T3531 |
| Test name | |
| Test status | |
| Simulation time | 465108033 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=969953335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 440.usbdev_t x_rx_disruption.969953335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/440.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/441.usbdev_tx_rx_disruption.1825104299 |
| Short name | T3535 |
| Test name | |
| Test status | |
| Simulation time | 559013412 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:04 AM UTC 24 |
| Finished | Aug 27 07:56:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1825104299 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 441.usbdev_ tx_rx_disruption.1825104299 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/441.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/442.usbdev_tx_rx_disruption.970275065 |
| Short name | T3550 |
| Test name | |
| Test status | |
| Simulation time | 598567092 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=970275065 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 442.usbdev_t x_rx_disruption.970275065 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/442.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/443.usbdev_tx_rx_disruption.755088376 |
| Short name | T3552 |
| Test name | |
| Test status | |
| Simulation time | 488783962 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=755088376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 443.usbdev_t x_rx_disruption.755088376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/443.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/444.usbdev_tx_rx_disruption.3033696280 |
| Short name | T3551 |
| Test name | |
| Test status | |
| Simulation time | 609232254 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3033696280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 444.usbdev_ tx_rx_disruption.3033696280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/444.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/445.usbdev_tx_rx_disruption.2854107433 |
| Short name | T3548 |
| Test name | |
| Test status | |
| Simulation time | 520289501 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2854107433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 445.usbdev_ tx_rx_disruption.2854107433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/445.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/446.usbdev_tx_rx_disruption.582366728 |
| Short name | T3547 |
| Test name | |
| Test status | |
| Simulation time | 484357536 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=582366728 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 446.usbdev_t x_rx_disruption.582366728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/446.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/447.usbdev_tx_rx_disruption.2141956611 |
| Short name | T3554 |
| Test name | |
| Test status | |
| Simulation time | 592385623 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2141956611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 447.usbdev_ tx_rx_disruption.2141956611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/447.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/448.usbdev_tx_rx_disruption.1015192106 |
| Short name | T3549 |
| Test name | |
| Test status | |
| Simulation time | 480266463 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1015192106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 448.usbdev_ tx_rx_disruption.1015192106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/448.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/449.usbdev_tx_rx_disruption.3238199499 |
| Short name | T3553 |
| Test name | |
| Test status | |
| Simulation time | 450244403 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3238199499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 449.usbdev_ tx_rx_disruption.3238199499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/449.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_alert_test.1649485997 |
| Short name | T2887 |
| Test name | |
| Test status | |
| Simulation time | 107992362 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:52:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1649485997 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 45.usbdev_alert_test.1649485997 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_disconnect.2716880544 |
| Short name | T2897 |
| Test name | |
| Test status | |
| Simulation time | 9786325249 ps |
| CPU time | 16.25 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:01 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2716880544 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_disconnect.2716880544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_reset.2833243654 |
| Short name | T2945 |
| Test name | |
| Test status | |
| Simulation time | 21261523614 ps |
| CPU time | 28.72 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:14 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2833243654 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_reset.2833243654 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_aon_wake_resume.3679929133 |
| Short name | T2981 |
| Test name | |
| Test status | |
| Simulation time | 23861499132 ps |
| CPU time | 37.2 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3679929133 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_aon_wake_resume.3679929133 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_av_buffer.3861087327 |
| Short name | T2850 |
| Test name | |
| Test status | |
| Simulation time | 157684869 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3861087327 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_av_buffer.3861087327 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_bitstuff_err.2987371135 |
| Short name | T2804 |
| Test name | |
| Test status | |
| Simulation time | 186088093 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2987371135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_bitstuff_err.2987371135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_clear.1637584793 |
| Short name | T2738 |
| Test name | |
| Test status | |
| Simulation time | 230353225 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1637584793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 45.usbdev_data_toggle_clear.1637584793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_data_toggle_restore.3177290972 |
| Short name | T2857 |
| Test name | |
| Test status | |
| Simulation time | 972550362 ps |
| CPU time | 3.28 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:48 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3177290972 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_data_toggle_restore.3177290972 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_device_address.3796591917 |
| Short name | T2947 |
| Test name | |
| Test status | |
| Simulation time | 18184213685 ps |
| CPU time | 29.83 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:15 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3796591917 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_address.3796591917 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_device_timeout.1822438428 |
| Short name | T2902 |
| Test name | |
| Test status | |
| Simulation time | 863943665 ps |
| CPU time | 17.26 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822438428 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_device_timeout.1822438428 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_disable_endpoint.3883524478 |
| Short name | T2852 |
| Test name | |
| Test status | |
| Simulation time | 839634235 ps |
| CPU time | 2.15 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 218028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883524478 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_disable_endpoint.3883524478 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_disconnected.4231578218 |
| Short name | T2851 |
| Test name | |
| Test status | |
| Simulation time | 154672902 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4231578218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_disconnected.4231578218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_enable.3613569990 |
| Short name | T2780 |
| Test name | |
| Test status | |
| Simulation time | 39269543 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3613569990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_enable.3613569990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_access.2147890135 |
| Short name | T2854 |
| Test name | |
| Test status | |
| Simulation time | 838582391 ps |
| CPU time | 2.49 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:48 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2147890135 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_access.2147890135 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_endpoint_types.1269037046 |
| Short name | T495 |
| Test name | |
| Test status | |
| Simulation time | 302598734 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1269037046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_endpoint_types.1269037046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_fifo_rst.2847150622 |
| Short name | T2729 |
| Test name | |
| Test status | |
| Simulation time | 241994821 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2847150622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_fifo_rst.2847150622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_in_iso.3824845800 |
| Short name | T2632 |
| Test name | |
| Test status | |
| Simulation time | 193382202 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 226348 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3824845800 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_in_iso.3824845800 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_in_stall.144388694 |
| Short name | T2833 |
| Test name | |
| Test status | |
| Simulation time | 176661097 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:52:47 AM UTC 24 |
| Peak memory | 216088 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=144388694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_in_stall.144388694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_in_trans.1123530847 |
| Short name | T2862 |
| Test name | |
| Test status | |
| Simulation time | 239647743 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1123530847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_in_trans.1123530847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_invalid_sync.3376798406 |
| Short name | T2946 |
| Test name | |
| Test status | |
| Simulation time | 3366855423 ps |
| CPU time | 29.06 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:15 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3376798406 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 45.usbdev_invalid_sync.3376798406 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_iso_retraction.3741987141 |
| Short name | T3050 |
| Test name | |
| Test status | |
| Simulation time | 8409553435 ps |
| CPU time | 53.05 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:53:42 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3741987141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_iso_retraction.3741987141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_link_in_err.998805074 |
| Short name | T2859 |
| Test name | |
| Test status | |
| Simulation time | 209100527 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=998805074 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_link_in_err.998805074 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_link_resume.2468796102 |
| Short name | T2916 |
| Test name | |
| Test status | |
| Simulation time | 13213481554 ps |
| CPU time | 17.78 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2468796102 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_link_resume.2468796102 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_link_suspend.2767407507 |
| Short name | T2884 |
| Test name | |
| Test status | |
| Simulation time | 4331706107 ps |
| CPU time | 6.96 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:52:55 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2767407507 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_link_suspend.2767407507 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_low_speed_traffic.1266465615 |
| Short name | T3277 |
| Test name | |
| Test status | |
| Simulation time | 4888731069 ps |
| CPU time | 124.94 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:54:55 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1266465615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_low_speed_traffic.1266465615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_max_inter_pkt_delay.1963017822 |
| Short name | T2929 |
| Test name | |
| Test status | |
| Simulation time | 3252866615 ps |
| CPU time | 22.47 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1963017822 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_max_inter_pkt_delay.1963017822 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_in_transaction.831413351 |
| Short name | T2860 |
| Test name | |
| Test status | |
| Simulation time | 241966881 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:52:47 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=831413351 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_in_transaction.831413351 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_max_length_out_transaction.3246386993 |
| Short name | T2863 |
| Test name | |
| Test status | |
| Simulation time | 188829595 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:52:48 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3246386993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_max_length_out_transaction.3246386993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_min_inter_pkt_delay.248140657 |
| Short name | T3051 |
| Test name | |
| Test status | |
| Simulation time | 2063862410 ps |
| CPU time | 52.96 seconds |
| Started | Aug 27 07:52:48 AM UTC 24 |
| Finished | Aug 27 07:53:42 AM UTC 24 |
| Peak memory | 228028 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=248140657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_min_inter_pkt_delay.248140657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_in_transaction.2629147986 |
| Short name | T2864 |
| Test name | |
| Test status | |
| Simulation time | 150667441 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:52:48 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2629147986 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_min_length_in_transaction.2629147986 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_min_length_out_transaction.909104035 |
| Short name | T2861 |
| Test name | |
| Test status | |
| Simulation time | 137844112 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:52:48 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=909104035 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transact ion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 45.usbdev_min_length_out_transaction.909104035 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_nak_trans.579021544 |
| Short name | T2865 |
| Test name | |
| Test status | |
| Simulation time | 234906371 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:52:48 AM UTC 24 |
| Finished | Aug 27 07:52:50 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=579021544 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_nak_trans.579021544 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_out_iso.1518055090 |
| Short name | T2867 |
| Test name | |
| Test status | |
| Simulation time | 185013656 ps |
| CPU time | 0.96 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1518055090 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_out_iso.1518055090 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_out_stall.914920812 |
| Short name | T2872 |
| Test name | |
| Test status | |
| Simulation time | 175771517 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=914920812 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_out_stall.914920812 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_out_trans_nak.1014479643 |
| Short name | T2868 |
| Test name | |
| Test status | |
| Simulation time | 154904904 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1014479643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_out_trans_nak.1014479643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_pending_in_trans.2351614055 |
| Short name | T2877 |
| Test name | |
| Test status | |
| Simulation time | 227406603 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2351614055 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 45.usbdev_pending_in_trans.2351614055 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_pinflip.1750275726 |
| Short name | T2874 |
| Test name | |
| Test status | |
| Simulation time | 254189148 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1750275726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_pinflip.1750275726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_phy_config_usb_ref_disable.1501862506 |
| Short name | T2876 |
| Test name | |
| Test status | |
| Simulation time | 149378796 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1501862506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 45.usbdev_phy_config_usb_ref_disable.1501862506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_phy_pins_sense.1177484405 |
| Short name | T2870 |
| Test name | |
| Test status | |
| Simulation time | 39918099 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1177484405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_phy_pins_sense.1177484405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_buffer.2856262823 |
| Short name | T3097 |
| Test name | |
| Test status | |
| Simulation time | 22713324478 ps |
| CPU time | 61.85 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 228488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856262823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 45.usbdev_pkt_buffer.2856262823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_received.3693123614 |
| Short name | T2880 |
| Test name | |
| Test status | |
| Simulation time | 193896502 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3693123614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 45.usbdev_pkt_received.3693123614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_pkt_sent.3477133024 |
| Short name | T2881 |
| Test name | |
| Test status | |
| Simulation time | 264528296 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3477133024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 45.usbdev_pkt_sent.3477133024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_in_transaction.2531451666 |
| Short name | T2871 |
| Test name | |
| Test status | |
| Simulation time | 161120382 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2531451666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 45.usbdev_random_length_in_transaction.2531451666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_random_length_out_transaction.1849075243 |
| Short name | T2875 |
| Test name | |
| Test status | |
| Simulation time | 153130600 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1849075243 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 45.usbdev_random_length_out_transaction.1849075243 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_rx_crc_err.748410786 |
| Short name | T2873 |
| Test name | |
| Test status | |
| Simulation time | 150914334 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=748410786 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 45.usbdev_rx_crc_err.748410786 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_rx_full.237808225 |
| Short name | T2882 |
| Test name | |
| Test status | |
| Simulation time | 289649121 ps |
| CPU time | 1.76 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=237808225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 45.usbdev_rx_full.237808225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_setup_stage.2496386260 |
| Short name | T2879 |
| Test name | |
| Test status | |
| Simulation time | 171811379 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2496386260 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_setup_stage.2496386260 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_setup_trans_ignored.1243842978 |
| Short name | T2878 |
| Test name | |
| Test status | |
| Simulation time | 177287868 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:52:51 AM UTC 24 |
| Finished | Aug 27 07:52:53 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1243842978 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 45.usbdev_setup_trans_ignored.1243842978 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_smoke.3714061230 |
| Short name | T2885 |
| Test name | |
| Test status | |
| Simulation time | 203455064 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:52:53 AM UTC 24 |
| Finished | Aug 27 07:52:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3714061230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_smoke.3714061230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_spurious_pids_ignored.3669098469 |
| Short name | T2920 |
| Test name | |
| Test status | |
| Simulation time | 1912308431 ps |
| CPU time | 13.04 seconds |
| Started | Aug 27 07:52:53 AM UTC 24 |
| Finished | Aug 27 07:53:07 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3669098469 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 45.usbdev_spurious_pids_ignored.3669098469 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_stall_priority_over_nak.2863802863 |
| Short name | T2883 |
| Test name | |
| Test status | |
| Simulation time | 172615843 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:52:53 AM UTC 24 |
| Finished | Aug 27 07:52:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2863802863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stall_priority_over_nak.2863802863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_stall_trans.2805484751 |
| Short name | T2888 |
| Test name | |
| Test status | |
| Simulation time | 232053403 ps |
| CPU time | 1.09 seconds |
| Started | Aug 27 07:52:55 AM UTC 24 |
| Finished | Aug 27 07:52:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805484751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 45.usbdev_stall_trans.2805484751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_stream_len_max.1492250860 |
| Short name | T2898 |
| Test name | |
| Test status | |
| Simulation time | 1297014607 ps |
| CPU time | 4.93 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1492250860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_stream_len_max.1492250860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_streaming_out.28484270 |
| Short name | T2991 |
| Test name | |
| Test status | |
| Simulation time | 3116749854 ps |
| CPU time | 28.99 seconds |
| Started | Aug 27 07:52:55 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 230584 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=28484270 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 45.usbdev_streaming_out.28484270 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_timeout_missing_host_handshake.835104214 |
| Short name | T2894 |
| Test name | |
| Test status | |
| Simulation time | 1992949631 ps |
| CPU time | 15.32 seconds |
| Started | Aug 27 07:52:44 AM UTC 24 |
| Finished | Aug 27 07:53:00 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=835104214 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_timeout_missing_host_handshake.835104214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/45.usbdev_tx_rx_disruption.3102899936 |
| Short name | T2891 |
| Test name | |
| Test status | |
| Simulation time | 739272693 ps |
| CPU time | 2.28 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:52:59 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3102899936 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 45.usbdev_t x_rx_disruption.3102899936 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/45.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/450.usbdev_tx_rx_disruption.536658275 |
| Short name | T3555 |
| Test name | |
| Test status | |
| Simulation time | 516331954 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=536658275 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 450.usbdev_t x_rx_disruption.536658275 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/450.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/451.usbdev_tx_rx_disruption.2966905118 |
| Short name | T3560 |
| Test name | |
| Test status | |
| Simulation time | 643366339 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:56:09 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2966905118 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 451.usbdev_ tx_rx_disruption.2966905118 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/451.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/452.usbdev_tx_rx_disruption.2023144949 |
| Short name | T3561 |
| Test name | |
| Test status | |
| Simulation time | 499570201 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2023144949 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 452.usbdev_ tx_rx_disruption.2023144949 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/452.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/453.usbdev_tx_rx_disruption.3941660520 |
| Short name | T3565 |
| Test name | |
| Test status | |
| Simulation time | 653862764 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3941660520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 453.usbdev_ tx_rx_disruption.3941660520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/453.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/454.usbdev_tx_rx_disruption.983897797 |
| Short name | T3556 |
| Test name | |
| Test status | |
| Simulation time | 457529331 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=983897797 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 454.usbdev_t x_rx_disruption.983897797 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/454.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/455.usbdev_tx_rx_disruption.246811805 |
| Short name | T3563 |
| Test name | |
| Test status | |
| Simulation time | 475886391 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 215996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=246811805 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 455.usbdev_t x_rx_disruption.246811805 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/455.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/456.usbdev_tx_rx_disruption.2345648355 |
| Short name | T3562 |
| Test name | |
| Test status | |
| Simulation time | 501574236 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2345648355 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 456.usbdev_ tx_rx_disruption.2345648355 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/456.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/457.usbdev_tx_rx_disruption.2274420635 |
| Short name | T3558 |
| Test name | |
| Test status | |
| Simulation time | 481061240 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2274420635 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 457.usbdev_ tx_rx_disruption.2274420635 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/457.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/458.usbdev_tx_rx_disruption.3599510510 |
| Short name | T3564 |
| Test name | |
| Test status | |
| Simulation time | 506649005 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3599510510 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 458.usbdev_ tx_rx_disruption.3599510510 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/458.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/459.usbdev_tx_rx_disruption.4061372961 |
| Short name | T3566 |
| Test name | |
| Test status | |
| Simulation time | 482463918 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4061372961 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 459.usbdev_ tx_rx_disruption.4061372961 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/459.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_alert_test.406733897 |
| Short name | T2957 |
| Test name | |
| Test status | |
| Simulation time | 36818967 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:53:13 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=406733897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_alert_test.406733897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_disconnect.3189232839 |
| Short name | T2906 |
| Test name | |
| Test status | |
| Simulation time | 4320528546 ps |
| CPU time | 6.51 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3189232839 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_disconnect.3189232839 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_reset.572237236 |
| Short name | T2988 |
| Test name | |
| Test status | |
| Simulation time | 20593548861 ps |
| CPU time | 27.53 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:25 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=572237236 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_reset.572237236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_aon_wake_resume.2191766432 |
| Short name | T3070 |
| Test name | |
| Test status | |
| Simulation time | 29761980784 ps |
| CPU time | 49.25 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2191766432 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_aon_wake_resume.2191766432 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_av_buffer.4289940929 |
| Short name | T2890 |
| Test name | |
| Test status | |
| Simulation time | 173359417 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:52:58 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4289940929 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_av_buffer.4289940929 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_bitstuff_err.3226514960 |
| Short name | T2889 |
| Test name | |
| Test status | |
| Simulation time | 152723523 ps |
| CPU time | 0.85 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:52:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3226514960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_bitstuff_err.3226514960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_clear.3315896186 |
| Short name | T2892 |
| Test name | |
| Test status | |
| Simulation time | 522164824 ps |
| CPU time | 2.23 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:52:59 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3315896186 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 46.usbdev_data_toggle_clear.3315896186 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_data_toggle_restore.1374248031 |
| Short name | T2893 |
| Test name | |
| Test status | |
| Simulation time | 657759400 ps |
| CPU time | 2.97 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:00 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1374248031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_data_toggle_restore.1374248031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_device_address.1991712611 |
| Short name | T3063 |
| Test name | |
| Test status | |
| Simulation time | 26575985154 ps |
| CPU time | 48 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1991712611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_address.1991712611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_device_timeout.141035579 |
| Short name | T2905 |
| Test name | |
| Test status | |
| Simulation time | 606654156 ps |
| CPU time | 6.1 seconds |
| Started | Aug 27 07:52:56 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=141035579 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_device_timeout.141035579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_disable_endpoint.617587637 |
| Short name | T2899 |
| Test name | |
| Test status | |
| Simulation time | 786265537 ps |
| CPU time | 2.2 seconds |
| Started | Aug 27 07:52:58 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=617587637 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_disable_endpoint.617587637 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_disconnected.3470488552 |
| Short name | T2896 |
| Test name | |
| Test status | |
| Simulation time | 175256217 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:52:58 AM UTC 24 |
| Finished | Aug 27 07:53:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3470488552 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_disconnected.3470488552 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_enable.400662660 |
| Short name | T2900 |
| Test name | |
| Test status | |
| Simulation time | 34889912 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=400662660 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_enable.400662660 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_access.966540172 |
| Short name | T2910 |
| Test name | |
| Test status | |
| Simulation time | 1012782681 ps |
| CPU time | 3.23 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:04 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=966540172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_access.966540172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_endpoint_types.715281592 |
| Short name | T385 |
| Test name | |
| Test status | |
| Simulation time | 481914258 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=715281592 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 46.usbdev_endpoint_types.715281592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_fifo_rst.3827465117 |
| Short name | T2908 |
| Test name | |
| Test status | |
| Simulation time | 292863540 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3827465117 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_fifo_rst.3827465117 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_in_iso.44345198 |
| Short name | T2903 |
| Test name | |
| Test status | |
| Simulation time | 175668933 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 226436 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=44345198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev _in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_in_iso.44345198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_in_stall.3755108394 |
| Short name | T2901 |
| Test name | |
| Test status | |
| Simulation time | 184931613 ps |
| CPU time | 0.9 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:53:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3755108394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_in_stall.3755108394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_in_trans.48521297 |
| Short name | T2915 |
| Test name | |
| Test status | |
| Simulation time | 212792441 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:53:03 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=48521297 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_in_trans.48521297 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_invalid_sync.3790415101 |
| Short name | T3299 |
| Test name | |
| Test status | |
| Simulation time | 4972543359 ps |
| CPU time | 123.59 seconds |
| Started | Aug 27 07:53:00 AM UTC 24 |
| Finished | Aug 27 07:55:06 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3790415101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 46.usbdev_invalid_sync.3790415101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_iso_retraction.4057665370 |
| Short name | T3045 |
| Test name | |
| Test status | |
| Simulation time | 5792415394 ps |
| CPU time | 36.6 seconds |
| Started | Aug 27 07:53:03 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4057665370 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_iso_retraction.4057665370 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_link_in_err.1239117145 |
| Short name | T2912 |
| Test name | |
| Test status | |
| Simulation time | 204575589 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:53:03 AM UTC 24 |
| Finished | Aug 27 07:53:05 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1239117145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_in_err.1239117145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_link_resume.3897541481 |
| Short name | T3032 |
| Test name | |
| Test status | |
| Simulation time | 22176797355 ps |
| CPU time | 35.41 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:40 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3897541481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_link_resume.3897541481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_link_suspend.3171474372 |
| Short name | T2944 |
| Test name | |
| Test status | |
| Simulation time | 4311592017 ps |
| CPU time | 8.09 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:13 AM UTC 24 |
| Peak memory | 228448 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3171474372 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 46.usbdev_link_suspend.3171474372 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_low_speed_traffic.4104113618 |
| Short name | T3285 |
| Test name | |
| Test status | |
| Simulation time | 4467902590 ps |
| CPU time | 110.17 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:54:56 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4104113618 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_low_speed_traffic.4104113618 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_max_inter_pkt_delay.2876845019 |
| Short name | T2869 |
| Test name | |
| Test status | |
| Simulation time | 2750675659 ps |
| CPU time | 24.49 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:29 AM UTC 24 |
| Peak memory | 228240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2876845019 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_max_inter_pkt_delay.2876845019 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_in_transaction.680037099 |
| Short name | T2917 |
| Test name | |
| Test status | |
| Simulation time | 311237143 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=680037099 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_in_transaction.680037099 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_max_length_out_transaction.3137392289 |
| Short name | T2913 |
| Test name | |
| Test status | |
| Simulation time | 190042433 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137392289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_max_length_out_transaction.3137392289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_min_inter_pkt_delay.4183790943 |
| Short name | T2989 |
| Test name | |
| Test status | |
| Simulation time | 2817435189 ps |
| CPU time | 19.82 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:25 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4183790943 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_min_inter_pkt_delay.4183790943 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_in_transaction.3863087311 |
| Short name | T2918 |
| Test name | |
| Test status | |
| Simulation time | 187643298 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3863087311 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_in_transaction.3863087311 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_min_length_out_transaction.1112827889 |
| Short name | T2919 |
| Test name | |
| Test status | |
| Simulation time | 171543743 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:04 AM UTC 24 |
| Finished | Aug 27 07:53:06 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1112827889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_min_length_out_transaction.1112827889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_nak_trans.2851437204 |
| Short name | T2934 |
| Test name | |
| Test status | |
| Simulation time | 213763119 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2851437204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_nak_trans.2851437204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_out_iso.2477192050 |
| Short name | T2932 |
| Test name | |
| Test status | |
| Simulation time | 200607144 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2477192050 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 46.usbdev_out_iso.2477192050 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_out_stall.3572338060 |
| Short name | T2931 |
| Test name | |
| Test status | |
| Simulation time | 162822232 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3572338060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_out_stall.3572338060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_out_trans_nak.3994626913 |
| Short name | T2928 |
| Test name | |
| Test status | |
| Simulation time | 178393891 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3994626913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_out_trans_nak.3994626913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_pending_in_trans.3960876737 |
| Short name | T2930 |
| Test name | |
| Test status | |
| Simulation time | 181084855 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960876737 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 46.usbdev_pending_in_trans.3960876737 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_pinflip.2325026244 |
| Short name | T2925 |
| Test name | |
| Test status | |
| Simulation time | 203103326 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325026244 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_pinflip.2325026244 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_phy_config_usb_ref_disable.1211952719 |
| Short name | T2926 |
| Test name | |
| Test status | |
| Simulation time | 150305276 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1211952719 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 46.usbdev_phy_config_usb_ref_disable.1211952719 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_phy_pins_sense.2674646696 |
| Short name | T2933 |
| Test name | |
| Test status | |
| Simulation time | 44547781 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:53:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2674646696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_phy_pins_sense.2674646696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_buffer.3147766500 |
| Short name | T526 |
| Test name | |
| Test status | |
| Simulation time | 18525268694 ps |
| CPU time | 53.71 seconds |
| Started | Aug 27 07:53:06 AM UTC 24 |
| Finished | Aug 27 07:54:05 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147766500 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_pkt_buffer.3147766500 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_received.532135836 |
| Short name | T2938 |
| Test name | |
| Test status | |
| Simulation time | 223345589 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=532135836 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_pkt_received.532135836 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_pkt_sent.2670311151 |
| Short name | T2937 |
| Test name | |
| Test status | |
| Simulation time | 232657860 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2670311151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 46.usbdev_pkt_sent.2670311151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_in_transaction.3941141695 |
| Short name | T2940 |
| Test name | |
| Test status | |
| Simulation time | 229472237 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3941141695 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 46.usbdev_random_length_in_transaction.3941141695 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_random_length_out_transaction.432921044 |
| Short name | T2939 |
| Test name | |
| Test status | |
| Simulation time | 172281565 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=432921044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 46.usbdev_random_length_out_transaction.432921044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_rx_crc_err.1072740777 |
| Short name | T2961 |
| Test name | |
| Test status | |
| Simulation time | 172351729 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1072740777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 46.usbdev_rx_crc_err.1072740777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_rx_full.543863463 |
| Short name | T2943 |
| Test name | |
| Test status | |
| Simulation time | 245322840 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=543863463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 46.usbdev_rx_full.543863463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_setup_stage.3481273401 |
| Short name | T2941 |
| Test name | |
| Test status | |
| Simulation time | 154177047 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:53:08 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481273401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_setup_stage.3481273401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_setup_trans_ignored.819537885 |
| Short name | T2936 |
| Test name | |
| Test status | |
| Simulation time | 144932425 ps |
| CPU time | 0.84 seconds |
| Started | Aug 27 07:53:09 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=819537885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 46.usbdev_setup_trans_ignored.819537885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_smoke.1800138932 |
| Short name | T2942 |
| Test name | |
| Test status | |
| Simulation time | 202208922 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:53:09 AM UTC 24 |
| Finished | Aug 27 07:53:12 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1800138932 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_smoke.1800138932 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_spurious_pids_ignored.1058831040 |
| Short name | T3057 |
| Test name | |
| Test status | |
| Simulation time | 3389463263 ps |
| CPU time | 30.45 seconds |
| Started | Aug 27 07:53:10 AM UTC 24 |
| Finished | Aug 27 07:53:45 AM UTC 24 |
| Peak memory | 235388 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1058831040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 46.usbdev_spurious_pids_ignored.1058831040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_stall_priority_over_nak.3130375197 |
| Short name | T2948 |
| Test name | |
| Test status | |
| Simulation time | 162208501 ps |
| CPU time | 0.78 seconds |
| Started | Aug 27 07:53:10 AM UTC 24 |
| Finished | Aug 27 07:53:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130375197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stall_priority_over_nak.3130375197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_stall_trans.2573926662 |
| Short name | T2950 |
| Test name | |
| Test status | |
| Simulation time | 164731163 ps |
| CPU time | 0.85 seconds |
| Started | Aug 27 07:53:10 AM UTC 24 |
| Finished | Aug 27 07:53:15 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2573926662 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 46.usbdev_stall_trans.2573926662 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_stream_len_max.3635328280 |
| Short name | T2964 |
| Test name | |
| Test status | |
| Simulation time | 1005432454 ps |
| CPU time | 2.74 seconds |
| Started | Aug 27 07:53:13 AM UTC 24 |
| Finished | Aug 27 07:53:18 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3635328280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_stream_len_max.3635328280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_streaming_out.2930214698 |
| Short name | T3030 |
| Test name | |
| Test status | |
| Simulation time | 3523402208 ps |
| CPU time | 23.6 seconds |
| Started | Aug 27 07:53:13 AM UTC 24 |
| Finished | Aug 27 07:53:39 AM UTC 24 |
| Peak memory | 230512 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930214698 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 46.usbdev_streaming_out.2930214698 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_timeout_missing_host_handshake.280588119 |
| Short name | T2907 |
| Test name | |
| Test status | |
| Simulation time | 311064997 ps |
| CPU time | 3.97 seconds |
| Started | Aug 27 07:52:58 AM UTC 24 |
| Finished | Aug 27 07:53:03 AM UTC 24 |
| Peak memory | 218044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=280588119 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_timeout_missing_host_handshake.280588119 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/46.usbdev_tx_rx_disruption.790220643 |
| Short name | T2962 |
| Test name | |
| Test status | |
| Simulation time | 645251167 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:53:13 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=790220643 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 46.usbdev_tx _rx_disruption.790220643 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/46.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/460.usbdev_tx_rx_disruption.3265140464 |
| Short name | T3567 |
| Test name | |
| Test status | |
| Simulation time | 500198645 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3265140464 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 460.usbdev_ tx_rx_disruption.3265140464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/460.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/461.usbdev_tx_rx_disruption.3349515151 |
| Short name | T3559 |
| Test name | |
| Test status | |
| Simulation time | 462343252 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:12 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3349515151 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 461.usbdev_ tx_rx_disruption.3349515151 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/461.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/462.usbdev_tx_rx_disruption.1390960744 |
| Short name | T3557 |
| Test name | |
| Test status | |
| Simulation time | 600673612 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1390960744 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 462.usbdev_ tx_rx_disruption.1390960744 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/462.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/463.usbdev_tx_rx_disruption.1456456343 |
| Short name | T3568 |
| Test name | |
| Test status | |
| Simulation time | 560207520 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1456456343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 463.usbdev_ tx_rx_disruption.1456456343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/463.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/464.usbdev_tx_rx_disruption.1345749197 |
| Short name | T3570 |
| Test name | |
| Test status | |
| Simulation time | 632486737 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1345749197 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 464.usbdev_ tx_rx_disruption.1345749197 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/464.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/465.usbdev_tx_rx_disruption.3957839001 |
| Short name | T3539 |
| Test name | |
| Test status | |
| Simulation time | 613622900 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:56:10 AM UTC 24 |
| Finished | Aug 27 07:56:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3957839001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 465.usbdev_ tx_rx_disruption.3957839001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/465.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/466.usbdev_tx_rx_disruption.787815236 |
| Short name | T3582 |
| Test name | |
| Test status | |
| Simulation time | 523984070 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:11 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=787815236 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 466.usbdev_t x_rx_disruption.787815236 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/466.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/467.usbdev_tx_rx_disruption.3255247295 |
| Short name | T3581 |
| Test name | |
| Test status | |
| Simulation time | 478683333 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:11 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3255247295 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 467.usbdev_ tx_rx_disruption.3255247295 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/467.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/468.usbdev_tx_rx_disruption.2227666235 |
| Short name | T3585 |
| Test name | |
| Test status | |
| Simulation time | 638933867 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:56:11 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2227666235 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 468.usbdev_ tx_rx_disruption.2227666235 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/468.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/469.usbdev_tx_rx_disruption.2622205214 |
| Short name | T3583 |
| Test name | |
| Test status | |
| Simulation time | 527785922 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:11 AM UTC 24 |
| Finished | Aug 27 07:56:14 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2622205214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 469.usbdev_ tx_rx_disruption.2622205214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/469.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_alert_test.2687694413 |
| Short name | T3006 |
| Test name | |
| Test status | |
| Simulation time | 33302967 ps |
| CPU time | 0.67 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2687694413 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 47.usbdev_alert_test.2687694413 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_disconnect.3983241575 |
| Short name | T2982 |
| Test name | |
| Test status | |
| Simulation time | 4155509029 ps |
| CPU time | 7.05 seconds |
| Started | Aug 27 07:53:13 AM UTC 24 |
| Finished | Aug 27 07:53:23 AM UTC 24 |
| Peak memory | 228352 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3983241575 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_disconnect.3983241575 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_reset.978832648 |
| Short name | T3055 |
| Test name | |
| Test status | |
| Simulation time | 20517073890 ps |
| CPU time | 27.49 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:43 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=978832648 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_reset.978832648 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_aon_wake_resume.2490999581 |
| Short name | T3058 |
| Test name | |
| Test status | |
| Simulation time | 23941216586 ps |
| CPU time | 29.38 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:45 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2490999581 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_aon_wake_resume.2490999581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_av_buffer.1604230429 |
| Short name | T2959 |
| Test name | |
| Test status | |
| Simulation time | 175635431 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 215964 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1604230429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_av_buffer.1604230429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_bitstuff_err.327728952 |
| Short name | T2960 |
| Test name | |
| Test status | |
| Simulation time | 150878085 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=327728952 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_bitstuff_err.327728952 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_clear.1457787605 |
| Short name | T2955 |
| Test name | |
| Test status | |
| Simulation time | 443461006 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457787605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 47.usbdev_data_toggle_clear.1457787605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_data_toggle_restore.3059124323 |
| Short name | T2956 |
| Test name | |
| Test status | |
| Simulation time | 530200618 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:16 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3059124323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_data_toggle_restore.3059124323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_device_address.2566567778 |
| Short name | T3181 |
| Test name | |
| Test status | |
| Simulation time | 41476290835 ps |
| CPU time | 61.6 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:54:17 AM UTC 24 |
| Peak memory | 218220 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2566567778 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_address.2566567778 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_device_timeout.1469628728 |
| Short name | T2952 |
| Test name | |
| Test status | |
| Simulation time | 163055408 ps |
| CPU time | 0.97 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:16 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1469628728 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_device_timeout.1469628728 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_disable_endpoint.2777409655 |
| Short name | T2958 |
| Test name | |
| Test status | |
| Simulation time | 554553016 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:17 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2777409655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_disable_endpoint.2777409655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_disconnected.4288204357 |
| Short name | T2953 |
| Test name | |
| Test status | |
| Simulation time | 183735889 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4288204357 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_disconnected.4288204357 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_enable.3054733960 |
| Short name | T2951 |
| Test name | |
| Test status | |
| Simulation time | 37259941 ps |
| CPU time | 0.77 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3054733960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_enable.3054733960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_access.2139890501 |
| Short name | T2963 |
| Test name | |
| Test status | |
| Simulation time | 1022392221 ps |
| CPU time | 2.72 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:18 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139890501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_access.2139890501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_endpoint_types.3120530770 |
| Short name | T458 |
| Test name | |
| Test status | |
| Simulation time | 336583117 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:19 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120530770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_endpoint_types.3120530770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_fifo_rst.1186847331 |
| Short name | T2968 |
| Test name | |
| Test status | |
| Simulation time | 149034884 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1186847331 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_fifo_rst.1186847331 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_in_iso.1115693776 |
| Short name | T2965 |
| Test name | |
| Test status | |
| Simulation time | 211276712 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:18 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115693776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_in_iso.1115693776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_in_stall.3277473254 |
| Short name | T2966 |
| Test name | |
| Test status | |
| Simulation time | 158983519 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3277473254 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_stall.3277473254 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_in_trans.1760147075 |
| Short name | T2967 |
| Test name | |
| Test status | |
| Simulation time | 222367794 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:19 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1760147075 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_in_trans.1760147075 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_invalid_sync.1724799564 |
| Short name | T3227 |
| Test name | |
| Test status | |
| Simulation time | 3183003184 ps |
| CPU time | 76.89 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:54:35 AM UTC 24 |
| Peak memory | 228484 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1724799564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 47.usbdev_invalid_sync.1724799564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_iso_retraction.3236537889 |
| Short name | T3056 |
| Test name | |
| Test status | |
| Simulation time | 4374447053 ps |
| CPU time | 26.64 seconds |
| Started | Aug 27 07:53:16 AM UTC 24 |
| Finished | Aug 27 07:53:44 AM UTC 24 |
| Peak memory | 218376 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3236537889 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_iso_retraction.3236537889 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_link_in_err.2714468711 |
| Short name | T2970 |
| Test name | |
| Test status | |
| Simulation time | 179237397 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2714468711 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_in_err.2714468711 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_link_resume.2172297666 |
| Short name | T3031 |
| Test name | |
| Test status | |
| Simulation time | 12742429096 ps |
| CPU time | 19.54 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:40 AM UTC 24 |
| Peak memory | 218264 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2172297666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_link_resume.2172297666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_link_suspend.1167074198 |
| Short name | T2996 |
| Test name | |
| Test status | |
| Simulation time | 3918731393 ps |
| CPU time | 5.95 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1167074198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_link_suspend.1167074198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_low_speed_traffic.2998332420 |
| Short name | T3315 |
| Test name | |
| Test status | |
| Simulation time | 4322211606 ps |
| CPU time | 107.15 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:55:08 AM UTC 24 |
| Peak memory | 230528 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2998332420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_low_speed_traffic.2998332420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_max_inter_pkt_delay.3237655060 |
| Short name | T3033 |
| Test name | |
| Test status | |
| Simulation time | 2543416551 ps |
| CPU time | 19.91 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:40 AM UTC 24 |
| Peak memory | 230656 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3237655060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_max_inter_pkt_delay.3237655060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_in_transaction.2160572878 |
| Short name | T2975 |
| Test name | |
| Test status | |
| Simulation time | 237101118 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2160572878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_in_transaction.2160572878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_max_length_out_transaction.2541701740 |
| Short name | T2971 |
| Test name | |
| Test status | |
| Simulation time | 208951119 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2541701740 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_max_length_out_transaction.2541701740 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_min_inter_pkt_delay.1457617255 |
| Short name | T3025 |
| Test name | |
| Test status | |
| Simulation time | 2141931300 ps |
| CPU time | 15.51 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:36 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1457617255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_min_inter_pkt_delay.1457617255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_in_transaction.1271927340 |
| Short name | T2978 |
| Test name | |
| Test status | |
| Simulation time | 175979318 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1271927340 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_in_transaction.1271927340 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_min_length_out_transaction.1911432259 |
| Short name | T2972 |
| Test name | |
| Test status | |
| Simulation time | 144525023 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1911432259 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_min_length_out_transaction.1911432259 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_nak_trans.3778268460 |
| Short name | T2974 |
| Test name | |
| Test status | |
| Simulation time | 178357668 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:19 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3778268460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_nak_trans.3778268460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_out_iso.3104475608 |
| Short name | T2976 |
| Test name | |
| Test status | |
| Simulation time | 202341321 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:53:20 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104475608 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 47.usbdev_out_iso.3104475608 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_out_stall.2908570696 |
| Short name | T2980 |
| Test name | |
| Test status | |
| Simulation time | 216464517 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:53:20 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2908570696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_out_stall.2908570696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_out_trans_nak.3519062599 |
| Short name | T2977 |
| Test name | |
| Test status | |
| Simulation time | 224493964 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:53:20 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3519062599 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_out_trans_nak.3519062599 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_pending_in_trans.1824328162 |
| Short name | T2973 |
| Test name | |
| Test status | |
| Simulation time | 159563383 ps |
| CPU time | 1.12 seconds |
| Started | Aug 27 07:53:20 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1824328162 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 47.usbdev_pending_in_trans.1824328162 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_pinflip.3902929685 |
| Short name | T2979 |
| Test name | |
| Test status | |
| Simulation time | 196190496 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:53:20 AM UTC 24 |
| Finished | Aug 27 07:53:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3902929685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_pinflip.3902929685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_phy_config_usb_ref_disable.1523723094 |
| Short name | T2984 |
| Test name | |
| Test status | |
| Simulation time | 167572971 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:53:21 AM UTC 24 |
| Finished | Aug 27 07:53:23 AM UTC 24 |
| Peak memory | 215356 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523723094 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 47.usbdev_phy_config_usb_ref_disable.1523723094 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_phy_pins_sense.3832158018 |
| Short name | T2983 |
| Test name | |
| Test status | |
| Simulation time | 39653451 ps |
| CPU time | 0.79 seconds |
| Started | Aug 27 07:53:21 AM UTC 24 |
| Finished | Aug 27 07:53:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3832158018 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_phy_pins_sense.3832158018 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_buffer.4065611396 |
| Short name | T3115 |
| Test name | |
| Test status | |
| Simulation time | 12980276100 ps |
| CPU time | 34.49 seconds |
| Started | Aug 27 07:53:21 AM UTC 24 |
| Finished | Aug 27 07:54:00 AM UTC 24 |
| Peak memory | 232672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4065611396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_pkt_buffer.4065611396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_received.1715784957 |
| Short name | T2985 |
| Test name | |
| Test status | |
| Simulation time | 184642924 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:53:21 AM UTC 24 |
| Finished | Aug 27 07:53:24 AM UTC 24 |
| Peak memory | 215516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1715784957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 47.usbdev_pkt_received.1715784957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_pkt_sent.1607902620 |
| Short name | T3000 |
| Test name | |
| Test status | |
| Simulation time | 248031258 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1607902620 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 47.usbdev_pkt_sent.1607902620 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_in_transaction.1210113668 |
| Short name | T2995 |
| Test name | |
| Test status | |
| Simulation time | 163287314 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1210113668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_random_length_in_transaction.1210113668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_random_length_out_transaction.1966320104 |
| Short name | T2994 |
| Test name | |
| Test status | |
| Simulation time | 169487432 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1966320104 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 47.usbdev_random_length_out_transaction.1966320104 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_rx_crc_err.471175628 |
| Short name | T2992 |
| Test name | |
| Test status | |
| Simulation time | 198952410 ps |
| CPU time | 0.89 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=471175628 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_rx_crc_err.471175628 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_rx_full.608388335 |
| Short name | T3002 |
| Test name | |
| Test status | |
| Simulation time | 244782948 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=608388335 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 47.usbdev_rx_full.608388335 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_setup_stage.563107220 |
| Short name | T2997 |
| Test name | |
| Test status | |
| Simulation time | 157042823 ps |
| CPU time | 0.87 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:26 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=563107220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 47.usbdev_setup_stage.563107220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_setup_trans_ignored.2761727960 |
| Short name | T2993 |
| Test name | |
| Test status | |
| Simulation time | 145749957 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:27 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2761727960 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 47.usbdev_setup_trans_ignored.2761727960 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_smoke.1455763821 |
| Short name | T2949 |
| Test name | |
| Test status | |
| Simulation time | 227491500 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1455763821 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_smoke.1455763821 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_spurious_pids_ignored.3041681692 |
| Short name | T3091 |
| Test name | |
| Test status | |
| Simulation time | 2959527589 ps |
| CPU time | 28.19 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3041681692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 47.usbdev_spurious_pids_ignored.3041681692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_stall_priority_over_nak.590866886 |
| Short name | T3001 |
| Test name | |
| Test status | |
| Simulation time | 192662055 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:27 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=590866886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_stall_priority_over_nak.590866886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_stall_trans.3000577626 |
| Short name | T3003 |
| Test name | |
| Test status | |
| Simulation time | 186904429 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:27 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3000577626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 47.usbdev_stall_trans.3000577626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_stream_len_max.428618203 |
| Short name | T3014 |
| Test name | |
| Test status | |
| Simulation time | 878233474 ps |
| CPU time | 2.62 seconds |
| Started | Aug 27 07:53:27 AM UTC 24 |
| Finished | Aug 27 07:53:33 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=428618203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 47.usbdev_stream_len_max.428618203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_streaming_out.2435439984 |
| Short name | T3066 |
| Test name | |
| Test status | |
| Simulation time | 2769424494 ps |
| CPU time | 19.95 seconds |
| Started | Aug 27 07:53:24 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 228604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2435439984 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 47.usbdev_streaming_out.2435439984 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_timeout_missing_host_handshake.3670782528 |
| Short name | T2990 |
| Test name | |
| Test status | |
| Simulation time | 571731609 ps |
| CPU time | 10.23 seconds |
| Started | Aug 27 07:53:14 AM UTC 24 |
| Finished | Aug 27 07:53:25 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3670782528 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_timeout_missing_host_handshake.3670782528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/47.usbdev_tx_rx_disruption.3530893541 |
| Short name | T3012 |
| Test name | |
| Test status | |
| Simulation time | 524419894 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:32 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3530893541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 47.usbdev_t x_rx_disruption.3530893541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/47.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/470.usbdev_tx_rx_disruption.349414767 |
| Short name | T3608 |
| Test name | |
| Test status | |
| Simulation time | 638596161 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:56:15 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=349414767 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 470.usbdev_t x_rx_disruption.349414767 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/470.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/471.usbdev_tx_rx_disruption.1534915477 |
| Short name | T3607 |
| Test name | |
| Test status | |
| Simulation time | 618689129 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1534915477 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 471.usbdev_ tx_rx_disruption.1534915477 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/471.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/472.usbdev_tx_rx_disruption.264564831 |
| Short name | T3603 |
| Test name | |
| Test status | |
| Simulation time | 602464252 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=264564831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 472.usbdev_t x_rx_disruption.264564831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/472.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/473.usbdev_tx_rx_disruption.2032983044 |
| Short name | T3606 |
| Test name | |
| Test status | |
| Simulation time | 548145982 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2032983044 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 473.usbdev_ tx_rx_disruption.2032983044 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/473.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/474.usbdev_tx_rx_disruption.2162173486 |
| Short name | T3605 |
| Test name | |
| Test status | |
| Simulation time | 570182830 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2162173486 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 474.usbdev_ tx_rx_disruption.2162173486 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/474.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/475.usbdev_tx_rx_disruption.3832259362 |
| Short name | T3609 |
| Test name | |
| Test status | |
| Simulation time | 486621723 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3832259362 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 475.usbdev_ tx_rx_disruption.3832259362 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/475.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/476.usbdev_tx_rx_disruption.3054617472 |
| Short name | T3604 |
| Test name | |
| Test status | |
| Simulation time | 518105044 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:18 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3054617472 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 476.usbdev_ tx_rx_disruption.3054617472 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/476.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/477.usbdev_tx_rx_disruption.3342299583 |
| Short name | T3610 |
| Test name | |
| Test status | |
| Simulation time | 471156022 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3342299583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 477.usbdev_ tx_rx_disruption.3342299583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/477.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/478.usbdev_tx_rx_disruption.1983585145 |
| Short name | T3615 |
| Test name | |
| Test status | |
| Simulation time | 591527093 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1983585145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 478.usbdev_ tx_rx_disruption.1983585145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/478.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/479.usbdev_tx_rx_disruption.1834067983 |
| Short name | T3627 |
| Test name | |
| Test status | |
| Simulation time | 612148203 ps |
| CPU time | 2.14 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 218128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1834067983 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 479.usbdev_ tx_rx_disruption.1834067983 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/479.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_alert_test.2559366363 |
| Short name | T3064 |
| Test name | |
| Test status | |
| Simulation time | 38859311 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2559366363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 48.usbdev_alert_test.2559366363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_disconnect.1749578206 |
| Short name | T3053 |
| Test name | |
| Test status | |
| Simulation time | 9712267808 ps |
| CPU time | 12.38 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:43 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1749578206 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_disconnect.1749578206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_reset.3977977833 |
| Short name | T3096 |
| Test name | |
| Test status | |
| Simulation time | 20522113460 ps |
| CPU time | 23.86 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3977977833 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_reset.3977977833 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_aon_wake_resume.3586866021 |
| Short name | T3155 |
| Test name | |
| Test status | |
| Simulation time | 23583320961 ps |
| CPU time | 40.25 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:54:11 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3586866021 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_aon_wake_resume.3586866021 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_av_buffer.2313728190 |
| Short name | T3013 |
| Test name | |
| Test status | |
| Simulation time | 233750820 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:32 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2313728190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_av_buffer.2313728190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_bitstuff_err.1317722007 |
| Short name | T3005 |
| Test name | |
| Test status | |
| Simulation time | 192074151 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1317722007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_bitstuff_err.1317722007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_clear.27197031 |
| Short name | T3007 |
| Test name | |
| Test status | |
| Simulation time | 355657959 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:31 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=27197031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_clear.27197031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_data_toggle_restore.4026817772 |
| Short name | T3009 |
| Test name | |
| Test status | |
| Simulation time | 423020440 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:31 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4026817772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_data_toggle_restore.4026817772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_device_address.1174207655 |
| Short name | T3148 |
| Test name | |
| Test status | |
| Simulation time | 25088475272 ps |
| CPU time | 37.82 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1174207655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_address.1174207655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_device_timeout.1449650024 |
| Short name | T3080 |
| Test name | |
| Test status | |
| Simulation time | 1004274616 ps |
| CPU time | 20.07 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:50 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449650024 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_device_timeout.1449650024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_disable_endpoint.105414307 |
| Short name | T3019 |
| Test name | |
| Test status | |
| Simulation time | 549937804 ps |
| CPU time | 2.83 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:34 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=105414307 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_disable_endpoint.105414307 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_disconnected.1216845211 |
| Short name | T3010 |
| Test name | |
| Test status | |
| Simulation time | 170759251 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1216845211 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_disconnected.1216845211 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_enable.2203544213 |
| Short name | T3011 |
| Test name | |
| Test status | |
| Simulation time | 40395180 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:32 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2203544213 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 48.usbdev_enable.2203544213 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_endpoint_access.1257929029 |
| Short name | T3023 |
| Test name | |
| Test status | |
| Simulation time | 1088287530 ps |
| CPU time | 3.36 seconds |
| Started | Aug 27 07:53:30 AM UTC 24 |
| Finished | Aug 27 07:53:35 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1257929029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_endpoint_access.1257929029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_fifo_rst.1115186874 |
| Short name | T3016 |
| Test name | |
| Test status | |
| Simulation time | 174399010 ps |
| CPU time | 1.93 seconds |
| Started | Aug 27 07:53:30 AM UTC 24 |
| Finished | Aug 27 07:53:33 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1115186874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_fifo_rst.1115186874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_in_iso.4030441594 |
| Short name | T3015 |
| Test name | |
| Test status | |
| Simulation time | 232417621 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:53:30 AM UTC 24 |
| Finished | Aug 27 07:53:33 AM UTC 24 |
| Peak memory | 226372 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4030441594 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_in_iso.4030441594 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_in_stall.201144023 |
| Short name | T3021 |
| Test name | |
| Test status | |
| Simulation time | 142680362 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:34 AM UTC 24 |
| Peak memory | 215668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=201144023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_stall.201144023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_in_trans.500147204 |
| Short name | T3022 |
| Test name | |
| Test status | |
| Simulation time | 219616070 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:34 AM UTC 24 |
| Peak memory | 216708 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500147204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_in_trans.500147204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_invalid_sync.4116997232 |
| Short name | T3404 |
| Test name | |
| Test status | |
| Simulation time | 5068187656 ps |
| CPU time | 122.2 seconds |
| Started | Aug 27 07:53:30 AM UTC 24 |
| Finished | Aug 27 07:55:35 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116997232 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 48.usbdev_invalid_sync.4116997232 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_iso_retraction.2507917139 |
| Short name | T3225 |
| Test name | |
| Test status | |
| Simulation time | 5545855356 ps |
| CPU time | 58.47 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:54:32 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2507917139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_iso_retraction.2507917139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_link_in_err.329708756 |
| Short name | T3020 |
| Test name | |
| Test status | |
| Simulation time | 204429308 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:34 AM UTC 24 |
| Peak memory | 217412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=329708756 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_link_in_err.329708756 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_link_resume.25243904 |
| Short name | T3046 |
| Test name | |
| Test status | |
| Simulation time | 4703829222 ps |
| CPU time | 8.38 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=25243904 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_link_resume.25243904 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_link_suspend.4017003101 |
| Short name | T3073 |
| Test name | |
| Test status | |
| Simulation time | 10513423051 ps |
| CPU time | 14.53 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:48 AM UTC 24 |
| Peak memory | 218268 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4017003101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_link_suspend.4017003101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_low_speed_traffic.4174322251 |
| Short name | T3100 |
| Test name | |
| Test status | |
| Simulation time | 3406333404 ps |
| CPU time | 22.54 seconds |
| Started | Aug 27 07:53:32 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4174322251 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_low_speed_traffic.4174322251 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_max_inter_pkt_delay.1244352796 |
| Short name | T3076 |
| Test name | |
| Test status | |
| Simulation time | 1833527136 ps |
| CPU time | 13.66 seconds |
| Started | Aug 27 07:53:34 AM UTC 24 |
| Finished | Aug 27 07:53:49 AM UTC 24 |
| Peak memory | 228272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1244352796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_max_inter_pkt_delay.1244352796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_in_transaction.2680306807 |
| Short name | T3029 |
| Test name | |
| Test status | |
| Simulation time | 259648072 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:53:34 AM UTC 24 |
| Finished | Aug 27 07:53:36 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2680306807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_in_transaction.2680306807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_max_length_out_transaction.3901273878 |
| Short name | T3027 |
| Test name | |
| Test status | |
| Simulation time | 223210426 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:53:34 AM UTC 24 |
| Finished | Aug 27 07:53:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901273878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_max_length_out_transaction.3901273878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_min_inter_pkt_delay.3160241089 |
| Short name | T3167 |
| Test name | |
| Test status | |
| Simulation time | 1672242263 ps |
| CPU time | 39.79 seconds |
| Started | Aug 27 07:53:34 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3160241089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_min_inter_pkt_delay.3160241089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_in_transaction.3724584964 |
| Short name | T3028 |
| Test name | |
| Test status | |
| Simulation time | 168365648 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:34 AM UTC 24 |
| Finished | Aug 27 07:53:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3724584964 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_in_transaction.3724584964 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_min_length_out_transaction.3712455169 |
| Short name | T3034 |
| Test name | |
| Test status | |
| Simulation time | 144057036 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:53:35 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3712455169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_min_length_out_transaction.3712455169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_nak_trans.4164502842 |
| Short name | T3040 |
| Test name | |
| Test status | |
| Simulation time | 188628092 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:53:35 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4164502842 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_nak_trans.4164502842 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_out_iso.4088760729 |
| Short name | T3035 |
| Test name | |
| Test status | |
| Simulation time | 232995582 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:53:36 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4088760729 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_out_iso.4088760729 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_out_stall.2704432134 |
| Short name | T3039 |
| Test name | |
| Test status | |
| Simulation time | 189794876 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:53:36 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2704432134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_out_stall.2704432134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_out_trans_nak.812673831 |
| Short name | T3038 |
| Test name | |
| Test status | |
| Simulation time | 193987163 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:53:36 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=812673831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_out_trans_nak.812673831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_pending_in_trans.1673026887 |
| Short name | T3043 |
| Test name | |
| Test status | |
| Simulation time | 154397735 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:53:36 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1673026887 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 48.usbdev_pending_in_trans.1673026887 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_pinflip.470256024 |
| Short name | T3044 |
| Test name | |
| Test status | |
| Simulation time | 223302677 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:53:36 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=470256024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_ pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_pinflip.470256024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_phy_config_usb_ref_disable.2599763312 |
| Short name | T3042 |
| Test name | |
| Test status | |
| Simulation time | 148215509 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599763312 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 48.usbdev_phy_config_usb_ref_disable.2599763312 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_phy_pins_sense.544016543 |
| Short name | T3037 |
| Test name | |
| Test status | |
| Simulation time | 49193132 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=544016543 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_phy_pins_sense.544016543 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_buffer.500665279 |
| Short name | T3118 |
| Test name | |
| Test status | |
| Simulation time | 8379049327 ps |
| CPU time | 20.83 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=500665279 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 48.usbdev_pkt_buffer.500665279 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_received.2228262611 |
| Short name | T3041 |
| Test name | |
| Test status | |
| Simulation time | 180027233 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2228262611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 48.usbdev_pkt_received.2228262611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_pkt_sent.2518345703 |
| Short name | T3047 |
| Test name | |
| Test status | |
| Simulation time | 171278964 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2518345703 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 48.usbdev_pkt_sent.2518345703 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_in_transaction.1805315025 |
| Short name | T3048 |
| Test name | |
| Test status | |
| Simulation time | 166260529 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1805315025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 48.usbdev_random_length_in_transaction.1805315025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_random_length_out_transaction.3120426454 |
| Short name | T3049 |
| Test name | |
| Test status | |
| Simulation time | 157014640 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:53:38 AM UTC 24 |
| Finished | Aug 27 07:53:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3120426454 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 48.usbdev_random_length_out_transaction.3120426454 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_rx_crc_err.3853181410 |
| Short name | T3052 |
| Test name | |
| Test status | |
| Simulation time | 140313108 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:53:40 AM UTC 24 |
| Finished | Aug 27 07:53:42 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3853181410 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_rx_crc_err.3853181410 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_rx_full.2898871848 |
| Short name | T3054 |
| Test name | |
| Test status | |
| Simulation time | 402177680 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:53:40 AM UTC 24 |
| Finished | Aug 27 07:53:43 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2898871848 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_rx_full.2898871848 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_setup_stage.697753317 |
| Short name | T3062 |
| Test name | |
| Test status | |
| Simulation time | 152603931 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=697753317 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_setup_stage.697753317 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_setup_trans_ignored.4157129139 |
| Short name | T3059 |
| Test name | |
| Test status | |
| Simulation time | 157238117 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:45 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4157129139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 48.usbdev_setup_trans_ignored.4157129139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_smoke.2408281685 |
| Short name | T3060 |
| Test name | |
| Test status | |
| Simulation time | 253638373 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2408281685 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_smoke.2408281685 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_spurious_pids_ignored.3078997154 |
| Short name | T3156 |
| Test name | |
| Test status | |
| Simulation time | 3208200582 ps |
| CPU time | 27.28 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:54:12 AM UTC 24 |
| Peak memory | 235320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3078997154 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 48.usbdev_spurious_pids_ignored.3078997154 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_stall_priority_over_nak.2930878285 |
| Short name | T3065 |
| Test name | |
| Test status | |
| Simulation time | 181259614 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2930878285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stall_priority_over_nak.2930878285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_stall_trans.339761203 |
| Short name | T3061 |
| Test name | |
| Test status | |
| Simulation time | 168786871 ps |
| CPU time | 0.98 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=339761203 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 48.usbdev_stall_trans.339761203 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_stream_len_max.3313710085 |
| Short name | T3072 |
| Test name | |
| Test status | |
| Simulation time | 1197278172 ps |
| CPU time | 2.87 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:47 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3313710085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_stream_len_max.3313710085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_streaming_out.89507531 |
| Short name | T3172 |
| Test name | |
| Test status | |
| Simulation time | 3469378226 ps |
| CPU time | 31.15 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 230520 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=89507531 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 48.usbdev_streaming_out.89507531 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_timeout_missing_host_handshake.2653387547 |
| Short name | T3112 |
| Test name | |
| Test status | |
| Simulation time | 1291548930 ps |
| CPU time | 27.39 seconds |
| Started | Aug 27 07:53:28 AM UTC 24 |
| Finished | Aug 27 07:53:59 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2653387547 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_timeout_missing_host_handshake.2653387547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/48.usbdev_tx_rx_disruption.3006414130 |
| Short name | T3069 |
| Test name | |
| Test status | |
| Simulation time | 620133133 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3006414130 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 48.usbdev_t x_rx_disruption.3006414130 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/48.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/480.usbdev_tx_rx_disruption.819715666 |
| Short name | T3613 |
| Test name | |
| Test status | |
| Simulation time | 509552294 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=819715666 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 480.usbdev_t x_rx_disruption.819715666 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/480.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/481.usbdev_tx_rx_disruption.1825958230 |
| Short name | T3611 |
| Test name | |
| Test status | |
| Simulation time | 470890365 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:21 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1825958230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 481.usbdev_ tx_rx_disruption.1825958230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/481.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/482.usbdev_tx_rx_disruption.2548380252 |
| Short name | T3612 |
| Test name | |
| Test status | |
| Simulation time | 523442804 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2548380252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 482.usbdev_ tx_rx_disruption.2548380252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/482.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/483.usbdev_tx_rx_disruption.3606403420 |
| Short name | T3620 |
| Test name | |
| Test status | |
| Simulation time | 581165090 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3606403420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 483.usbdev_ tx_rx_disruption.3606403420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/483.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/484.usbdev_tx_rx_disruption.2209101558 |
| Short name | T3630 |
| Test name | |
| Test status | |
| Simulation time | 642183077 ps |
| CPU time | 2.21 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:23 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2209101558 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 484.usbdev_ tx_rx_disruption.2209101558 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/484.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/485.usbdev_tx_rx_disruption.2885763921 |
| Short name | T3617 |
| Test name | |
| Test status | |
| Simulation time | 468416611 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2885763921 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 485.usbdev_ tx_rx_disruption.2885763921 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/485.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/486.usbdev_tx_rx_disruption.2100476769 |
| Short name | T3625 |
| Test name | |
| Test status | |
| Simulation time | 609156765 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2100476769 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 486.usbdev_ tx_rx_disruption.2100476769 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/486.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/487.usbdev_tx_rx_disruption.926490430 |
| Short name | T3618 |
| Test name | |
| Test status | |
| Simulation time | 642950645 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=926490430 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 487.usbdev_t x_rx_disruption.926490430 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/487.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/488.usbdev_tx_rx_disruption.3109939046 |
| Short name | T3626 |
| Test name | |
| Test status | |
| Simulation time | 653030315 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3109939046 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 488.usbdev_ tx_rx_disruption.3109939046 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/488.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/489.usbdev_tx_rx_disruption.1408801380 |
| Short name | T3622 |
| Test name | |
| Test status | |
| Simulation time | 607499327 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1408801380 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 489.usbdev_ tx_rx_disruption.1408801380 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/489.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_alert_test.755794541 |
| Short name | T3119 |
| Test name | |
| Test status | |
| Simulation time | 71637302 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=755794541 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 49.usbdev_alert_test.755794541 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_disconnect.3836134538 |
| Short name | T3111 |
| Test name | |
| Test status | |
| Simulation time | 8820051821 ps |
| CPU time | 11.99 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3836134538 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_disconnect.3836134538 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_reset.4219989564 |
| Short name | T3157 |
| Test name | |
| Test status | |
| Simulation time | 20811361449 ps |
| CPU time | 27.35 seconds |
| Started | Aug 27 07:53:43 AM UTC 24 |
| Finished | Aug 27 07:54:12 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4219989564 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_reset.4219989564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_aon_wake_resume.160928459 |
| Short name | T3206 |
| Test name | |
| Test status | |
| Simulation time | 29387719187 ps |
| CPU time | 38.09 seconds |
| Started | Aug 27 07:53:44 AM UTC 24 |
| Finished | Aug 27 07:54:23 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=160928459 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_aon_wake_resume.160928459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_av_buffer.423301481 |
| Short name | T3067 |
| Test name | |
| Test status | |
| Simulation time | 154187349 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:53:44 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=423301481 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_av_buffer.423301481 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_bitstuff_err.1217833622 |
| Short name | T3068 |
| Test name | |
| Test status | |
| Simulation time | 159298243 ps |
| CPU time | 0.93 seconds |
| Started | Aug 27 07:53:44 AM UTC 24 |
| Finished | Aug 27 07:53:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1217833622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_bitstuff_err.1217833622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_clear.1025755862 |
| Short name | T3077 |
| Test name | |
| Test status | |
| Simulation time | 602001725 ps |
| CPU time | 2.05 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:53:49 AM UTC 24 |
| Peak memory | 218060 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1025755862 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 49.usbdev_data_toggle_clear.1025755862 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_data_toggle_restore.2808950855 |
| Short name | T3017 |
| Test name | |
| Test status | |
| Simulation time | 1052051984 ps |
| CPU time | 2.7 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:53:50 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2808950855 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_data_toggle_restore.2808950855 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_device_address.1201772647 |
| Short name | T3159 |
| Test name | |
| Test status | |
| Simulation time | 14812571138 ps |
| CPU time | 27 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1201772647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_address.1201772647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_device_timeout.2362081191 |
| Short name | T3182 |
| Test name | |
| Test status | |
| Simulation time | 1546253682 ps |
| CPU time | 30.8 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:54:18 AM UTC 24 |
| Peak memory | 218116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362081191 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_device_timeout.2362081191 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_disable_endpoint.3811449694 |
| Short name | T3079 |
| Test name | |
| Test status | |
| Simulation time | 537653098 ps |
| CPU time | 1.97 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:53:49 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3811449694 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_disable_endpoint.3811449694 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_disconnected.3584917793 |
| Short name | T3075 |
| Test name | |
| Test status | |
| Simulation time | 142722981 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:53:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3584917793 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_disconnected.3584917793 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_enable.2325897268 |
| Short name | T3074 |
| Test name | |
| Test status | |
| Simulation time | 63433494 ps |
| CPU time | 0.78 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:53:48 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2325897268 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_enable.2325897268 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_access.2213596549 |
| Short name | T3086 |
| Test name | |
| Test status | |
| Simulation time | 961288519 ps |
| CPU time | 3.39 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 218188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2213596549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_access.2213596549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_endpoint_types.1875809459 |
| Short name | T402 |
| Test name | |
| Test status | |
| Simulation time | 427852846 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1875809459 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_endpoint_types.1875809459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_fifo_rst.1528455668 |
| Short name | T3085 |
| Test name | |
| Test status | |
| Simulation time | 265006615 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1528455668 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_fifo_rst.1528455668 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_in_iso.507816664 |
| Short name | T3018 |
| Test name | |
| Test status | |
| Simulation time | 198231973 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 226368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=507816664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_in_iso.507816664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_in_stall.2224802310 |
| Short name | T3008 |
| Test name | |
| Test status | |
| Simulation time | 141271883 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224802310 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_stall.2224802310 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_in_trans.3461925352 |
| Short name | T3036 |
| Test name | |
| Test status | |
| Simulation time | 242639045 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3461925352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_in_trans.3461925352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_invalid_sync.91304642 |
| Short name | T3154 |
| Test name | |
| Test status | |
| Simulation time | 2983545314 ps |
| CPU time | 20.47 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:54:11 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=91304642 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_traf fic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 49.usbdev_invalid_sync.91304642 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_iso_retraction.2060963885 |
| Short name | T3240 |
| Test name | |
| Test status | |
| Simulation time | 4819613446 ps |
| CPU time | 51.62 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:54:43 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2060963885 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_iso_retraction.2060963885 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_link_in_err.2709778391 |
| Short name | T3071 |
| Test name | |
| Test status | |
| Simulation time | 193747579 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2709778391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_in_err.2709778391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_link_resume.2361561645 |
| Short name | T3200 |
| Test name | |
| Test status | |
| Simulation time | 25506344491 ps |
| CPU time | 31.62 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2361561645 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_link_resume.2361561645 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_link_suspend.2591224517 |
| Short name | T3113 |
| Test name | |
| Test status | |
| Simulation time | 6142524189 ps |
| CPU time | 8.09 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:53:59 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2591224517 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_link_suspend.2591224517 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_low_speed_traffic.897285228 |
| Short name | T3158 |
| Test name | |
| Test status | |
| Simulation time | 3042538515 ps |
| CPU time | 22.13 seconds |
| Started | Aug 27 07:53:49 AM UTC 24 |
| Finished | Aug 27 07:54:13 AM UTC 24 |
| Peak memory | 235200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=897285228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/co verage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_low_speed_traffic.897285228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_max_inter_pkt_delay.2899368617 |
| Short name | T3273 |
| Test name | |
| Test status | |
| Simulation time | 2424325620 ps |
| CPU time | 59.36 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:54:50 AM UTC 24 |
| Peak memory | 228668 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2899368617 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_max_inter_pkt_delay.2899368617 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_in_transaction.1747047077 |
| Short name | T3083 |
| Test name | |
| Test status | |
| Simulation time | 263614850 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1747047077 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_in_transaction.1747047077 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_max_length_out_transaction.2859903777 |
| Short name | T3084 |
| Test name | |
| Test status | |
| Simulation time | 209121510 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2859903777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_max_length_out_transaction.2859903777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_min_inter_pkt_delay.1079515198 |
| Short name | T3316 |
| Test name | |
| Test status | |
| Simulation time | 3217009150 ps |
| CPU time | 79.59 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:55:11 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1079515198 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_min_inter_pkt_delay.1079515198 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_in_transaction.4203342240 |
| Short name | T3082 |
| Test name | |
| Test status | |
| Simulation time | 149080809 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 214980 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4203342240 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_in_transaction.4203342240 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_min_length_out_transaction.4132728294 |
| Short name | T3081 |
| Test name | |
| Test status | |
| Simulation time | 151643246 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:53:50 AM UTC 24 |
| Finished | Aug 27 07:53:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4132728294 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_min_length_out_transaction.4132728294 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_nak_trans.1743908640 |
| Short name | T3093 |
| Test name | |
| Test status | |
| Simulation time | 177342685 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1743908640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_nak_trans.1743908640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_out_iso.863411495 |
| Short name | T3089 |
| Test name | |
| Test status | |
| Simulation time | 187845305 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=863411495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 49.usbdev_out_iso.863411495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_out_stall.4061511576 |
| Short name | T3090 |
| Test name | |
| Test status | |
| Simulation time | 175585374 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4061511576 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_out_stall.4061511576 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_out_trans_nak.3130112058 |
| Short name | T3088 |
| Test name | |
| Test status | |
| Simulation time | 197224894 ps |
| CPU time | 1.17 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3130112058 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_out_trans_nak.3130112058 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_pending_in_trans.2947413289 |
| Short name | T3087 |
| Test name | |
| Test status | |
| Simulation time | 143725206 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2947413289 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 49.usbdev_pending_in_trans.2947413289 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_pinflip.3758491011 |
| Short name | T3094 |
| Test name | |
| Test status | |
| Simulation time | 245919896 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3758491011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_pinflip.3758491011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_phy_config_usb_ref_disable.4083558148 |
| Short name | T3092 |
| Test name | |
| Test status | |
| Simulation time | 164390902 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:53:52 AM UTC 24 |
| Finished | Aug 27 07:53:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4083558148 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 49.usbdev_phy_config_usb_ref_disable.4083558148 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_phy_pins_sense.983083928 |
| Short name | T3101 |
| Test name | |
| Test status | |
| Simulation time | 39702774 ps |
| CPU time | 0.75 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=983083928 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_phy_pins_sense.983083928 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_buffer.503081849 |
| Short name | T3162 |
| Test name | |
| Test status | |
| Simulation time | 8221389180 ps |
| CPU time | 18.98 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=503081849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_pkt_buffer.503081849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_received.1414809816 |
| Short name | T3102 |
| Test name | |
| Test status | |
| Simulation time | 183837938 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1414809816 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 49.usbdev_pkt_received.1414809816 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_pkt_sent.2266913422 |
| Short name | T3104 |
| Test name | |
| Test status | |
| Simulation time | 280610483 ps |
| CPU time | 1 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2266913422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 49.usbdev_pkt_sent.2266913422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_in_transaction.4256006959 |
| Short name | T3109 |
| Test name | |
| Test status | |
| Simulation time | 168179874 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4256006959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 49.usbdev_random_length_in_transaction.4256006959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_random_length_out_transaction.1668163555 |
| Short name | T3106 |
| Test name | |
| Test status | |
| Simulation time | 177460693 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668163555 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 49.usbdev_random_length_out_transaction.1668163555 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_rx_crc_err.1799609363 |
| Short name | T3103 |
| Test name | |
| Test status | |
| Simulation time | 142525346 ps |
| CPU time | 0.83 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1799609363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_rx_crc_err.1799609363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_rx_full.3986454511 |
| Short name | T3110 |
| Test name | |
| Test status | |
| Simulation time | 261976382 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:53:54 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 216116 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3986454511 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 49.usbdev_rx_full.3986454511 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_setup_stage.1848434681 |
| Short name | T3105 |
| Test name | |
| Test status | |
| Simulation time | 157374276 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:53:55 AM UTC 24 |
| Finished | Aug 27 07:53:56 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1848434681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 49.usbdev_setup_stage.1848434681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_setup_trans_ignored.2114488026 |
| Short name | T3108 |
| Test name | |
| Test status | |
| Simulation time | 160989205 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:53:55 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2114488026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 49.usbdev_setup_trans_ignored.2114488026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_smoke.166849045 |
| Short name | T3107 |
| Test name | |
| Test status | |
| Simulation time | 241554434 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:53:55 AM UTC 24 |
| Finished | Aug 27 07:53:57 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=166849045 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_smoke.166849045 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_spurious_pids_ignored.139203974 |
| Short name | T3243 |
| Test name | |
| Test status | |
| Simulation time | 2061436200 ps |
| CPU time | 48.73 seconds |
| Started | Aug 27 07:53:55 AM UTC 24 |
| Finished | Aug 27 07:54:45 AM UTC 24 |
| Peak memory | 235192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=139203974 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 49.usbdev_spurious_pids_ignored.139203974 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_stall_priority_over_nak.600908233 |
| Short name | T3117 |
| Test name | |
| Test status | |
| Simulation time | 153788135 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=600908233 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stall_priority_over_nak.600908233 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_stall_trans.924251559 |
| Short name | T3116 |
| Test name | |
| Test status | |
| Simulation time | 178776323 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=924251559 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 49.usbdev_stall_trans.924251559 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_stream_len_max.2764962903 |
| Short name | T3120 |
| Test name | |
| Test status | |
| Simulation time | 457667508 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2764962903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_stream_len_max.2764962903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_streaming_out.1289425449 |
| Short name | T3275 |
| Test name | |
| Test status | |
| Simulation time | 2056756016 ps |
| CPU time | 51.2 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:51 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1289425449 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 49.usbdev_streaming_out.1289425449 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_timeout_missing_host_handshake.1406616785 |
| Short name | T3135 |
| Test name | |
| Test status | |
| Simulation time | 1060706016 ps |
| CPU time | 19.54 seconds |
| Started | Aug 27 07:53:46 AM UTC 24 |
| Finished | Aug 27 07:54:07 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406616785 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_timeout_missing_host_handshake.1406616785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/49.usbdev_tx_rx_disruption.2720846863 |
| Short name | T3122 |
| Test name | |
| Test status | |
| Simulation time | 488623379 ps |
| CPU time | 1.9 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2720846863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 49.usbdev_t x_rx_disruption.2720846863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/49.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/490.usbdev_tx_rx_disruption.1377262276 |
| Short name | T524 |
| Test name | |
| Test status | |
| Simulation time | 523353726 ps |
| CPU time | 2.09 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:23 AM UTC 24 |
| Peak memory | 217972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1377262276 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 490.usbdev_ tx_rx_disruption.1377262276 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/490.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/491.usbdev_tx_rx_disruption.61837121 |
| Short name | T3619 |
| Test name | |
| Test status | |
| Simulation time | 461921276 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=61837121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+br anch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 491.usbdev_tx _rx_disruption.61837121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/491.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/492.usbdev_tx_rx_disruption.3775948621 |
| Short name | T3623 |
| Test name | |
| Test status | |
| Simulation time | 515020388 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3775948621 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 492.usbdev_ tx_rx_disruption.3775948621 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/492.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/493.usbdev_tx_rx_disruption.3518359752 |
| Short name | T3629 |
| Test name | |
| Test status | |
| Simulation time | 640866649 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3518359752 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 493.usbdev_ tx_rx_disruption.3518359752 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/493.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/494.usbdev_tx_rx_disruption.4118021269 |
| Short name | T3631 |
| Test name | |
| Test status | |
| Simulation time | 666278432 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:23 AM UTC 24 |
| Peak memory | 216704 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4118021269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 494.usbdev_ tx_rx_disruption.4118021269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/494.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/495.usbdev_tx_rx_disruption.618248206 |
| Short name | T3628 |
| Test name | |
| Test status | |
| Simulation time | 493294678 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=618248206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 495.usbdev_t x_rx_disruption.618248206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/495.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/496.usbdev_tx_rx_disruption.669032424 |
| Short name | T3616 |
| Test name | |
| Test status | |
| Simulation time | 501113144 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=669032424 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 496.usbdev_t x_rx_disruption.669032424 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/496.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/497.usbdev_tx_rx_disruption.1192735190 |
| Short name | T3621 |
| Test name | |
| Test status | |
| Simulation time | 559015407 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:16 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1192735190 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 497.usbdev_ tx_rx_disruption.1192735190 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/497.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/498.usbdev_tx_rx_disruption.820113086 |
| Short name | T3614 |
| Test name | |
| Test status | |
| Simulation time | 471241047 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=820113086 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 498.usbdev_t x_rx_disruption.820113086 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/498.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/499.usbdev_tx_rx_disruption.1511228947 |
| Short name | T3624 |
| Test name | |
| Test status | |
| Simulation time | 520118614 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:56:19 AM UTC 24 |
| Finished | Aug 27 07:56:22 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1511228947 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 499.usbdev_ tx_rx_disruption.1511228947 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/499.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_alert_test.2369675429 |
| Short name | T726 |
| Test name | |
| Test status | |
| Simulation time | 36302063 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:40:09 AM UTC 24 |
| Finished | Aug 27 07:40:12 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2369675429 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 5.usbdev_alert_test.2369675429 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_disconnect.4204688364 |
| Short name | T686 |
| Test name | |
| Test status | |
| Simulation time | 4626912652 ps |
| CPU time | 9.02 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:39:48 AM UTC 24 |
| Peak memory | 228228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4204688364 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_disconnect.4204688364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_reset.451729014 |
| Short name | T723 |
| Test name | |
| Test status | |
| Simulation time | 20142356261 ps |
| CPU time | 31.29 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:40:11 AM UTC 24 |
| Peak memory | 218172 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=451729014 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_reset.451729014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_aon_wake_resume.1410290210 |
| Short name | T775 |
| Test name | |
| Test status | |
| Simulation time | 31280346215 ps |
| CPU time | 63.72 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:40:43 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1410290210 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_aon_wake_resume.1410290210 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_av_buffer.4173486145 |
| Short name | T679 |
| Test name | |
| Test status | |
| Simulation time | 195557175 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:39:41 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4173486145 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_av_buffer.4173486145 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_bitstuff_err.2592097600 |
| Short name | T678 |
| Test name | |
| Test status | |
| Simulation time | 141012675 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:39:38 AM UTC 24 |
| Finished | Aug 27 07:39:41 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2592097600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_bitstuff_err.2592097600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_clear.2423808849 |
| Short name | T680 |
| Test name | |
| Test status | |
| Simulation time | 336851647 ps |
| CPU time | 2.06 seconds |
| Started | Aug 27 07:39:40 AM UTC 24 |
| Finished | Aug 27 07:39:43 AM UTC 24 |
| Peak memory | 218064 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2423808849 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 5.usbdev_data_toggle_clear.2423808849 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_data_toggle_restore.1162994460 |
| Short name | T314 |
| Test name | |
| Test status | |
| Simulation time | 618332670 ps |
| CPU time | 3.14 seconds |
| Started | Aug 27 07:39:40 AM UTC 24 |
| Finished | Aug 27 07:39:44 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1162994460 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_data_toggle_restore.1162994460 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_device_timeout.147065262 |
| Short name | T727 |
| Test name | |
| Test status | |
| Simulation time | 3337923252 ps |
| CPU time | 29.67 seconds |
| Started | Aug 27 07:39:41 AM UTC 24 |
| Finished | Aug 27 07:40:12 AM UTC 24 |
| Peak memory | 218024 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=147065262 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_device_timeout.147065262 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_disable_endpoint.2224068852 |
| Short name | T683 |
| Test name | |
| Test status | |
| Simulation time | 1240277229 ps |
| CPU time | 4.69 seconds |
| Started | Aug 27 07:39:41 AM UTC 24 |
| Finished | Aug 27 07:39:47 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2224068852 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_disable_endpoint.2224068852 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_disconnected.3275264954 |
| Short name | T681 |
| Test name | |
| Test status | |
| Simulation time | 147118366 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:39:43 AM UTC 24 |
| Finished | Aug 27 07:39:45 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3275264954 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_disconnected.3275264954 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_enable.495750639 |
| Short name | T682 |
| Test name | |
| Test status | |
| Simulation time | 80626140 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:39:44 AM UTC 24 |
| Finished | Aug 27 07:39:46 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=495750639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_enable.495750639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_access.3256155204 |
| Short name | T688 |
| Test name | |
| Test status | |
| Simulation time | 911070033 ps |
| CPU time | 2.81 seconds |
| Started | Aug 27 07:39:45 AM UTC 24 |
| Finished | Aug 27 07:39:49 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3256155204 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_access.3256155204 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_endpoint_types.2254654445 |
| Short name | T395 |
| Test name | |
| Test status | |
| Simulation time | 458355052 ps |
| CPU time | 2.31 seconds |
| Started | Aug 27 07:39:47 AM UTC 24 |
| Finished | Aug 27 07:39:50 AM UTC 24 |
| Peak memory | 218040 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2254654445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_endpoint_types.2254654445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_fifo_rst.2387564223 |
| Short name | T691 |
| Test name | |
| Test status | |
| Simulation time | 310672325 ps |
| CPU time | 3.17 seconds |
| Started | Aug 27 07:39:47 AM UTC 24 |
| Finished | Aug 27 07:39:51 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2387564223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_fifo_rst.2387564223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_in_iso.2465697252 |
| Short name | T690 |
| Test name | |
| Test status | |
| Simulation time | 256530190 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:39:48 AM UTC 24 |
| Finished | Aug 27 07:39:51 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2465697252 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 5.usbdev_in_iso.2465697252 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_in_stall.3354726945 |
| Short name | T694 |
| Test name | |
| Test status | |
| Simulation time | 184270734 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:39:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3354726945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_stall.3354726945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_in_trans.1556801266 |
| Short name | T698 |
| Test name | |
| Test status | |
| Simulation time | 212505549 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:39:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1556801266 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_in_trans.1556801266 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_invalid_sync.3032552772 |
| Short name | T748 |
| Test name | |
| Test status | |
| Simulation time | 3493283338 ps |
| CPU time | 34.72 seconds |
| Started | Aug 27 07:39:48 AM UTC 24 |
| Finished | Aug 27 07:40:24 AM UTC 24 |
| Peak memory | 235208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032552772 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_invalid_sync.3032552772 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_iso_retraction.1465697031 |
| Short name | T826 |
| Test name | |
| Test status | |
| Simulation time | 10761037487 ps |
| CPU time | 83.48 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:41:18 AM UTC 24 |
| Peak memory | 218248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1465697031 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_iso_retraction.1465697031 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_link_in_err.3049181049 |
| Short name | T697 |
| Test name | |
| Test status | |
| Simulation time | 227319511 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:39:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3049181049 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_in_err.3049181049 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_link_resume.1308980503 |
| Short name | T771 |
| Test name | |
| Test status | |
| Simulation time | 26527046222 ps |
| CPU time | 47.15 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:40:41 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308980503 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_link_resume.1308980503 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_link_suspend.3468792124 |
| Short name | T112 |
| Test name | |
| Test status | |
| Simulation time | 5188265398 ps |
| CPU time | 9.92 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 228360 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3468792124 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_link_suspend.3468792124 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_low_speed_traffic.1090708039 |
| Short name | T735 |
| Test name | |
| Test status | |
| Simulation time | 2543109158 ps |
| CPU time | 25.09 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:40:19 AM UTC 24 |
| Peak memory | 235244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1090708039 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_low_speed_traffic.1090708039 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_max_inter_pkt_delay.4112644158 |
| Short name | T732 |
| Test name | |
| Test status | |
| Simulation time | 2498425621 ps |
| CPU time | 23.86 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:40:17 AM UTC 24 |
| Peak memory | 235180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4112644158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_inter_pkt_delay.4112644158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_in_transaction.1758029393 |
| Short name | T700 |
| Test name | |
| Test status | |
| Simulation time | 246905140 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:39:52 AM UTC 24 |
| Finished | Aug 27 07:39:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1758029393 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_in_transaction.1758029393 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_max_length_out_transaction.1380163390 |
| Short name | T696 |
| Test name | |
| Test status | |
| Simulation time | 210459187 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:39:53 AM UTC 24 |
| Finished | Aug 27 07:39:55 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1380163390 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_max_length_out_transaction.1380163390 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_max_non_iso_usb_traffic.1839592358 |
| Short name | T743 |
| Test name | |
| Test status | |
| Simulation time | 3351261595 ps |
| CPU time | 27.13 seconds |
| Started | Aug 27 07:39:54 AM UTC 24 |
| Finished | Aug 27 07:40:22 AM UTC 24 |
| Peak memory | 235368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1839592358 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_non_iso_usb_traffic.1839592358 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_max_usb_traffic.608334730 |
| Short name | T831 |
| Test name | |
| Test status | |
| Simulation time | 3011612780 ps |
| CPU time | 83.49 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:41:21 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=608334730 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_max_usb_traffic.608334730 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_min_inter_pkt_delay.3767537365 |
| Short name | T728 |
| Test name | |
| Test status | |
| Simulation time | 2176876066 ps |
| CPU time | 17.35 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:40:15 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3767537365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_min_inter_pkt_delay.3767537365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_in_transaction.1806705319 |
| Short name | T702 |
| Test name | |
| Test status | |
| Simulation time | 223519908 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:39:59 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1806705319 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_in_transaction.1806705319 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_min_length_out_transaction.1439244627 |
| Short name | T701 |
| Test name | |
| Test status | |
| Simulation time | 168289724 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:39:59 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1439244627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 5.usbdev_min_length_out_transaction.1439244627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_nak_trans.446935229 |
| Short name | T145 |
| Test name | |
| Test status | |
| Simulation time | 205524023 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:39:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=446935229 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_nak_trans.446935229 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_out_iso.3418365369 |
| Short name | T703 |
| Test name | |
| Test status | |
| Simulation time | 203467853 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:39:59 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3418365369 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_out_iso.3418365369 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_out_stall.1151075647 |
| Short name | T704 |
| Test name | |
| Test status | |
| Simulation time | 196477358 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:39:56 AM UTC 24 |
| Finished | Aug 27 07:39:59 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151075647 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_out_stall.1151075647 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_out_trans_nak.457967940 |
| Short name | T706 |
| Test name | |
| Test status | |
| Simulation time | 153992554 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:39:58 AM UTC 24 |
| Finished | Aug 27 07:40:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=457967940 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_out_trans_nak.457967940 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_pending_in_trans.2373547959 |
| Short name | T705 |
| Test name | |
| Test status | |
| Simulation time | 152628028 ps |
| CPU time | 1.23 seconds |
| Started | Aug 27 07:39:58 AM UTC 24 |
| Finished | Aug 27 07:40:01 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2373547959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 5.usbdev_pending_in_trans.2373547959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_pinflip.1151968823 |
| Short name | T710 |
| Test name | |
| Test status | |
| Simulation time | 192497608 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:40:00 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 215916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1151968823 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_config_pinflip.1151968823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_phy_config_usb_ref_disable.821669574 |
| Short name | T708 |
| Test name | |
| Test status | |
| Simulation time | 155658246 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:40:00 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=821669574 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_disa ble_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.v db -cm_log /dev/null -cm_name 5.usbdev_phy_config_usb_ref_disable.821669574 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_phy_pins_sense.4029662750 |
| Short name | T47 |
| Test name | |
| Test status | |
| Simulation time | 42120435 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:40:00 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4029662750 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_phy_pins_sense.4029662750 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_buffer.1779297026 |
| Short name | T265 |
| Test name | |
| Test status | |
| Simulation time | 22393969381 ps |
| CPU time | 61.71 seconds |
| Started | Aug 27 07:40:00 AM UTC 24 |
| Finished | Aug 27 07:41:04 AM UTC 24 |
| Peak memory | 232664 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1779297026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_pkt_buffer.1779297026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_received.2754306945 |
| Short name | T709 |
| Test name | |
| Test status | |
| Simulation time | 153181753 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:40:01 AM UTC 24 |
| Finished | Aug 27 07:40:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2754306945 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 5.usbdev_pkt_received.2754306945 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_pkt_sent.1473339344 |
| Short name | T711 |
| Test name | |
| Test status | |
| Simulation time | 225282165 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:40:02 AM UTC 24 |
| Finished | Aug 27 07:40:04 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1473339344 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 5.usbdev_pkt_sent.1473339344 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rand_bus_resets.3660266248 |
| Short name | T801 |
| Test name | |
| Test status | |
| Simulation time | 5423331644 ps |
| CPU time | 57.57 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:41:03 AM UTC 24 |
| Peak memory | 230660 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3660266248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_bus_resets.3660266248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rand_suspends.2748088230 |
| Short name | T870 |
| Test name | |
| Test status | |
| Simulation time | 7212285092 ps |
| CPU time | 100.19 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:41:46 AM UTC 24 |
| Peak memory | 230652 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2748088230 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_rand_suspends.2748088230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_in_transaction.1597799169 |
| Short name | T712 |
| Test name | |
| Test status | |
| Simulation time | 212865631 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:40:02 AM UTC 24 |
| Finished | Aug 27 07:40:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1597799169 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 5.usbdev_random_length_in_transaction.1597799169 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_random_length_out_transaction.83512854 |
| Short name | T715 |
| Test name | |
| Test status | |
| Simulation time | 199989325 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:40:07 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=83512854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_transa ction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 5.usbdev_random_length_out_transaction.83512854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_resume_link_active.1668707405 |
| Short name | T774 |
| Test name | |
| Test status | |
| Simulation time | 20160404117 ps |
| CPU time | 37.28 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:40:43 AM UTC 24 |
| Peak memory | 218092 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1668707405 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_resume_link_active.1668707405 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rx_crc_err.3829167924 |
| Short name | T714 |
| Test name | |
| Test status | |
| Simulation time | 191618674 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:40:06 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3829167924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_rx_crc_err.3829167924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_rx_full.1263544741 |
| Short name | T716 |
| Test name | |
| Test status | |
| Simulation time | 317873786 ps |
| CPU time | 1.92 seconds |
| Started | Aug 27 07:40:04 AM UTC 24 |
| Finished | Aug 27 07:40:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1263544741 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 5.usbdev_rx_full.1263544741 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_setup_stage.3892273101 |
| Short name | T718 |
| Test name | |
| Test status | |
| Simulation time | 147740686 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:40:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3892273101 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 5.usbdev_setup_stage.3892273101 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_setup_trans_ignored.135302676 |
| Short name | T717 |
| Test name | |
| Test status | |
| Simulation time | 151798154 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:40:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=135302676 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 5.usbdev_setup_trans_ignored.135302676 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_smoke.2990624796 |
| Short name | T720 |
| Test name | |
| Test status | |
| Simulation time | 243800450 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:40:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2990624796 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_smoke.2990624796 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_spurious_pids_ignored.514365440 |
| Short name | T851 |
| Test name | |
| Test status | |
| Simulation time | 3332486209 ps |
| CPU time | 87.55 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:41:36 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=514365440 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad _traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 5.usbdev_spurious_pids_ignored.514365440 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_stall_priority_over_nak.1406511365 |
| Short name | T719 |
| Test name | |
| Test status | |
| Simulation time | 161846157 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:40:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1406511365 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stall_priority_over_nak.1406511365 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_stall_trans.691348799 |
| Short name | T721 |
| Test name | |
| Test status | |
| Simulation time | 201871258 ps |
| CPU time | 1.64 seconds |
| Started | Aug 27 07:40:06 AM UTC 24 |
| Finished | Aug 27 07:40:09 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=691348799 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 5.usbdev_stall_trans.691348799 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_stream_len_max.3653173364 |
| Short name | T724 |
| Test name | |
| Test status | |
| Simulation time | 985782996 ps |
| CPU time | 2.48 seconds |
| Started | Aug 27 07:40:08 AM UTC 24 |
| Finished | Aug 27 07:40:11 AM UTC 24 |
| Peak memory | 218100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3653173364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_stream_len_max.3653173364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_streaming_out.4150720891 |
| Short name | T885 |
| Test name | |
| Test status | |
| Simulation time | 3248455189 ps |
| CPU time | 102.91 seconds |
| Started | Aug 27 07:40:08 AM UTC 24 |
| Finished | Aug 27 07:41:53 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4150720891 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 5.usbdev_streaming_out.4150720891 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_timeout_missing_host_handshake.1054857787 |
| Short name | T741 |
| Test name | |
| Test status | |
| Simulation time | 4787651168 ps |
| CPU time | 38.64 seconds |
| Started | Aug 27 07:39:41 AM UTC 24 |
| Finished | Aug 27 07:40:22 AM UTC 24 |
| Peak memory | 217904 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1054857787 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_timeout_missing_host_handshake.1054857787 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/5.usbdev_tx_rx_disruption.2146589285 |
| Short name | T184 |
| Test name | |
| Test status | |
| Simulation time | 497709907 ps |
| CPU time | 2.32 seconds |
| Started | Aug 27 07:40:09 AM UTC 24 |
| Finished | Aug 27 07:40:13 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2146589285 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 5.usbdev_tx _rx_disruption.2146589285 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/5.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/50.usbdev_endpoint_types.4294743553 |
| Short name | T3121 |
| Test name | |
| Test status | |
| Simulation time | 371955302 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4294743553 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_endpoint_types.4294743553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/50.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/50.usbdev_tx_rx_disruption.3197672054 |
| Short name | T3129 |
| Test name | |
| Test status | |
| Simulation time | 528868067 ps |
| CPU time | 2.33 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3197672054 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 50.usbdev_t x_rx_disruption.3197672054 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/50.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/51.usbdev_endpoint_types.2126135085 |
| Short name | T462 |
| Test name | |
| Test status | |
| Simulation time | 344198317 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2126135085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_endpoint_types.2126135085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/51.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/51.usbdev_tx_rx_disruption.3330563427 |
| Short name | T3124 |
| Test name | |
| Test status | |
| Simulation time | 487656068 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3330563427 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 51.usbdev_t x_rx_disruption.3330563427 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/51.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/52.usbdev_endpoint_types.626707993 |
| Short name | T369 |
| Test name | |
| Test status | |
| Simulation time | 726063085 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=626707993 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 52.usbdev_endpoint_types.626707993 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/52.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/52.usbdev_tx_rx_disruption.3344784766 |
| Short name | T3130 |
| Test name | |
| Test status | |
| Simulation time | 449624366 ps |
| CPU time | 2.18 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3344784766 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 52.usbdev_t x_rx_disruption.3344784766 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/52.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/53.usbdev_endpoint_types.1650587732 |
| Short name | T454 |
| Test name | |
| Test status | |
| Simulation time | 487724988 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1650587732 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_endpoint_types.1650587732 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/53.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/53.usbdev_tx_rx_disruption.292998678 |
| Short name | T3126 |
| Test name | |
| Test status | |
| Simulation time | 483972671 ps |
| CPU time | 1.87 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=292998678 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 53.usbdev_tx _rx_disruption.292998678 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/53.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/54.usbdev_endpoint_types.3365448207 |
| Short name | T473 |
| Test name | |
| Test status | |
| Simulation time | 186162726 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3365448207 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_endpoint_types.3365448207 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/54.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/54.usbdev_tx_rx_disruption.3574867562 |
| Short name | T3127 |
| Test name | |
| Test status | |
| Simulation time | 514050773 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3574867562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 54.usbdev_t x_rx_disruption.3574867562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/54.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/55.usbdev_endpoint_types.1661194040 |
| Short name | T488 |
| Test name | |
| Test status | |
| Simulation time | 212404553 ps |
| CPU time | 1.19 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:01 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1661194040 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_endpoint_types.1661194040 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/55.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/55.usbdev_tx_rx_disruption.855021029 |
| Short name | T3123 |
| Test name | |
| Test status | |
| Simulation time | 501781707 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=855021029 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 55.usbdev_tx _rx_disruption.855021029 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/55.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/56.usbdev_endpoint_types.3455030052 |
| Short name | T498 |
| Test name | |
| Test status | |
| Simulation time | 392346996 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 215740 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3455030052 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_endpoint_types.3455030052 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/56.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/56.usbdev_tx_rx_disruption.4275895830 |
| Short name | T3125 |
| Test name | |
| Test status | |
| Simulation time | 494536072 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4275895830 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 56.usbdev_t x_rx_disruption.4275895830 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/56.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/57.usbdev_endpoint_types.1574734172 |
| Short name | T360 |
| Test name | |
| Test status | |
| Simulation time | 438243885 ps |
| CPU time | 1.95 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1574734172 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_endpoint_types.1574734172 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/57.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/57.usbdev_tx_rx_disruption.1804317825 |
| Short name | T3128 |
| Test name | |
| Test status | |
| Simulation time | 607637653 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:53:59 AM UTC 24 |
| Finished | Aug 27 07:54:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1804317825 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 57.usbdev_t x_rx_disruption.1804317825 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/57.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/58.usbdev_tx_rx_disruption.130365107 |
| Short name | T3132 |
| Test name | |
| Test status | |
| Simulation time | 670197061 ps |
| CPU time | 1.86 seconds |
| Started | Aug 27 07:54:01 AM UTC 24 |
| Finished | Aug 27 07:54:04 AM UTC 24 |
| Peak memory | 216112 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=130365107 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 58.usbdev_tx _rx_disruption.130365107 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/58.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/59.usbdev_endpoint_types.4067142386 |
| Short name | T388 |
| Test name | |
| Test status | |
| Simulation time | 380807479 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:54:01 AM UTC 24 |
| Finished | Aug 27 07:54:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4067142386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_endpoint_types.4067142386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/59.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/59.usbdev_tx_rx_disruption.266645391 |
| Short name | T3134 |
| Test name | |
| Test status | |
| Simulation time | 621042732 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:54:01 AM UTC 24 |
| Finished | Aug 27 07:54:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=266645391 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 59.usbdev_tx _rx_disruption.266645391 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/59.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_alert_test.1502126525 |
| Short name | T725 |
| Test name | |
| Test status | |
| Simulation time | 39587523 ps |
| CPU time | 1.04 seconds |
| Started | Aug 27 07:40:45 AM UTC 24 |
| Finished | Aug 27 07:40:47 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1502126525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 6.usbdev_alert_test.1502126525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_disconnect.2599320919 |
| Short name | T739 |
| Test name | |
| Test status | |
| Simulation time | 5249269449 ps |
| CPU time | 10.44 seconds |
| Started | Aug 27 07:40:09 AM UTC 24 |
| Finished | Aug 27 07:40:21 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599320919 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_disconnect.2599320919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_reset.4126695043 |
| Short name | T756 |
| Test name | |
| Test status | |
| Simulation time | 15270062499 ps |
| CPU time | 19.05 seconds |
| Started | Aug 27 07:40:11 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4126695043 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_reset.4126695043 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_aon_wake_resume.698416464 |
| Short name | T104 |
| Test name | |
| Test status | |
| Simulation time | 23808365561 ps |
| CPU time | 37.52 seconds |
| Started | Aug 27 07:40:11 AM UTC 24 |
| Finished | Aug 27 07:40:50 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=698416464 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_aon_wake_resume.698416464 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_av_buffer.3101401014 |
| Short name | T730 |
| Test name | |
| Test status | |
| Simulation time | 230907288 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:40:13 AM UTC 24 |
| Finished | Aug 27 07:40:15 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3101401014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_av_buffer.3101401014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_bitstuff_err.1226426445 |
| Short name | T729 |
| Test name | |
| Test status | |
| Simulation time | 172316754 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:40:13 AM UTC 24 |
| Finished | Aug 27 07:40:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1226426445 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_bitstuff_err.1226426445 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_clear.2853556847 |
| Short name | T731 |
| Test name | |
| Test status | |
| Simulation time | 392566265 ps |
| CPU time | 2.31 seconds |
| Started | Aug 27 07:40:13 AM UTC 24 |
| Finished | Aug 27 07:40:16 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2853556847 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 6.usbdev_data_toggle_clear.2853556847 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_data_toggle_restore.3739054579 |
| Short name | T325 |
| Test name | |
| Test status | |
| Simulation time | 816581351 ps |
| CPU time | 4.07 seconds |
| Started | Aug 27 07:40:13 AM UTC 24 |
| Finished | Aug 27 07:40:18 AM UTC 24 |
| Peak memory | 218276 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3739054579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_data_toggle_restore.3739054579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_device_address.3727397242 |
| Short name | T193 |
| Test name | |
| Test status | |
| Simulation time | 45735944575 ps |
| CPU time | 94.55 seconds |
| Started | Aug 27 07:40:13 AM UTC 24 |
| Finished | Aug 27 07:41:49 AM UTC 24 |
| Peak memory | 218232 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3727397242 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_address.3727397242 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_device_timeout.3034757447 |
| Short name | T776 |
| Test name | |
| Test status | |
| Simulation time | 3640931786 ps |
| CPU time | 28.54 seconds |
| Started | Aug 27 07:40:14 AM UTC 24 |
| Finished | Aug 27 07:40:44 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3034757447 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_device_timeout.3034757447 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_disable_endpoint.484003343 |
| Short name | T736 |
| Test name | |
| Test status | |
| Simulation time | 647706366 ps |
| CPU time | 2.93 seconds |
| Started | Aug 27 07:40:16 AM UTC 24 |
| Finished | Aug 27 07:40:20 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=484003343 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_disable_endpoint.484003343 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_disconnected.1822874024 |
| Short name | T734 |
| Test name | |
| Test status | |
| Simulation time | 157906542 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:40:16 AM UTC 24 |
| Finished | Aug 27 07:40:18 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822874024 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_disconnected.1822874024 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_enable.3647277223 |
| Short name | T733 |
| Test name | |
| Test status | |
| Simulation time | 29901062 ps |
| CPU time | 1.1 seconds |
| Started | Aug 27 07:40:16 AM UTC 24 |
| Finished | Aug 27 07:40:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3647277223 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 6.usbdev_enable.3647277223 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_access.1664373664 |
| Short name | T745 |
| Test name | |
| Test status | |
| Simulation time | 943043118 ps |
| CPU time | 4.11 seconds |
| Started | Aug 27 07:40:17 AM UTC 24 |
| Finished | Aug 27 07:40:22 AM UTC 24 |
| Peak memory | 218132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1664373664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_access.1664373664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_endpoint_types.989491026 |
| Short name | T359 |
| Test name | |
| Test status | |
| Simulation time | 354575949 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:40:17 AM UTC 24 |
| Finished | Aug 27 07:40:20 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=989491026 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_endpoint_types.989491026 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_fifo_rst.921306712 |
| Short name | T744 |
| Test name | |
| Test status | |
| Simulation time | 174641033 ps |
| CPU time | 2.39 seconds |
| Started | Aug 27 07:40:19 AM UTC 24 |
| Finished | Aug 27 07:40:22 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=921306712 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_fifo_rst.921306712 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_in_iso.4210241121 |
| Short name | T740 |
| Test name | |
| Test status | |
| Simulation time | 180785881 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:40:19 AM UTC 24 |
| Finished | Aug 27 07:40:21 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4210241121 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_in_iso.4210241121 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_in_stall.4008966476 |
| Short name | T738 |
| Test name | |
| Test status | |
| Simulation time | 204311220 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:40:19 AM UTC 24 |
| Finished | Aug 27 07:40:21 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4008966476 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_stall.4008966476 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_in_trans.1474425919 |
| Short name | T746 |
| Test name | |
| Test status | |
| Simulation time | 177529970 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:40:20 AM UTC 24 |
| Finished | Aug 27 07:40:23 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1474425919 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_in_trans.1474425919 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_invalid_sync.868396142 |
| Short name | T797 |
| Test name | |
| Test status | |
| Simulation time | 4129547312 ps |
| CPU time | 37.76 seconds |
| Started | Aug 27 07:40:19 AM UTC 24 |
| Finished | Aug 27 07:40:58 AM UTC 24 |
| Peak memory | 228612 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=868396142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tra ffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_invalid_sync.868396142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_iso_retraction.197755323 |
| Short name | T824 |
| Test name | |
| Test status | |
| Simulation time | 4946930389 ps |
| CPU time | 54.79 seconds |
| Started | Aug 27 07:40:21 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=197755323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 6.usbdev_iso_retraction.197755323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_link_in_err.878700886 |
| Short name | T747 |
| Test name | |
| Test status | |
| Simulation time | 188954708 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:40:21 AM UTC 24 |
| Finished | Aug 27 07:40:23 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=878700886 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_link_in_err.878700886 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_link_resume.1136607878 |
| Short name | T813 |
| Test name | |
| Test status | |
| Simulation time | 30921799242 ps |
| CPU time | 46.64 seconds |
| Started | Aug 27 07:40:23 AM UTC 24 |
| Finished | Aug 27 07:41:12 AM UTC 24 |
| Peak memory | 218260 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1136607878 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_link_resume.1136607878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_link_suspend.3047849023 |
| Short name | T722 |
| Test name | |
| Test status | |
| Simulation time | 10242846961 ps |
| CPU time | 21.54 seconds |
| Started | Aug 27 07:40:23 AM UTC 24 |
| Finished | Aug 27 07:40:46 AM UTC 24 |
| Peak memory | 218272 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3047849023 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 6.usbdev_link_suspend.3047849023 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_low_speed_traffic.1379458081 |
| Short name | T783 |
| Test name | |
| Test status | |
| Simulation time | 3685534435 ps |
| CPU time | 25.42 seconds |
| Started | Aug 27 07:40:23 AM UTC 24 |
| Finished | Aug 27 07:40:50 AM UTC 24 |
| Peak memory | 235320 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1379458081 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_low_speed_traffic.1379458081 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_max_inter_pkt_delay.2553081014 |
| Short name | T779 |
| Test name | |
| Test status | |
| Simulation time | 1779403312 ps |
| CPU time | 20.63 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:46 AM UTC 24 |
| Peak memory | 235120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553081014 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_inter_pkt_delay.2553081014 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_in_transaction.525017606 |
| Short name | T751 |
| Test name | |
| Test status | |
| Simulation time | 242507918 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:27 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=525017606 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_in_transaction.525017606 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_max_length_out_transaction.1993275909 |
| Short name | T752 |
| Test name | |
| Test status | |
| Simulation time | 257762180 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1993275909 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_max_length_out_transaction.1993275909 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_max_non_iso_usb_traffic.941944664 |
| Short name | T766 |
| Test name | |
| Test status | |
| Simulation time | 1706919257 ps |
| CPU time | 12.31 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:37 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=941944664 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_non_iso_usb_traffic.941944664 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_max_usb_traffic.2362993326 |
| Short name | T877 |
| Test name | |
| Test status | |
| Simulation time | 2906462506 ps |
| CPU time | 83.76 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:41:50 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2362993326 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_max_usb_traffic.2362993326 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_min_inter_pkt_delay.3407217527 |
| Short name | T772 |
| Test name | |
| Test status | |
| Simulation time | 2115104528 ps |
| CPU time | 16.11 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:41 AM UTC 24 |
| Peak memory | 230316 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3407217527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_min_inter_pkt_delay.3407217527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_in_transaction.3215589110 |
| Short name | T750 |
| Test name | |
| Test status | |
| Simulation time | 153394795 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:40:24 AM UTC 24 |
| Finished | Aug 27 07:40:26 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3215589110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_in_transaction.3215589110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_min_length_out_transaction.2804605227 |
| Short name | T753 |
| Test name | |
| Test status | |
| Simulation time | 153098704 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:40:25 AM UTC 24 |
| Finished | Aug 27 07:40:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2804605227 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_min_length_out_transaction.2804605227 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_nak_trans.397378280 |
| Short name | T152 |
| Test name | |
| Test status | |
| Simulation time | 193952483 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:40:25 AM UTC 24 |
| Finished | Aug 27 07:40:28 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=397378280 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_nak_trans.397378280 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_out_iso.3485130687 |
| Short name | T755 |
| Test name | |
| Test status | |
| Simulation time | 189198942 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:40:27 AM UTC 24 |
| Finished | Aug 27 07:40:30 AM UTC 24 |
| Peak memory | 216052 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3485130687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_out_iso.3485130687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_out_stall.2426757742 |
| Short name | T754 |
| Test name | |
| Test status | |
| Simulation time | 180866047 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:40:27 AM UTC 24 |
| Finished | Aug 27 07:40:29 AM UTC 24 |
| Peak memory | 216096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2426757742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_out_stall.2426757742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_out_trans_nak.3920472069 |
| Short name | T758 |
| Test name | |
| Test status | |
| Simulation time | 153509258 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:40:28 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3920472069 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_out_trans_nak.3920472069 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_pending_in_trans.573242656 |
| Short name | T195 |
| Test name | |
| Test status | |
| Simulation time | 155627201 ps |
| CPU time | 1.03 seconds |
| Started | Aug 27 07:40:29 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=573242656 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_pending_in_trans.573242656 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_pinflip.1128865431 |
| Short name | T760 |
| Test name | |
| Test status | |
| Simulation time | 230052145 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:40:29 AM UTC 24 |
| Finished | Aug 27 07:40:32 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1128865431 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_pinflip.1128865431 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_phy_config_usb_ref_disable.3124305433 |
| Short name | T757 |
| Test name | |
| Test status | |
| Simulation time | 193219391 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:40:29 AM UTC 24 |
| Finished | Aug 27 07:40:31 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3124305433 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 6.usbdev_phy_config_usb_ref_disable.3124305433 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_phy_pins_sense.2004643025 |
| Short name | T761 |
| Test name | |
| Test status | |
| Simulation time | 71259503 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:40:31 AM UTC 24 |
| Finished | Aug 27 07:40:33 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2004643025 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_phy_pins_sense.2004643025 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_buffer.2867570690 |
| Short name | T852 |
| Test name | |
| Test status | |
| Simulation time | 22813204239 ps |
| CPU time | 63.92 seconds |
| Started | Aug 27 07:40:31 AM UTC 24 |
| Finished | Aug 27 07:41:37 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867570690 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_pkt_buffer.2867570690 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_received.535229908 |
| Short name | T762 |
| Test name | |
| Test status | |
| Simulation time | 190016023 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:40:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=535229908 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 6.usbdev_pkt_received.535229908 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_pkt_sent.2708801420 |
| Short name | T763 |
| Test name | |
| Test status | |
| Simulation time | 219844160 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:40:36 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2708801420 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 6.usbdev_pkt_sent.2708801420 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_disconnects.504102006 |
| Short name | T919 |
| Test name | |
| Test status | |
| Simulation time | 3673478572 ps |
| CPU time | 95.63 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:42:12 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=504102006 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_disconnects.504102006 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_rand_bus_resets.2554779622 |
| Short name | T828 |
| Test name | |
| Test status | |
| Simulation time | 7087359546 ps |
| CPU time | 96.15 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:42:12 AM UTC 24 |
| Peak memory | 230516 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2554779622 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_bus_resets.2554779622 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_rand_suspends.2409229939 |
| Short name | T884 |
| Test name | |
| Test status | |
| Simulation time | 11059835661 ps |
| CPU time | 75.79 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:41:52 AM UTC 24 |
| Peak memory | 230572 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409229939 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_rand_suspends.2409229939 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_in_transaction.1434879015 |
| Short name | T765 |
| Test name | |
| Test status | |
| Simulation time | 184164291 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:40:36 AM UTC 24 |
| Peak memory | 216100 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1434879015 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 6.usbdev_random_length_in_transaction.1434879015 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_random_length_out_transaction.3481495843 |
| Short name | T764 |
| Test name | |
| Test status | |
| Simulation time | 190758360 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:40:36 AM UTC 24 |
| Peak memory | 216056 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3481495843 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 6.usbdev_random_length_out_transaction.3481495843 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_resume_link_active.3397314973 |
| Short name | T805 |
| Test name | |
| Test status | |
| Simulation time | 20222405980 ps |
| CPU time | 30.95 seconds |
| Started | Aug 27 07:40:34 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3397314973 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_resume_link_active.3397314973 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_rx_crc_err.2955984607 |
| Short name | T769 |
| Test name | |
| Test status | |
| Simulation time | 197448893 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:40:37 AM UTC 24 |
| Finished | Aug 27 07:40:40 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2955984607 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_rx_crc_err.2955984607 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_rx_full.1731084132 |
| Short name | T60 |
| Test name | |
| Test status | |
| Simulation time | 252640594 ps |
| CPU time | 1.8 seconds |
| Started | Aug 27 07:40:38 AM UTC 24 |
| Finished | Aug 27 07:40:40 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1731084132 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 6.usbdev_rx_full.1731084132 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_setup_stage.866407378 |
| Short name | T770 |
| Test name | |
| Test status | |
| Simulation time | 145969121 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:40:38 AM UTC 24 |
| Finished | Aug 27 07:40:40 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=866407378 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_setup_stage.866407378 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_setup_trans_ignored.440544398 |
| Short name | T768 |
| Test name | |
| Test status | |
| Simulation time | 157758826 ps |
| CPU time | 0.94 seconds |
| Started | Aug 27 07:40:38 AM UTC 24 |
| Finished | Aug 27 07:40:40 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=440544398 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 6.usbdev_setup_trans_ignored.440544398 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_smoke.12567272 |
| Short name | T773 |
| Test name | |
| Test status | |
| Simulation time | 225641095 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:40:39 AM UTC 24 |
| Finished | Aug 27 07:40:41 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=12567272 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null - cm_name 6.usbdev_smoke.12567272 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_spurious_pids_ignored.4016055841 |
| Short name | T907 |
| Test name | |
| Test status | |
| Simulation time | 3004934574 ps |
| CPU time | 82.1 seconds |
| Started | Aug 27 07:40:39 AM UTC 24 |
| Finished | Aug 27 07:42:03 AM UTC 24 |
| Peak memory | 230600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4016055841 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 6.usbdev_spurious_pids_ignored.4016055841 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_stall_priority_over_nak.196262859 |
| Short name | T777 |
| Test name | |
| Test status | |
| Simulation time | 183415733 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:40:43 AM UTC 24 |
| Finished | Aug 27 07:40:45 AM UTC 24 |
| Peak memory | 215576 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=196262859 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stall_priority_over_nak.196262859 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_stall_trans.418110655 |
| Short name | T778 |
| Test name | |
| Test status | |
| Simulation time | 173583438 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:40:43 AM UTC 24 |
| Finished | Aug 27 07:40:45 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=418110655 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 6.usbdev_stall_trans.418110655 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_stream_len_max.2733720956 |
| Short name | T781 |
| Test name | |
| Test status | |
| Simulation time | 1290620538 ps |
| CPU time | 5.58 seconds |
| Started | Aug 27 07:40:43 AM UTC 24 |
| Finished | Aug 27 07:40:49 AM UTC 24 |
| Peak memory | 218104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2733720956 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_stream_len_max.2733720956 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_streaming_out.1078074913 |
| Short name | T890 |
| Test name | |
| Test status | |
| Simulation time | 2369187723 ps |
| CPU time | 69.41 seconds |
| Started | Aug 27 07:40:43 AM UTC 24 |
| Finished | Aug 27 07:41:54 AM UTC 24 |
| Peak memory | 228600 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1078074913 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 6.usbdev_streaming_out.1078074913 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_timeout_missing_host_handshake.3545388561 |
| Short name | T767 |
| Test name | |
| Test status | |
| Simulation time | 3631403395 ps |
| CPU time | 22.58 seconds |
| Started | Aug 27 07:40:14 AM UTC 24 |
| Finished | Aug 27 07:40:38 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3545388561 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_timeout_missing_host_handshake.3545388561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/6.usbdev_tx_rx_disruption.125909333 |
| Short name | T780 |
| Test name | |
| Test status | |
| Simulation time | 519722994 ps |
| CPU time | 2.25 seconds |
| Started | Aug 27 07:40:45 AM UTC 24 |
| Finished | Aug 27 07:40:48 AM UTC 24 |
| Peak memory | 217876 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=125909333 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 6.usbdev_tx_ rx_disruption.125909333 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/6.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/60.usbdev_endpoint_types.3415294563 |
| Short name | T3131 |
| Test name | |
| Test status | |
| Simulation time | 288297265 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:54:01 AM UTC 24 |
| Finished | Aug 27 07:54:03 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3415294563 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_endpoint_types.3415294563 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/60.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/60.usbdev_tx_rx_disruption.1204549579 |
| Short name | T3133 |
| Test name | |
| Test status | |
| Simulation time | 654466673 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:54:01 AM UTC 24 |
| Finished | Aug 27 07:54:04 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1204549579 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 60.usbdev_t x_rx_disruption.1204549579 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/60.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/61.usbdev_endpoint_types.1103489548 |
| Short name | T413 |
| Test name | |
| Test status | |
| Simulation time | 511504420 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 215860 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1103489548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_endpoint_types.1103489548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/61.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/61.usbdev_tx_rx_disruption.3294020394 |
| Short name | T3137 |
| Test name | |
| Test status | |
| Simulation time | 559825730 ps |
| CPU time | 1.46 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 215780 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3294020394 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 61.usbdev_t x_rx_disruption.3294020394 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/61.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/62.usbdev_endpoint_types.870382874 |
| Short name | T3136 |
| Test name | |
| Test status | |
| Simulation time | 345392740 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216080 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=870382874 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 62.usbdev_endpoint_types.870382874 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/62.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/62.usbdev_tx_rx_disruption.3827018809 |
| Short name | T3140 |
| Test name | |
| Test status | |
| Simulation time | 579531370 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3827018809 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 62.usbdev_t x_rx_disruption.3827018809 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/62.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/63.usbdev_tx_rx_disruption.668639583 |
| Short name | T2954 |
| Test name | |
| Test status | |
| Simulation time | 576794399 ps |
| CPU time | 1.97 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=668639583 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 63.usbdev_tx _rx_disruption.668639583 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/63.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/64.usbdev_endpoint_types.608523134 |
| Short name | T482 |
| Test name | |
| Test status | |
| Simulation time | 527438891 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=608523134 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 64.usbdev_endpoint_types.608523134 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/64.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/64.usbdev_tx_rx_disruption.985516328 |
| Short name | T3147 |
| Test name | |
| Test status | |
| Simulation time | 578573138 ps |
| CPU time | 2.1 seconds |
| Started | Aug 27 07:54:05 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=985516328 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 64.usbdev_tx _rx_disruption.985516328 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/64.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/65.usbdev_endpoint_types.3093419415 |
| Short name | T437 |
| Test name | |
| Test status | |
| Simulation time | 445107404 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3093419415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_endpoint_types.3093419415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/65.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/65.usbdev_tx_rx_disruption.1644259924 |
| Short name | T3142 |
| Test name | |
| Test status | |
| Simulation time | 516041942 ps |
| CPU time | 1.65 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1644259924 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 65.usbdev_t x_rx_disruption.1644259924 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/65.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/66.usbdev_tx_rx_disruption.275235339 |
| Short name | T3141 |
| Test name | |
| Test status | |
| Simulation time | 539877034 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=275235339 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 66.usbdev_tx _rx_disruption.275235339 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/66.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/67.usbdev_endpoint_types.2657354653 |
| Short name | T3138 |
| Test name | |
| Test status | |
| Simulation time | 149358400 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2657354653 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_endpoint_types.2657354653 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/67.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/67.usbdev_tx_rx_disruption.1135859605 |
| Short name | T3145 |
| Test name | |
| Test status | |
| Simulation time | 628162420 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1135859605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 67.usbdev_t x_rx_disruption.1135859605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/67.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/68.usbdev_endpoint_types.1100543418 |
| Short name | T354 |
| Test name | |
| Test status | |
| Simulation time | 597471399 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1100543418 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_endpoint_types.1100543418 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/68.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/68.usbdev_tx_rx_disruption.2375569963 |
| Short name | T3144 |
| Test name | |
| Test status | |
| Simulation time | 489584982 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2375569963 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 68.usbdev_t x_rx_disruption.2375569963 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/68.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/69.usbdev_endpoint_types.3131323488 |
| Short name | T351 |
| Test name | |
| Test status | |
| Simulation time | 450939510 ps |
| CPU time | 1.22 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3131323488 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_endpoint_types.3131323488 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/69.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/69.usbdev_tx_rx_disruption.1315024230 |
| Short name | T3150 |
| Test name | |
| Test status | |
| Simulation time | 584747786 ps |
| CPU time | 1.89 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1315024230 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 69.usbdev_t x_rx_disruption.1315024230 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/69.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_alert_test.3901995533 |
| Short name | T832 |
| Test name | |
| Test status | |
| Simulation time | 33216915 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:41:20 AM UTC 24 |
| Finished | Aug 27 07:41:22 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3901995533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 7.usbdev_alert_test.3901995533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_disconnect.1822129957 |
| Short name | T793 |
| Test name | |
| Test status | |
| Simulation time | 7198556168 ps |
| CPU time | 11.47 seconds |
| Started | Aug 27 07:40:45 AM UTC 24 |
| Finished | Aug 27 07:40:57 AM UTC 24 |
| Peak memory | 228412 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1822129957 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_disconnect.1822129957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_reset.304778316 |
| Short name | T814 |
| Test name | |
| Test status | |
| Simulation time | 13656884006 ps |
| CPU time | 23.7 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:41:13 AM UTC 24 |
| Peak memory | 228536 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=304778316 -assert nopostproc +UVM_TESTNAME=usbdev_base_t est +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usb dev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_reset.304778316 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_aon_wake_resume.207759884 |
| Short name | T835 |
| Test name | |
| Test status | |
| Simulation time | 24857572489 ps |
| CPU time | 33.44 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:41:23 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=207759884 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_aon_wake_resume.207759884 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_av_buffer.3732434548 |
| Short name | T784 |
| Test name | |
| Test status | |
| Simulation time | 153086399 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:40:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3732434548 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_av_buffer.3732434548 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_bitstuff_err.1295930903 |
| Short name | T782 |
| Test name | |
| Test status | |
| Simulation time | 206324743 ps |
| CPU time | 1.25 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:40:50 AM UTC 24 |
| Peak memory | 216076 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1295930903 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_bitstuff_err.1295930903 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_clear.3142886053 |
| Short name | T786 |
| Test name | |
| Test status | |
| Simulation time | 472925591 ps |
| CPU time | 2.66 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:40:52 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3142886053 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 7.usbdev_data_toggle_clear.3142886053 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_data_toggle_restore.1091227663 |
| Short name | T319 |
| Test name | |
| Test status | |
| Simulation time | 884449322 ps |
| CPU time | 4.26 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:40:54 AM UTC 24 |
| Peak memory | 218204 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1091227663 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_data_toggle_restore.1091227663 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_device_timeout.290634403 |
| Short name | T785 |
| Test name | |
| Test status | |
| Simulation time | 190609615 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:40:51 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=290634403 -assert nopostproc +UVM_TESTNAME=usbdev_b ase_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_202 4_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_device_timeout.290634403 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_disable_endpoint.2166231352 |
| Short name | T791 |
| Test name | |
| Test status | |
| Simulation time | 1087711600 ps |
| CPU time | 3.82 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:57 AM UTC 24 |
| Peak memory | 218096 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2166231352 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_disable_endpoint.2166231352 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_disconnected.1199954739 |
| Short name | T788 |
| Test name | |
| Test status | |
| Simulation time | 173418317 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:55 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1199954739 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_disconnected.1199954739 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_enable.2597354958 |
| Short name | T787 |
| Test name | |
| Test status | |
| Simulation time | 36618347 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:54 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2597354958 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_enable.2597354958 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_access.2550913992 |
| Short name | T795 |
| Test name | |
| Test status | |
| Simulation time | 953347674 ps |
| CPU time | 4.16 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:58 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2550913992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_access.2550913992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_endpoint_types.3688446489 |
| Short name | T457 |
| Test name | |
| Test status | |
| Simulation time | 164783757 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:55 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3688446489 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_endpoint_types.3688446489 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_fifo_rst.3314381060 |
| Short name | T790 |
| Test name | |
| Test status | |
| Simulation time | 250621589 ps |
| CPU time | 2.78 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:56 AM UTC 24 |
| Peak memory | 218228 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314381060 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_fifo_rst.3314381060 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_in_iso.427640147 |
| Short name | T789 |
| Test name | |
| Test status | |
| Simulation time | 201311346 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:40:55 AM UTC 24 |
| Peak memory | 226364 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=427640147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_in_iso.427640147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_in_stall.3642248506 |
| Short name | T792 |
| Test name | |
| Test status | |
| Simulation time | 201112356 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:40:55 AM UTC 24 |
| Finished | Aug 27 07:40:57 AM UTC 24 |
| Peak memory | 215604 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3642248506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_in_stall.3642248506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_in_trans.325773494 |
| Short name | T794 |
| Test name | |
| Test status | |
| Simulation time | 220938521 ps |
| CPU time | 1.68 seconds |
| Started | Aug 27 07:40:55 AM UTC 24 |
| Finished | Aug 27 07:40:57 AM UTC 24 |
| Peak memory | 215492 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=325773494 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_in_trans.325773494 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_invalid_sync.3453685990 |
| Short name | T845 |
| Test name | |
| Test status | |
| Simulation time | 4459481479 ps |
| CPU time | 36.67 seconds |
| Started | Aug 27 07:40:52 AM UTC 24 |
| Finished | Aug 27 07:41:31 AM UTC 24 |
| Peak memory | 228432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3453685990 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 7.usbdev_invalid_sync.3453685990 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_iso_retraction.417186950 |
| Short name | T909 |
| Test name | |
| Test status | |
| Simulation time | 10255609249 ps |
| CPU time | 65.2 seconds |
| Started | Aug 27 07:40:57 AM UTC 24 |
| Finished | Aug 27 07:42:04 AM UTC 24 |
| Peak memory | 218184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=417186950 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 7.usbdev_iso_retraction.417186950 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_link_in_err.2867238337 |
| Short name | T799 |
| Test name | |
| Test status | |
| Simulation time | 276972575 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:40:57 AM UTC 24 |
| Finished | Aug 27 07:41:00 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2867238337 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_in_err.2867238337 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_link_resume.1545036726 |
| Short name | T888 |
| Test name | |
| Test status | |
| Simulation time | 28492289960 ps |
| CPU time | 54.5 seconds |
| Started | Aug 27 07:40:58 AM UTC 24 |
| Finished | Aug 27 07:41:54 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1545036726 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_link_resume.1545036726 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_link_suspend.2975879987 |
| Short name | T834 |
| Test name | |
| Test status | |
| Simulation time | 10052190244 ps |
| CPU time | 23.65 seconds |
| Started | Aug 27 07:40:58 AM UTC 24 |
| Finished | Aug 27 07:41:22 AM UTC 24 |
| Peak memory | 218208 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2975879987 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_link_suspend.2975879987 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_low_speed_traffic.2856166785 |
| Short name | T855 |
| Test name | |
| Test status | |
| Simulation time | 4417192436 ps |
| CPU time | 40.51 seconds |
| Started | Aug 27 07:40:58 AM UTC 24 |
| Finished | Aug 27 07:41:40 AM UTC 24 |
| Peak memory | 228548 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856166785 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_low_speed_traffic.2856166785 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_max_inter_pkt_delay.4101525692 |
| Short name | T979 |
| Test name | |
| Test status | |
| Simulation time | 3147157650 ps |
| CPU time | 95.44 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 228544 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4101525692 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_inter_pkt_delay.4101525692 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_in_transaction.1589039867 |
| Short name | T804 |
| Test name | |
| Test status | |
| Simulation time | 276062864 ps |
| CPU time | 1.78 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:41:04 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1589039867 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_max_length_in_transaction.1589039867 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_max_length_out_transaction.40702255 |
| Short name | T800 |
| Test name | |
| Test status | |
| Simulation time | 218179943 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:41:03 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=40702255 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transacti on_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vd b -cm_log /dev/null -cm_name 7.usbdev_max_length_out_transaction.40702255 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_max_non_iso_usb_traffic.3921454569 |
| Short name | T927 |
| Test name | |
| Test status | |
| Simulation time | 2805576284 ps |
| CPU time | 70.86 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:42:14 AM UTC 24 |
| Peak memory | 230648 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3921454569 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_non_iso_usb_traffic.3921454569 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_max_usb_traffic.1609885657 |
| Short name | T859 |
| Test name | |
| Test status | |
| Simulation time | 2766654456 ps |
| CPU time | 40.47 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 235184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1609885657 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_max_usb_traffic.1609885657 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_min_inter_pkt_delay.1506746515 |
| Short name | T906 |
| Test name | |
| Test status | |
| Simulation time | 2532594302 ps |
| CPU time | 60.01 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:42:03 AM UTC 24 |
| Peak memory | 235176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1506746515 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_min_inter_pkt_delay.1506746515 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_in_transaction.2805116341 |
| Short name | T802 |
| Test name | |
| Test status | |
| Simulation time | 156388070 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:41:03 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2805116341 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_in_transaction.2805116341 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_min_length_out_transaction.3480200386 |
| Short name | T803 |
| Test name | |
| Test status | |
| Simulation time | 154000113 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:41:01 AM UTC 24 |
| Finished | Aug 27 07:41:03 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3480200386 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_min_length_out_transaction.3480200386 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_nak_trans.2398857158 |
| Short name | T130 |
| Test name | |
| Test status | |
| Simulation time | 211957583 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2398857158 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_nak_trans.2398857158 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_out_iso.1411069561 |
| Short name | T807 |
| Test name | |
| Test status | |
| Simulation time | 150845310 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1411069561 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 7.usbdev_out_iso.1411069561 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_out_stall.1713402611 |
| Short name | T806 |
| Test name | |
| Test status | |
| Simulation time | 184409478 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1713402611 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_out_stall.1713402611 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_out_trans_nak.2104264938 |
| Short name | T809 |
| Test name | |
| Test status | |
| Simulation time | 166645251 ps |
| CPU time | 1.42 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2104264938 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_out_trans_nak.2104264938 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_pending_in_trans.1535675206 |
| Short name | T808 |
| Test name | |
| Test status | |
| Simulation time | 142676438 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:07 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1535675206 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 7.usbdev_pending_in_trans.1535675206 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_pinflip.1627048702 |
| Short name | T811 |
| Test name | |
| Test status | |
| Simulation time | 188529170 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:41:05 AM UTC 24 |
| Finished | Aug 27 07:41:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1627048702 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_pinflip.1627048702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_phy_config_usb_ref_disable.2789802770 |
| Short name | T812 |
| Test name | |
| Test status | |
| Simulation time | 146815439 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:41:08 AM UTC 24 |
| Finished | Aug 27 07:41:10 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2789802770 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 7.usbdev_phy_config_usb_ref_disable.2789802770 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_phy_pins_sense.3935708615 |
| Short name | T45 |
| Test name | |
| Test status | |
| Simulation time | 42148157 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:41:10 AM UTC 24 |
| Finished | Aug 27 07:41:12 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3935708615 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_phy_pins_sense.3935708615 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_buffer.1764513325 |
| Short name | T266 |
| Test name | |
| Test status | |
| Simulation time | 9067852225 ps |
| CPU time | 28.18 seconds |
| Started | Aug 27 07:41:10 AM UTC 24 |
| Finished | Aug 27 07:41:40 AM UTC 24 |
| Peak memory | 228568 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1764513325 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_pkt_buffer.1764513325 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_received.1817051356 |
| Short name | T816 |
| Test name | |
| Test status | |
| Simulation time | 222521810 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:41:10 AM UTC 24 |
| Finished | Aug 27 07:41:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817051356 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 7.usbdev_pkt_received.1817051356 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_pkt_sent.1795009781 |
| Short name | T815 |
| Test name | |
| Test status | |
| Simulation time | 186772778 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:41:10 AM UTC 24 |
| Finished | Aug 27 07:41:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1795009781 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 7.usbdev_pkt_sent.1795009781 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_disconnects.485181918 |
| Short name | T178 |
| Test name | |
| Test status | |
| Simulation time | 6465382428 ps |
| CPU time | 31.3 seconds |
| Started | Aug 27 07:41:11 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 230592 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=485181918 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_disconnects.485181918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_rand_bus_resets.2812315564 |
| Short name | T185 |
| Test name | |
| Test status | |
| Simulation time | 3315472625 ps |
| CPU time | 33.8 seconds |
| Started | Aug 27 07:41:11 AM UTC 24 |
| Finished | Aug 27 07:41:46 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2812315564 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_bus_resets.2812315564 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_rand_suspends.2139121581 |
| Short name | T949 |
| Test name | |
| Test status | |
| Simulation time | 5870683708 ps |
| CPU time | 66.9 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:42:23 AM UTC 24 |
| Peak memory | 232636 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2139121581 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_rand_suspends.2139121581 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_in_transaction.1523031248 |
| Short name | T817 |
| Test name | |
| Test status | |
| Simulation time | 185155287 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:41:11 AM UTC 24 |
| Finished | Aug 27 07:41:13 AM UTC 24 |
| Peak memory | 216192 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1523031248 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_random_length_in_transaction.1523031248 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_random_length_out_transaction.438528001 |
| Short name | T818 |
| Test name | |
| Test status | |
| Simulation time | 214986187 ps |
| CPU time | 1.63 seconds |
| Started | Aug 27 07:41:11 AM UTC 24 |
| Finished | Aug 27 07:41:13 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=438528001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_trans action_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 7.usbdev_random_length_out_transaction.438528001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_resume_link_active.2921829306 |
| Short name | T865 |
| Test name | |
| Test status | |
| Simulation time | 20159886740 ps |
| CPU time | 28.48 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:44 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2921829306 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 7.usbdev_resume_link_active.2921829306 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_rx_crc_err.2661342225 |
| Short name | T823 |
| Test name | |
| Test status | |
| Simulation time | 251666436 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2661342225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_rx_crc_err.2661342225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_rx_full.858285804 |
| Short name | T306 |
| Test name | |
| Test status | |
| Simulation time | 254265606 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 216068 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=858285804 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 7.usbdev_rx_full.858285804 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_setup_stage.2606523400 |
| Short name | T820 |
| Test name | |
| Test status | |
| Simulation time | 156377780 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:16 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2606523400 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 7.usbdev_setup_stage.2606523400 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_setup_trans_ignored.1544462360 |
| Short name | T821 |
| Test name | |
| Test status | |
| Simulation time | 164761008 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1544462360 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 7.usbdev_setup_trans_ignored.1544462360 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_smoke.4027493933 |
| Short name | T825 |
| Test name | |
| Test status | |
| Simulation time | 257358393 ps |
| CPU time | 1.79 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=4027493933 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_smoke.4027493933 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_spurious_pids_ignored.1817410415 |
| Short name | T869 |
| Test name | |
| Test status | |
| Simulation time | 2832371525 ps |
| CPU time | 29.63 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:45 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1817410415 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 7.usbdev_spurious_pids_ignored.1817410415 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_stall_priority_over_nak.415030103 |
| Short name | T822 |
| Test name | |
| Test status | |
| Simulation time | 169509799 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:41:14 AM UTC 24 |
| Finished | Aug 27 07:41:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=415030103 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_nak _vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_stall_priority_over_nak.415030103 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_stall_trans.465907882 |
| Short name | T827 |
| Test name | |
| Test status | |
| Simulation time | 170418131 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:41:16 AM UTC 24 |
| Finished | Aug 27 07:41:18 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=465907882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 7.usbdev_stall_trans.465907882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_stream_len_max.916846725 |
| Short name | T829 |
| Test name | |
| Test status | |
| Simulation time | 428863860 ps |
| CPU time | 2.47 seconds |
| Started | Aug 27 07:41:17 AM UTC 24 |
| Finished | Aug 27 07:41:21 AM UTC 24 |
| Peak memory | 217792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=916846725 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 7.usbdev_stream_len_max.916846725 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_streaming_out.2891392549 |
| Short name | T898 |
| Test name | |
| Test status | |
| Simulation time | 3426531851 ps |
| CPU time | 41.03 seconds |
| Started | Aug 27 07:41:17 AM UTC 24 |
| Finished | Aug 27 07:42:00 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2891392549 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 7.usbdev_streaming_out.2891392549 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_timeout_missing_host_handshake.4116844553 |
| Short name | T819 |
| Test name | |
| Test status | |
| Simulation time | 1167081266 ps |
| CPU time | 26.23 seconds |
| Started | Aug 27 07:40:48 AM UTC 24 |
| Finished | Aug 27 07:41:16 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4116844553 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_timeout_missing_host_handshake.4116844553 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/7.usbdev_tx_rx_disruption.888550439 |
| Short name | T830 |
| Test name | |
| Test status | |
| Simulation time | 529423755 ps |
| CPU time | 2.69 seconds |
| Started | Aug 27 07:41:17 AM UTC 24 |
| Finished | Aug 27 07:41:21 AM UTC 24 |
| Peak memory | 217976 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=888550439 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 7.usbdev_tx_ rx_disruption.888550439 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/7.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/70.usbdev_endpoint_types.1499625401 |
| Short name | T370 |
| Test name | |
| Test status | |
| Simulation time | 399266355 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1499625401 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_endpoint_types.1499625401 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/70.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/70.usbdev_tx_rx_disruption.674899687 |
| Short name | T3146 |
| Test name | |
| Test status | |
| Simulation time | 414428152 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=674899687 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 70.usbdev_tx _rx_disruption.674899687 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/70.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/71.usbdev_endpoint_types.3378898533 |
| Short name | T3139 |
| Test name | |
| Test status | |
| Simulation time | 264604600 ps |
| CPU time | 0.92 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3378898533 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_endpoint_types.3378898533 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/71.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/71.usbdev_tx_rx_disruption.322501083 |
| Short name | T3149 |
| Test name | |
| Test status | |
| Simulation time | 521704293 ps |
| CPU time | 1.71 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=322501083 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 71.usbdev_tx _rx_disruption.322501083 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/71.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/72.usbdev_endpoint_types.1046481228 |
| Short name | T481 |
| Test name | |
| Test status | |
| Simulation time | 331311585 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1046481228 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_endpoint_types.1046481228 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/72.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/72.usbdev_tx_rx_disruption.117208790 |
| Short name | T3151 |
| Test name | |
| Test status | |
| Simulation time | 580538109 ps |
| CPU time | 1.91 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=117208790 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 72.usbdev_tx _rx_disruption.117208790 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/72.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/73.usbdev_endpoint_types.1807325547 |
| Short name | T3143 |
| Test name | |
| Test status | |
| Simulation time | 153142121 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1807325547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_endpoint_types.1807325547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/73.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/73.usbdev_tx_rx_disruption.4282047882 |
| Short name | T3153 |
| Test name | |
| Test status | |
| Simulation time | 636559933 ps |
| CPU time | 2.02 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 218124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4282047882 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 73.usbdev_t x_rx_disruption.4282047882 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/73.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/74.usbdev_endpoint_types.3147195727 |
| Short name | T449 |
| Test name | |
| Test status | |
| Simulation time | 344302073 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3147195727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_endpoint_types.3147195727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/74.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/74.usbdev_tx_rx_disruption.4251092141 |
| Short name | T3152 |
| Test name | |
| Test status | |
| Simulation time | 534558287 ps |
| CPU time | 1.94 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4251092141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 74.usbdev_t x_rx_disruption.4251092141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/74.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/75.usbdev_endpoint_types.543498566 |
| Short name | T459 |
| Test name | |
| Test status | |
| Simulation time | 339062248 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:54:06 AM UTC 24 |
| Finished | Aug 27 07:54:09 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=543498566 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 75.usbdev_endpoint_types.543498566 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/75.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/75.usbdev_tx_rx_disruption.338792639 |
| Short name | T186 |
| Test name | |
| Test status | |
| Simulation time | 651252681 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:54:08 AM UTC 24 |
| Finished | Aug 27 07:54:10 AM UTC 24 |
| Peak memory | 215992 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=338792639 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 75.usbdev_tx _rx_disruption.338792639 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/75.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/76.usbdev_endpoint_types.2072090143 |
| Short name | T356 |
| Test name | |
| Test status | |
| Simulation time | 468143937 ps |
| CPU time | 1.35 seconds |
| Started | Aug 27 07:54:08 AM UTC 24 |
| Finished | Aug 27 07:54:10 AM UTC 24 |
| Peak memory | 215972 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2072090143 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_endpoint_types.2072090143 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/76.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/76.usbdev_tx_rx_disruption.3787221771 |
| Short name | T3161 |
| Test name | |
| Test status | |
| Simulation time | 456121392 ps |
| CPU time | 1.31 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3787221771 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 76.usbdev_t x_rx_disruption.3787221771 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/76.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/77.usbdev_endpoint_types.115974598 |
| Short name | T420 |
| Test name | |
| Test status | |
| Simulation time | 533508477 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=115974598 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 77.usbdev_endpoint_types.115974598 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/77.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/77.usbdev_tx_rx_disruption.2186508189 |
| Short name | T3160 |
| Test name | |
| Test status | |
| Simulation time | 407178533 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2186508189 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 77.usbdev_t x_rx_disruption.2186508189 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/77.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/78.usbdev_endpoint_types.1772087706 |
| Short name | T464 |
| Test name | |
| Test status | |
| Simulation time | 433228173 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772087706 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_endpoint_types.1772087706 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/78.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/78.usbdev_tx_rx_disruption.2049247851 |
| Short name | T3164 |
| Test name | |
| Test status | |
| Simulation time | 528156398 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2049247851 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 78.usbdev_t x_rx_disruption.2049247851 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/78.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/79.usbdev_endpoint_types.599994028 |
| Short name | T485 |
| Test name | |
| Test status | |
| Simulation time | 527943617 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=599994028 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 79.usbdev_endpoint_types.599994028 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/79.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/79.usbdev_tx_rx_disruption.270302305 |
| Short name | T3163 |
| Test name | |
| Test status | |
| Simulation time | 504346154 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=270302305 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 79.usbdev_tx _rx_disruption.270302305 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/79.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_alert_test.1767667463 |
| Short name | T889 |
| Test name | |
| Test status | |
| Simulation time | 36687300 ps |
| CPU time | 1.02 seconds |
| Started | Aug 27 07:41:52 AM UTC 24 |
| Finished | Aug 27 07:41:54 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1767667463 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 8.usbdev_alert_test.1767667463 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_disconnect.2556187436 |
| Short name | T842 |
| Test name | |
| Test status | |
| Simulation time | 5619137564 ps |
| CPU time | 8.35 seconds |
| Started | Aug 27 07:41:20 AM UTC 24 |
| Finished | Aug 27 07:41:29 AM UTC 24 |
| Peak memory | 228476 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2556187436 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_disconnect.2556187436 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_reset.66948823 |
| Short name | T858 |
| Test name | |
| Test status | |
| Simulation time | 15779706210 ps |
| CPU time | 20.09 seconds |
| Started | Aug 27 07:41:20 AM UTC 24 |
| Finished | Aug 27 07:41:41 AM UTC 24 |
| Peak memory | 228596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=66948823 -assert nopostproc +UVM_TESTNAME=usbdev_base_te st +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbd ev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_reset.66948823 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_aon_wake_resume.188029592 |
| Short name | T902 |
| Test name | |
| Test status | |
| Simulation time | 29800479090 ps |
| CPU time | 40.69 seconds |
| Started | Aug 27 07:41:20 AM UTC 24 |
| Finished | Aug 27 07:42:02 AM UTC 24 |
| Peak memory | 218308 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=188029592 -assert nopostpro c +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch /os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_aon_wake_resume.188029592 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_av_buffer.2828038106 |
| Short name | T833 |
| Test name | |
| Test status | |
| Simulation time | 174347732 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:41:20 AM UTC 24 |
| Finished | Aug 27 07:41:22 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2828038106 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_av_buffer.2828038106 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_bitstuff_err.476946185 |
| Short name | T836 |
| Test name | |
| Test status | |
| Simulation time | 156045657 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:41:21 AM UTC 24 |
| Finished | Aug 27 07:41:24 AM UTC 24 |
| Peak memory | 215956 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=476946185 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_bitstuff_err.476946185 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_clear.3883603467 |
| Short name | T837 |
| Test name | |
| Test status | |
| Simulation time | 352303909 ps |
| CPU time | 2.13 seconds |
| Started | Aug 27 07:41:21 AM UTC 24 |
| Finished | Aug 27 07:41:24 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3883603467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 8.usbdev_data_toggle_clear.3883603467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_data_toggle_restore.2163079468 |
| Short name | T317 |
| Test name | |
| Test status | |
| Simulation time | 1071111132 ps |
| CPU time | 5.16 seconds |
| Started | Aug 27 07:41:23 AM UTC 24 |
| Finished | Aug 27 07:41:30 AM UTC 24 |
| Peak memory | 217792 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2163079468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=u sbdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_data_toggle_restore.2163079468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_device_address.2068507600 |
| Short name | T503 |
| Test name | |
| Test status | |
| Simulation time | 36604787388 ps |
| CPU time | 69.3 seconds |
| Started | Aug 27 07:41:24 AM UTC 24 |
| Finished | Aug 27 07:42:34 AM UTC 24 |
| Peak memory | 217916 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2068507600 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_address.2068507600 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_device_timeout.3990242200 |
| Short name | T854 |
| Test name | |
| Test status | |
| Simulation time | 2283319498 ps |
| CPU time | 14.52 seconds |
| Started | Aug 27 07:41:24 AM UTC 24 |
| Finished | Aug 27 07:41:39 AM UTC 24 |
| Peak memory | 218304 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3990242200 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_device_timeout.3990242200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_disable_endpoint.1476384632 |
| Short name | T841 |
| Test name | |
| Test status | |
| Simulation time | 597557013 ps |
| CPU time | 2.92 seconds |
| Started | Aug 27 07:41:24 AM UTC 24 |
| Finished | Aug 27 07:41:28 AM UTC 24 |
| Peak memory | 217968 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1476384632 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_disable_endpoint.1476384632 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_disconnected.392656846 |
| Short name | T839 |
| Test name | |
| Test status | |
| Simulation time | 142879633 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:41:25 AM UTC 24 |
| Finished | Aug 27 07:41:27 AM UTC 24 |
| Peak memory | 215928 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=392656846 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_disconnected.392656846 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_enable.2363378540 |
| Short name | T840 |
| Test name | |
| Test status | |
| Simulation time | 66798524 ps |
| CPU time | 1.14 seconds |
| Started | Aug 27 07:41:25 AM UTC 24 |
| Finished | Aug 27 07:41:27 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363378540 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_enable.2363378540 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_access.1356312624 |
| Short name | T843 |
| Test name | |
| Test status | |
| Simulation time | 1067019980 ps |
| CPU time | 3.22 seconds |
| Started | Aug 27 07:41:25 AM UTC 24 |
| Finished | Aug 27 07:41:30 AM UTC 24 |
| Peak memory | 218176 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1356312624 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_access.1356312624 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_endpoint_types.1797638863 |
| Short name | T466 |
| Test name | |
| Test status | |
| Simulation time | 597128011 ps |
| CPU time | 2.96 seconds |
| Started | Aug 27 07:41:25 AM UTC 24 |
| Finished | Aug 27 07:41:29 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1797638863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_endpoint_types.1797638863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_fifo_rst.3793573925 |
| Short name | T844 |
| Test name | |
| Test status | |
| Simulation time | 149089114 ps |
| CPU time | 1.85 seconds |
| Started | Aug 27 07:41:27 AM UTC 24 |
| Finished | Aug 27 07:41:30 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3793573925 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_fifo_rst.3793573925 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_in_iso.3578743614 |
| Short name | T847 |
| Test name | |
| Test status | |
| Simulation time | 176373158 ps |
| CPU time | 1.69 seconds |
| Started | Aug 27 07:41:29 AM UTC 24 |
| Finished | Aug 27 07:41:32 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3578743614 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_in_iso.3578743614 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_in_stall.2409439200 |
| Short name | T846 |
| Test name | |
| Test status | |
| Simulation time | 162725404 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:41:29 AM UTC 24 |
| Finished | Aug 27 07:41:31 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2409439200 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_stall.2409439200 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_in_trans.1778338114 |
| Short name | T848 |
| Test name | |
| Test status | |
| Simulation time | 255119674 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:41:31 AM UTC 24 |
| Finished | Aug 27 07:41:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1778338114 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_in_trans.1778338114 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_invalid_sync.3045920112 |
| Short name | T1018 |
| Test name | |
| Test status | |
| Simulation time | 3041327948 ps |
| CPU time | 82.67 seconds |
| Started | Aug 27 07:41:29 AM UTC 24 |
| Finished | Aug 27 07:42:53 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3045920112 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 8.usbdev_invalid_sync.3045920112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_iso_retraction.3002369745 |
| Short name | T968 |
| Test name | |
| Test status | |
| Simulation time | 9049959006 ps |
| CPU time | 60.93 seconds |
| Started | Aug 27 07:41:31 AM UTC 24 |
| Finished | Aug 27 07:42:33 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3002369745 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_iso_retraction.3002369745 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_link_in_err.3243371098 |
| Short name | T849 |
| Test name | |
| Test status | |
| Simulation time | 238591547 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:41:31 AM UTC 24 |
| Finished | Aug 27 07:41:34 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3243371098 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_in_err.3243371098 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_link_resume.2363511212 |
| Short name | T978 |
| Test name | |
| Test status | |
| Simulation time | 30181077963 ps |
| CPU time | 65.16 seconds |
| Started | Aug 27 07:41:31 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 218200 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2363511212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_link_resume.2363511212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_link_suspend.3021528626 |
| Short name | T867 |
| Test name | |
| Test status | |
| Simulation time | 5744396985 ps |
| CPU time | 12.5 seconds |
| Started | Aug 27 07:41:31 AM UTC 24 |
| Finished | Aug 27 07:41:45 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3021528626 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_link_suspend.3021528626 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_low_speed_traffic.3469816155 |
| Short name | T1008 |
| Test name | |
| Test status | |
| Simulation time | 3135267901 ps |
| CPU time | 74.79 seconds |
| Started | Aug 27 07:41:33 AM UTC 24 |
| Finished | Aug 27 07:42:49 AM UTC 24 |
| Peak memory | 235340 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3469816155 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_low_speed_traffic.3469816155 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_max_inter_pkt_delay.6523467 |
| Short name | T981 |
| Test name | |
| Test status | |
| Simulation time | 2297169863 ps |
| CPU time | 64.05 seconds |
| Started | Aug 27 07:41:33 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=6523467 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_T EST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_inter_pkt_delay.6523467 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_in_transaction.546870376 |
| Short name | T850 |
| Test name | |
| Test status | |
| Simulation time | 273059217 ps |
| CPU time | 1.74 seconds |
| Started | Aug 27 07:41:33 AM UTC 24 |
| Finished | Aug 27 07:41:36 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=546870376 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_in_transaction.546870376 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_max_length_out_transaction.3493182485 |
| Short name | T853 |
| Test name | |
| Test status | |
| Simulation time | 209431281 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:41:36 AM UTC 24 |
| Finished | Aug 27 07:41:38 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3493182485 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_max_length_out_transaction.3493182485 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_max_non_iso_usb_traffic.3134566178 |
| Short name | T973 |
| Test name | |
| Test status | |
| Simulation time | 2227164242 ps |
| CPU time | 59.11 seconds |
| Started | Aug 27 07:41:36 AM UTC 24 |
| Finished | Aug 27 07:42:36 AM UTC 24 |
| Peak memory | 228608 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3134566178 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffi c_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_non_iso_usb_traffic.3134566178 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_max_usb_traffic.2964507638 |
| Short name | T987 |
| Test name | |
| Test status | |
| Simulation time | 2334013732 ps |
| CPU time | 63.13 seconds |
| Started | Aug 27 07:41:36 AM UTC 24 |
| Finished | Aug 27 07:42:40 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2964507638 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_max_usb_traffic.2964507638 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_min_inter_pkt_delay.2057902409 |
| Short name | T932 |
| Test name | |
| Test status | |
| Simulation time | 3651157172 ps |
| CPU time | 36.41 seconds |
| Started | Aug 27 07:41:38 AM UTC 24 |
| Finished | Aug 27 07:42:16 AM UTC 24 |
| Peak memory | 228480 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2057902409 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_min_inter_pkt_delay.2057902409 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_in_transaction.4093957602 |
| Short name | T857 |
| Test name | |
| Test status | |
| Simulation time | 160242907 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:41:38 AM UTC 24 |
| Finished | Aug 27 07:41:40 AM UTC 24 |
| Peak memory | 216140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093957602 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ran d_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_in_transaction.4093957602 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_min_length_out_transaction.1730322556 |
| Short name | T856 |
| Test name | |
| Test status | |
| Simulation time | 145031069 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:41:38 AM UTC 24 |
| Finished | Aug 27 07:41:40 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1730322556 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_min_length_out_transaction.1730322556 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_nak_trans.220650807 |
| Short name | T131 |
| Test name | |
| Test status | |
| Simulation time | 220434746 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:41:39 AM UTC 24 |
| Finished | Aug 27 07:41:42 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=220650807 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_nak_trans.220650807 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_out_iso.244346953 |
| Short name | T860 |
| Test name | |
| Test status | |
| Simulation time | 192759792 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:41:41 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=244346953 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 8.usbdev_out_iso.244346953 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_out_stall.523483727 |
| Short name | T861 |
| Test name | |
| Test status | |
| Simulation time | 149499504 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:41:41 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=523483727 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_out_stall.523483727 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_out_trans_nak.3267772585 |
| Short name | T864 |
| Test name | |
| Test status | |
| Simulation time | 217368594 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:41:41 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3267772585 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_out_trans_nak.3267772585 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_pending_in_trans.2106281218 |
| Short name | T862 |
| Test name | |
| Test status | |
| Simulation time | 154522802 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:41:41 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2106281218 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 8.usbdev_pending_in_trans.2106281218 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_pinflip.1098030506 |
| Short name | T863 |
| Test name | |
| Test status | |
| Simulation time | 185107314 ps |
| CPU time | 1.34 seconds |
| Started | Aug 27 07:41:41 AM UTC 24 |
| Finished | Aug 27 07:41:43 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1098030506 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_pinflip.1098030506 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_phy_config_usb_ref_disable.1935210422 |
| Short name | T868 |
| Test name | |
| Test status | |
| Simulation time | 234288855 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:41:42 AM UTC 24 |
| Finished | Aug 27 07:41:45 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935210422 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 8.usbdev_phy_config_usb_ref_disable.1935210422 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_phy_pins_sense.3859254220 |
| Short name | T866 |
| Test name | |
| Test status | |
| Simulation time | 38280399 ps |
| CPU time | 0.82 seconds |
| Started | Aug 27 07:41:42 AM UTC 24 |
| Finished | Aug 27 07:41:44 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3859254220 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_phy_pins_sense.3859254220 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_buffer.442203149 |
| Short name | T268 |
| Test name | |
| Test status | |
| Simulation time | 18550825460 ps |
| CPU time | 64.55 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:42:51 AM UTC 24 |
| Peak memory | 232488 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=442203149 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_pkt_buffer.442203149 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_received.2211797810 |
| Short name | T872 |
| Test name | |
| Test status | |
| Simulation time | 170999074 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:41:47 AM UTC 24 |
| Peak memory | 216108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2211797810 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 8.usbdev_pkt_received.2211797810 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_pkt_sent.3104062979 |
| Short name | T871 |
| Test name | |
| Test status | |
| Simulation time | 187986119 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:41:47 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3104062979 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 8.usbdev_pkt_sent.3104062979 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_disconnects.1148301037 |
| Short name | T912 |
| Test name | |
| Test status | |
| Simulation time | 5746604701 ps |
| CPU time | 21.41 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 230540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1148301037 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_disconnects.1148301037 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_rand_bus_resets.4093167141 |
| Short name | T1264 |
| Test name | |
| Test status | |
| Simulation time | 6591666566 ps |
| CPU time | 170.39 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:44:38 AM UTC 24 |
| Peak memory | 228404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4093167141 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_bus_resets.4093167141 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_rand_suspends.1517611112 |
| Short name | T920 |
| Test name | |
| Test status | |
| Simulation time | 6060250272 ps |
| CPU time | 25.92 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:42:12 AM UTC 24 |
| Peak memory | 230460 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1517611112 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_rand_suspends.1517611112 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_in_transaction.1884639041 |
| Short name | T873 |
| Test name | |
| Test status | |
| Simulation time | 271565364 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:41:47 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1884639041 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_random_length_in_transaction.1884639041 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_random_length_out_transaction.2448876828 |
| Short name | T874 |
| Test name | |
| Test status | |
| Simulation time | 220607211 ps |
| CPU time | 1.61 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:41:48 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2448876828 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 8.usbdev_random_length_out_transaction.2448876828 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_resume_link_active.3960644689 |
| Short name | T929 |
| Test name | |
| Test status | |
| Simulation time | 20162472135 ps |
| CPU time | 27.36 seconds |
| Started | Aug 27 07:41:45 AM UTC 24 |
| Finished | Aug 27 07:42:14 AM UTC 24 |
| Peak memory | 218156 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3960644689 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 8.usbdev_resume_link_active.3960644689 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_rx_crc_err.1948972994 |
| Short name | T876 |
| Test name | |
| Test status | |
| Simulation time | 149423349 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:41:47 AM UTC 24 |
| Finished | Aug 27 07:41:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1948972994 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_rx_crc_err.1948972994 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_rx_full.1581014590 |
| Short name | T880 |
| Test name | |
| Test status | |
| Simulation time | 273159659 ps |
| CPU time | 1.83 seconds |
| Started | Aug 27 07:41:47 AM UTC 24 |
| Finished | Aug 27 07:41:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1581014590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 8.usbdev_rx_full.1581014590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_setup_stage.269460245 |
| Short name | T878 |
| Test name | |
| Test status | |
| Simulation time | 167228849 ps |
| CPU time | 1.45 seconds |
| Started | Aug 27 07:41:47 AM UTC 24 |
| Finished | Aug 27 07:41:50 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=269460245 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 8.usbdev_setup_stage.269460245 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_setup_trans_ignored.1346301146 |
| Short name | T875 |
| Test name | |
| Test status | |
| Simulation time | 151027288 ps |
| CPU time | 1.21 seconds |
| Started | Aug 27 07:41:47 AM UTC 24 |
| Finished | Aug 27 07:41:49 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1346301146 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 8.usbdev_setup_trans_ignored.1346301146 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_smoke.1663550323 |
| Short name | T879 |
| Test name | |
| Test status | |
| Simulation time | 217160971 ps |
| CPU time | 1.56 seconds |
| Started | Aug 27 07:41:47 AM UTC 24 |
| Finished | Aug 27 07:41:50 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1663550323 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_smoke.1663550323 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_spurious_pids_ignored.2739974731 |
| Short name | T942 |
| Test name | |
| Test status | |
| Simulation time | 2954162687 ps |
| CPU time | 30.04 seconds |
| Started | Aug 27 07:41:49 AM UTC 24 |
| Finished | Aug 27 07:42:20 AM UTC 24 |
| Peak memory | 235248 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2739974731 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 8.usbdev_spurious_pids_ignored.2739974731 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_stall_priority_over_nak.3051286899 |
| Short name | T882 |
| Test name | |
| Test status | |
| Simulation time | 169551114 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:41:49 AM UTC 24 |
| Finished | Aug 27 07:41:52 AM UTC 24 |
| Peak memory | 216072 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3051286899 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_stall_priority_over_nak.3051286899 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_stall_trans.1067661072 |
| Short name | T883 |
| Test name | |
| Test status | |
| Simulation time | 154770946 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:41:49 AM UTC 24 |
| Finished | Aug 27 07:41:52 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1067661072 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 8.usbdev_stall_trans.1067661072 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_stream_len_max.380355085 |
| Short name | T891 |
| Test name | |
| Test status | |
| Simulation time | 1030913092 ps |
| CPU time | 4.44 seconds |
| Started | Aug 27 07:41:49 AM UTC 24 |
| Finished | Aug 27 07:41:55 AM UTC 24 |
| Peak memory | 218180 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=380355085 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 8.usbdev_stream_len_max.380355085 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_streaming_out.2081273246 |
| Short name | T1036 |
| Test name | |
| Test status | |
| Simulation time | 2593067654 ps |
| CPU time | 69.64 seconds |
| Started | Aug 27 07:41:49 AM UTC 24 |
| Finished | Aug 27 07:43:01 AM UTC 24 |
| Peak memory | 228472 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2081273246 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 8.usbdev_streaming_out.2081273246 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_timeout_missing_host_handshake.2823283857 |
| Short name | T905 |
| Test name | |
| Test status | |
| Simulation time | 4997824945 ps |
| CPU time | 37.52 seconds |
| Started | Aug 27 07:41:24 AM UTC 24 |
| Finished | Aug 27 07:42:03 AM UTC 24 |
| Peak memory | 218300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2823283857 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_timeout_missing_host_handshake.2823283857 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/8.usbdev_tx_rx_disruption.578688520 |
| Short name | T192 |
| Test name | |
| Test status | |
| Simulation time | 549961012 ps |
| CPU time | 1.75 seconds |
| Started | Aug 27 07:41:52 AM UTC 24 |
| Finished | Aug 27 07:41:54 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=578688520 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 8.usbdev_tx_ rx_disruption.578688520 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/8.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/80.usbdev_endpoint_types.3314124901 |
| Short name | T422 |
| Test name | |
| Test status | |
| Simulation time | 526156403 ps |
| CPU time | 1.38 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3314124901 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_endpoint_types.3314124901 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/80.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/80.usbdev_tx_rx_disruption.521233150 |
| Short name | T3166 |
| Test name | |
| Test status | |
| Simulation time | 606735823 ps |
| CPU time | 1.6 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=521233150 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 80.usbdev_tx _rx_disruption.521233150 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/80.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/81.usbdev_endpoint_types.1096249499 |
| Short name | T467 |
| Test name | |
| Test status | |
| Simulation time | 214415971 ps |
| CPU time | 0.91 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:14 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1096249499 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_endpoint_types.1096249499 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/81.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/81.usbdev_tx_rx_disruption.2289048721 |
| Short name | T3165 |
| Test name | |
| Test status | |
| Simulation time | 471233960 ps |
| CPU time | 1.43 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2289048721 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 81.usbdev_t x_rx_disruption.2289048721 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/81.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/82.usbdev_endpoint_types.2599850271 |
| Short name | T355 |
| Test name | |
| Test status | |
| Simulation time | 367353671 ps |
| CPU time | 1.16 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2599850271 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_endpoint_types.2599850271 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/82.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/82.usbdev_tx_rx_disruption.3115563089 |
| Short name | T3170 |
| Test name | |
| Test status | |
| Simulation time | 466042217 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3115563089 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 82.usbdev_t x_rx_disruption.3115563089 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/82.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/83.usbdev_endpoint_types.2105796935 |
| Short name | T421 |
| Test name | |
| Test status | |
| Simulation time | 539236811 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2105796935 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_endpoint_types.2105796935 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/83.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/83.usbdev_tx_rx_disruption.3346411992 |
| Short name | T3168 |
| Test name | |
| Test status | |
| Simulation time | 654278146 ps |
| CPU time | 1.84 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:15 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3346411992 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 83.usbdev_t x_rx_disruption.3346411992 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/83.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/84.usbdev_tx_rx_disruption.1713158160 |
| Short name | T3173 |
| Test name | |
| Test status | |
| Simulation time | 466433519 ps |
| CPU time | 1.49 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1713158160 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 84.usbdev_t x_rx_disruption.1713158160 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/84.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/85.usbdev_endpoint_types.2053644872 |
| Short name | T389 |
| Test name | |
| Test status | |
| Simulation time | 487888715 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2053644872 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_endpoint_types.2053644872 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/85.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/85.usbdev_tx_rx_disruption.394664619 |
| Short name | T3174 |
| Test name | |
| Test status | |
| Simulation time | 553733485 ps |
| CPU time | 1.62 seconds |
| Started | Aug 27 07:54:12 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=394664619 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 85.usbdev_tx _rx_disruption.394664619 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/85.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/86.usbdev_endpoint_types.914749595 |
| Short name | T434 |
| Test name | |
| Test status | |
| Simulation time | 486771864 ps |
| CPU time | 1.39 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=914749595 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 86.usbdev_endpoint_types.914749595 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/86.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/86.usbdev_tx_rx_disruption.2887591214 |
| Short name | T3178 |
| Test name | |
| Test status | |
| Simulation time | 566797985 ps |
| CPU time | 1.7 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2887591214 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 86.usbdev_t x_rx_disruption.2887591214 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/86.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/87.usbdev_endpoint_types.3339126918 |
| Short name | T3169 |
| Test name | |
| Test status | |
| Simulation time | 225213221 ps |
| CPU time | 0.95 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3339126918 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_endpoint_types.3339126918 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/87.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/87.usbdev_tx_rx_disruption.977229865 |
| Short name | T3176 |
| Test name | |
| Test status | |
| Simulation time | 578195949 ps |
| CPU time | 1.59 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=977229865 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 87.usbdev_tx _rx_disruption.977229865 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/87.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/88.usbdev_endpoint_types.774296605 |
| Short name | T442 |
| Test name | |
| Test status | |
| Simulation time | 288012290 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=774296605 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 88.usbdev_endpoint_types.774296605 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/88.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/88.usbdev_tx_rx_disruption.3441071696 |
| Short name | T3177 |
| Test name | |
| Test status | |
| Simulation time | 547571031 ps |
| CPU time | 1.54 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3441071696 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 88.usbdev_t x_rx_disruption.3441071696 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/88.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/89.usbdev_endpoint_types.2450213142 |
| Short name | T407 |
| Test name | |
| Test status | |
| Simulation time | 505850945 ps |
| CPU time | 1.52 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2450213142 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_endpoint_types.2450213142 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/89.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/89.usbdev_tx_rx_disruption.3587199527 |
| Short name | T3179 |
| Test name | |
| Test status | |
| Simulation time | 493841817 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3587199527 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 89.usbdev_t x_rx_disruption.3587199527 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/89.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_alert_test.2099681542 |
| Short name | T944 |
| Test name | |
| Test status | |
| Simulation time | 41408261 ps |
| CPU time | 0.99 seconds |
| Started | Aug 27 07:42:19 AM UTC 24 |
| Finished | Aug 27 07:42:21 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +run_alert_test +en_scb=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqu eue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2099681542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usb dev_common_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/de fault.vdb -cm_log /dev/null -cm_name 9.usbdev_alert_test.2099681542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_alert_test/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_disconnect.1291067702 |
| Short name | T917 |
| Test name | |
| Test status | |
| Simulation time | 10437839631 ps |
| CPU time | 16.98 seconds |
| Started | Aug 27 07:41:52 AM UTC 24 |
| Finished | Aug 27 07:42:10 AM UTC 24 |
| Peak memory | 218368 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1291067702 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_disconnect.1291067702 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_aon_wake_disconnect/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_reset.1185511459 |
| Short name | T945 |
| Test name | |
| Test status | |
| Simulation time | 15238734867 ps |
| CPU time | 28.62 seconds |
| Started | Aug 27 07:41:52 AM UTC 24 |
| Finished | Aug 27 07:42:22 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_VE RBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1185511459 -assert nopostproc +UVM_TESTNAME=usbdev_base_ test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/us bdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_reset.1185511459 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_aon_wake_reset/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_aon_wake_resume.1016271880 |
| Short name | T108 |
| Test name | |
| Test status | |
| Simulation time | 29746956177 ps |
| CPU time | 43.19 seconds |
| Started | Aug 27 07:41:52 AM UTC 24 |
| Finished | Aug 27 07:42:36 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +en_scb_rdchk_link_resu me=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1016271880 -assert nopostpr oc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_aon_wake_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratc h/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_aon_wake_resume.1016271880 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_aon_wake_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_av_buffer.2775638926 |
| Short name | T892 |
| Test name | |
| Test status | |
| Simulation time | 146580281 ps |
| CPU time | 1.33 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:57 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2775638926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_av_buffer_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_av_buffer.2775638926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_av_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_bitstuff_err.2086517864 |
| Short name | T893 |
| Test name | |
| Test status | |
| Simulation time | 141907709 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2086517864 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bitstuff_err_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_bitstuff_err.2086517864 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_bitstuff_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_clear.1376034630 |
| Short name | T894 |
| Test name | |
| Test status | |
| Simulation time | 168166335 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:57 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1376034630 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_data_toggle_clear_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_l og /dev/null -cm_name 9.usbdev_data_toggle_clear.1376034630 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_data_toggle_clear/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_data_toggle_restore.498104669 |
| Short name | T315 |
| Test name | |
| Test status | |
| Simulation time | 948488281 ps |
| CPU time | 3.58 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:59 AM UTC 24 |
| Peak memory | 218140 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -lic queue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=498104669 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=us bdev_data_toggle_restore_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-v cs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_data_toggle_restore.498104669 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_data_toggle_restore/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_device_address.154206854 |
| Short name | T519 |
| Test name | |
| Test status | |
| Simulation time | 22338115031 ps |
| CPU time | 41.8 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:42:38 AM UTC 24 |
| Peak memory | 218236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=154206854 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_device_address_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_device_address.154206854 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_device_address/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_device_timeout.3137895180 |
| Short name | T887 |
| Test name | |
| Test status | |
| Simulation time | 747093400 ps |
| CPU time | 16.14 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:42:12 AM UTC 24 |
| Peak memory | 218240 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3137895180 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_device_timeout.3137895180 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_device_timeout/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_disable_endpoint.3079285363 |
| Short name | T896 |
| Test name | |
| Test status | |
| Simulation time | 939565374 ps |
| CPU time | 2.31 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:58 AM UTC 24 |
| Peak memory | 218032 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3079285363 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disable_endpoint_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_disable_endpoint.3079285363 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_disable_endpoint/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_disconnected.2236267183 |
| Short name | T895 |
| Test name | |
| Test status | |
| Simulation time | 146440013 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:41:57 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2236267183 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_disconnected_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_disconnected.2236267183 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_disconnected/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_enable.504368329 |
| Short name | T897 |
| Test name | |
| Test status | |
| Simulation time | 42799926 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:41:56 AM UTC 24 |
| Finished | Aug 27 07:41:58 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=504368329 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_enable_vseq +en_cov=1 - cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_enable.504368329 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_enable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_access.1421534125 |
| Short name | T900 |
| Test name | |
| Test status | |
| Simulation time | 756257048 ps |
| CPU time | 3.84 seconds |
| Started | Aug 27 07:41:56 AM UTC 24 |
| Finished | Aug 27 07:42:01 AM UTC 24 |
| Peak memory | 218012 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1421534125 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_endpoint_access_vseq + en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_access.1421534125 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_endpoint_access/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_endpoint_types.2936599681 |
| Short name | T371 |
| Test name | |
| Test status | |
| Simulation time | 374243197 ps |
| CPU time | 2.24 seconds |
| Started | Aug 27 07:41:57 AM UTC 24 |
| Finished | Aug 27 07:42:00 AM UTC 24 |
| Peak memory | 218036 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2936599681 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_endpoint_types.2936599681 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_fifo_rst.1156563873 |
| Short name | T903 |
| Test name | |
| Test status | |
| Simulation time | 172873391 ps |
| CPU time | 2.63 seconds |
| Started | Aug 27 07:41:58 AM UTC 24 |
| Finished | Aug 27 07:42:02 AM UTC 24 |
| Peak memory | 218164 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1156563873 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_fifo_rst_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_fifo_rst.1156563873 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_fifo_rst/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_iso.3220154062 |
| Short name | T901 |
| Test name | |
| Test status | |
| Simulation time | 245407926 ps |
| CPU time | 1.96 seconds |
| Started | Aug 27 07:41:58 AM UTC 24 |
| Finished | Aug 27 07:42:01 AM UTC 24 |
| Peak memory | 226432 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3220154062 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_in_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_in_iso.3220154062 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_in_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_stall.2470384777 |
| Short name | T899 |
| Test name | |
| Test status | |
| Simulation time | 164247535 ps |
| CPU time | 1.48 seconds |
| Started | Aug 27 07:41:58 AM UTC 24 |
| Finished | Aug 27 07:42:01 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2470384777 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_stall_vseq +en_cov= 1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/n ull -cm_name 9.usbdev_in_stall.2470384777 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_in_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_in_trans.794549742 |
| Short name | T904 |
| Test name | |
| Test status | |
| Simulation time | 209699997 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:42:00 AM UTC 24 |
| Finished | Aug 27 07:42:02 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=794549742 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_in_trans.794549742 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_invalid_sync.1600149590 |
| Short name | T1101 |
| Test name | |
| Test status | |
| Simulation time | 3369825332 ps |
| CPU time | 88.02 seconds |
| Started | Aug 27 07:41:58 AM UTC 24 |
| Finished | Aug 27 07:43:28 AM UTC 24 |
| Peak memory | 230404 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_bad_syncs=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1600149590 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_bad_tr affic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default .vdb -cm_log /dev/null -cm_name 9.usbdev_invalid_sync.1600149590 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_invalid_sync/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_iso_retraction.1702510942 |
| Short name | T1044 |
| Test name | |
| Test status | |
| Simulation time | 8791804797 ps |
| CPU time | 61.11 seconds |
| Started | Aug 27 07:42:00 AM UTC 24 |
| Finished | Aug 27 07:43:03 AM UTC 24 |
| Peak memory | 218244 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1702510942 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_iso_retraction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_iso_retraction.1702510942 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_iso_retraction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_in_err.677238551 |
| Short name | T908 |
| Test name | |
| Test status | |
| Simulation time | 216245691 ps |
| CPU time | 1.55 seconds |
| Started | Aug 27 07:42:01 AM UTC 24 |
| Finished | Aug 27 07:42:04 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=677238551 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_in_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_link_in_err.677238551 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_link_in_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_resume.2037929959 |
| Short name | T933 |
| Test name | |
| Test status | |
| Simulation time | 9824326657 ps |
| CPU time | 14.19 seconds |
| Started | Aug 27 07:42:01 AM UTC 24 |
| Finished | Aug 27 07:42:17 AM UTC 24 |
| Peak memory | 218328 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2037929959 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_resume_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_link_resume.2037929959 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_link_resume/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_link_suspend.3561967011 |
| Short name | T926 |
| Test name | |
| Test status | |
| Simulation time | 4993182620 ps |
| CPU time | 10.62 seconds |
| Started | Aug 27 07:42:01 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 228416 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3561967011 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_link_suspend_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_link_suspend.3561967011 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_link_suspend/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_low_speed_traffic.4275586063 |
| Short name | T1194 |
| Test name | |
| Test status | |
| Simulation time | 4485985148 ps |
| CPU time | 122.52 seconds |
| Started | Aug 27 07:42:03 AM UTC 24 |
| Finished | Aug 27 07:44:09 AM UTC 24 |
| Peak memory | 228420 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=4275586063 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_low_speed_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/c overage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_low_speed_traffic.4275586063 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_low_speed_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_inter_pkt_delay.1853178701 |
| Short name | T952 |
| Test name | |
| Test status | |
| Simulation time | 2172347739 ps |
| CPU time | 20.27 seconds |
| Started | Aug 27 07:42:03 AM UTC 24 |
| Finished | Aug 27 07:42:25 AM UTC 24 |
| Peak memory | 228644 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=26 +out_data_delay=26 +UVM_NO_RELNOTES +UVM_VERBOSITY= UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1853178701 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UV M_TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-si m-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_inter_pkt_delay.1853178701 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_max_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_in_transaction.2719165212 |
| Short name | T910 |
| Test name | |
| Test status | |
| Simulation time | 283464116 ps |
| CPU time | 1.58 seconds |
| Started | Aug 27 07:42:04 AM UTC 24 |
| Finished | Aug 27 07:42:06 AM UTC 24 |
| Peak memory | 216132 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=64 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2719165212 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_ra nd_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_in_transaction.2719165212 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_max_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_length_out_transaction.1322572468 |
| Short name | T911 |
| Test name | |
| Test status | |
| Simulation time | 220524897 ps |
| CPU time | 1.57 seconds |
| Started | Aug 27 07:42:04 AM UTC 24 |
| Finished | Aug 27 07:42:06 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322572468 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_max_length_out_transaction.1322572468 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_max_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_non_iso_usb_traffic.80522565 |
| Short name | T960 |
| Test name | |
| Test status | |
| Simulation time | 2930724716 ps |
| CPU time | 22.94 seconds |
| Started | Aug 27 07:42:04 AM UTC 24 |
| Finished | Aug 27 07:42:28 AM UTC 24 |
| Peak memory | 230596 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=80522565 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_max_non_iso_usb_traffic_ vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb - cm_log /dev/null -cm_name 9.usbdev_max_non_iso_usb_traffic.80522565 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_max_non_iso_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_max_usb_traffic.1002833811 |
| Short name | T986 |
| Test name | |
| Test status | |
| Simulation time | 2852757307 ps |
| CPU time | 34.83 seconds |
| Started | Aug 27 07:42:04 AM UTC 24 |
| Finished | Aug 27 07:42:40 AM UTC 24 |
| Peak memory | 230532 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1002833811 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_max_usb_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cov erage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_max_usb_traffic.1002833811 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_max_usb_traffic/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_inter_pkt_delay.3509207542 |
| Short name | T950 |
| Test name | |
| Test status | |
| Simulation time | 2350491509 ps |
| CPU time | 16.7 seconds |
| Started | Aug 27 07:42:05 AM UTC 24 |
| Finished | Aug 27 07:42:24 AM UTC 24 |
| Peak memory | 235236 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +setup_data_delay=8 +out_data_delay=8 +UVM_NO_RELNOTES +UVM_VERBOSITY=UV M_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3509207542 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_ TEST_SEQ=usbdev_streaming_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim- vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_min_inter_pkt_delay.3509207542 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_min_inter_pkt_delay/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_in_transaction.426259680 |
| Short name | T913 |
| Test name | |
| Test status | |
| Simulation time | 178913610 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:42:05 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +num_of_bytes=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=426259680 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand _trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defaul t.vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_in_transaction.426259680 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_min_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_min_length_out_transaction.3032119791 |
| Short name | T914 |
| Test name | |
| Test status | |
| Simulation time | 190520322 ps |
| CPU time | 1.29 seconds |
| Started | Aug 27 07:42:05 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3032119791 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_min_length_out_transac tion_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_min_length_out_transaction.3032119791 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_min_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_nak_trans.1384073633 |
| Short name | T150 |
| Test name | |
| Test status | |
| Simulation time | 175996473 ps |
| CPU time | 1.11 seconds |
| Started | Aug 27 07:42:06 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1384073633 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_nak_trans_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_nak_trans.1384073633 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_nak_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_iso.693358364 |
| Short name | T915 |
| Test name | |
| Test status | |
| Simulation time | 147052026 ps |
| CPU time | 1.36 seconds |
| Started | Aug 27 07:42:06 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=693358364 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_iso_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nul l -cm_name 9.usbdev_out_iso.693358364 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_out_iso/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_stall.1932093139 |
| Short name | T918 |
| Test name | |
| Test status | |
| Simulation time | 155232691 ps |
| CPU time | 1.27 seconds |
| Started | Aug 27 07:42:08 AM UTC 24 |
| Finished | Aug 27 07:42:10 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1932093139 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_stall_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_out_stall.1932093139 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_out_stall/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_out_trans_nak.1449438291 |
| Short name | T886 |
| Test name | |
| Test status | |
| Simulation time | 182914899 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:42:08 AM UTC 24 |
| Finished | Aug 27 07:42:11 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1449438291 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_out_trans_nak_vseq +en _cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log / dev/null -cm_name 9.usbdev_out_trans_nak.1449438291 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_out_trans_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pending_in_trans.2248628491 |
| Short name | T922 |
| Test name | |
| Test status | |
| Simulation time | 147103223 ps |
| CPU time | 1.2 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 215720 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2248628491 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pending_in_trans_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_lo g /dev/null -cm_name 9.usbdev_pending_in_trans.2248628491 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_pending_in_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_pinflip.1032938396 |
| Short name | T924 |
| Test name | |
| Test status | |
| Simulation time | 231867322 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 215672 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +pin_flip=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1032938396 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config _pinflip_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_pinflip.1032938396 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_phy_config_pinflip/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_config_usb_ref_disable.2553910863 |
| Short name | T923 |
| Test name | |
| Test status | |
| Simulation time | 156116146 ps |
| CPU time | 1.32 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2553910863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_config_usb_ref_dis able_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default. vdb -cm_log /dev/null -cm_name 9.usbdev_phy_config_usb_ref_disable.2553910863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_phy_config_usb_ref_disable/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_phy_pins_sense.1479912225 |
| Short name | T921 |
| Test name | |
| Test status | |
| Simulation time | 33995897 ps |
| CPU time | 1.08 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 216188 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1479912225 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_phy_pins_sense_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_phy_pins_sense.1479912225 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_phy_pins_sense/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_buffer.1308175554 |
| Short name | T267 |
| Test name | |
| Test status | |
| Simulation time | 10490199818 ps |
| CPU time | 36.33 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:48 AM UTC 24 |
| Peak memory | 228440 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1308175554 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_buffer_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_pkt_buffer.1308175554 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_pkt_buffer/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_received.2476922528 |
| Short name | T925 |
| Test name | |
| Test status | |
| Simulation time | 174885989 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:42:10 AM UTC 24 |
| Finished | Aug 27 07:42:13 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2476922528 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_received_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_pkt_received.2476922528 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_pkt_received/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_pkt_sent.197686776 |
| Short name | T931 |
| Test name | |
| Test status | |
| Simulation time | 218660766 ps |
| CPU time | 1.51 seconds |
| Started | Aug 27 07:42:12 AM UTC 24 |
| Finished | Aug 27 07:42:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=197686776 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_pkt_sent_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_pkt_sent.197686776 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_pkt_sent/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_disconnects.1171072878 |
| Short name | T1116 |
| Test name | |
| Test status | |
| Simulation time | 6484101009 ps |
| CPU time | 80.04 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:43:37 AM UTC 24 |
| Peak memory | 228540 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_vbus_disconnects=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1171072878 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_disconnects.1171072878 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_rand_bus_disconnects/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_bus_resets.1772943501 |
| Short name | T1122 |
| Test name | |
| Test status | |
| Simulation time | 6691721446 ps |
| CPU time | 81.97 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:43:39 AM UTC 24 |
| Peak memory | 232564 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_reset_signaling=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1772943501 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defa ult.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_bus_resets.1772943501 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_rand_bus_resets/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rand_suspends.3552076277 |
| Short name | T1724 |
| Test name | |
| Test status | |
| Simulation time | 14691170441 ps |
| CPU time | 304.77 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:47:24 AM UTC 24 |
| Peak memory | 235300 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +do_resume_signaling=1 +en_scb_rdchk_linkstate=0 +UVM_NO_RELNOTES +UVM_V ERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3552076277 -assert nopostproc +UVM_TESTNAME=usbdev_base _test +UVM_TEST_SEQ=usbdev_bus_rand_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/u sbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_rand_suspends.3552076277 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_rand_suspends/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_in_transaction.857833957 |
| Short name | T928 |
| Test name | |
| Test status | |
| Simulation time | 203372543 ps |
| CPU time | 1.07 seconds |
| Started | Aug 27 07:42:12 AM UTC 24 |
| Finished | Aug 27 07:42:14 AM UTC 24 |
| Peak memory | 216084 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=857833957 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_in_rand_trans_vseq +en_ cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /d ev/null -cm_name 9.usbdev_random_length_in_transaction.857833957 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_random_length_in_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_random_length_out_transaction.2357169937 |
| Short name | T930 |
| Test name | |
| Test status | |
| Simulation time | 181609186 ps |
| CPU time | 1.24 seconds |
| Started | Aug 27 07:42:12 AM UTC 24 |
| Finished | Aug 27 07:42:14 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2357169937 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_random_length_out_tran saction_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/defau lt.vdb -cm_log /dev/null -cm_name 9.usbdev_random_length_out_transaction.2357169937 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_random_length_out_transaction/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_resume_link_active.1094330001 |
| Short name | T943 |
| Test name | |
| Test status | |
| Simulation time | 20172209725 ps |
| CPU time | 25.6 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:42 AM UTC 24 |
| Peak memory | 218000 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1094330001 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_resume_link_active_vse q +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_ log /dev/null -cm_name 9.usbdev_resume_link_active.1094330001 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_resume_link_active/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rx_crc_err.3306315007 |
| Short name | T934 |
| Test name | |
| Test status | |
| Simulation time | 191113409 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:17 AM UTC 24 |
| Peak memory | 216120 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3306315007 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_crc_err_vseq +en_co v=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev /null -cm_name 9.usbdev_rx_crc_err.3306315007 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_rx_crc_err/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_rx_full.3844393414 |
| Short name | T940 |
| Test name | |
| Test status | |
| Simulation time | 300890617 ps |
| CPU time | 1.98 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:18 AM UTC 24 |
| Peak memory | 216044 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3844393414 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_rx_full_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/nu ll -cm_name 9.usbdev_rx_full.3844393414 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_rx_full/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_setup_stage.1572723562 |
| Short name | T937 |
| Test name | |
| Test status | |
| Simulation time | 197483403 ps |
| CPU time | 1.4 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1572723562 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_stage_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_setup_stage.1572723562 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_setup_stage/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_setup_trans_ignored.2107188147 |
| Short name | T935 |
| Test name | |
| Test status | |
| Simulation time | 154102993 ps |
| CPU time | 1.3 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:17 AM UTC 24 |
| Peak memory | 216104 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2107188147 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_setup_trans_ignored_vs eq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm _log /dev/null -cm_name 9.usbdev_setup_trans_ignored.2107188147 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_setup_trans_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_smoke.751297269 |
| Short name | T939 |
| Test name | |
| Test status | |
| Simulation time | 248259085 ps |
| CPU time | 1.53 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:18 AM UTC 24 |
| Peak memory | 216124 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=751297269 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_smoke_vseq +en_cov=1 -c m line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_smoke.751297269 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_smoke/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_spurious_pids_ignored.3690654110 |
| Short name | T1077 |
| Test name | |
| Test status | |
| Simulation time | 2293462339 ps |
| CPU time | 61.01 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:43:18 AM UTC 24 |
| Peak memory | 228424 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +wt_spurious_pids=1 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -u cli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3690654110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_ba d_traffic_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/def ault.vdb -cm_log /dev/null -cm_name 9.usbdev_spurious_pids_ignored.3690654110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_spurious_pids_ignored/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stall_priority_over_nak.2654099173 |
| Short name | T936 |
| Test name | |
| Test status | |
| Simulation time | 160568061 ps |
| CPU time | 1.15 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:18 AM UTC 24 |
| Peak memory | 216152 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=2654099173 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_priority_over_na k_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stall_priority_over_nak.2654099173 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_stall_priority_over_nak/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stall_trans.1322277831 |
| Short name | T938 |
| Test name | |
| Test status | |
| Simulation time | 163588001 ps |
| CPU time | 1.26 seconds |
| Started | Aug 27 07:42:15 AM UTC 24 |
| Finished | Aug 27 07:42:18 AM UTC 24 |
| Peak memory | 216184 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1322277831 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stall_trans_vseq +en_c ov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /de v/null -cm_name 9.usbdev_stall_trans.1322277831 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_stall_trans/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_stream_len_max.3924824116 |
| Short name | T941 |
| Test name | |
| Test status | |
| Simulation time | 537999488 ps |
| CPU time | 2.51 seconds |
| Started | Aug 27 07:42:17 AM UTC 24 |
| Finished | Aug 27 07:42:20 AM UTC 24 |
| Peak memory | 217960 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=3924824116 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_stream_len_max_vseq +e n_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_stream_len_max.3924824116 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_stream_len_max/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_streaming_out.1935138080 |
| Short name | T967 |
| Test name | |
| Test status | |
| Simulation time | 1840660210 ps |
| CPU time | 13.87 seconds |
| Started | Aug 27 07:42:17 AM UTC 24 |
| Finished | Aug 27 07:42:32 AM UTC 24 |
| Peak memory | 230392 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/ repo/hw/dv/tools/sim.tcl +ntb_random_seed=1935138080 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_streaming_vseq +en_cov =1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/ null -cm_name 9.usbdev_streaming_out.1935138080 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_streaming_out/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_timeout_missing_host_handshake.3822376775 |
| Short name | T916 |
| Test name | |
| Test status | |
| Simulation time | 1552021606 ps |
| CPU time | 12.35 seconds |
| Started | Aug 27 07:41:55 AM UTC 24 |
| Finished | Aug 27 07:42:08 AM UTC 24 |
| Peak memory | 218108 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +en_scb_rdchk_link_in_err=0 +UVM_NO_RELNOTES +U VM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3822376775 -assert nopostproc +UVM_TESTNAME=usbdev_ base_test +UVM_TEST_SEQ=usbdev_device_timeout_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_20 24_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_timeout_missing_host_handshake.3822376775 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_timeout_missing_host_handshake/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/9.usbdev_tx_rx_disruption.4266055640 |
| Short name | T237 |
| Test name | |
| Test status | |
| Simulation time | 589792013 ps |
| CPU time | 2.1 seconds |
| Started | Aug 27 07:42:17 AM UTC 24 |
| Finished | Aug 27 07:42:20 AM UTC 24 |
| Peak memory | 217996 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=4266055640 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 9.usbdev_tx _rx_disruption.4266055640 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/9.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/90.usbdev_endpoint_types.1464073926 |
| Short name | T506 |
| Test name | |
| Test status | |
| Simulation time | 526756047 ps |
| CPU time | 1.37 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1464073926 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_endpoint_types.1464073926 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/90.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/90.usbdev_tx_rx_disruption.1067301195 |
| Short name | T3180 |
| Test name | |
| Test status | |
| Simulation time | 535578542 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:17 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1067301195 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 90.usbdev_t x_rx_disruption.1067301195 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/90.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/91.usbdev_endpoint_types.3604127751 |
| Short name | T3171 |
| Test name | |
| Test status | |
| Simulation time | 273346328 ps |
| CPU time | 1.05 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3604127751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_endpoint_types.3604127751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/91.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/91.usbdev_tx_rx_disruption.3244635495 |
| Short name | T3175 |
| Test name | |
| Test status | |
| Simulation time | 486210283 ps |
| CPU time | 1.44 seconds |
| Started | Aug 27 07:54:13 AM UTC 24 |
| Finished | Aug 27 07:54:16 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=3244635495 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 91.usbdev_t x_rx_disruption.3244635495 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/91.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/92.usbdev_endpoint_types.182970056 |
| Short name | T3183 |
| Test name | |
| Test status | |
| Simulation time | 381975648 ps |
| CPU time | 1.18 seconds |
| Started | Aug 27 07:54:18 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=182970056 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 92.usbdev_endpoint_types.182970056 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/92.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/92.usbdev_tx_rx_disruption.1902899315 |
| Short name | T126 |
| Test name | |
| Test status | |
| Simulation time | 584555596 ps |
| CPU time | 1.72 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1902899315 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 92.usbdev_t x_rx_disruption.1902899315 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/92.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/93.usbdev_tx_rx_disruption.1885174627 |
| Short name | T3186 |
| Test name | |
| Test status | |
| Simulation time | 628346208 ps |
| CPU time | 1.5 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1885174627 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 93.usbdev_t x_rx_disruption.1885174627 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/93.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/94.usbdev_endpoint_types.2856876547 |
| Short name | T478 |
| Test name | |
| Test status | |
| Simulation time | 310495801 ps |
| CPU time | 1.06 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=2856876547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_endpoint_types.2856876547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/94.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/94.usbdev_tx_rx_disruption.1507249652 |
| Short name | T3191 |
| Test name | |
| Test status | |
| Simulation time | 625504101 ps |
| CPU time | 1.94 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1507249652 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 94.usbdev_t x_rx_disruption.1507249652 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/94.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/95.usbdev_endpoint_types.157727589 |
| Short name | T465 |
| Test name | |
| Test status | |
| Simulation time | 183692932 ps |
| CPU time | 0.88 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=157727589 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 95.usbdev_endpoint_types.157727589 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/95.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/95.usbdev_tx_rx_disruption.1591488860 |
| Short name | T3187 |
| Test name | |
| Test status | |
| Simulation time | 555568317 ps |
| CPU time | 1.47 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1591488860 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 95.usbdev_t x_rx_disruption.1591488860 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/95.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/96.usbdev_endpoint_types.265585751 |
| Short name | T382 |
| Test name | |
| Test status | |
| Simulation time | 483389591 ps |
| CPU time | 1.67 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=265585751 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 96.usbdev_endpoint_types.265585751 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/96.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/96.usbdev_tx_rx_disruption.689163863 |
| Short name | T3188 |
| Test name | |
| Test status | |
| Simulation time | 615863235 ps |
| CPU time | 1.73 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=689163863 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 96.usbdev_tx _rx_disruption.689163863 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/96.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/97.usbdev_endpoint_types.877841547 |
| Short name | T419 |
| Test name | |
| Test status | |
| Simulation time | 394348053 ps |
| CPU time | 1.13 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=877841547 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbde v_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cover age/default.vdb -cm_log /dev/null -cm_name 97.usbdev_endpoint_types.877841547 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/97.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/97.usbdev_tx_rx_disruption.731092525 |
| Short name | T180 |
| Test name | |
| Test status | |
| Simulation time | 601205947 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=731092525 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+b ranch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 97.usbdev_tx _rx_disruption.731092525 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/97.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/98.usbdev_endpoint_types.1602680367 |
| Short name | T480 |
| Test name | |
| Test status | |
| Simulation time | 435145250 ps |
| CPU time | 1.41 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=1602680367 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_endpoint_types.1602680367 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/98.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/98.usbdev_tx_rx_disruption.2795341066 |
| Short name | T3189 |
| Test name | |
| Test status | |
| Simulation time | 526838975 ps |
| CPU time | 1.66 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=2795341066 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 98.usbdev_t x_rx_disruption.2795341066 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/98.usbdev_tx_rx_disruption/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/99.usbdev_endpoint_types.3100303897 |
| Short name | T3185 |
| Test name | |
| Test status | |
| Simulation time | 195625919 ps |
| CPU time | 0.86 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:21 AM UTC 24 |
| Peak memory | 216136 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_configin=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licque ue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_random_seed=3100303897 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbd ev_endpoint_types_vseq +en_cov=1 -cm line+cond+fsm+tgl+branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/cove rage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_endpoint_types.3100303897 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/99.usbdev_endpoint_types/latest |
| Test location | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default/99.usbdev_tx_rx_disruption.1068601110 |
| Short name | T3194 |
| Test name | |
| Test status | |
| Simulation time | 552149042 ps |
| CPU time | 1.84 seconds |
| Started | Aug 27 07:54:19 AM UTC 24 |
| Finished | Aug 27 07:54:22 AM UTC 24 |
| Peak memory | 216128 kb |
| Host | riverbear.c.edafarm-workstations-prod.internal |
| User | miguelosorio |
| Command | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/default/simv +en_scb_rdchk_rx_pid_err=0 +en_scb_rdchk_rx_crc_err=0 +en_scb_rdchk_link _in_err=0 +en_scb_rdchk_rx_bitstuff_err=0 +UVM_NO_RELNOTES +UVM_VERBOSITY=UVM_LOW -licqueue -ucli -do /workspaces/repo/hw/dv/tools/sim.tcl +ntb_ra ndom_seed=1068601110 -assert nopostproc +UVM_TESTNAME=usbdev_base_test +UVM_TEST_SEQ=usbdev_tx_rx_disruption_vseq +en_cov=1 -cm line+cond+fsm+tgl+ branch+assert -cm_dir /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/coverage/default.vdb -cm_log /dev/null -cm_name 99.usbdev_t x_rx_disruption.1068601110 |
| Directory | /workspaces/repo/scratch/os_regression_2024_08_26/usbdev-sim-vcs/99.usbdev_tx_rx_disruption/latest |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |